ICS8304-01 Integrated Circuit Systems, Inc. LOW SKEW, 1-TO-4 LVCMOS / LVTTL INVERTING FANOUT BUFFER GENERAL DESCRIPTION FEATURES The ICS8304-01 is a low skew, 1-to-4 Inverting Fanout B u f fe r a n d a m e m b e r o f t h e HiPerClockS™ HiPerClock S ™ family of High Perfor mance Clock Solutions from ICS. The ICS8304-01 is characterized at full 3.3V for input VDD, and mixed 3.3V and 2.5V for output operating supply modes (VDDO). Guaranteed output and par t-to-par t skew characteristics make the ICS8304-01 ideal for those clock distribution applications demanding well defined perfor mance and repeatability. • 4 LVCMOS / LVTTL outputs ICS • LVCMOS/LVTTL clock input • Maximum output frequency: 166MHz • Output skew: 50ps (maximum) • Part-to-part skew: 600ps (maximum) • Small 8 lead SOIC package saves board space • 3.3V input, outputs may be either 3.3V or 2.5V supply modes • 0°C to 70°C ambient operating temperature • Lead-Free package fully RoHS compliant BLOCK DIAGRAM PIN ASSIGNMENT nQ0 VDDO VDD CLK GND nQ1 1 2 3 4 8 7 6 5 nQ3 nQ2 nQ1 nQ0 CLK 8304AM-01 nQ2 ICS8304-01 nQ3 8-Lead SOIC 3.8mm x 4.8mm x 1.47mm package body M Package Top View www.icst.com/products/hiperclocks.html 1 REV. D MAY 23, 2005 ICS8304-01 Integrated Circuit Systems, Inc. LOW SKEW, 1-TO-4 LVCMOS / LVTTL INVERTING FANOUT BUFFER TABLE 1. PIN DESCRIPTIONS Number Name 1 VDDO Power Type Description Output supply pin. 2 VDD Power 3 CLK Input 4 GN D Power Power supply ground. 5 nQ0 Output Inver ted version of clock input. LVCMOS / LVTTL interface levels. 6 nQ1 Output Inver ted version of clock input. LVCMOS / LVTTL interface levels. 7 nQ2 Output Inver ted version of clock input. LVCMOS / LVTTL interface levels. 8 nQ3 Output Inver ted version of clock input. LVCMOS / LVTTL interface levels. Core supply pin. Pulldown LVCMOS / LVTTL clock input. NOTE: Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values. TABLE 2. PIN CHARACTERISTICS Symbol Parameter CIN RPULLDOWN Input Capacitance Power Dissipation Capacitance (per output) Input Pulldown Resistor ROUT Output Impedance CPD 8304AM-01 Test Conditions Minimum Typical Maximum 4 VDD, VDDO = 3.465V www.icst.com/products/hiperclocks.html 2 Units pF 15 pF 51 kΩ 7 Ω REV. D MAY 23, 2005 ICS8304-01 Integrated Circuit Systems, Inc. LOW SKEW, 1-TO-4 LVCMOS / LVTTL INVERTING FANOUT BUFFER ABSOLUTE MAXIMUM RATINGS Supply Voltage, VDD X 4.6V Inputs, VDD -0.5V to VDD + 0.5 V Outputs, VDDO -0.5V to VDDO + 0.5V Package Thermal Impedance, θJA 112.7°C/W (0 lfpm) Storage Temperature, TSTG -65°C to 150°C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDO = 3.3V±5%, TA = 0°C TO 70°C Symbol Parameter Test Conditions Minimum Typical Maximum Units VDD Core Supply Voltage 3.135 3.3 3.465 V VDDO Output Power Supply Voltage 3.135 3.3 3.465 V IDD Power Supply Current 15 mA IDDO Output Supply Current 8 mA TABLE 3B. LVCMOS / LVTTL DC CHARACTERISTICS, VDD = VDDO = 3.3V±5%, TA = 0°C TO 70°C Symbol Parameter Test Conditions Minimum Typical Maximum VIH Input High Voltage 2 VDD + 0.3 V VIL Input Low Voltage -0.3 1.3 V IIH Input High Current VDD = VIN = 3.465V IIL Input Low Current VDD = 3.465V, VIN = 0V VOH Output High Voltage; NOTE 1 150 -5 Units µA µA 2.6 V Output Low Voltage; NOTE 1 VOL NOTE 1: Outputs terminated with 50Ω to VDDO/2. See Parameter Measurement Information Section", "3.3V Output Load Test Circuit". 0.5 V TABLE 4A. AC CHARACTERISTICS, VDD = VDDO = 3.3V±5%, TA = 0°C TO 70°C Symbol Parameter fMAX Output Frequency tPD Propagation Delay; NOTE 1 Test Conditions Minimum ƒ≤ 166MHz Typical Maximum Units 166 MHz 3.5 ns 2.3 tsk(o) Output Skew; NOTE 2, 4 50 ps tsk(pp) Par t-to-Par t Skew; NOTE 3, 4 600 ps tR Output Rise Time 30% to 70% 250 500 ps tF Output Fall Time 30% to 70% 250 500 ps 60 % odc Output Duty Cycle f ≤ 166MHz 40 All parameters measured at 166MHz unless noted otherwise. NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output. Measured from the rising edge of the input to the falling edge of the output. NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at VDDO/2. NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions. Using the same type of inputs on each device, the outputs are measured at VDDO/2. NOTE 4: This parameter is defined in accordance with JEDEC Standard 65. 8304AM-01 www.icst.com/products/hiperclocks.html 3 REV. D MAY 23, 2005 Integrated Circuit Systems, Inc. ICS8304-01 LOW SKEW, 1-TO-4 LVCMOS / LVTTL INVERTING FANOUT BUFFER TABLE 3C. POWER SUPPLY DC CHARACTERISTICS, VDD = 3.3V±5%, VDDO = 2.5V±5%, TA = 0°C TO 70°C Symbol Parameter Minimum Typical Maximum Units VDD Core Supply Voltage Test Conditions 3.135 3.3 3.465 V 2.375 2.5 VDDO Output Supply Voltage 2.625 V IDD Power Supply Current 15 mA IDDO Output Supply Current 8 mA TABLE 3D. LVCMOS / LVTTL DC CHARACTERISTICS, VDD = 3.3V±5%, VDDO = 2.5V±5%, TA = 0°C TO 70°C Symbol Parameter Maximum Units VIH Input High Voltage Test Conditions Minimum 2 Typical VDD + 0.3 V VIL Input Low Voltage -0.3 1.3 V IIH Input High Current VDD = VIN = 3.465V IIL Input Low Current VDD = 3.465V, VIN = 0V VOH Output High Voltage; NOTE 1 150 µA -5 µA 2.1 V Output Low Voltage; NOTE 1 VOL NOTE 1: Outputs terminated with 50Ω to VDDO/2. See Parameter Measurement Information Section, "3.3V/2.5V Output Load Test Circuit". 0.5 V TABLE 4B. AC CHARACTERISTICS, VDD = 3.3V±5%, VDDO = 2.5V±5%, TA = 0°C TO 70°C Symbol Parameter Test Conditions Minimum ƒ≤ 166MHz 2.5 Typical Maximum Units 166 MHz 3.6 ns 50 ps fMAX Maximum Output Frequency tPD Propagation Delay; NOTE 1 tsk(o) Output Skew; NOTE 2, 4 tsk(pp) Par t-to-Par t Skew; NOTE 3, 4 600 ps tR Output Rise Time 30% to 70% 250 500 ps tF Output Fall Time 30% to 70% 250 500 ps 60 % odc Output Duty Cycle f ≤ 166MHz 40 All parameters measured at 166MHz unless noted otherwise. NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output. Measured from the rising edge of the input to the falling edge of the output. NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at VDDO/2. NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions. Using the same type of inputs on each device, the outputs are measured at VDDO/2. NOTE 4: This parameter is defined in accordance with JEDEC Standard 65. 8304AM-01 www.icst.com/products/hiperclocks.html 4 REV. D MAY 23, 2005 ICS8304-01 Integrated Circuit Systems, Inc. LOW SKEW, 1-TO-4 LVCMOS / LVTTL INVERTING FANOUT BUFFER PARAMETER MEASUREMENT INFORMATION 1.65V±5% 2.05V±5% 1.25V±5% SCOPE VDD, VDDO VDDO Qx LVCMOS SCOPE V DD Qx LVCMOS GND GND VDDO VDDO 2 2 -1.65V±5% -1.25V±5% 3.3V OUTPUT LOAD AC TEST CIRCUIT nQx 3.3V/2.5V OUTPUT LOAD AC TEST CIRCUIT nQx V V DDO DDO PART 1 2 2 V V DDO nQy DDO nQy 2 PART 2 tsk(o) OUTPUT SKEW tsk(pp) PART-TO-PART SKEW 70% 70% CLK Clock Outputs 2 30% 30% tR VDD 2 nQ0:nQ3 tF VDDO 2 tPD OUTPUT RISE/FALL TIME PROPAGATION DELAY nQ0:nQ3 V DDO 2 t PW t PERIOD OUTPUT DUTY CYLE/PULSE WIDTH/PERIOD 8304AM-01 www.icst.com/products/hiperclocks.html 5 REV. D MAY 23, 2005 ICS8304-01 Integrated Circuit Systems, Inc. LOW SKEW, 1-TO-4 LVCMOS / LVTTL INVERTING FANOUT BUFFER RELIABILITY INFORMATION TABLE 5. θJAVS. AIR FLOW TABLE FOR 8 LEAD SOIC θJA by Velocity (Linear Feet per Minute) 0 Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards 153.3°C/W 112.7°C/W 200 500 128.5°C/W 103.3°C/W 115.5°C/W 97.1°C/W NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs. TRANSISTOR COUNT The transistor count for ICS8304-01 is: 416 8304AM-01 www.icst.com/products/hiperclocks.html 6 REV. D MAY 23, 2005 ICS8304-01 Integrated Circuit Systems, Inc. PACKAGE OUTLINE - SUFFIX M LOW SKEW, 1-TO-4 LVCMOS / LVTTL INVERTING FANOUT BUFFER FOR 8 LEAD SOIC TABLE 6. PACKAGE DIMENSIONS - SUFFIX M SYMBOL Millimeters MINIMUN N MAXIMUM 8 A 1.35 1.75 A1 0.10 0.25 B 0.33 0.51 C 0.19 0.25 D 4.80 5.00 E 3.80 e H 4.00 1.27 BASIC 5.80 6.20 h 0.25 0.50 L 0.40 1.27 α 0° 8° Reference Document: JEDEC Publication 95, MS-012 8304AM-01 www.icst.com/products/hiperclocks.html 7 REV. D MAY 23, 2005 ICS8304-01 Integrated Circuit Systems, Inc. LOW SKEW, 1-TO-4 LVCMOS / LVTTL INVERTING FANOUT BUFFER TABLE 6. ORDERING INFORMATION Part/Order Number Marking Package Shipping Packaging Temperature ICS8304AM-01 8304AM01 8 lead SOIC tube 0°C to 70°C ICS8304AM-01T 8304AM01 8 lead SOIC 2500 tape & reel 0°C to 70°C ICS8304AM-01LF 8304A01L 8 lead "Lead-Free" SOIC tube 0°C to 70°C ICS8304AM-01LFT 8304A01L 8 lead "Lead-Free" SOIC 2500 tape & reel 0°C to 70°C NOTE: Par ts that are ordered with an "LF" suffix to the par t number are the Pb-Free configuration and are RoHS compliant. The aforementioned trademark, HiPerClockS™ is a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 8304AM-01 www.icst.com/products/hiperclocks.html 8 REV. D MAY 23, 2005 Integrated Circuit Systems, Inc. ICS8304-01 LOW SKEW, 1-TO-4 LVCMOS / LVTTL INVERTING FANOUT BUFFER REVISION HISTORY SHEET Rev Table 4A Page 3 Description of Change AC Characteristics Table - revised tpLH row to tPD and revised NOTE 1. Deleted tpHL row. Date B 4B 4 AC Characteristics Table - revised tpLH row to tPD and revised NOTE 1. Deleted tpHL row. 4/9/02 6&7 4A 3 4B 4 6 T1 10 2 T2 2 T6 10 T6 1 8 Updated Figures. AC Characteristics Table - changed tsk(pp) Par t-to-Par t Skew from 250ps Max. to 600ps Max. 5/20/02 C C D D 8304AM-01 AC Characteristics Table - changed tsk(pp) Par t-to-Par t Skew from 250ps Max. to 600ps Max. Ordering Information, updated marking from 8304-01 to 8304AM01 Pin Descripiton Table - revised VDD description to read "Core supply pin." (Also changed in Power Supply tables.) Deleted Pullup from note. Pin Characteristics Table -CIN changed 4pF max. to 4pF typical. Deleted RPULLUP row. Ordering Information Table - changed Par t/Order number ICS8304M-01/-01T to ICS8304AM-01/-01T. Updated format throughout data sheet. Features Section - added Lead-Free bullet. Ordering Information Table - add Lead-Free par ts. www.icst.com/products/hiperclocks.html 9 6/17/02 3/1/04 5/23/05 REV. D MAY 23, 2005