ICS840031I Integrated Circuit Systems, Inc. FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR GENERAL DESCRIPTION FEATURES The ICS840031I is an IEEE 1394b Clock Generator and a member of the HiPerClocksTM HiPerClockS™ family of high performance devices from ICS. The ICS840031I uses a 24.576MHz crystal to synthesize 98.304MHz. The ICS840031I has excellent phase jitter performance, from 12KHz – 20MHz integration range. The ICS840031I is packaged in a small 8-pin SOIC, making it ideal for use in systems with limited board space. • (1) LVCMOS/LVTTL output ICS • Crystal oscillator interface designed for a 24.576MHz, 18pF parallel resonant crystal • Output frequency: 98.304MHz (typical) • VCO range: 490MHz to 640MHz • RMS phase jitter @ 98.304MHz, using a 24.576MHz crystal (12KHz - 20MHz): 0.75ps (typical) • RMS phase noise at 98.304MHz (typical) Offset Noise Power 100Hz .............. -103.3 dBc/Hz 1KHz .............. -126.2 dBc/Hz 10KHz .............. -134.2 dBc/Hz 100KHz .............. -132.9 dBc/Hz • 3.3V core/1.8V output operating supply • Lead-Free fully RoHS compliant • -40°C to 85°C ambient operating temperature FREQUENCY TABLE Inputs Crystal Frequency (MHz) 24.576 Output Frequency (MHz) 98.304 BLOCK DIAGRAM PLL_SEL PIN ASSIGNMENT (Pullup) 0 Q0 XTAL_IN OSC XTAL_OUT Phase Detector VCO 589.824MHz w/ 24.576MHz Ref. 1 ÷6 1 2 3 4 8 7 6 5 VDDO Q0 GND PLL_SEL ICS840031I 8-Lead SOIC 3.90mm x 4.90mm x 1.37mm package body M Package Top View M = ÷24 (fixed) 840031AMI VDD XTAL_OUT XTAL_IN VDDA www.icst.com/products/hiperclocks.html 1 REV. A FEBRUARY 24, 2005 ICS840031I Integrated Circuit Systems, Inc. FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR TABLE 1. PIN DESCRIPTIONS Number Name 1 2, 3 4 VDD XTAL_OUT, XTAL_IN VDDA Power Type Description 5 PLL_SEL Input 6 GND Power Power supply ground. 7 Q0 Output Single-ended clock output. LVCMOS/LVTTL interface levels. 8 VDDO Power Output supply pin. Core supply pin. Cr ystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output. Analog supply pin. Input Power Pullup PLL select pin. LVCMOS/LVTTL interface levels. NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values. TABLE 2. PIN CHARACTERISTICS Symbol Parameter CIN Input Capacitance CPD Power Dissipation Capacitance RPULLUP ROUT 840031AMI Test Conditions Minimum Typical Maximum Units 4 pF 18 pF Input Pullup Resistor 51 kΩ Output Impedance 10 Ω VDD = VDDA = 3.465V, VDDO = 1.89V www.icst.com/products/hiperclocks.html 2 REV. A FEBRUARY 24, 2005 ICS840031I Integrated Circuit Systems, Inc. FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR ABSOLUTE MAXIMUM RATINGS Supply Voltage, VDD 4.6V Inputs, VI -0.5V to VDD + 0.5 V Outputs, VO -0.5V to VDDO + 0.5V Package Thermal Impedance, θJA 112.7°C/W (0 lfpm) Storage Temperature, TSTG -65°C to 150°C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDA = 3.3V±5%, VDDO = 1.8V±5%, TA = -40°C TO 85°C Symbol Parameter Minimum Typical Maximum Units VDD Core Supply Voltage Test Conditions 3.135 3.3 3.465 V VDDA Analog Supply Voltage 3.135 3.3 3.465 V VDDO Output Supply Voltage 1.71 1.8 1.89 V IDD Power Supply Current 55 mA IDDA Analog Supply Current 12 mA IDDO Output Supply Current 5 mA TABLE 3B. LVCMOS/LVTTL DC CHARACTERISTICS, VDD = VDDA = 3.3V±5%, VDDO = 1.8V±5%, TA = -40°C TO 85°C Symbol Parameter Test Conditions Minimum Typical Maximum Units VIH Input High Voltage 2 VDD + 0.3 V VIL Input Low Voltage -0.3 0.8 V IIH Input High Current PLL_SEL VDD = VIN = 3.465V 5 µA IIL Input Low Current PLL_SEL VDD = 3.465V, VIN = 0V VOH Output High Voltage; NOTE 1 -150 µA 1.5 V VOL Output Low Voltage; NOTE 1 NOTE 1: Outputs terminated with 50Ω to VDD/2. See Parameter Measurement Information Section, "3.3V/1.8V Output Load Test Circuit". 0.4 V Maximum Units TABLE 4. CRYSTAL CHARACTERISTICS Parameter Test Conditions Minimum Mode of Oscillation Typical Fundamental 26.667 MHz Equivalent Series Resistance (ESR) 50 Ω Shunt Capacitance 7 pF Frequency F_SEL = 1 20.417 24.576 TABLE 5. AC CHARACTERISTICS, VDD = VDDA = 3.3V±5%, VDDO = 1.8V±5%, TA = -40°C TO 85°C Symbol Parameter fOUT Output Frequency RMS Phase Jitter (Random); NOTE 1 Output Rise/Fall Time tjit(Ø) tR / tF Test Conditions fOUT = 98.304MHz, (12KHz to 20MHz) 20% to 80% odc Output Duty Cycle NOTE 1: Please refer to the Phase Noise Plot. 840031AMI www.icst.com/products/hiperclocks.html 3 Minimum Typical Maximum Units 81.67 98.304 106.67 MHz 0.75 ps 0.2 1 ns 46 54 % REV. A FEBRUARY 24, 2005 ICS840031I Integrated Circuit Systems, Inc. FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR TYPICAL PHASE NOISE AT 98.304MHZ ➤ 0 -10 Filter -20 -30 98.304MHz -40 RMS Phase Jitter (Random) 12KHz to 20MHz = 0.75ps (typical) -60 -70 -80 -90 Raw Phase Noise Data -100 ➤ NOISE POWER dBc Hz -50 -110 -120 -130 ➤ -140 -150 -160 Phase Noise Result by adding a Filter to raw data -170 -180 OFFSET FREQUENCY (HZ) -190 10 840031AMI 100 1k 10k 100k www.icst.com/products/hiperclocks.html 4 1M 10M 100M REV. A FEBRUARY 24, 2005 ICS840031I Integrated Circuit Systems, Inc. FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR PARAMETER MEASUREMENT INFORMATION 2.4±0.9V 0.9V±5% Noise Power Phase Noise Plot SCOPE VDD, VDDA VDDO Qx LVCMOS Phase Noise Mask GND Offset Frequency f1 f2 RMS Jitter = Area Under the Masked Phase Noise Plot -0.9V±5% 3.3V/1.8V OUTPUT LOAD AC TEST CIRCUIT RMS PHASE JITTER V DD 80% 80% tR tF 2 Q0 Pulse Width t odc = Clock Outputs PERIOD 20% 20% t PW t PERIOD OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD 840031AMI OUTPUT RISE/FALL TIME www.icst.com/products/hiperclocks.html 5 REV. A FEBRUARY 24, 2005 ICS840031I Integrated Circuit Systems, Inc. FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR APPLICATION INFORMATION POWER SUPPLY FILTERING TECHNIQUES As in any high speed analog circuitry, the power supply pins are vulnerable to random noise. The ICS840031I provides separate power supplies to isolate any high switching noise from the outputs to the internal PLL. VDD, VDDA, and VDDO should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. To achieve optimum jitter performance, power supply isolation is required. Figure 1 illustrates how a 10Ω resistor along with a 10µF and a .01µF bypass capacitor should be connected to each VDDA pin. 3.3V VDD .01µF 10Ω V DDA .01µF 10µF FIGURE 1. POWER SUPPLY FILTERING CRYSTAL INPUT INTERFACE parallel resonant crystal and were chosen to minimize the ppm error. The optimum C1 and C2 values can be slightly adjusted for different board layouts. The ICS840031I has been characterized with 18pF parallel resonant crystals. The capacitor values, C1 and C2, shown in Figure 2 below were determined using a 24.576MHz, 18pF XTAL_OUT C1 33p X1 18pF Parallel Crystal XTAL_IN C2 22p Figure 2. CRYSTAL INPUt INTERFACE 840031AMI www.icst.com/products/hiperclocks.html 6 REV. A FEBRUARY 24, 2005 ICS840031I Integrated Circuit Systems, Inc. FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR APPLICATION SCHEMATIC EXAMPLE example, an 18pF parallel resonant crystal is used. The C1=22pF and C2=33pF are approximate values for frequency accuracy. The C1 and C2 may be slightly adjusted for optimizing frequency accuracy. Figure 3 shows a schematic example of the ICS840031I. In this example, a series termination, one of LVCMOS termination approaches, is shown. Additional LVCMOS termination approaches are shown in the LVCMOS Termination Application Note. In this VDD VDD C6 0.1u R1 VDDO U1 1K 1 2 3 4 C2 33pF VDDO Q0 GND PLL_SEL VDD XTAL_OUT XTAL_IN VDDA X1 CL=18pF R3 40 8 7 6 5 Zo = 50 Ohm LVCMOS C5 ICS840031i C1 22pF 0.1u VDD R2 VDDA 10 C3 10uF C4 VDD=3.3V 0.1u VDDO=1.8V FIGURE 3. ICS840031I APPLICATION SCHEMATIC EXAMPLE RELIABILITY INFORMATION TABLE 6. θJAVS. AIR FLOW TABLE FOR 8 LEAD SOIC θJA by Velocity (Linear Feet per Minute) Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards 0 200 500 153.3°C/W 112.7°C/W 128.5°C/W 103.3°C/W 115.5°C/W 97.1°C/W NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs. TRANSISTOR COUNT The transistor count for ICS840031I is: 1787 840031AMI www.icst.com/products/hiperclocks.html 7 REV. A FEBRUARY 24, 2005 ICS840031I Integrated Circuit Systems, Inc. PACKAGE OUTLINE - M SUFFIX FOR FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR 8 LEAD SOIC TABLE 7. PACKAGE DIMENSIONS SYMBOL Millimeters MINIMUN N MAXIMUM 8 A 1.35 1.75 A1 0.10 0.25 B 0.33 0.51 C 0.19 0.25 D 4.80 5.00 E 3.80 4.00 e 1.27 BASIC H 5.80 6.20 h 0.25 0.50 L 0.40 1.27 α 0° 8° Reference Document: JEDEC Publication 95, MS-012 840031AMI www.icst.com/products/hiperclocks.html 8 REV. A FEBRUARY 24, 2005 ICS840031I Integrated Circuit Systems, Inc. FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR TABLE 8. ORDERING INFORMATION Part/Order Number Marking Package Count Temperature ICS840031AMI 840031AI 8 lead SOIC tube -40°C to 85°C ICS840031AMIT 840031AI 8 lead SOIC 2500 tape & reel -40°C to 85°C ICS840031AMILF 40031AIL 8 lead "Lead-Free" SOIC tube -40°C to 85°C ICS840031AMILFT 40031AIL 8 lead "Lead-Free" SOIC 2500 tape & reel -40°C to 85°C The aforementioned trademarks, HiPerClockS™ and FemtoClocks™ are a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 840031AMI www.icst.com/products/hiperclocks.html 9 REV. A FEBRUARY 24, 2005