CMLMICRO FX465D5

CML Semiconductor Products
PRODUCT INFORMATION
Extended Code CTCSS
Encoder/Decoder
FX465
Publication D/465/2 May 1996
Advance Information
Applications
Mobile Radio Systems
Features
Low-Voltage (3-Volt) Supply
47 Programmable Sub-Audio
Tones + NOTONE
Community Base Stations
Meets MPT1306 and TIA/EIA 603
Sub-Audio Signalling and
Selective Calling
“Sports Radio” (Japan)
High Voiceband/CTCSS Isolation
Status and Alarm Systems
Separate Sub-Audio and Rx/Tx
Audio Paths and Filtering
Amateur Radio
REFERENCE
VOLTAGE
TONE DECODE
FILTER
TONE IN
FILTER
-
+
TONE IN
f TONE
CLKS
+
CLKS
LOAD/LATCH
D5/SERIAL ENABLE
D4/SERIAL ENABLE
D3/SERIAL DATA IN
CLKS/XTAL
DIGITAL
TONE DETECT
LOGIC
Rx TONE DETECT
TONE OUT FILTER
INTERFACE
D2/SERIAL CLOCK
D1
D0
RX/TX
AND
Tx TONE OUT
CLKS/XTAL
CLOCK
GENERATION
A0 - A5
PTL
TONE
VDD
ROM
XTAL/CLOCK
D0 - D10
XTAL
48 x 10
VSS
FX465
VBIAS
CLK
Tx AUDIO OUT
TX AUDIO IN
Rx AUDIO OUT
RX AUDIO IN
AUDIO FILTER
DECODE COMPARATOR REF
DECODE COMPARATOR IN
+
Rx TONE DECODE
-
Fig.1 Functional Block Diagram
New SSOP D5
package
Brief Description
The FX465 is a 3-volt, half-duplex predictive
Continuous Tone Controlled Squelch System (CTCSS)
encoder/decoder microcircuit. The FX465 has integral
voice-band filtering for prefiltering of Tx audio and the
rejection of the CTCSS tone in receive.
Under µProcessor control, the FX465 will encode
and decode any one of 47 sub-audio frequencies
(+NOTONE) in the range 67.0Hz to 254.1Hz. Tone
frequencies and all functional commands can be
loaded to the device in either pin-selectable 8-bit
parallel or serial format.
A separate, Rx/Tx voice-audio path is available with
a highpass (sub-audio reject) filter automatically placed
in the relevant Rx or Tx voice line.
The Rx sub-audio (CTCSS) path contains a
(selected tone frequency) bandpass filter and period
detector providing a logic level output (Rx Tone Detect)
to indicate a successful decode operation.
Rx “Press to Listen” (PTL) and Tx “Squelch-Tail
Elimination” functions are available in both command
loading modes. The squelch-tail elimination function
will provide (Tx tone) phase-reversal to minimise the
annoying audio outputs that occur at the receiver on
completion of a transmission.
Tone frequencies and filter accuracies are
maintained by an on-chip 4.0MHz clock oscillator
employing an external crystal or clock pulse input.
The FX465, which exhibits high audio and sub-audio
performance with low falsing, is available in a 24-pin
plastic small outline SSOP package.
Pin Number
Function
FX465 D5
1
VDD: Positive supply.
2
Xtal/CIock: Input to the on-chip inverter; used with a 4.0MHz Xtal or external clock source.
3
Xtal: Output of the on-chip inverter (clock output).
4
Load/Latch: Controls 8 on-chip latches and is used to latch Rx/Tx, PTL, D0 - D5. This pin is internally
pulled to VDD. A logic ‘1’ applied to this input puts the 8 latches into a 'transparent' mode. A logic ‘0’
applied to this input puts the 8 latches into the ‘latched’ mode.
In parallel mode data is loaded and latched by a logic ‘1’ to ‘0’ transition (see Figure 4).
In serial mode data is loaded and latched by a ‘0’ to ‘1’ to ‘0’ strobe pulse on this pin (see Figure 4).
5
D5/Serial Enable: Data input D5 (Parallel Mode); Serial Enable (Serial Mode).
A logic ‘l’ applied to this input, together with a logic ‘0’ applied to D4/Serial Enable, will put the device
into 'Serial Mode' (see Figure 4). This pin is internally pulled to VDD.
6
D4/Serial Enable: Data input D4 (Parallel Mode); Serial Enable (Serial Mode).
A logic ‘0’ applied to this input, together with a logic ‘1’ applied to D5/Serial Enable, will place the device
into ‘Serial Mode’ (see Figure 4). This pin internally pulled to VDD.
7
D3/Serial Data In: Data input D3 (Parallel Mode); Serial Data Input (Serial Mode).
In Serial Mode this pin becomes the serial data input for D5 - D0, Rx/Tx, PTL (see Figure 4). D5 is
clocked-in first and PTL last. This pin internally pulled to VDD.
8
D2/Serial Clock: Data input D2 (Parallel Mode); Serial Clock Input (Serial Mode).
In Serial Mode this pin becomes the Serial Clock input. Data is clocked on the positive-going edge (see
Figure 4). This pin is internally pulled to VDD.
9
D1: Data input D1 (Parallel Mode); Not used (Serial Mode). This pin is internally pulled to VDD.
10
D0: Data input D0 (Parallel Mode); Not used (Serial Mode). This pin is internally pulled to VDD.
11
VSS: Negative supply.
12
Decode Comparator Ref. (I/P): Internally biased to VDD/3 or 2VDD/3 via 1.0MΩ resistors depending on
the logical state of the Rx Tone Decode pin. Rx Tone Decode = logic ‘1’ will bias this input to 2VDD/3, a
logic ‘0’ will bias this input to VDD/3. This input provides the decode comparator reference voltage;
switching of bias voltages provides hysteresis to reduce 'chatter' under marginal conditions.
2
Pin Number
Function
FX465 D5
13
Rx Tone Decode (O/P): The gated output of the on-chip Decode Comparator.
This output is used to gate the Rx Audio path. A logic ‘0’ on this pin indicates a successful decode and
that the ‘Decode Comparator In’ pin is more positive than the ‘Decode Comparator Ref.’ input (see
Table 1).
14
Decode Comparator In: The inverting input of the Decode Comparator. This pin is normally
connected to the integrated output of the Rx Tone Detect pin.
15
Rx Tone Detect (O/P): In the Rx mode this output will go to a logic ‘1’ during a successful decode
(Table 1). This must be externally integrated to control response and deresponse times (Figure 2).
16
Tx Tone Out: The CTCSS sinewave output appears on this pin under the control of the Rx/Tx pin.
This output, when not transmitting a sub-audio tone, may be biased to VDD/2 as described in Table 1.
17
Rx/Tx: This input (Parallel Mode) selects Rx or Tx modes (see Figure 2). Logic ‘1’ = Rx;
logic ‘0’ = Tx. In Serial Mode this (Rx or Tx) function is serially loaded. This pin is internally pulled to
VDD via a 1MΩ resistor.
18
PTL: A dual-function input. In parallel Rx mode this pin operates as a “Push To Listen” function by
enabling the Rx audio path, thus overriding the tone-squelch function.
In the parallel load mode, Tx operation this input reverses the phase of the transmitting CTCSS tone
(squelch tail elimination). In the serial load mode (Rx and Tx) these functions are serially loaded.
Internal pull-up to VDD.
19
Rx Audio Out: The high-pass filtered ‘Received Audio’ output. This pin outputs audio when Rx Tone
Decode = ‘0’, or PTL = ‘1’ or when ‘Notone’ is programmed (Table 2). In Tx Mode this pin is biased to
VDD/2.
20
Tx Audio Out: The high-pass filtered ‘Transmit Audio’ output. In Tx mode this pin outputs audio
present at the Tx Audio input by opening the Tx audio path. In Rx mode this pin is biased to VDD/2.
21
VBIAS: The output of the on-chip analogue bias circuitry. Held internally at VDD/2, this pin should be
externally decoupled to VSS via a capacitor.
22
Tx Audio In: The Tx Audio Input pin. Tx voice-band audio may be prefiitered, using the audio path,
thus helping to avoid talk-off due to the intermodulation of speech frequencies with the transmitted
CTCSS tone. This pin is internally biased to VDD/2.
23
Rx Audio In: The input to the audio high-pass filter in the Rx Mode.
This pin is internally biased to VDD/2.
24
Tone In: The input to the CTCSS tone detector; this input is internally biased to VDD/2.
3
Application Information
External Components
Component
Value
Tolerance
R1
R2
R3
C1
C2
C3
C4
C5
1.0MΩ
560kΩ
820kΩ
0.1µF
18pF
33pF
0.1µF
0.1µF
±10%
±10%
±10%
±20%
±20%
±20%
±20%
±20%
C6
C7
C8
C9
C10
C11
D1
X1
0.47µF
±20%
0.1µF
±20%
0.1µF
±20%
0.1µF
±20%
0.1µF
±20%
0.1µF
±20%
small signal type
4.0MHz
±0.01%
Note: The values specified for R1, C2 and C3 have been found to be satisfactory when used with a crystal (X1) whose
equivalent series resistance is <= 1000 ohms. The crystal manufacturer should be consulted to determine optimum
values for different crystals.
The 0.1µF value for the dc blocking capacitors C4, C5, C7, C8, C9, C10 and C11 are not a requirement. For the capacitors
C4, C5 and C10, the input impedance is internal to the device and specified as typically 550kΩ. For the remaining
capacitors external circuits will be important in determining input impedance.
Fig.2 Recommended External Components
Input Pin Condition
D0 to D5
Rx/Tx PTL
Output Pin Condition
Decode
Comp.
Input
Result and/or Function
Tone
Tx Audio
Tx
Path
Enabled
Enabled
Rx Tone Rx Tone
Detect Decode
Tone
Decoder
Enabled
TONE
0
0
X
0
1
YES
YES
NO
NOTONE
0
X
X
0
1
NO (BIAS)
YES
NO
TONE
1
0
0
0
1
NO (BIAS)
NO
YES
TONE
1
1
0
0
1
NO (BIAS)
NO
YES
TONE
1
X
1
1
0
NO (BIAS)
NO
YES
NOTONE
1
X
X
X
0
NO (BIAS)
NO
YES
NOTES
1
Normal tone transmit condition.
2
NOTONE programmed in Tx mode; tone transmit output set to VDD/2. Tx audio path enabled.
3
Normal decode standby.
4
Normal decode standby with PTL used to enable audio.
5
Normal ‘decode of correct CTCSS tone’ condition; PTL has no effect.
6
NOTONE programmed in Rx mode; tone transmit output (BIAS). Rx audio path enabled.
Table 1 Combinations of Input/Output Conditions
Rx Audio
Path
Enabled Notes
NO (BIAS)
NO (BIAS)
NO (BIAS)
YES
YES
YES
1
2
3
4
5
6
x = don't care
4
Application Information ......
Description
Voice on shared radio channels is multiplexed with a subaudible CTCSS (Continuous Tone Controlled Subaudible
Squelch) tone as a means of directing messages among user groups sharing the same RF frequencies. CTCSS
modulates the transmitter with a discrete tone, from 39 standard CTCSS tones in the range (67.0Hz to 250.0Hz) according to TIA/EIA-603. There are an additional eight CTCSS tones not specified in TIA/EIA-603 that the FX465 will encode
and decode. They are: 159.8Hz, 183.5Hz, 189.9Hz, 196.6Hz, 199.5Hz, 206.5Hz, 229.1Hz, and 254.1Hz, for a total of 47
OTONE.
CTCSS tones plus N
The FX465 also incorporates Tx/Rx on chip speech filters. In early CTCSS designs, Tx speech was not filtered from
the CTCSS tone, rather the filtering was dependent upon the host transmitter’s pre-emphasis network. At only 6dB/
octave, the attenuation of speech components at higher CTCSS tones was only a few dB which resulted in talk-off (low
frequency voice components unsquelching the receiver audio).
TIA/EIA-603
Nominal
Freq.
67.0
69.3
71.9
74.4
77.0
79.7
82.5
85.4
88.5
91.5
94.8
97.4
100.0
103.5
107.2
110.9
114.8
118.8
123.0
127.3
131.8
136.5
141.3
146.2
151.4
156.7
* 159.8
162.2
167.9
173.8
179.9
* 183.5
186.2
* 189.9
192.8
* 196.6
* 199.5
203.5
* 206.5
210.7
218.1
225.7
* 229.1
233.6
241.8
250.3
* 254.1
NOTONE
CTCSS Programming Table
(All frequencies in Hertz (Hz)
FX465
Freq.
∆fo %
D5
D4
D3
D2
D1
D0
Hex
66.98
69.32
71.901
74.431
76.965
79.677
82.483
85.383
88.494
91.456
94.76
97.435
99.96
103.429
107.147
110.954
114.84
118.793
123.028
127.328
131.674
136.612
141.323
146.044
151.441
156.875
159.936
162.311
167.708
173.936
179.654
183.680
186.289
190.069
192.864
196.329
199.312
203.645
206.207
210.848
217.853
225.339
229.279
233.359
241.970
250.282
254.162
-0.029
0.024
0.001
0.042
-0.046
-0.029
-0.021
-0.020
-0.007
-0.048
-0.042
-0.036
-0.040
-0.069
-0.05
0.049
0.035
-0.006
0.023
0.022
-0.095
0.082
0.016
-0.107
0.027
0.112
0.085
0.069
-0.114
0.078
-0.137
0.098
0.048
0.089
0.033
-0.138
-0.094
0.071
-0.142
0.070
-0.113
-0.160
0.078
-0.103
0.070
-0.007
0.024
1
1
0
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
1
0
1
0
1
1
0
1
0
0
0
1
0
0
0
1
1
1
1
1
1
1
0
1
1
1
0
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
0
1
0
1
1
0
1
1
1
1
0
1
1
0
1
1
0
1
0
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
Data
1
0
1
1
1
1
1
1
1
0
1
0
1
1
1
0
0
0
0
0
0
0
0
1
1
1
0
1
1
1
1
0
1
0
0
1
1
0
1
0
0
0
1
0
0
0
0
0
Clock
1
0
1
1
1
0
1
0
1
1
0
1
0
0
0
1
1
1
1
0
0
0
0
1
1
1
0
1
0
0
0
1
0
1
1
0
0
1
1
1
1
0
1
0
0
0
0
0
x
1
1
1
0
1
1
0
0
0
1
1
0
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
1
0
0
0
1
1
0
1
1
0
0
0
1
1
1
0
0
0
0
x
3F
39
1F
3E
0F
3D
1E
3C
0E
3B
1D
3A
0D
1C
0C
1B
0B
1A
0A
19
09
18
08
17
07
16
31
06
15
05
14
32
04
33
13
34
35
03
36
12
02
11
37
01
10
00
38
30
2X
Serial Input Mode
* Not specified in the TIA/EIA-603 tone set.
Table 2 Tone Programming Information
5
Application Information ......
Fig.3 Frequency Response: Rx Audio Path
Fig.4 Serial and Parallel Timing Diagrams
6
Specification
Absolute Maximum Ratings
Exceeding the maximum rating can result in device damage. Operation of the device outside the operating limits
is not implied.
Supply voltage
-0.3 to 7.0V
Input voltage at any pin (ref VSS = 0V)
-0.3 to (VDD + 0.3V)
Sink/source current (supply pins)
+/- 30mA
(other pins)
+/- 20mA
550mW Max.
Total device dissipation @ T AMB 25°C
Derating
9mW/°C
Operating temperature range: FX465 D5
-40°C to +85°C
Storage temperature range:
-55°C to +125°C
FX465 D5
Operating Limits
All device characteristics are measured under the following conditions unless otherwise specified:
VDD = 3.3V to 5.0V. VSS = 0V. TAMB = 25°C. Xtal/Clock = 4.0MHz 100ppm. 0dB ref: = 750mVrms (proportional to
VDD, see Note 16.)
Composite Signal = 1.0kHz Test Tone at 300mVrms, Noise at 75mVrms (gaussian white noise, band-limited to
6.0kHz), Programmed CTCSS Tone at 30mVrms, fo = 100Hz.
Characteristics
Static Characteristics
Supply Voltage (VDD)
Supply Current
VDD = 5.0V
VDD = 3.3V
Analogue Input Impedance
Analogue Output Impedance
Digital Input Impedance
Input Logic ‘1’
Input Logic ‘0’
Output Logic ‘1’, source = 0.1mA
Output Logic ‘0’, sink = 0.1 mA
Dynamic Characteristics
Decoder
Pure Tone Decode Threshold
Composite Tone Decode Threshold
Decode Input Signal Level
Pure Tone Decode Response Time
Pure Tone Decode De-Response Time
Decode Response Time
De-Response Time
Decode Selectivity: Decode Bandwidth
Upper Decode Band Edge
Lower Decode Band Edge
Encoder
Tone Output Level
Tx Tone Frequency Accuracy (fO error)
Risetime to 90% (nominal output)
fO > 100Hz
fO < 100Hz
Total Harmonic Distortion
Audio Filter
Total Harmonic Distortion
Output Noise Level
(Input ac short cct, audio switch enabled)
SINAD
Spurious Emissions
Cut-Off Frequency
Bandpass Ripple (300Hz – 3000Hz)
Stopband Attenuation <250Hz
Passband Gain at 1.0kHz
See Note
Min.
Typ.
Max.
Unit
2.7
3.3/5.0
5.5
V
70.0
80.0
-
3.7
1.3
0.55
0.45
35.0
-
4.2
1.6
30.0
20.0
mA
mA
MΩ
kΩ
kΩ
%VDD
%VDD
%V DD
%VDD
-20.0
95.0
95.0
-
7.0
115
130
180
15.0
30.0
3.5
140
170
250
250
mVrms
mVrms
dB
ms
ms
ms
ms
1.005fo
1.005fo-1
1.015fo
0.985fo
0.995fo+1
0.995fo
Hz
Hz
11
-1.0
-0.3
0
-
1.0
+0.3
dB
%fO
4, 9
4, 9
-
15.0
45.0
1.5
75
120
2.0
ms
ms
%
5, 7
7
-
1.5
0.5
2.0
-
%
mVrms
7, 8
40.0
33.0
-0.5
50.0
300
1.0
36.0
0
-48
1.8
0.5
dB
dB
Hz
dB
dB
dB
1
1
1
2
2
3
15
12, 13
12, 14
3, 6, 9
3, 9
3, 10
5, 7
5, 7
7
Specification ......
Characteristics
See Note
Min.
Typ.
Max.
Unit
5
-
60.0
-
dB
400
400
400
400
400
400
400
-
1.0
-
ns
ns
ns
ns
ns
ns
ns
MHz
Audio Switch
Isolation
Serial/Parallel Inputs
Parallel Set-Up Time (tSP)
Load/Latch Pulse Width (t L)
Serial Clock Pulse Width (tC)
Serial Set-Up Time (tSS)
Serial Data Hold Time (tH)
Serial Enable Time (t1)
Serial Load/Latch Set-up Time (t2)
Serial Clock Frequency
Notes
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
Refers to Rx/Tx, PTL, Decode Comparator Input, D0, D1, D2, D3, D4, D5 inputs.
All logic outputs.
Composite Signal Test condition.
Any programming tone and RL = 10kΩ. CL = 15pF.
With an input level of 0dB at 1.0kHz.
fO > 100Hz, (for 100Hz >f O >67Hz: t = (100/fO Hz) x 250ms).
Measured in a 30kHz bandwidth.
With an input level of -3.5dB at 1.0kHz
Per TIA/EIA-603.
Per TIA/EIA-603, device will not decode adjacent TIA/EIA-603 tones.
Tone output level is proportional to V DD.
fO = 156.7Hz at -20dB.
Typically 12.5 tone cycles + 40ms
Typically 7 tone cycles + 90ms.
Max composite signal is 3.5dB with: Noise (band limited 6kHz Gaussian) -12dB to 1kHz test tone F 0
CTCSS tone -20dB ref to 1kHz test tone.
For maximum dynamic range, set audio level to 0dB, V DD x 150mVrms, using minimumVDD under
which system is intended to work. e.g. for a 2.7 to 3.3 volt system use 0dB equal to 405mVrms.
16.
Package Outlines
Handling Precautions
The FX465 is available in the package styles outlined
below. Pin 1 identification marking is shown on the
relevant diagram and pins on all package styles number
anti-clockwise when viewed from the top.
The FX465 is a CMOS LSI circuit which includes input
protection. However precautions should be taken to
prevent static discharges which may cause damage.
FX465 D5
24-pin plastic S.S.O.P.
DIM.
A
Z
E
B
L
T
PIN 1
X
Y
H
P
J
C
A
B
C
E
F
H
J
L
P
T
X
Y
Z
MIN.
0.328 (8.33)
0.318 (8.07)
0.212 (5.38)
0.205 (5.20)
0.068 (1.73)
0.078 (1.99)
0.301 (7.65)
0.311 (7.90)
0.286 (7.15)
0.002 (0.05)
0.008 (0.21)
0.015 (0.38)
0.010 (0.25)
0.037 (0.95)
0.022 (0.55)
0.026 (0.65)
0.009 (0.22)
0.005 (0.13)
0°
8°
7°
9°
4°
10°
Angles in degrees
Ordering Information
24-pin plastic S.S.O.P.
MAX.
NOTE : All dimensions in inches (mm.)
F
FX465 D5
TYP.
(D5)
CML does not assume any responsibility for the use of any circuitry described. No circuit patent licences are implied
and CML reserves the right at any time without notice to change the said circuitry.
CML Microcircuits
COMMUNICATION SEMICONDUCTORS
CML Product Data
In the process of creating a more global image, the three standard product semiconductor
companies of CML Microsystems Plc (Consumer Microcircuits Limited (UK), MX-COM, Inc
(USA) and CML Microcircuits (Singapore) Pte Ltd) have undergone name changes and, whilst
maintaining their separate new names (CML Microcircuits (UK) Ltd, CML Microcircuits (USA)
Inc and CML Microcircuits (Singapore) Pte Ltd), now operate under the single title CML Microcircuits.
These companies are all 100% owned operating companies of the CML Microsystems Plc
Group and these changes are purely changes of name and do not change any underlying legal
entities and hence will have no effect on any agreements or contacts currently in force.
CML Microcircuits Product Prefix Codes
Until the latter part of 1996, the differentiator between products manufactured and sold from
MXCOM, Inc. and Consumer Microcircuits Limited were denoted by the prefixes MX and FX
respectively. These products use the same silicon etc. and today still carry the same prefixes.
In the latter part of 1996, both companies adopted the common prefix: CMX.
This notification is relevant product information to which it is attached.
Company contact information is as below:
CML Microcircuits
(UK)Ltd
CML Microcircuits
(USA) Inc.
CML Microcircuits
(Singapore)PteLtd
COMMUNICATION SEMICONDUCTORS
COMMUNICATION SEMICONDUCTORS
COMMUNICATION SEMICONDUCTORS
Oval Park, Langford, Maldon,
Essex, CM9 6WG, England
Tel: +44 (0)1621 875500
Fax: +44 (0)1621 875600
[email protected]
www.cmlmicro.com
4800 Bethania Station Road,
Winston-Salem, NC 27105, USA
Tel: +1 336 744 5050,
0800 638 5577
Fax: +1 336 744 5054
[email protected]
www.cmlmicro.com
No 2 Kallang Pudding Road, 09-05/
06 Mactech Industrial Building,
Singapore 349307
Tel: +65 7450426
Fax: +65 7452917
[email protected]
www.cmlmicro.com
D/CML (D)/1 February 2002