HCA10008 Data Sheet 80V/2.5A Peak, High Frequency Full Bridge FET Driver The HCA10008 is a high frequency, medium voltage Full Bridge N-Channel FET driver IC, available in 20 lead plastic SOIC package. The HCA10008 can drive every possible switch combination except those which would cause a shoot through condition. The HCA10008 can switch at frequencies up to 1MHz and is well suited to driving Voice Coil Motors, high-frequency Class D audio amplifiers, and power supplies. For example, the HCA10008 can drive medium voltage brush motors, and two HCA10008s can be used to drive high performance stepper motors, since the short minimum “on-time” can provide fine micro-stepping capability. Short propagation delays of approximately 55ns maximizes control loop crossover frequencies and dead-times which can be adjusted to near zero to minimize distortion, resulting in rapid, precise control of the driven load. HCA10008 File Number 4772 Features • Independently Drives 4 N-Channel FET in Half Bridge or Full Bridge Configurations • Bootstrap Supply Max Voltage to 95VDC • Drives 1000pF Load at 1MHz in Free Air at 50oC with Rise and Fall Times of Typically 10ns • User Programmable Dead Time • On-Chip Charge Pump and Bootstrap Upper Bias Supplies • DIS (Disable) Overrides Input Control • Input Logic Thresholds Compatible with 5V to 15V Logic Levels • Very Low Power Consumption • Undervoltage Protection Applications • Medium/Large Voice Coil Motors Ordering Information PART NUMBER August 1999 • Full Bridge Power Supplies TEMP RANGE (oC) PACKAGE -40 to 85 20 Ld SOIC (W) PKG. NO. M20.3 • Class D Audio Power Amplifiers • High Performance Motor Controls • Noise Cancellation Systems Pinout • Battery Powered Vehicles HCA10008 (SOIC) TOP VIEW • Peripherals • U.P.S. BHB 1 20 BHO BHI 2 19 BHS DIS 3 18 BLO VSS 4 17 BLS BLI 5 16 VDD ALI 6 15 VCC AHI 7 14 ALS HDEL 8 13 ALO LDEL 9 12 AHS AHB 10 11 AHO 1 • Related Literature - AN9405 Application Note for the HIP4081A and the HCA10008 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 HCA10008 Application Block Diagram 80V 12V BHO BHS BHI LOAD BLO BLI HCA10008 ALI ALO AHS AHI AHO GND GND Functional Block Diagram (1/2 HCA10008) HIGH VOLTAGE BUS ≤ 80VDC AHB 10 UNDERVOLTAGE CHARGE PUMP DRIVER LEVEL SHIFT AND LATCH CBS AHS VDD 16 AHI AHO 11 12 7 TURN-ON DELAY TO VDD (PIN 16) DBS DIS 3 VCC 15 DRIVER ALI TURN-ON DELAY 6 ALO 13 CBF ALS 14 HDEL 8 LDEL 9 VSS 4 TRUTH TABLE INPUT OUTPUT ALI, BLI AHI, BHI U/V DIS ALO, BLO AHO, BHO X X X 1 0 0 1 X 0 0 1 0 0 1 0 0 0 1 0 0 0 0 0 0 X X 1 X 0 0 NOTE: X signifies that input can be either a “1” or “0”. 2 +12VDC BIAS SUPPLY HCA10008 Typical Application (PWM Mode Switching) 80V 1 BHB BHO 20 2 BHI BHS 19 DIS 3 DIS BLO 18 4 VSS BLS 17 PWM INPUT HCA10008 12V 5 BLI 6 ALI 7 AHI 8 HDEL LOAD VDD 16 VCC 15 12V ALS 14 ALO 13 9 LDEL AHS 12 10 AHB AHO 11 GND - TO OPTIONAL CURRENT CONTROLLER + 6V GND 3 HCA10008 Pin Descriptions PIN NUMBER SYMBOL 1 BHB B High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap diode and positive side of bootstrap capacitor to this pin. Internal charge pump supplies 30µA out of this pin to maintain bootstrap supply. Internal circuitry clamps the bootstrap supply to approximately 12.8V. 2 BHI B High-side Input. Logic level input that controls BHO driver (Pin 20). BLI (Pin 5) high level input overrides BHI high level input to prevent half-bridge shoot-through, see Truth Table. DIS (Pin 3) high level input overrides BHI high level input. The pin can be driven by signal levels of 0V to 15V (no greater than VDD). An internal 100µA pull-up to VDD will hold BHI high, so no connection is required if high-side and low-side outputs are to be controlled by the low-side input. 3 DIS DISable input. Logic level input that when taken high sets all four outputs low. DIS high overrides all other inputs. When DIS is taken low the outputs are controlled by the other inputs. The pin can be driven by signal levels of 0V to 15V (no greater than VDD). An internal 100µA pull-up to VDD will hold DIS high if this pin is not driven. 4 VSS Chip negative supply, generally will be ground. 5 BLI B Low-side Input. Logic level input that controls BLO driver (Pin 18). If BHI (Pin 2) is driven high or not connected externally then BLI controls both BLO and BHO drivers, with dead time set by delay currents at HDEL and LDEL (Pin 8 and 9). DIS (Pin 3) high level input overrides BLI high level input. The pin can be driven by signal levels of 0V to 15V (no greater than VDD). An internal 100µA pull-up to VDD will hold BLI high if this pin is not driven. 6 ALI A Low-side Input. Logic level input that controls ALO driver (Pin 13). If AHI (Pin 7) is driven high or not connected externally then ALI controls both ALO and AHO drivers, with dead time set by delay currents at HDEL and LDEL (Pin 8 and 9). DIS (Pin 3) high level input overrides ALI high level input. The pin can be driven by signal levels of 0V to 15V (no greater than VDD). An internal 100µA pull-up to VDD will hold ALI high if this pin is not driven. 7 AHI A High-side Input. Logic level input that controls AHO driver (Pin 11). ALI (Pin 6) high level input overrides AHI high level input to prevent half-bridge shoot-through, see Truth Table. DIS (Pin 3) high level input overrides AHI high level input. The pin can be driven by signal levels of 0V to 15V (no greater than VDD). An internal 100µA pull-up to VDD will hold AHI high, so no connection is required if high-side and low-side outputs are to be controlled by the low-side input. 8 HDEL High-side turn-on DELay. Connect resistor from this pin to VSS to set timing current that defines the turn-on delay of both high-side drivers. The low-side drivers turn-off with no adjustable delay, so the HDEL resistor guarantees no shoot-through by delaying the turn-on of the high-side drivers. HDEL reference voltage is approximately 5.1V. 9 LDEL Low-side turn-on DELay. Connect resistor from this pin to VSS to set timing current that defines the turn-on delay of both low-side drivers. The high-side drivers turn-off with no adjustable delay, so the LDEL resistor guarantees no shoot-through by delaying the turn-on of the low-side drivers. LDEL reference voltage is approximately 5.1V. 10 AHB A High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap diode and positive side of bootstrap capacitor to this pin. Internal charge pump supplies 30µA out of this pin to maintain bootstrap supply. Internal circuitry clamps the bootstrap supply to approximately 12.8V. 11 AHO A High-side Output. Connect to gate of A High-side power MOSFET. 12 AHS A High-side Source connection. Connect to source of A High-side power MOSFET. Connect negative side of bootstrap capacitor to this pin. 13 ALO A Low-side Output. Connect to gate of A Low-side power MOSFET. 14 ALS A Low-side Source connection. Connect to source of A Low-side power MOSFET. 15 VCC Positive supply to gate drivers. Must be same potential as VDD (Pin 16). Connect to anodes of two bootstrap diodes. 16 VDD Positive supply to lower gate drivers. Must be same potential as VCC (Pin 15). Decouple this pin to VSS (Pin 4). 17 BLS B Low-side Source connection. Connect to source of B Low-side power MOSFET. 18 BLO B Low-side Output. Connect to gate of B Low-side power MOSFET. 19 BHS B High-side Source connection. Connect to source of B High-side power MOSFET. Connect negative side of bootstrap capacitor to this pin. 20 BHO B High-side Output. Connect to gate of B High-side power MOSFET. DESCRIPTION 4 HCA10008 Absolute Maximum Ratings Thermal Information Supply Voltage, VDD and VCC . . . . . . . . . . . . . . . . . . . . -0.3V to 16V Logic I/O Voltages . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VDD +0.3V Voltage on AHS, BHS . . . -6.0V (Transient) to 80V (25oC to 125oC) Voltage on AHS, BHS . . .-6.0V (Transient) to 70V (-55oC to 125oC) Voltage on ALS, BLS . . . . . . . -2.0V (Transient) to +2.0V (Transient) Voltage on AHB, BHB . . . . . . VAHS, BHS -0.3V to VAHS, BHS +VDD Voltage on ALO, BLO. . . . . . . . . . . . .VALS, BLS -0.3V to VCC +0.3V Voltage on AHO, BHO . . . . . . VAHS, BHS -0.3V to VAHB, BHB +0.3V Input Current, HDEL and LDEL . . . . . . . . . . . . . . . . . . -5mA to 0mA Phase Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V/ns NOTE: All Voltages relative to VSS, unless otherwise specified. Thermal Resistance (Typical, Note 1) θJA (oC/W) SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .125oC Maximum Lead Temperature (Soldering 10s)). . . . . . . . . . . . .300oC (SOIC - Lead Tips Only) Operating Conditions Supply Voltage, VDD and VCC . . . . . . . . . . . . . . . . . . +9.5V to +15V Voltage on ALS, BLS . . . . . . . . . . . . . . . . . . . . . . . . . -1.0V to +1.0V Voltage on AHB, BHB . . . . . . . .VAHS, BHS +5V to VAHS, BHS +15V Input Current, HDEL and LDEL . . . . . . . . . . . . . . . .-500µA to -50µA Ambient Temperature Range . . . . . . . . . . . . . . . . . . . -40oC to 85oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 100K and TA = 25oC, Unless Otherwise Specified TJS = -40oC TO 125oC TJ = 25oC PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX MIN MAX UNITS All inputs = 0V 8.5 10.5 14.5 7.5 14.5 mA Outputs switching f = 500kHz 9.5 12.5 15.5 8.5 15.5 mA All Inputs = 0V, IALO = IBLO = 0 - 0.1 10 - 20 µA f = 500kHz, No Load 1 1.25 2.0 0.8 3 mA -50 -30 -11 -60 -10 µA 0.6 1.2 1.5 0.5 1.9 mA - 0.02 1.0 - 10 µA IAHB = IAHB = 0, No Load 11.5 12.6 14.0 10.5 14.5 V SUPPLY CURRENTS AND CHARGE PUMPS VDD Quiescent Current IDD VDD Operating Current IDDO VCC Quiescent Current ICC VCC Operating Current ICCO AHB, BHB Quiescent Current Qpump Output Current IAHB, IBHB AHB, BHB Operating Current All Inputs = 0V, IAHO = IBHO = 0 VDD = VCC = VAHB = VBHB = 10V IAHBO, IBHBO f = 500kHz, No Load AHS, BHS, AHB, BHB Leakage Current IHLK AHB-AHS, BHB-BHS Qpump Output Voltage VAHB-VAHS VBHB-VBHS VBHS = VAHS = 80V, VAHB = VBHB = 93V INPUT PINS: ALI, BLI, AHI, BHI, AND DIS Low Level Input Voltage VIL Full Operating Conditions - - 1.0 - 0.8 V High Level Input Voltage VIH Full Operating Conditions 2.5 - - 2.7 - V - 35 - - - mV Input Voltage Hysteresis Low Level Input Current IIL VIN = 0V, Full Operating Conditions -130 -100 -75 -135 -65 µA High Level Input Current IIH VIN = 5V, Full Operating Conditions -1 - +1 -10 +10 µA IHDEL = ILDEL = -100µA 4.9 5.1 5.3 4.8 5.4 V TURN-ON DELAY PINS: LDEL AND HDEL LDEL, HDEL Voltage VHDEL, VLDEL 5 HCA10008 Electrical Specifications VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 100K and TA = 25oC, Unless Otherwise Specified (Continued) TJS = -40oC TO 125oC TJ = 25oC PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX MIN MAX UNITS GATE DRIVER OUTPUT PINS: ALO, BLO, AHO, AND BHO Low Level Output Voltage VOL IOUT = 100mA 0.7 0.85 1.0 0.5 1.1 V High Level Output Voltage VCC-VOH IOUT = -100mA 0.8 0.95 1.1 0.5 1.2 V Peak Pullup Current IO+ VOUT = 0V 1.7 2.6 3.8 1.4 4.1 A Peak Pulldown Current IO- VOUT = 12V 1.7 2.4 3.3 1.3 3.6 A Undervoltage, Rising Threshold UV+ 8.1 8.8 9.4 8.0 9.5 V Undervoltage, Falling Threshold UV- 7.6 8.3 8.9 7.5 9.0 V Undervoltage, Hysteresis HYS 0.25 0.4 0.65 0.2 0.7 V Switching Specifications VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 10K, CL = 1000pF TJS = -40oC TO 125oC TJ = 25oC PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX MIN MAX UNITS Lower Turn-Off Propagation Delay (ALI-ALO, BLI-BLO) TLPHL - 30 60 - 80 ns Upper Turn-Off Propagation Delay (AHI-AHO, BHI-BHO) THPHL - 35 70 - 90 ns Lower Turn-On Propagation Delay (ALI-ALO, BLI-BLO) TLPLH RHDEL = RLDEL = 10K - 45 70 - 90 ns Upper Turn-On Propagation Delay (AHI-AHO, BHI-BHO) THPLH RHDEL = RLDEL = 10K - 60 90 - 110 ns Rise Time TR - 10 25 - 35 ns Fall Time TF - 10 25 - 35 ns Turn-On Input Pulse Width TPWIN-ON RHDEL = RLDEL = 10K 50 - - 50 - ns Turn-Off Input Pulse Width TPWIN-OFF RHDEL = RLDEL = 10K 40 - - 40 - ns Turn-On Output Pulse Width TPWOUT-ON RHDEL = RLDEL = 10K 40 - - 40 - ns Turn-Off Output Pulse Width TPWOUT-OFF RHDEL = RLDEL = 10K 30 - - 30 - ns Disable Turn-Off Propagation Delay (DIS - Lower Outputs) TDISLOW - 45 75 - 95 ns Disable Turn-Off Propagation Delay (DIS - Upper Outputs) TDISHIGH - 55 85 - 105 ns TDLPLH - 40 70 - 90 ns TREF-PW 240 410 550 200 600 ns TUEN - 450 620 - 690 ns Disable to Lower Turn-On Propagation Delay (DIS - ALO and BLO) Refresh Pulse Width (ALO and BLO) Disable to Upper Enable (DIS - AHO and BHO) 6 HCA10008 Timing Diagrams X = A OR B, A AND B HALVES OF BRIDGE CONTROLLER ARE INDEPENDENT TLPHL THPHL U/V = DIS = 0 XLI XHI XLO XHO THPLH TLPLH FIGURE 1. INDEPENDENT MODE U/V = DIS = 0 XLI XHI = HI OR NOT CONNECTED XLO XHO FIGURE 2. BISTATE MODE TDLPLH TDIS U/V OR DIS TREF-PW XLI XHI XLO XHO TUEN FIGURE 3. DISABLE FUNCTION 7 TR (10% - 90%) TF (10% - 90%) HCA10008 Typical Performance Curves VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 100K and TA = 25oC, Unless Otherwise Specified 11.0 IDD SUPPLY CURRENT (mA) IDD SUPPLY CURRENT (mA) 14.0 12.0 10.0 8.0 6.0 4.0 10.0 9.5 9.0 8.5 8.0 2.0 6 8 10 12 VDD SUPPLY VOLTAGE (V) 0 14 100 200 500 600 700 800 900 1000 5.0 ICC SUPPLY CURRENT (mA) 125oC 25.0 20.0 15.0 10.0 5.0 75oC 4.0 25oC 0oC 3.0 -40oC 2.0 1.0 0.0 0.0 0 100 200 300 400 500 600 700 800 0 900 1000 100 200 300 400 500 600 700 800 900 1000 SWITCHING FREQUENCY (kHz) SWITCHING FREQUENCY (kHz) FIGURE 6. SIDE A, B FLOATING SUPPLY BIAS CURRENT vs FREQUENCY (LOAD = 1000pF) FIGURE 7. ICCO, NO-LOAD ICC SUPPLY CURRENT vs FREQUENCY (kHz) TEMPERATURE 2.5 -90 LOW LEVEL INPUT CURRENT (µA) FLOATING SUPPLY BIAS CURRENT (mA) 400 FIGURE 5. IDDO, NO-LOAD IDD SUPPLY CURRENT vs FREQUENCY (kHz) 30.0 2 1.5 1 0.5 0 300 SWITCHING FREQUENCY (kHz) FIGURE 4. QUIESCENT IDD SUPPLY CURRENT vs VDD SUPPLY VOLTAGE FLOATING SUPPLY BIAS CURRENT (mA) 10.5 200 600 800 400 SWITCHING FREQUENCY (kHz) 1000 FIGURE 8. IAHB, IBHB, NO-LOAD FLOATING SUPPLY BIAS CURRENT vs FREQUENCY 8 -100 -110 -120 -50 -25 0 25 50 75 JUNCTION TEMPERATURE (oC) 100 125 FIGURE 9. ALI, BLI, AHI, BHI LOW LEVEL INPUT CURRENT IIL vs TEMPERATURE HCA10008 Typical Performance Curves VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 10K and TA = 25oC, Unless Otherwise Specified 80 PROPAGATION DELAY (ns) NO-LOAD FLOATING CHARGE PUMP VOLTAGE (V) 15.0 14.0 13.0 12.0 11.0 10.0 -40 -20 0 20 40 60 80 100 70 60 50 40 30 -40 120 -20 JUNCTION TEMPERATURE (oC) FIGURE 10. AHB - AHS, BHB - BHS NO-LOAD CHARGE PUMP VOLTAGE vs TEMPERATURE PROPAGATION DELAY (ns) PROPAGATION DELAY (ns) 80 500 475 450 -25 0 25 50 75 100 70 60 50 40 30 -40 125 150 -20 JUNCTION TEMPERATURE (oC) FIGURE 12. DISABLE TO UPPER ENABLE, TUEN, PROPAGATION DELAY vs TEMPERATURE 0 20 40 60 80 JUNCTION TEMPERATURE (oC) 100 120 FIGURE 13. LOWER DISABLE TURN-OFF PROPAGATION DELAY TDISLOW vs TEMPERATURE 80 PROPAGATION DELAY (ns) 450 REFRESH PULSE WIDTH (ns) 120 FIGURE 11. UPPER DISABLE TURN-OFF PROPAGATION DELAY TDISHIGH vs TEMPERATURE 525 425 -50 0 20 40 60 80 100 JUNCTION TEMPERATURE (oC) 425 400 375 70 60 50 40 30 350 -50 -25 0 25 50 75 100 JUNCTION TEMPERATURE (oC) FIGURE 14. TREF-PW REFRESH PULSE WIDTH vs TEMPERATURE 9 125 150 20 -40 -20 0 20 40 60 80 100 JUNCTION TEMPERATURE (oC) FIGURE 15. DISABLE TO LOWER ENABLE TDLPLH PROPAGATION DELAY vs TEMPERATURE 120 HCA10008 Typical Performance Curves VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 80 80 70 70 PROPAGATION DELAY (ns) PROPAGATION DELAY (ns) 10K and TA = 25oC, Unless Otherwise Specified (Continued) 60 50 40 40 20 -40 20 -40 -20 0 20 40 60 80 100 JUNCTION TEMPERATURE (oC) 120 FIGURE 16. UPPER TURN-OFF PROPAGATION DELAY THPHL vs TEMPERATURE 80 80 70 70 60 50 40 -20 0 20 40 60 80 JUNCTION TEMPERATURE (oC) 100 120 FIGURE 17. UPPER TURN-ON PROPAGATION DELAY THPLH vs TEMPERATURE PROPAGATION DELAY (ns) PROPAGATION DELAY (ns) 50 30 30 30 60 50 40 30 20 20 -40 -20 0 20 40 60 80 JUNCTION TEMPERATURE (oC) 100 120 FIGURE 18. LOWER TURN-OFF PROPAGATION DELAY TLPHL vs TEMPERATURE -40 13.5 13.5 12.5 12.5 11.5 10.5 9.5 8.5 -40 -20 0 20 40 60 80 100 JUNCTION TEMPERATURE (oC) 120 FIGURE 20. GATE DRIVE FALL TIME TF vs TEMPERATURE 10 -20 0 20 40 60 80 100 JUNCTION TEMPERATURE (oC) 120 FIGURE 19. LOWER TURN-ON PROPAGATION DELAY TLPLH vs TEMPERATURE TURN-ON RISE TIME (ns) GATE DRIVE FALL TIME (ns) 60 11.5 10.5 9.5 8.5 -40 -20 0 20 40 60 80 100 JUNCTION TEMPERATURE (oC) 120 FIGURE 21. GATE DRIVE RISE TIME TR vs TEMPERATURE HCA10008 Typical Performance Curves VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 100K and TA = 25oC, Unless Otherwise Specified 1500 HDEL, LDEL INPUT VOLTAGE (V) 6.0 1250 VCC - VOH (mV) 5.5 5.0 750 -40oC 0oC 500 25oC 4.5 250 4.0 -40 -20 0 20 40 60 80 100 JUNCTION TEMPERATURE (oC) 125oC 12 BIAS SUPPLY VOLTAGE (V) 14 FIGURE 23. HIGH LEVEL OUTPUT VOLTAGE VCC - VOH vs BIAS SUPPLY AND TEMPERATURE AT 100mA 3.5 GATE DRIVE SINK CURRENT (A) 1500 1250 1000 VOL (mV) 75oC 0 10 120 FIGURE 22. VLDEL, VHDEL VOLTAGE vs TEMPERATURE 750 -40oC 500 0oC 25oC 250 75oC 125oC 0 10 3.0 2.5 2.0 1.5 1.0 0.5 0.0 6 12 14 BIAS SUPPLY VOLTAGE (V) FIGURE 24. LOW LEVEL OUTPUT VOLTAGE VOL vs BIAS SUPPLY AND TEMPERATURE AT 100mA 7 8 9 10 11 12 13 VDD , VCC, VAHB , VBHB (V) 14 15 16 FIGURE 25. PEAK PULLDOWN CURRENT IO vs BIAS SUPPLY VOLTAGE 3.5 500 LOW VOLTAGE BIAS CURRENT (mA) GATE DRIVE SINK CURRENT (A) 1000 3.0 2.5 2.0 1.5 1.0 0.5 0.0 6 7 8 9 10 11 12 13 14 15 16 VDD, VCC, VAHB, VBHB (V) FIGURE 26. PEAK PULLUP CURRENT IO+ vs BIAS SUPPLY VOLTAGE 11 200 10,000pF 100 3,000pF 50 1,000pF 20 100pF 10 5 2 1 0.5 0.2 0.1 1 2 5 10 20 50 100 200 500 1000 SWITCHING FREQUENCY (kHz) FIGURE 27. LOW VOLTAGE BIAS CURRENT IDD (LESS QUIESCENT COMPONENT) vs FREQUENCY AND GATE LOAD CAPACITANCE HCA10008 Typical Performance Curves VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 100K and TA = 25oC, Unless Otherwise Specified (Continued) 9.0 BIAS SUPPLY VOLTAGE, VDD (V) LEVEL-SHIFT CURRENT (µA) 1000 500 200 100 50 20 10 UV+ 8.8 8.6 UV8.4 8.2 10 20 50 100 200 500 1000 50 25 0 25 FIGURE 28. HIGH VOLTAGE LEVEL-SHIFT CURRENT vs FREQUENCY AND BUS VOLTAGE DEAD-TIME (ns) 120 90 60 30 10 50 100 150 200 HDEL/LDEL RESISTANCE (kΩ) 250 FIGURE 30. MINIMUM DEAD-TIME vs DEL RESISTANCE 12 75 100 125 150 FIGURE 29. UNDERVOLTAGE LOCKOUT vs TEMPERATURE 150 0 50 TEMPERATURE (oC) SWITCHING FREQUENCY (kHz) HCA10008 Small Outline Plastic Packages (SOIC) M20.3 (JEDEC MS-013-AC ISSUE C) 20 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE N INDEX AREA H 0.25(0.010) M B M INCHES E -B1 2 3 L SEATING PLANE -A- h x 45o A D -C- e A1 B 0.25(0.010) M C 0.10(0.004) C A M SYMBOL MIN MAX MIN MAX NOTES A 0.0926 0.1043 2.35 2.65 - A1 0.0040 0.0118 0.10 0.30 - B 0.013 0.0200 0.33 0.51 9 C 0.0091 0.0125 0.23 0.32 - D 0.4961 0.5118 12.60 13.00 3 E 0.2914 0.2992 7.40 7.60 4 e α B S 0.050 BSC 1.27 BSC - H 0.394 0.419 10.00 10.65 - h 0.010 0.029 0.25 0.75 5 L 0.016 0.050 0.40 1.27 6 N NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. MILLIMETERS α 20 0o 20 8o 0o 7 8o Rev. 0 12/93 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 13 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029