Evaluation Board User Guide UG-361 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com High Speed Evaluation Board for Full Duplex M-LVDS Transceivers (ADN4692E, ADN4693E, ADN4695E, and ADN4697E) FEATURES EVAL-ADN469xEFDEBZ 10407-001 Easy evaluation of full-duplex M-LVDS transceivers ADN4692E, ADN4693E, ADN4695E, and ADN4697E Board layout optimized for high speed signaling Matched track lengths on M-LVDS input/output differential pairs, with controlled 50 Ω impedance tracks SMB jack inputs/outputs for high speed connections Logic signals: RO, RE, DE, and DI M-LVDS bus signals: A, B, Y, and Z Power/ground connections through screw terminal blocks Jumper selectable enable/disable for RE and DE Test points for measuring all signals and multiple ground points to facilitate probing of multiple signals 50 Ω termination resistors across A and B, and Y and Z, to simulate double-terminated bus Figure 1. APPLICATIONS GENERAL DESCRIPTION Full-duplex M-LVDS part evaluation The EVAL-ADN469xEFDEBZ allows quick and easy evaluation of full-duplex M-LVDS transceivers (ADN4692E, ADN4693E, ADN4695E, and ADN4697E). The evaluation board allows all of the input and output functions to be exercised without the need for external components. Screw terminal blocks provide convenient connections for power and ground, with SMB jack connectors for high speed logic and M-LVDS bus signals. EVALUATION KIT CONTENTS 1 EVAL-ADN469xEFDEBZ 1 ADN4692EBRZ 1 ADN4693EBRZ 1 ADN4695EBRZ 1 ADN4697EBRZ The evaluation board has a 14-lead SOIC footprint for a full-duplex M-LVDS transceiver from the ADN469xE family (see Table 1). Table 1. ADN469xE Selection Table Part No. ADN4690E ADN4691E ADN4692E ADN4693E ADN4694E ADN4695E ADN4696E ADN4697E Receiver Type Type 1 Type 1 Type 1 Type 1 Type 2 Type 2 Type 2 Type 2 PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Data Rate 100 Mbps 200 Mbps 100 Mbps 200 Mbps 100 Mbps 100 Mbps 200 Mbps 200 Mbps Package 8-lead SOIC 8-lead SOIC 14-lead SOIC 14-lead SOIC 8-lead SOIC 14-lead SOIC 8-lead SOIC 14-lead SOIC Half-Duplex/Full-Duplex Half Half Full Full Half Full Half Full Rev. 0 | Page 1 of 8 Evaluation Board EVAL-ADN469xEHDEBZ EVAL-ADN469xEHDEBZ EVAL-ADN469xEFDEBZ EVAL-ADN469xEFDEBZ EVAL-ADN469xEHDEBZ EVAL-ADN469xEFDEBZ EVAL-ADN469xEHDEBZ EVAL-ADN469xEFDEBZ UG-361 Evaluation Board User Guide TABLE OF CONTENTS Features .............................................................................................. 1 Setting Up the Evaluation Board.................................................3 Applications....................................................................................... 1 Evaluation with Applications.......................................................3 Evaluation Kit Contents................................................................... 1 Evaluation Board Schematic and Layout .......................................5 EVAL-ADN469xEFDEBZ ............................................................... 1 Ordering Information.......................................................................8 General Description ......................................................................... 1 Bill of Materials..............................................................................8 Revision History ............................................................................... 2 Related Links..................................................................................8 Evaluation Board Configuration .................................................... 3 REVISION HISTORY 3/12—Revision 0: Initial Version Rev. 0 | Page 2 of 8 Evaluation Board User Guide UG-361 EVALUATION BOARD CONFIGURATION 1.2 V (J6 input is the inverse of J5). Jumpers LK1 and LK2 are connected in Position B to enable the receiver and disable the driver. Oscilloscope probes are attached to RO, A, and B. SETTING UP THE EVALUATION BOARD The EVAL-ADN469xEFDEBZ allows the full-duplex parts in the ADN469xE family to be quickly and easily evaluated. The evaluation board allows all of the input and output functions to be exercised without the need for external components. Jumper configurations are shown in Table 2. EVALUATION WITH APPLICATIONS Two EVAL-ADN469xEFDEBZ boards can connect together in a point-to-point configuration, as shown in Figure 4. To allow part evaluation with a load equivalent to a parallel-terminated bus, the boards have been fitted with 50 Ω termination resistors. For the point-to-point configuration in Figure 4, replace these resistors with 100 Ω resistors. The board is powered by connecting a 3.3 V power supply to the screw terminals for VCC and GND. Supply current is typically 16 mA with both driver and receiver enabled or 1 mA with both disabled. A 10 μF decoupling capacitor, C1, is fitted at the connector between VCC and GND. The VCC pin of the ADN469xE is fitted with a decoupling capacitor of 100 nF. A signal generator is connected onto the DI input of one board. The Y and Z outputs of this board are connected to the A and B inputs of the second board, respectively. An example evaluation of the ADN4692E/ADN4693E/ ADN4695E/ADN4697E driver is shown in Figure 2. A signal generator is connected to DI with an input signal of 50 MHz (ADN4692E/ADN4695E) or 100 MHz (ADN4693E/ADN4697E), with a 50% duty cycle and swing of between 0 V and 3.3 V. Jumpers LK1 and LK2 are connected in Position A to disable the receiver and enable the driver. Oscilloscope probes are connected to DI, Y, and Z. Connecting probes to DI on the first board, and A, B, and RO on the second, the propagation of the input signal across the bus and to the receiver output of the second board can be observed and evaluated. Alternatively, the EVAL-ADN469xEFDEBZ can connect to an existing bus and a control board, as shown in Figure 5, to test the performance in the application. In this case, remove both termination resistors, as well as the jumpers on LK1 and LK2. Connect control signals to RO, RE, DE, and DI. Similarly, an evaluation of the ADN4692E/ADN4693E/ ADN4695E/ADN4697E receiver is shown in Figure 3. A signal generator capable of applying a differential input signal is connected to J5 and J6, with the input swing between 1 V and SIGNAL GENERATOR 3.3V POWER SUPPLY EVAL-ADN469xEFDEBZ RE J2 DE J3 DI J4 J9 GND RO GND VCC J1 LK1 RO J5 A RE GND J6 DE B GND DI Y Z GND AB LK2 J8 J7 OSCILLOSCOPE 10407-002 GND Figure 2. ADN4692E/ADN4693E/ADN4695E/ADN4697E Driver Evaluation with EVAL-ADN469xEFDEBZ 3.3V POWER SUPPLY EVAL-ADN469xEFDEBZ RE J2 DE J3 DI J4 J9 RO GND VCC J1 RO LK1 AB LK2 SIGNAL GENERATOR GND J5 A RE GND J6 DE B GND DI Y Z GND J8 J7 OSCILLOSCOPE 10407-003 GND Figure 3. ADN4692E/ADN4693E/ADN4695E/ADN4697E Receiver Evaluation with EVAL-ADN469xEFDEBZ Rev. 0 | Page 3 of 8 UG-361 Evaluation Board User Guide SIGNAL GENERATOR 3.3V POWER SUPPLY EVAL-ADN469xEFDEBZ DE J3 3.3V POWER SUPPLY EVAL-ADN469xEFDEBZ DE J3 DI J4 LK2 LK2 J9 RO GND VCC J1 LK1 RO AB J5 A RE GND J6 DE B GND DI Y Z GND AB DI J4 GND GND J8 J7 OSCILLOSCOPE GND J5 A SEE NOTE RE GND J6 DE B GND DI Y Z GND GND J8 J7 10407-004 RE J2 J9 RO GND VCC J1 RO LK1 RE J2 NOTES 1. REPLACE 50Ω RESISTORS WITH 100Ω WHEN EVALUATING TWO BOARDS CONNECTED TOGETHER. Figure 4. EVAL-ADN469xEFDEBZ Two Board Point-to-Point Evaluation 3.3V POWER SUPPLY SEE NOTE 1 EVAL-ADN469xEFDEBZ J9 RE J2 TEST NODE CONTROLLER DE J3 DI J4 RO GND VCC J1 LK1 RO AB LK2 GND J5 A RE GND J6 DE B GND DI Y Z GND GND J8 J7 SLAVE RT RT RT RT B Z Y MASTER NODE 1 A B Z Y SLAVE NODE 2 A B Z Y SLAVE NODE N NOTES 1. REMOVE 50Ω TERMINATION RESISTORS FROM EVALUATION BOARD. 2. MAXIMUM NUMBER OF NODES: 32. 3. RT IS EQUALTO THE CHARACTERISTIC IMPEDANCE OF THE CABLE USED. Figure 5. EVAL-ADN469xEFDEBZ Application Evaluation Connected to Bus and Control Board Table 2. Jumper Configuration Link LK1 Connection A B None Description Connects RE to VCC (disables receiver output). Disconnect J2 input. Connects RE to GND (enables receiver output). Disconnect J2 input. Allows RE input on J2. LK2 A B None Connects DE to VCC (enables driver outputs). Disconnect J3 input. Connects DE to GND (disables driver outputs). Disconnect J3 input. Allows DE input on J3. Rev. 0 | Page 4 of 8 10407-005 A Evaluation Board User Guide UG-361 J1 J9-1 R1 0Ω RO J9-2 EVALUATION BOARD SCHEMATIC AND LAYOUT GND8 +3.3V +3.3V VCC C1 DNI +3.3V RO RE B RE A LK1 +3.3V DE TXD J3 1 2 3 4 5 6 7 NC RO RE DE DI GND GND VCC VCC A B Z Y NC C9 100nF 10µF A J5 B J6 Z J7 Y J8 RT 50Ω A B 14 13 12 11 10 9 8 Z A LK2 GND4 GND5 GND6 GND7 Y RT1 50Ω J4 DI C2 DNI 10407-006 B DE U1 ADN4692/ ADN4693/ ADN4695/ ADN4697 C3 Figure 6. EVAL-ADN469xEFDEBZ Schematic 10407-007 J2 GND GND1 GND2 GND3 GND Figure 7. EVAL-ADN469xEFDEBZ Silkscreen Rev. 0 | Page 5 of 8 Evaluation Board User Guide 10407-008 UG-361 10407-009 Figure 8. EVAL-ADN469xEFDEBZ Component Side 10407-010 Figure 9. EVAL-ADN469xEFDEBZ Internal Layer 2 Figure 10. EVAL-ADN469xEFDEBZ Internal Layer 3 Rev. 0 | Page 6 of 8 UG-361 10407-011 Evaluation Board User Guide Figure 11. EVAL-ADN469xEFDEBZ Solder Side Rev. 0 | Page 7 of 8 UG-361 Evaluation Board User Guide ORDERING INFORMATION BILL OF MATERIALS Table 3. Quantity Reference Designator Description Supplier/Part Number 2 1 1 4 4 9 8 1 2 1 2 1 C1, C2 C3 C9 A, DE, TXD, Y B, RE, RO, Z GND (GND1 to GND8) J1 to J8 J9 LK1, LK2 R1 RT1, RT U1 Not placed/optional Capacitor, 100 nF, 0805 Capacitor, 10 μF, 0805 Test point, yellow Test point, green Test point, black (optional) Connector, SMB jack 2-way terminal block 3-pin (1 × 3) 0.1" header and shorting block Resistor, 0 Ω, 0805 Resistor, 100 Ω, 0402 16-lead SOIC (not placed) 1 VCC Test point, red Not applicable Multicomp/MCCA000274 AVX/0805ZD106KAT2A Vero Technologies/20-313140 Vero Technologies/20-313138 Vero Technologies/20-2137 Multicomp/24-14-2-TGG Lumberg/KRM 02 Harwin/M20-9990346 and Harwin/M7566-05 Vishay Draloric/CRCW08050000Z0EA Vishay Draloric/CRCW0402100RFKEAHP Analog Devices/ADN4692E, ADN4693E, ADN4695E, or ADN4697E Vero Technologies/20-313137 RELATED LINKS Resource ADN4692E ADN4693E ADN4695E ADN4697E Description Product Page, 3.3 V, 100 Mbps, Full-Duplex, High Speed M-LVDS Transceiver with Type 1 Receiver Product Page, 3.3 V, 200 Mbps, Full-Duplex, High Speed M-LVDS Transceiver with Type 1 Receiver Product Page, 3.3 V, 100 Mbps, Full-Duplex, High Speed M-LVDS Transceiver with Type 2 Receiver Product Page, 3.3 V, 200 Mbps, Full-Duplex, High Speed M-LVDS Transceiver with Type 2 Receiver ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. Legal Terms and Conditions By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term “Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. 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Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS. 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Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed. ©2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. UG10407-0-3/12(0) Rev. 0 | Page 8 of 8