Revised April 1999 74LCX16543 Low Voltage 16-Bit Registered Transceiver with 5V Tolerant Inputs and Outputs General Description Features The LCX16543 contains sixteen non-inverting transceivers containing two sets of D-type registers for temporary storage of data flowing in either direction. Each byte has separate control inputs which can be shorted together for full 16-bit operation. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent input and output control in either direction of data flow. ■ 5V tolerant inputs and outputs The LCX16543 is designed for low voltage (2.5V or 3.3V) VCC applications with capability of interfacing to a 5V signal environment. The LCX16543 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation. ■ 2.3V–3.6V VCC specifications provided ■ 5.2 ns tPD max (VCC = 3.3V), 20 µA ICC max ■ Power down high impedance inputs and outputs ■ Supports live insertion/withdrawal (Note 1) ■ ±24 mA Output Drive (VCC = 3.0V) ■ Implements patented noise/EMI reduction circuitry ■ Latch-up performance exceeds 500 mA ■ ESD performance: Human Body Model > 2000V Machine Model > 200V Note 1: To ensure the high-impedance state during power up or down, OE should be tied to VCC through a pull-up resistor: the minimum value or the resistor is determined by the current-sourcing capability of the driver. Ordering Code: Order Number Package Number 74LCX16543MEA MS56A 56-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide Package Description 74LCX16543MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram © 1999 Fairchild Semiconductor Corporation Logic Symbol DS012464.prf www.fairchildsemi.com 74LCX16543 Low Voltage 16-Bit Registered Transceiver with 5V Tolerant Inputs and Outputs May 1995 74LCX16543 Pin Descriptions Pin Names Description OEABn A-to-B Output Enable Input (Active LOW) OEBAn B-to-A Output Enable Input (Active LOW) CEABn A-to-B Enable Input (Active LOW) CEBAn B-to-A Enable Input (Active LOW) LEABn A-to-B Latch Enable Input (Active LOW) LEBAn B-to-A Latch Enable Input (Active LOW) A0–A15 A-to-B Data Inputs or B-to-A 3-STATE Outputs B0–B15 B-to-A Data Inputs or A-to-B 3-STATE Outputs Data I/O Control Table Inputs CEABn LEABn OEABn Latch Status Output Buffers (Byte n) (Byte n) H X X Latched High Z X H X Latched — L L X Transparent — X X H — High Z L X L — Driving H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial A-to-B data flow shown; B-to-A flow control is the same, except using CEBAn, LEBAn and OEBAn Functional Description nal on the A-to-B Latch Enable (LEABn) input makes the Ato-B latches transparent; a subsequent LOW-to-HIGH transition of the LEABn signal puts the A latches in the storage mode and their outputs no longer change with the A inputs. With CEABn and OEABn both LOW, the 3-STATE B output buffers are active and reflect the data present at the output of the A latches. Control of data flow from B to A is similar, but using the CEBAn, LEBAn and OEBAn inputs. The LCX16543 contains sixteen non-inverting transceivers with 3-STATE outputs. The device is byte controlled with each byte functioning identically, but independent of the other. The control pins may be shorted together to obtain full 16-bit operation. The following description applies to each byte. For data flow from A to B, for example, the A-toB Enable (CEABn) input must be LOW in order to enter data from A0–A15 or take data from B0–B15, as indicated in the Data I/O Control Table. With CEABn LOW, a LOW sig- www.fairchildsemi.com 2 74LCX16543 Logic Diagrams Byte 1 (0:7) Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Byte 2 (8:15) Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 3 www.fairchildsemi.com 74LCX16543 Absolute Maximum Ratings(Note 2) Symbol Parameter Value Conditions VCC Supply Voltage −0.5 to +7.0 VI DC Input Voltage −0.5 to +7.0 VO DC Output Voltage −0.5 to +7.0 Units V V Output in 3-STATE −0.5 to VCC + 0.5 Output in HIGH or LOW State (Note 3) IIK DC Input Diode Current −50 VI < GND IOK DC Output Diode Current −50 VO < GND +50 VO > VCC V mA mA IO DC Output Source/Sink Current ±50 mA ICC DC Supply Current per Supply Pin ±100 mA IGND DC Ground Current per Ground Pin ±100 mA TSTG Storage Temperature −65 to +150 °C Recommended Operating Conditions Symbol VCC Parameter Supply Voltage VI Input Voltage VO Output Voltage IOH/IOL (Note 4) Output Current TA Free-Air Operating Temperature ∆t/∆V Input Edge Rate, VIN = 0.8V–2.0V, VCC = 3.0V Min Max Operating 2.0 3.6 Data Retention 1.5 3.6 0 5.5 HIGH or LOW State 0 VCC 3-STATE 0 5.5 VCC = 3.0V − 3.6V ±24 VCC = 2.7V − 3.0V ±12 VCC = 2.3V − 2.7V ±8 Units V V V mA −40 85 °C 0 10 ns/V Note 2: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 3: IO Absolute Maximum Rating must be observed. Note 4: Unused (inputs or I/Os) must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol VIH VIL VOH VOL Parameter Conditions HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Voltage LOW Level Output Voltage IOH = −100 µA VCC (V) TA = −40°C to +85°C Min 2.3 − 2.7 1.7 2.7 − 3.6 2.0 V 2.3 − 2.7 0.7 2.7 − 3.6 0.8 2.3 − 3.6 2.3 1.8 IOH = −12 mA 2.7 2.2 IOH = −18 mA 3.0 2.4 IOH = −24 mA 3.0 2.2 IOL = 100 µA 2.3 − 3.6 0.2 IOL = 8 mA 2.3 0.6 IOL = 12 mA 2.7 0.4 IOL = 16 mA 3.0 0.4 V IOL = 24 mA 3.0 0.55 Input Leakage Current 0 ≤ VI ≤ 5.5V 2.3 − 3.6 ±5.0 IOZ 3-STATE I/O Leakage 0 ≤ VO ≤ 5.5V 2.3 − 3.6 ±5.0 0 10 VI = VIH or VIL Power-Off Leakage Current www.fairchildsemi.com VI or VO = 5.5V 4 V VCC − 0.2 IOH = −8 mA II IOFF Units Max V µA µA µA Symbol ICC ∆ICC (Continued) Parameter Quiescent Supply Current Increase in ICC per Input VCC (V) Conditions TA = −40°C to +85°C Min Units Max VI = V CC or GND 2.3 − 3.6 20 3.6V ≤ VI, VO ≤ 5.5V (Note 5) 2.3 − 3.6 ±20 VIH = VCC −0.6V 2.3 − 3.6 500 µA µA Note 5: Outputs in disabled or 3-STATE only. AC Electrical Characteristics TA = −40°C to +85°C, RL = 500 Ω Symbol Parameter VCC = 3.3V ± 0.3V VCC = 2.7V VCC = 2.5V ± 0.2V CL = 50 pF CL = 50 pF CL = 30 pF Min Max Min Max Min Max tPHL Propagation Delay 1.5 5.2 1.5 6.0 1.5 6.2 tPLH An to Bn or Bn to An 1.5 5.2 1.5 6.0 1.5 6.2 tPHL Propagation Delay 1.5 6.5 1.5 7.5 1.5 7.8 tPLH LEBAn to An or LEABn to Bn 1.5 6.5 1.5 7.5 1.5 7.8 tPZL Output Enable Time OEBAn or OEABn to An or Bn 1.5 6.5 1.5 7.0 1.5 8.5 CEBAn or CEABn to An or Bn 1.5 6.5 1.5 7.0 1.5 8.5 tPZH tPLZ tPHZ tS ns ns ns Output Disable Time OEBAn or OEABn to An or Bn 1.5 6.5 1.5 7.0 1.5 7.8 CEBAn or CEABn to An or Bn 1.5 6.5 1.5 7.0 1.5 7.8 Setup Time, HIGH or LOW, 2.5 2.5 3.0 1.5 1.5 2.0 3.0 3.5 Hold Time, HIGH or LOW, ns Data to LEXXn tW Pulse Width, Latch Enable, LOW tOSHL Output to Output Skew (Note 6) 3.0 ns 1.0 tOSLH ns ns Data to LEXXn tH Units ns 1.0 Note 6: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design. Dynamic Switching Characteristics Symbol VOLP VOLV Parameter Quiet Output Dynamic Peak VOL Quiet Output Dynamic Valley VOL Conditions VCC (V) TA = 25°C Units Typical CL = 50 pF, VIH = 3.3V, VIL = 0V 3.3 0.8 CL = 30 pF, VIH = 2.5V, VIL = 0V 2.5 0.6 CL = 50 pF, VIH = 3.3V, VIL = 0V 3.3 −0.8 CL = 30 pF, VIH = 2.5V, VIL = 0V 2.5 −0.6 V V Capacitance Typical Units CIN Symbol Input Capacitance Parameter VCC = Open, VI = 0V or VCC Conditions 7 pF CI/O Input/Output Capacitance VCC = 3.3V, VI = 0V or VCC 8 pF CPD Power Dissipation Capacitance VCC = 3.3V, VI = 0V or VCC, f = 10 MHz 20 pF 5 www.fairchildsemi.com 74LCX16543 DC Electrical Characteristics 74LCX16543 AC LOADING and WAVEFORMS Generic for LCX Family FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance) Test Switch tPLH, tPHL Open tPZL, tPLZ 6V at VCC = 3.3 ± 0.3V VCC x 2 at VCC = 2.5 ± 0.2V tPZH,tPHZ GND Waveform for Inverting and Non-Inverting Functions 3-STATE Output High Enable and Disable Times for Logic Propagation Delay. Pulse Width and trec Waveforms Setup Time, Hold Time and Recovery Time for Logic trise and tfall 3-STATE Output Low Enable and Disable Times for Logic FIGURE 2. Waveforms (Input Characteristics; f =1MHz, tR = tF = 3ns) Symbol www.fairchildsemi.com VCC 3.3V ± 0.3V 2.7V 2.5V ± 0.2V Vmi 1.5V 1.5V VCC/2 Vmo 1.5V 1.5V VCC/2 Vx VOL + 0.3V VOL + 0.3V VOL + 0.15V Vy VOH − 0.3V VOH − 0.3V VOH − 0.15V 6 74LCX16543 Schematic Diagram Generic for LCX Family 7 www.fairchildsemi.com 74LCX16543 Physical Dimensions inches (millimeters) unless otherwise noted 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide Package Number MS56A www.fairchildsemi.com 8 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Package Number MTD56 LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 74LCX16543 Low Voltage 16-Bit Registered Transceiver with 5V Tolerant Inputs and Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued)