MICRO-LINEAR ML4831CP

JULY 2000
ML4831*
Electronic Ballast Controller
GENERAL DESCRIPTION
FEATURES
The ML4831 is a complete solution for a dimmable, high
power factor, high efficiency electronic ballast. Contained
in the ML4831 are controllers for “boost” type power
factor correction as well as for a dimming ballast.
The Power factor circuit uses the average current sensing
method with a gain modulator and over-voltage
protection. This system produces power factors of better
than 0.99 with low input current THD at > 95%
efficiency. Special care has been taken in the design of the
ML4831 to increase system noise immunity by using a
high amplitude oscillator, and a current fed multiplier. An
over-voltage protection comparator inhibits the PFC
section in the event of a lamp out or lamp failure
condition.
The ballast section provides for programmable starting
scenarios with programmable preheat and lamp out-ofsocket interrupt times. The IC controls lamp output
through either frequency modulation using lamp current
feedback.
The ML4831 is designed using Micro Linear‘s SemiStandard tile array technology. Customized versions of this
IC, optimized to specific ballast architectures can be made
available. Contact Micro Linear or an authorized
representative for more information.
■
Complete Power Factor Correction and Dimming
Ballast Control on one IC
■
Low Distortion, High Efficiency Continuous Boost,
Average Current sensing PFC section
■
Programmable Start Scenario for Rapid or Instant Start
Lamps
■
Lamp Current feedback for Dimming Control
■
Variable Frequency dimming and starting
■
Programmable Restart for lamp out condition to
reduce ballast heating
■
Over-Temperature Shutdown replaces external heat
sensor for safety
■
PFC Over-Voltage comparator eliminates output
“runaway” due to load removal
■
Large oscillator amplitude and gain modulator
improves noise immunity
* This product is End Of Life as of July 1, 2000
BLOCK DIAGRAM
7
8
INTERRUPT
R(SET)
R(T)/C(T)
LAMP F.B.
OSCILLATOR
LFB OUT
9
5
6
OUTPUT
DRIVERS
10
R(X)/C(X)
PRE-HEAT
AND INTERRUPT
TIMERS
OUT A
CONTROL
&
GATING LOGIC
OUT B
PFC OUT
2
4
3
1
18
IA OUT
14
13
15
IA+
I(SINE)
EA OUT
EA–/OVP
POWER
FACTOR
CONTROLLER
PGND
VCC
UNDER-VOLTAGE
AND THERMAL
SHUTDOWN
VREF
GND
12
16
17
11
1
ML4831
PIN CONFIGURATION
ML4831
18-Pin DIP (P18)
EA OUT
1
18
EA–/OVP
IA OUT
2
17
VREF
I(SINE)
3
16
VCC
IA+
4
15
PFC OUT
LAMP F.B.
5
14
OUT A
LFB OUT
6
13
OUT B
R(SET)
7
12
P GND
R(T)/C(T)
8
11
GND
INTERRUPT
9
10
R(X)/C(X)
TOP VIEW
PIN DESCRIPTION
PIN# NAME
1
EA OUT
PFC Error Amplifier output and
compensation node
2
IA OUT
Output and compensation node of the
PFC average current transconductance
amplifier.
3
I(SINE)
PFC gain modulator input.
4
IA+
Non-inverting input of the PFC
average current transconductance
amplifier and peak current sense point
of the PFC cycle by cycle current limit
comparator.
5
2
FUNCTION
LAMP F.B.
PIN# NAME
FUNCTION
8
R(T)C(T)
Oscillator timing components
9
INTERRUPT Input used for lamp-out detection and
restart. A voltage greater than 7.5 volts
resets the chip and causes a restart
after a programmable interval.
10 R(X)/C(X)
Sets the timing for the preheat,
dimming lockout, and interrupt
11 GND
Ground
12 P GND
Power ground for the IC
13 OUT B
Ballast MOSFET drive output
Inverting input of an Error Amplifier
used to sense (and regulate) lamp arc
current. Also the input node for
dimming control.
14 OUT A
Ballast MOSFET drive output
15 PFC OUT
Power Factor MOSFET drive output
16 VCC
Positive Supply for the IC
17 VREF
Buffered output for the 7.5V voltage
reference
18 EA–/OVP
Inverting input to PFC error amplifier
and OVP comparator input
6
LFB OUT
Output from the Lamp Current Error
Transconductance Amplifier used for
lamp current loop compensation
7
R(SET)
External resistor which sets oscillator
FMAX, and R(X)/C(X) charging current
ML4831
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are those values beyond which
the device could be permanently damaged. Absolute
maximum ratings are stress ratings only and functional
device operation is not implied.
Supply Current (ICC) ............................................... 75mA
Output Current, Source or Sink (Pins 13, 14, 15)
DC ................................................................... 250mA
Output Energy (capacitive load per cycle) .............. 1.5 mJ
Gain Modulator I(SINE) Input (Pin 3) ..................... 10 mA
Analog Inputs (Pins 5, 9, 18) ............... –0.3V to VCC –2V
Pin 4 input voltage ........................................... –3V to 2V
Maximum Forced Voltage (Pins 1, 6) .......... –0.3V to 7.7V
Maximum Forced Current (Pins 1, 2, 6) ................ ±20mA
Maximum Forced Voltage (Pin 2) .................. –0.3V to 6V
Junction Temperature ............................................. 150°C
Storage Temperature Range ..................... –65°C to 150°C
Lead Temperature (Soldering 10 Sec.) ..................... 260°C
Thermal Resistance (θJA)
Plastic DIP–P ................................................... 70°C/W
OPERATING CONDITIONS
Temperature Range
ML4831C .................................................. 0°C to 85°C
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, R(SET) = 31.6kΩ, R(T) = 16.2kΩ, C(T) = 1.5nF, TJ = Junction Operating Temperature Range,
ICC = 25mA
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Small Signal Transconductance
130
200
270
µmhos
Input Voltage Range
–0.3
3.5
V
0.2
0.4
V
5.6
6
V
PFC Current Sense Amplifier (Pins 2, 4)
Output Low
ISINE = 0mA, VPIN1 = 0V,
VPIN4 = –0.3V, RL = ∞
Output High
ISINE = 1.5mA, VPIN18/4 = 0V, RL = ∞
Source Current
ISINE = 1.5mA, VPIN18/4 = 0V, VPIN2 = 5V
–0.3
mA
Sink Current
ISINE = 0mA, VPIN2 = 0.3V,
VPIN4 = –0.3V, VPIN1 = 0V
0.3
mA
5.2
PFC Voltage Feedback Amplifier (Pins 1, 18)/Lamp Current Amplifier (Pins 5, 6)
Input Offset Voltage
±3.0
±10.0
mV
Input Bias Current
–0.3
–1.0
µA
80
110
µmhos
3.5
V
0.4
V
Small Signal Transconductance
50
Input Voltage Range
–0.3
Output Low
VPIN5/18 = 3V, RL = ∞
Output High
VPIN5/18 = 2V, RL = ∞
Source Current
Sink Current
0.2
7.2
7.5
V
VPIN5/18 = 0V, VPIN1/6 = 7V
–0.2
mA
VPIN5/18 = 5V, VPIN1/6 = 0.3V
0.2
mA
ISINE = 100µA, VPIN1 = 3V
40
mV
ISINE = 300µA, VPIN1 = 3V
130
mV
ISINE =100µA, VPIN1 = 6V
112
mV
ISINE = 300µA, VPIN1 = 6V
350
mV
Output Voltage Limit
ISINE = 1.5mA, VPIN18 = 0V
865
mV
Offset Voltage
ISINE = 0, VPIN18 = 0V
15
mV
ISINE = 150µA, VPIN18 = 3V
15
mV
1.8
V
Gain Modulator
Output Voltage
I(SINE) Input Voltage
ISINE = 200µA
0.8
1.4
3
ML4831
ELECTRICAL CHARACTERISTICS (Continued)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
72
76
80
kHz
Oscillator
Initial accuracy
TA = 25°C
Voltage stability
VCCZ – 3V < VCC <VCCZ – 0.5V
Temperature stability
Total Variation
Line, temperature
C(T) Discharge Current
%
2
%
69
Ramp Valley to Peak
C(T) Charging Current (FM Modes)
1
83
kHz
2.5
V
VPIN5 = 3V, VPIN8 = 2.5V,
VPIN10 = 0.9V (Preheat)
–78
µA
VPIN5 = 3V, VPIN8 = 2.5V,
VPIN10 = Open
–156
µA
5
mA
0.75
µs
VPIN8 = 2.5V
Output Drive Deadtime
Reference Section
Output Voltage
TA = 25°C, IO = 1mA
Line regulation
Load regulation
7.4
7.5
7.6
V
VCCZ – 3V < VCC < VCCZ – 0.5V
2
10
mV
1mA < IO < 20mA
2
15
mV
Temperature stability
0.4
7.35
%
Total Variation
Line, load, temp
7.65
V
Output Noise Voltage
10Hz to 10KHz
50
µV
Long Term Stability
TJ = 125°C, 1000 hrs
5
mV
Short Circuit Current
VCC < VCCZ – 0.5V, VREF = 0V
–40
mA
Initial Preheat Period
0.8
s
Subsequent Preheat Period
0.7
s
Start Period
2.1
s
Interrupt Period
6.3
s
Pin 10 Charging Current
–19
µA
Preheat and Interrupt Timer (Pin 10) (R(X) = 590KΩ, C(X) = 5.6µF)
Pin 10 Open Circuit Voltage
VCC = 12.3V in UVLO
Pin 10 Maximum Voltage
0.4
0.9
1.1
V
7.0
7.3
7.7
V
–0.2
µA
Preheat Lower Threshold
1.18
V
Preheat Upper Threshold
3.36
V
Interrupt Recovery Threshold
1.18
V
Start Period End Threshold
6.7
V
Input Bias Current
VPIN10 = 1.2V
Interrupt Input (Pin 9)
Interrupt Threshold
Input Bias Current
4
7.35
7.5
7.65
V
–0.3
–1
µA
ML4831
ELECTRICAL CHARACTERISTICS (Continued)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
2.6
2.7
2.8
V
OVP Comparator (Pin 18)
OVP Threshold
Hysteresis
0.25
V
Propagation Delay
500
ns
Outputs
Output Voltage Low
Output Voltage High
IOUT = 20mA
0.4
0.8
V
IOUT = 200mA
2.1
3.0
V
IOUT = –20mA
VCC – 2.5
VCC – 1.9
V
IOUT = –200mA
VCC – 3.0
VCC – 2.2
V
Output Voltage Low in UVLO
IOUT = 10mA, VCC = 8V
0.8
Output Rise/Fall Time
CL = 1000pF
50
1.5
V
ns
Under-Voltage Lockout and Bias Circuits
IC Shunt Voltage (VCCZ)
ICC = 25mA
VCCZ Load Regulation
25mA < ICC < 68mA
VCCZ Total Variation
Load, Temp
Start-up Current
VCC ≤ 12.3V
Operating Current
VCC = VCCZ – 0.5V
12.8
13.5
14.2
V
150
300
mV
14.6
V
1.3
1.7
mA
15
19
mA
12.4
Start-up Threshold
VCCZ – 0.5
V
Shutdown Threshold
VCCZ – 3.5
V
Shutdown Temperature (TJ)
120
°C
Hysteresis (TJ)
30
°C
FUNCTIONAL DESCRIPTION
OVERVIEW
The ML4831 consists of an Average Current controlled
continuous boost Power Factor front end section with a
flexible ballast control section. Start-up and lamp-out retry
timing are controlled by the selection of external timing
components, allowing for control of a wide variety of
different lamp types. The ballast section controls the lamp
power using frequency modulation (FM) with additional
programmability provided to adjust the VCO frequency
range. This allows for the IC to be used with a variety of
different output networks.
POWER FACTOR SECTION
The ML4831 Power Factor section is an average current
sensing boost mode PFC control circuit which is
architecturally similar to that found in the ML4821. For
detailed information on this control architecture, please
refer to Application Note 16 and the ML4821 data sheet.
GAIN MODULATOR
The ML4831 gain modulator provides high immunity to
the disturbances caused by high power switching. The
rectified line input sine wave is converted to a current via
a dropping resistor. In this way, small amounts of ground
noise produce an insignificant effect on the reference to
the PWM comparator.
The output of the gain modulator appears on the positive
terminal of the IA amplifier to form the reference for the
current error amplifier. Please refer to Figure 1.
VMUL ≈
where:
[I(SINE) × (VEA − 1.1V)]
4.17mA
(1)
I(SINE) is the current in the dropping resistor,
V(EA) is the output of the error amplifier (Pin 1).
The output of the gain modulator is limited to 1.0V.
5
ML4831
AVERAGE CURRENT AND OUTPUT VOLTAGE
REGULATION
TRANSCONDUCTANCE AMPLIFIERS
The PFC voltage feedback, PFC current sense, and the
loop current amplifiers are all implemented as operational
transconductance amplifiers. They are designed to have
low small signal forward transconductance such that a
large value of load resistor (R1) and a low value ceramic
capacitor (<1µF) can be used for AC coupling (C1) in the
frequency compensation network. The compensation
network shown in Figure 2 will introduce a zero and a
pole at:
The PWM regulator in the PFC Control section will act to
offset the positive voltage caused by the multiplier output
by producing an offsetting negative voltage on the current
sense resistor at Pin 4. A cycle-by-cycle current limit is
included to protect the MOSFET from high speed current
transients. When the voltage at Pin 4 goes negative by
more than 1V, the PWM cycle is terminated.
For more information on compensating the average
current and boost voltage error amplifier loops, see
ML4821 data sheet.
fZ =
1
2π R1C1
fP =
1
2π R1C2
(2)
OVERVOLTAGE PROTECTION AND INHIBIT
The OVP pin serves to protect the power circuit from
being subjected to excessive voltages if the load should
change suddenly (lamp removal). A divider from the high
voltage DC bus sets the OVP trip level. When the voltage
on Pin 18 exceeds 2.75V, the PFC transistors are inhibited.
The ballast section will continue to operate. The OVP
threshold should be set to a level where the power
components are safe to operate, but not so low
as to interfere with the boost voltage regulation loop.
18
–
2.5V
+
R1
C2
C1
Figure 2. Compensation Network
7
LFB OUT
R(SET)
OSC
10
16
17
11
2
R(X)/C(X)
PREHEAT
TIMER
VREF
–
+
–VMUL+
IA +
S
–
PFC OUT
Q
15
+
–1V
PWM (PFC)
OUT A
Q
14
+
T
GAIN
MODULATORS
I(SINE)
OUT B
Q
13
EA OUT
–
EA –/OVP
2.5V
–
+
2.75V
+
OVP
Figure 1. ML4831 Block Diagram
6
8
R
–
18
9
VREF
R(T)/C(T)
IA OUT
7K
1
INTERRUPT
5
GND
–
3
LAMP F.B.
–
UNDER-VOLTAGE
AND THERMAL
SHUTDOWN
6
2.5V
+
VCC
7K
4
+
P GND
12
ML4831
Figure 3 shows the output configuration for the
operational transconductance amplifiers.
CURRENT
MIRROR
IN
OUT
IQ +
IQ –
BALLAST OUTPUT SECTION
The IC controls output power to the lamps via frequency
modulation with non-overlapping conduction. This means
that both ballast output drivers will be low during the
discharging time tDIS of the oscillator capacitor CT.
OSCILLATOR
gmVIN
2
io = gmVIN
gmVIN
2
The VCO frequency ranges are controlled by the output of
the LFB amplifier (Pin 6). As lamp current decreases, Pin 6
rises in voltage, causing the C(T) charging current to
decrease, thereby causing the oscillator frequency to
decrease. Since the ballast output network attenuates high
frequencies, the power to the lamp will be increased.
17
IN
VREF
VREF
OUT
CURRENT
MIRROR
CONTROL
ICHG
R(T)
R(T)/C(T)
+
8
Figure 3. Output Configuration
1.25/3.75
A DC path to ground or VCC at the output of the
transconductance amplifiers will introduce an offset error.
The magnitude of the offset voltage that will appear at the
input is given by VOS = io/gm. For a io of 1uA and a gm
of 0.08 µmhos the input referred offset will be 12.5mV.
Capacitor C1 as shown in Figure 2 is used to block the
DC current to minimize the adverse effect of offsets.
–
C(T)
5 mA
Slew rate enhancement is incorporated into all of the
operational transconductance amplifiers in the ML4831.
This improves the recovery of the circuit in response to
power up and transient conditions. The response to large
signals will be somewhat non-linear as the
transconductance amplifiers change from their low to high
transconductance mode. This is illustrated in Figure 4.
CLOCK
tDIS
tCHG
VTH = 3.75V
iO
C(T)
VTL = 1.25V
VIN Differential
0
Linear Slope Region
Figure 5. Oscillator Block Diagram and Timing
The oscillator frequency is determined by the following
equations:
FOSC =
1
t CHG + tDIS
(3)
and
Figure 4. Transconductance Amplifier Characteristics
 V + I R − VTL 
t CHG = R T CT In  REF CH T

 VREF + ICH R T − VTH 
(4)
7
ML4831
The oscillator’s minimum frequency is set when ICH = 0
where:
FOSC ≅
1
0.51× R T CT
(5)
This assumes that tCHG >> tDIS.
When LFB OUT is high, ICH = 0 and the minimum
frequency occurs. The charging current varies according
to two control inputs to the oscillator:
To help reduce ballast cost, the ML4831 includes a
temperature sensor which will inhibit ballast operation if
the IC’s junction temperature exceeds 120°C. In order to
use this sensor in lieu of an external sensor, care should be
taken when placing the IC to ensure that it is sensing
temperature at the physically appropriate point in the
ballast. The ML4831’s die temperature can be estimated
with the following equation:
TJ ≅ TA × PD × 65°C / W
(9)
1. The output of the preheat timer
VCC VCCZ
2. The voltage at Pin 6 (lamp feedback amplifier
output)
V(ON)
In preheat condition, charging current is fixed at
ICHG (PREHEAT) = 2.5
R(SET)
V(OFF)
(6)
In running mode, charging current decreases as the VPIN6
rises from 0V to VOH of the LAMP FB amplifier. The
highest frequency will be attained when ICHG is highest,
which is attained when VPIN6 is at 0V:
ICHG(0) =
5
R(SET)
In this condition, the minimum operating frequency of the
ballast is set per (5) above.
For the IC to be used effectively in dimming ballasts with
higher Q output networks a larger CT value and lower RT
value can be used, to yield a smaller frequency excursion
over the control range (VPIN6). The discharge current is set
to 5mA. Assuming that IDIS >> IRT:
(8)
IC BIAS, UNDER-VOLTAGE LOCKOUT AND THERMAL
SHUTDOWN
The IC includes a shunt regulator which will limit the
voltage at VCC to 13.5 (VCCZ). The IC should be fed with
a current limited source, typically derived from the ballast
transformer auxiliary winding. When VCC is below
VCCZ – 0.7V, the IC draws less than 1.7mA of quiescent
current and the outputs are off. This allows the IC to start
using a “bleed resistor” from the rectified AC line.
8
15mA
1.3mA
(7)
Highest lamp power, and lowest output frequency are
attained when VPIN6 is at its maximum output voltage
(VOH).
tDIS(VCO) ≅ 490 × CT
t
ICC
t
Figure 6. Typical VCC and ICC Waveforms when
the ML4831 is Started with a Bleed Resistor from
the Rectified AC Line and Bootstrapped from an
Auxiliary Winding.
STARTING, RE-START, PREHEAT AND INTERRUPT
The lamp starting scenario implemented in the ML4831
is designed to maximize lamp life and minimize ballast
heating during lamp out conditions.
The circuit in Figure 7 controls the lamp starting scenarios:
Filament preheat and Lamp Out interrupt. C(X) is charged
with a current of IR(SET)/4 and discharged through R(X).
The voltage at C(X) is initialized to 0.7V (VBE) at power
up. The time for C(X) to rise to 3.4V is the filament preheat
time. During that time, the oscillator charging current
(ICHG) is 2.5/R(SET). This will produce a high frequency
for filament preheat, but will not produce sufficient
voltage to ignite the lamp.
After cathode heating, the inverter frequency drops to FMIN
causing a high voltage to appear to ignite the lamp. If the
voltage does not drop when the lamp is supposed to have
ignited, the lamp voltage feedback coming into Pin 9 rises
to above VREF, the C(X) charging current is shut off and the
inverter is inhibited until C(X) is discharged by R(X) to the
1.2V threshold. Shutting off the inverter in this manner
prevents the inverter from generating excessive heat when
the lamp fails to strike or is out of socket. Typically this
time is set to be fairly long by choosing a large value of R(X).
ML4831
LFB OUT is ignored by the oscillator until C(X) reaches
6.8V threshold. The lamps are therefore driven to full
power and then dimmed. The C(X) pin is clamped to
about 7.5V.
0.625
R(SET)
R(X)/C(X)
+
10
HEAT
C(X)
1.2/3.4
–
A summary of the operating frequencies in the various
operating modes is shown below.
R(X)
6.8
+
1.2/6.8
–
INHIBIT
R
9
INT
VREF
–
Operating Mode
Operating Frequency
Preheat
[F(MAX) to F(MIN)]
2
Dimming
Lock-out
F(MIN)
Dimming
Control
F(MIN) to F(MAX)
DIMMING
LOCKOUT
Q
S
+
Figure 7. Lamp Preheat and Interrupt Timers
6.8
3.4
R(X)/C(X)
1.2
.65
0
HEAT
DIMMING
LOCKOUT
7.5
INT
INHIBIT
Figure 8. Lamp Starting and Restart Timing
9
10
R14
C12
N
G
L
C5
120V
F1
D6
D5
L2
L1
R1
R4
C25
C2
C1
D2
R2
C26 C4
C3
D1
R3
R5
R6
D4
D3
C6
3
1
R24
D8
2
4
11
10
9
C7
12
13
14
15
16
17
18
C10
+
8
ML4831
7
6
5
4
3
2
1
R16
R10
R17
T1
R7
+
C13
R15
R9
R11
+
+
R13
R12
C15 C16
R8
C11
C14 C24
Q1
D7
R21
C17
8
5
T2
D11
Q3
R22
4
1
Q2
10
7
6
8
D12
T3
4
2
C22
5
1
3
C19
9
4
1
5
8
R23
C20
T4
T5
8
1
C21
D13
5
4
C23
B
B
R
R
Y
Y
ML4831
APPLICATIONS POWER FACTOR CORRECTED FLUORESCENT DIMMING LAMP BALLAST
Figure 9. Typical Application: 2-Lamp Isolated Dimming Ballast with Active Power Factor Correction for 120VAC Input
ML4831
TABLE 1: PARTS LIST FOR THE ML4831EVAL EVALUATION KIT
CAPACITORS
QTY.
REF.
DESCRIPTION
MFR.
PART NUMBER
2
C1, 2
3.3nF, 125VAC, 10%, ceramic, “Y” capacitor
Panasonic
ECK-DNS332ME
1
C3
0.33µF, 250VAC, “X”, capacitor
Panasonic
ECQ-U2A334MV
4
C4, 8, 9, 22
0.1µF, 50V, 10%, ceramic capacitor
AVX
SR215C104KAA
2
C5, 21
0.01µF, 50V, 10%, ceramic capacitor
AVX
SR211C103KAA
1
C6
1.5µF, 50V, 2.5%, NPO ceramic capacitor
AVX
RPE121COG152
2
C7, 12
1µF, 50V, 20%, ceramic capacitor
AVX
SR305E105MAA
1
C10
100µF, 25V, 20%, electrolytic capacitor
Panasonic
ECE-A1EFS101
1
C11
100µF, 250V, 20%, electrolytic capacitor
Panasonic
ECE-S2EG101E
1
C13
4.7µF, 50V, 20%, electrolytic capacitor
Panasonic
ECE-A50Z4R7
3
C14, 15, 17
0.22µF, 50V, 10%, ceramic capacitor
AVX
SR305C224KAA
1
C16
1.5µF, 50V, 10%, ceramic capacitor
AVX
SR151V152KAA
1
C19
22nF, 630V, 5%, polypropylene capacitor
WIMA
MKP10, 22nF, 630V, 5%
1
C20
0.1µF, 250V, 5%, polypropylene capacitor
WIMA
MKP10, 0.1µF, 250V, 5%
1
C23
0.068µF, 160V, 5%, polypropylene capacitor
WIMA
MKP4, 68nF, 160V, 5%
1
C24
220µF, 16V, 20%, electrolytic capacitor
Panasonic
1
C25
47nF, 50V, 10%, ceramic capacitor
AVX
SR211C472KAA
1
C26
330pF, 50V, 10%, ceramic capacitor
AVX
SR151A331JAA
ECE-A16Z220
RESISTORS:
1
R1
0.33Ω, 5%, 1/2W, metal film resistor
NTE
HWD33
1
R2
4.3K, 1/4W, 5%, carbon film resistor
Yageo
4.3K-Q
1
R3
47K, 1/4W, 5%, carbon film resistor
Yageo
47K-Q
1
R4
12K, 1/4W, 5%, carbon film resistor
Yageo
12K-Q
1
R5
20K, 1/4W, 1%, metal film resistor
Dale
1
R6
360K, 1/4W, 5%, carbon film resistor
Yageo
360K-Q
1
R7
36K, 1W, 5%, carbon film resistor
Yageo
36KW-1-ND
3
R8, 22, 11
22Ω, 1/4W, 5%, carbon film resistor
Yageo
22-Q
1
R9
402K, 1/4W, 1%, metal film resistor
Dale
SMA4-402K-1
1
R10
17.8K, 1/4W, 1%, metal film resistor
Dale
SMA4-17.8K-1
1
R12
475K, 1/4W, 1%, metal film resistor
Dale
SMA4-475K-1
1
R13
5.49K, 1/4W, 1%, metal film resistor
Dale
SMA4-5.49K-1
SMA4-20K-1
11
ML4831
TABLE 1: PARTS LIST FOR ML4831EVAL EVALUATION KIT (Continued)
RESISTORS: (Continued)
QTY.
REF.
DESCRIPTION
MFR.
PART NUMBER
4
R14, 17, 24, 25 100K, 1/4W, 5%, carbon film resistor
Yageo
100K-Q
1
R15
681K, 1/4W, 5%, carbon film resistor
Yageo
681K-Q
1
R16
10K, 1/4W, 1%, metal film resistor
Dale
1
R21
33Ω, 1/4W, 5%, carbon film resistor
Yageo
33-Q
1
R23
25K, pot (for dimming adjustment)
Bourns
3386P-253-ND
SMA4-10K-1
DIODES:
4
D1, 2, 3, 4
1A, 600V, 1N4007 diode
(or 1N5061 as a substitute)
Motorola
1N4007TR
2
D5, 6
1A, 50V (or more), 1N4001 diodes
Motorola
1N4001TR
1
D7
3A, 400V, BYV26C or BYT03 400 fast recovery
or MUR440 Motorola ultra Fast diode
GI
5
D8, 9, 11,
12, 13
0.1A, 75V, 1N4148 signal diode
Motorola
1N4148TR
IC1
ML4831, Electronic Ballast Controller IC
Micro
Linear
ML4831CP
3.3A, 400V, IRF720 power MOSFET
IR
BYV26C
IC’s:
1
TRANSISTORS:
3
Q1, 2, 3
IR720
MAGNETICS:
1
T1
T1 Boost Inductor, E24/25, 1mH, Custom Coils P/N 5039 or Coiltronics P/N CTX05-12538-1
E24/25 core set, TDK PC40 material
8-pin vertical bobbin (Cosmo #4564-3-419),
Wind as follows:
195 turns 25AWG magnet wire, start pin #1, end pin #4
1 layer mylar tape
14 turns 26AWG magnet wire, start pin #3, end pin #2
NOTE: Gap for 1mH ±5%
1
T2
T2 Gate Drive Xfmr, LPRI = 3mH, Custom Coils P/N 5037 or Coiltronics P/N CTX05-12539-1
Toroid Magnetics YW-41305-TC
Wind as follows:
Primary = 25 turns 30AWG magnet wire, start pin #1, end pin #4
Secondary = 50 turns 30AWG magnet wire, start pin #5, end pin #8
12
ML4831
TABLE 1: PARTS LIST FOR ML4831EVAL EVALUATION KIT (Continued)
MAGNETICS: (Continued)
QTY.
REF.
DESCRIPTION
MFR.
PART NUMBER
1
T3
T3 Inductor, LPRI = 1.66mH, Custom Ciols P/N 5041 or Coiltronics P/N CTX05-12547-1
E24/25 core set, TDK PC40 material
10 pin horizontal bobbin (Plastron #0722B-31-80)
Wind as follows:
1st: 170T of 25AWG magnet wire; start pin #10, end pin #9.
1 layer of mylar tape
2nd: 5T of #32 magnet wire; start pin #2, end pin #1
1 layer of mylar tape
3rd: 3T of #30 Kynar coated wire; start pin #4, end pin #5
4th: 3T of #30 Kynar coated wire; start pin #3, end pin #6
5th: 3T of #30 Kynar coated wire; start pin #7, end pin #8
NOTE: Gap for 1.66mH ±5% (pins 9 to 10)
1
T4
T4 Power Xfmr, LPRI = 3.87mH, Custom Ciols P/N 5038 or Coiltronics P/N CTX05-12545-1
E24/25 core set, TDK PC40 material
8 pin vertical bobbin (Cosmo #4564-3-419)
Wind as follows:
1st: 200T of 30AWG magnet wire; start pin #1, end pin #4.
1 layer of mylar tape
2nd: 300T of 32AWG magnet wire; start pin #5, end pin #8
NOTE: Gap for inductance primary: (pins 1 to 4) @ 3.87mH ±5%
1
T5
T5 Current Sense Inductor, Custom Coils P/N 5040 or Coiltronics P/N CTX05-12546-1
Toroid Magnetics YW-41305-TC
Wind as follows:
Primary = 3T 30AWG magnet coated wire, start pin #1, end pin #4
Secondary = 400T 35AWG magnet wire, start pin #5, end pin #8
INDUCTORS:
2
L1, 2
EMI/RFI Inductor, 600µH, DC resistance = 0.45Ω Prem.
Magnetics
SPE116A
F1
2A fuse, 5 x 20mm miniature
F948-ND
FUSES:
1
2
Littlefuse
Fuse Clips, 5 x 20mm, PC Mount
F058-ND
HARDWARE:
1
Single TO-220 Heatsink
Aavid Eng.
PB1ST-69
2
Double TO-220 Heatsink
IERC
PSE1-2TC
3
MICA Insulators
Keystone
4673K-ND
13
ML4831
PHYSICAL DIMENSIONS inches (millimeters)
Package: P18
18-Pin PDIP
0.890 - 0.910
(22.60 - 23.12)
18
0.240 - 0.260 0.295 - 0.325
(6.09 - 6.61) (7.49 - 8.26)
PIN 1 ID
0.045 MIN
(1.14 MIN)
(4 PLACES)
1
0.050 - 0.065
(1.27 - 1.65)
0.100 BSC
(2.54 BSC)
0.015 MIN
(0.38 MIN)
0.170 MAX
(4.32 MAX)
0.125 MIN
(3.18 MIN)
0.016 - 0.022
(0.40 - 0.56)
SEATING PLANE
0.008 - 0.012
(0.20 - 0.31)
0º - 15º
ORDERING INFORMATION
PART NUMBER
ML4831CP
TEMPERATURE RANGE
0°C to 85°C
PACKAGE
Molded PDIP (P18) (END OF LIFE)
© Micro Linear 1997
Micro Linear is a registered trademark of Micro Linear Corporation
Products described in this document may be covered by one or more of the following patents, U.S.: 4,897,611; 4,964,026; 5,027,116; 5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940;
5,546,017; 5,559,470; 5,565,761; 5,592,128; 5,594,376; Japan: 2598946. Other patents are pending.
Micro Linear reserves the right to make changes to any product herein to improve reliability, function or design.
Micro Linear does not assume any liability arising out of the application or use of any product described herein,
neither does it convey any license under its patent right nor the rights of others. The circuits contained in this
data sheet are offered as possible applications only. Micro Linear makes no warranties or representations as to
whether the illustrated circuits infringe any intellectual property rights of others, and will accept no responsibility
or liability for use of any application herein. The customer is urged to consult with appropriate legal counsel
before deciding on a particular application.
14
2092 Concourse Drive
San Jose, CA 95131
Tel: 408/433-5200
Fax: 408/432-0295
DS4831-01