MAX6902EKA Rev. A RELIABILITY REPORT FOR MAX6902EKA PLASTIC ENCAPSULATED DEVICES June 20, 2003 MAXIM INTEGRATED PRODUCTS 120 SAN GABRIEL DR. SUNNYVALE, CA 94086 Written by Reviewed by Jim Pedicord Quality Assurance Reliability Lab Manager Bryan J. Preeshl Quality Assurance Executive Director Conclusion The MAX6902 successfully meets the quality and reliability standards required of all Maxim products. In addition, Maxim’s continuous reliability monitoring program ensures that all outgoing product will continue to meet Maxim’s quality and reliability standards. Table of Contents I. ........Device Description II. ........Manufacturing Information III. .......Packaging Information IV. .......Die Information V. ........Quality Assurance Information VI. .......Reliability Evaluation ......Attachments I. Device Description A. General The MAX6902 SPI™-compatible real-time clock contains a real-time clock/calendar and 31 x 8 bits of static random-access memory (SRAM). The real-time clock/calendar provides seconds, minutes, hours, day, date, month, year, and century information. A time/date programmable polled ALARM is included in the MAX6902. The end-of-the-month date is automatically adjusted for months with fewer than 31 days, including corrections for leap year up to the year 2100. The clock operates in either the 24hr or 12hr format with an AM/PM indicator. The MAX6902 operates with a supply voltage of +2V to +5.5V, is available in the ultra-small 8-pin SOT23 package, and works over the -40°C to +85°C industrial temperature range. B. Absolute Maximum Ratings Item VCC to GND All Other Pins to GND Current into Any Pin Rate of Rise, VCC Junction Temperature Storage Temperature Range ESD Protection (all pins, Human Body Model) Lead Temperature (soldering, 10s) Continuous Power Dissipation (TA = +70°C) 8-Pin SOT23 Derates above +70°C 8-Pin SOT23 Rating -0.3V to +6V -0.3V to (VCC + 0.3V) ±20mA 100V/µs +150°C -65°C to +150°C 2000V +300°C 714mW 8.9mW/°C II. Manufacturing Information A. Description/Function: SPI-Compatible Real-Time Clock in SOT23 B. Process: TC05 (0.5 micron CMOS) C. Number of Device Transistors: 26,418 D. Fabrication Location: Taiwan, USA E. Assembly Location: Malaysia F. Date of Initial Production: July, 2001 III. Packaging Information A. Package Type: 8-Pin SOT23 B. Lead Frame: Copper C. Lead Finish: Solder Plate D. Die Attach: Non-Conductive Epoxy E. Bondwire: Gold (1 mil dia.) F. Mold Material: Epoxy with silica filler G. Assembly Diagram: # 05-3301-0009 H. Flammability Rating: Class UL94-V0 I. Classification of Moisture Sensitivity per JEDEC standard JESD22-A112: Level 1 IV. Die Information A. Dimensions: 70 x 45 mils B. Passivation: Si3N4/SiO2 (Silicon nitride/ Silicon dioxide) C. Interconnect: Al/Si/Cu (Aluminum/ Silicon/ Copper) D. Backside Metallization: None E. Minimum Metal Width: Metal 1: 0.5 microns; Metal 2: 0.7 microns (as drawn) F. Minimum Metal Spacing: Metal 1: 0.5 microns; Metal 2: 0.7 microns (as drawn) G. Bondpad Dimensions: 5 mil. Sq. H. Isolation Dielectric: SiO2 I. Die Separation Method: Wafer Saw V. Quality Assurance Information A. Quality Assurance Contacts: Jim Pedicord (Manager, Rel Operations) Bryan Preeshl (Executive Director of QA) Kenneth Huening (Vice President) B. Outgoing Inspection Level: 0.1% for all electrical parameters guaranteed by the Datasheet. 0.1% For all Visual Defects. C. Observed Outgoing Defect Rate: < 50 ppm D. Sampling Plan: Mil-Std-105D VI. Reliability Evaluation A. Accelerated Life Test The results of the 135°C biased (static) life test are shown in Table 1. Using these results, the Failure Rate (λ) is calculated as follows: λ= 1 = MTTF 1.83 192 x 4389 x 80 x 2 (Chi square value for MTTF upper limit) Thermal acceleration factor assuming a 0.8eV activation energy λ = 13.57 x 10-9 λ= 13.57 F.I.T. (60% confidence level @ 25°C) This low failure rate represents data collected from Maxim’s reliability qualification and monitor programs. Maxim also performs weekly Burn-In on samples from production to assure the reliability of its processes. The reliability required for lots which receive a burn-in qualification is 59 F.I.T. at a 60% confidence level, which equates to 3 failures in an 80 piece sample. Maxim performs failure analysis on lots exceeding this level. The following Burn-In Schematic (Spec #06-5784) shows the static circuit used for this test. Maxim also performs 1000 hour life test monitors quarterly for each process. This data is published in the Product Reliability Report (RR-1M). B. Moisture Resistance Tests Maxim evaluates pressure pot stress from every assembly process during qualification of each new design. Pressure Pot testing must pass a 20% LTPD for acceptance. Additionally, industry standard 85°C/85%RH or HAST tests are performed quarterly per device/package family. C. E.S.D. and Latch-Up Testing The DW11 die type has been found to have all pins able to withstand a transient pulse of ±2500V, per Mil-Std-883 Method 3015 (reference attached ESD Test Circuit). Latch-Up testing has shown that this device withstands a current of ±200mA. Table 1 Reliability Evaluation Test Results MAX6902EKA TEST ITEM TEST CONDITION Static Life Test (Note 1) Ta = 135°C Biased Time = 192 hrs. FAILURE IDENTIFICATION PACKAGE DC Parameters & functionality SAMPLE SIZE NUMBER OF FAILURES 80 0 77 0 Moisture Testing (Note 2) Pressure Pot Ta = 121°C P = 15 psi. RH= 100% Time = 168hrs. DC Parameters & functionality SOT 85/85 Ta = 85°C RH = 85% Biased Time = 1000hrs. DC Parameters & functionality 77 0 DC Parameters & functionality 77 0 Mechanical Stress (Note 2) Temperature Cycle -65°C/150°C 1000 Cycles Method 1010 Note 1: Life Test Data may represent plastic DIP qualification lots. Note 2: Generic Package/Process data Attachment #1 TABLE II. Pin combination to be tested. 1/ 2/ Terminal A (Each pin individually connected to terminal A with the other floating) Terminal B (The common combination of all like-named pins connected to terminal B) 1. All pins except VPS1 3/ All VPS1 pins 2. All input and output pins All other input-output pins 1/ Table II is restated in narrative form in 3.4 below. 2/ No connects are not to be tested. 3/ Repeat pin combination I for each named Power supply and for ground (e.g., where VPS1 is VDD, VCC, VSS, VBB, GND, +VS, -VS, VREF, etc). 3.4 Pin combinations to be tested. a. Each pin individually connected to terminal A with respect to the device ground pin(s) connected to terminal B. All pins except the one being tested and the ground pin(s) shall be open. b. Each pin individually connected to terminal A with respect to each different set of a combination of all named power supply pins (e.g., VSS1, or VSS2 or VSS3 or VCC1, or VCC2) connected to terminal B. All pins except the one being tested and the power supply pin or set of pins shall be open. c. Each input and each output individually connected to terminal A with respect to a combination of all the other input and output pins connected to terminal B. All pins except the input or output pin being tested and the combination of all the other input and output pins shall be open. TERMINAL C R1 R2 S1 TERMINAL A REGULATED HIGH VOLTAGE SUPPLY S2 C1 DUT SOCKET SHORT TERMINAL B Mil Std 883D Method 3015.7 Notice 8 TERMINAL D R = 1.5kΩ C = 100pf CURRENT PROBE (NOTE 6) 3/1/01 3/7/01 ONCE PER SOCKET ONCE PER BOARD +5.5V 10 K 1 8 2 7 3 6 4 5 32.768 KHz 12.5 pF .01 uF 8 - SOT23 DEVICES: MAX 6902 DRAWN BY: HAK/TEK TAN MAX. EXPECTED CURRENT = 10mA NOTES: DOCUMENT I.D. 06-5784 REVISION A MAXIM TITLE: BI Circuit (MAX6902) PAGE 2 OF 3