FAIRCHILD FDS6982S

FDS6982S
Dual Notebook Power Supply N-Channel PowerTrench SyncFet™
General Description
Features
The FDS6982S is designed to replace two single SO-8
MOSFETs and Schottky diode in synchronous DC:DC
power supplies that provide various peripheral voltages
for notebook computers and other battery powered
electronic devices. FDS6982S contains two unique
30V, N-channel, logic level, PowerTrench MOSFETs
designed to maximize power conversion efficiency.
•
Q2:
Optimized to minimize conduction losses
Includes SyncFET Schottky body diode
RDS(on) = 0.016Ω @ VGS = 10V
8.6A, 30V
RDS(on) = 0.021Ω @ VGS = 4.5V
•
The high-side switch (Q1) is designed with specific
emphasis on reducing switching losses while the lowside switch (Q2) is optimized to reduce conduction
losses. Q2 also includes an integrated Schottky diode
using Fairchild’s monolithic SyncFET technology.
Q1:
Optimized for low switching losses
Low Gate Charge ( 8.5 nC typical)
RDS(on) = 0.028Ω @ VGS = 10V
6.3A, 30V
RDS(on) = 0.035Ω @ VGS = 4.5V
D1
D1
5
D2
4
Q1
6
D2
3
7
SO-8
S2
G2
S1
G1
Absolute Maximum Ratings
Symbol
8
Drain-Source Voltage
Gate-Source Voltage
ID
Drain Current
Q2
- Continuous
- Pulsed
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
PD
(Note 1a)
Q1
Units
30
30
±20
8.6
30
±20
6.3
20
V
V
A
2
1.6
1
0.9
-55 to +150
°C
(Note 1a)
78
°C/W
(Note 1)
40
°C/W
(Note 1a)
(Note 1b)
(Note 1c)
TJ, TSTG
1
TA = 25°C unless otherwise noted
Parameter
VDSS
VGSS
2
Q2
Operating and Storage Junction Temperature Range
W
Thermal Characteristics
RθJA
Thermal Resistance, Junction-to-Ambient
RθJC
Thermal Resistance, Junction-to-Case
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
FDS6982S
FDS6982S
13”
12mm
2500 units
1999 Fairchild Semiconductor Corporation
FDS6982S Rev B(W)
FDS6982S
March 2000
PRELIMINARY
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Type Min Typ Max Units
Off Characteristics
BVDSS
IGSSF
Drain-Source Breakdown
Voltage
Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain
Current
Gate-Body Leakage, Forward
IGSSR
Gate-Body Leakage, Reverse VGS = -20 V, VDS = 0 V
∆BVDSS
∆TJ
IDSS
On Characteristics
VGS = 0 V, ID = 1 mA
VGS = 0 V, ID = 250 uA
ID = 1 mA, Referenced to 25°C
ID = 250 µA, Referenced to 25°C
VDS = 24 V, VGS = 0 V
VGS = 20 V, VDS = 0 V
Q2
Q1
Q2
Q1
Q2
Q1
All
30
30
V
20
26
All
mV/°C
1000
1
100
µA
-100
nA
3
3
V
nA
(Note 2)
VGS(th)
Gate Threshold Voltage
∆VGS(th)
∆TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain-Source
On-Resistance
ID(on)
On-State Drain Current
gFS
Forward Transconductance
VDS = VGS, ID = 1 mA
VDS = VGS, ID = 250 µA
ID = 1 mA, Referenced to 25°C
ID = 250 µA, Referenced to 25°C
VGS = 10 V, ID = 8.6 A
VGS = 10 V, ID = 8.6 A, TJ = 125°C
VGS = 4.5 V, ID = 7.5 A
VGS = 10 V, ID = 6.3 A
VGS = 10 V, ID = 6.3 A, TJ = 125°C
VGS = 4.5 V, ID = 5.6 A
VGS = 10 V, VDS = 5 V
VDS = 5 V, ID = 8.6 A
VDS = 5 V, ID = 6.3 A
Q2
Q1
Q2
Q1
Q2
1
1
-3.5
-5
0.013
0.020
0.017
0.021
0.038
0.028
Q1
Q2
Q1
Q2
Q1
30
20
mV/°C
0.016
0.027
0.021
0.028
0.047
0.035
Ω
A
38
18
S
2040
815
615
186
216
66
pF
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
VDS = 10 V, VGS = 0 V,
f = 1.0 MHz
Q2
Q1
Q2
Q1
Q2
Q1
pF
pF
FDS6982S Rev B (W)
FDS6982S
Electrical Characteristics
Electrical Characteristics
Symbol
Parameter
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
(continued)
TA = 25°C unless otherwise noted
Test Conditions
Type Min
Typ
Max Units
(Note 2)
Gate-Drain Charge
VDD = 15 V, ID = 1 A,
VGS = 10V, RGEN = 6 Ω
Q2
VDS = 15 V, ID = 11.5 A, VGS = 5 V
Q1
VDS = 15 V, ID = 6.3 A,VGS = 5 V
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
10
10
10
14
34
21
14
7
17.5
8.5
6.3
2.4
5.4
3.1
18
18
18
25
55
34
23
14
26
12
ns
ns
ns
ns
nC
nC
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
tRR
Reverse Recovery Time
QRR
VSD
IF = 11.5A,
diF/dt = 300 A/µs
Reverse Recovery Charge
Drain-Source Diode Forward VGS = 0 V, IS = 3 A
VGS = 0 V, IS = 6 A
Voltage
VGS = 0 V, IS = 1.3 A
Q2
Q1
Q2
20
ns
Q2
Q2
Q1
19.7
0.42
0.56
0.70
nC
V
(Note 3)
(Note 2)
(Note 2)
(Note 2)
3.0
1.3
.7
A
1.2
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 78°/W when
mounted on a
2
0.5 in pad of 2 oz
copper
b) 125°/W when
2
mounted on a .02 in
pad of 2 oz copper
c) 135°/W when mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
3. See “SyncFET Schottky body diode characteristics” below.
FDS6982S Rev B (W)
FDS6982S
Typical Characteristics: Q2
2.5
50
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
ID, DRAIN CURRENT (A)
VGS = 10V
6.0V
4.5V
40
5.0V
4.0V
30
3.5V
20
10
3.0V
2
VGS = 3.0V
1.5
3.5V
4.0V
6.0V
10V
0.5
0
0
0.5
1
1.5
2
0
2.5
10
20
30
40
50
ID, DRAIN CURRENT (A)
VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.04
2
ID = 11.5 A
ID = 11.5A
VGS = 10V
1.8
RDS(ON), ON-RESISTANCE (OHM)
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
4.5V
1
1.6
1.4
1.2
1
0.8
0.6
0.035
0.03
0.025
TA = 125oC
0.02
0.015
o
TA = 25 C
0.4
-50
-25
0
25
50
75
100
125
0.01
150
2
4
6
8
10
o
TJ, JUNCTION TEMPERATURE ( C)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
10
50
ID, DRAIN CURRENT (A)
IS, REVERSE DRAIN CURRENT (A)
VGS = 0V
o
VDS = 5V
TA = -55 C
o
25 C
40
100o
30
20
10
1
TA = 100oC
25oC
o
-55 C
0.1
0.01
0
1
2
3
4
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
5
0
0.2
0.4
0.6
0.8
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS6982S Rev B (W)
FDS6982S
Typical Characteristics: Q2
3000
ID = 11.5A
VDS = 5V
10V
f = 1MHz
VGS = 0 V
2500
8
15V
CAPACITANCE (pF)
VGS, GATE-SOURCE VOLTAGE (V)
10
6
4
2
CISS
2000
1500
1000
COSS
500
CRSS
0
0
0
10
20
30
40
0
5
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
15
20
25
30
Figure 8. Capacitance Characteristics.
50
100
P(pk), PEAK TRANSIENT POWER (W)
RDS(ON) LIMIT
100µs
ID, DRAIN CURRENT (A)
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
1ms
10ms
10
100ms
1s
10s
1
DC
VGS = 10V
SINGLE PULSE
RθJA = 135oC/W
0.1
TA = 25oC
0.01
0.1
1
10
100
VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
SINGLE PULSE
RθJA = 135°C/W
TA = 25°C
40
30
20
10
0
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 10. Single Pulse Maximum
Power Dissipation.
FDS6982S Rev B (W)
FDS6982S
Typical Characteristics Q1
2
40
VGS = 10V
6.0V
4.5V
4.0V
30
1.8
3.5V
20
1.6
VGS = 3.5V
1.4
4.0V
4.5V
5.0V
1.2
6.0V
3.0V
10
10V
1
2.5V
0.8
0
0
1
2
3
0
4
10
Figure 11. On-Region Characteristics.
1.6
20
30
40
ID, DRAIN CURRENT (A)
VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 12. On-Resistance Variation with
Drain Current and Gate Voltage.
0.08
ID = 6.3A
VGS = 10V
ID = 3.5A
1.4
0.06
1.2
o
TA = 125 C
0.04
1
o
TA = 25 C
0.02
0.8
0.6
0
-50
-25
0
25
50
75
100
125
150
2
4
o
TJ, JUNCTION TEMPERATURE ( C)
6
8
10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 13. On-Resistance Variation with
Temperature.
Figure 14. On-Resistance Variation with
Gate-to-Source Voltage.
100
40
VGS = 0V
o
TA = -55 C
VDS = 5V
o
25 C
10
o
125 C
o
30
TA = 125 C
1
o
25 C
0.1
20
o
-55 C
0.01
10
0.001
0.0001
0
1
2
3
4
5
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 15. Transfer Characteristics.
6
0
0.4
0.8
1.2
1.6
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 16. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS6982S Rev B (W)
FDS6982S
Typical Characteristics Q1
1200
10
ID = 6.3A
VDS = 5V
10V
f = 1MHz
VGS = 0 V
1000
8
15V
800
CISS
6
600
4
400
2
200
COSS
CRSS
0
0
0
4
8
12
0
16
5
10
15
20
25
30
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 17. Gate Charge Characteristics.
Figure 18. Capacitance Characteristics.
100
30
SINGLE PULSE
o
100µs
1ms
RDS(ON) LIMIT
10
o
TA = 25 C
10ms
100ms
1s
10s
1
RθJA = 135 C/W
25
20
15
DC
10
VGS = 10V
SINGLE PULSE
0.1
o
5
RθJA = 135 C/W
o
TA = 25 C
0.01
0
0.1
1
10
100
0.01
0.1
VDS, DRAIN-SOURCE VOLTAGE (V)
1
10
100
1000
SINGLE PULSE TIME (SEC)
Figure 19. Maximum Safe Operating Area.
Figure 20. Single Pulse Maximum
Power Dissipation.
r(t) , NO RMALIZED EFFECTIVE
TRAN SIEN T T HERMAL RESISTANCE
1
0.5
D = 0.5
0.2
0.2
0.1
0.05
0.02
0.01
R θJA (t) = r(t) * R θJA
R θJA = 135°C/W
0.1
0.05
P(pk)
0.02
0.01
t1
Single Pulse
0.005
0.002
0.001
0.0001
t2
TJ - T A = P * R θJA (t)
Duty Cycle, D = t1 /t2
0.001
0.01
0.1
t 1, TIME (s ec)
1
10
100
300
Figure 21. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS6982S Rev B (W)
FDS6982S
Typical Characteristics (continued)
SyncFET Schottky Body Diode
Characteristics
Schottky barrier diodes exhibit significant leakage at high
temperature and high reverse voltage. This will increase
the power in the device.
IDSS, REVERSE LEAKAGE CURRENT (A)
Current: 3A/div
Fairchild’s SyncFET process embeds a Schottky diode in
parallel with PowerTrench MOSFET. This diode exhibits
similar characteristics to a discrete external Schottky
diode in parallel with a MOSFET. Figure 12 shows the
reverse recovery characteristic of the FDS6982S.
0.1
0.01
100oC
0.001
25oC
0.0001
0
10
20
30
VDS, REVERSE VOLTAGE (V)
10nS/div
Figure 14. SyncFET body diode reverse
leakage versus drain-source voltage and
temperature.
Figure 12. FDS6982S SyncFET body diode
reverse recovery characteristic.
Current: 3A/div
For comparison purposes, Figure 13 shows the reverse
recovery characteristics of the body diode of an
equivalent size MOSFET produced without SyncFET
(FDS6982).
10nS/div
Figure 13. Non-SyncFET (FDS6982) body
diode reverse recovery characteristic.
FDS6982S Rev B (W)
SO-8 Tape and Reel Data and Package Dimensions
SOIC(8lds) Packaging
Configuration: Figure 1.0
Packaging Description:
EL ECT ROST AT IC
SEN SIT IVE DEVICES
DO NO T SHI P OR STO RE N EAR ST RO NG EL ECT ROST AT IC
EL ECT RO M AGN ETI C, M AG NET IC O R R ADIO ACT IVE FI ELD S
TNR D ATE
PT NUMB ER
PEEL STREN GTH MIN ___ __ ____ __ ___gms
MAX ___ ___ ___ ___ _ gms
Antistatic Cover Tape
ESD Label
SOIC-8 parts are shipped in tape. The carrier tape is
made from a dissipative (carbon filled) polycarbonate
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of polyester film,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped with
2,500 units per 13" or 330cm diameter reel. The reels are
dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 500 units per 7" or
177cm diameter reel. This and some other options are
further described in the Packaging Information table.
These full reels are individually barcode labeled and
placed inside a standard intermediate box (illustrated in
figure 1.0) made of recyclable corrugated brown paper.
One box contains two reels maximum. And these boxes
are placed inside a barcode labeled shipping box which
comes in different sizes depending on the number of parts
shipped.
Static Dissipative
Embossed Carrier Tape
F63TNR
Label
Customized
Label
F852
NDS
9959
F852
NDS
9959
F852
NDS
9959
F852
NDS
9959
F852
NDS
9959
Pin 1
SOIC (8lds) Packaging Information
Packaging Option
Packaging type
Qty per Reel/Tube/Bag
Standard
(no flow code)
TNR
2,500
L86Z
F011
D84Z
Rail/Tube
TNR
TNR
95
4,000
500
13" Dia
-
13" Dia
7" Dia
343x64x343
530x130x83
343x64x343
184x187x47
Max qty per Box
5,000
30,000
8,000
1,000
Weight per unit (gm)
0.0774
0.0774
0.0774
0.0774
Weight per Reel (kg)
0.6060
-
0.9696
0.1182
Reel Size
Box Dimension (mm)
SOIC-8 Unit Orientation
Note/Comments
343mm x 342mm x 64mm
Standard Intermediate box
ESD Label
F63TNR Label sample
F63TNLabel
F63TN Label
LOT: CBVK741B019
QTY: 2500
FSID: FDS9953A
SPEC:
D/C1: D9842
D/C2:
QTY1:
QTY2:
SPEC REV:
CPN:
N/F: F
ESD Label
(F63TNR)3
SOIC(8lds) Tape Leader and Trailer
Configuration: Figure 2.0
Carrier Tape
Cover Tape
Components
Trailer Tape
640mm minimum or
80 empty pockets
Leader Tape
1680mm minimum or
210 empty pockets
July 1999, Rev. B
SO-8 Tape and Reel Data and Package Dimensions, continued
SOIC(8lds) Embossed Carrier Tape
Configuration: Figure 3.0
P0
D0
T
E1
F
K0
Wc
W
E2
B0
Tc
A0
D1
P1
User Direction of Feed
Dimensions are in millimeter
Pkg type
A0
B0
SOIC(8lds)
(12mm)
6.50
+/-0.10
5.30
+/-0.10
W
12.0
+/-0.3
D0
D1
E1
E2
1.55
+/-0.05
1.60
+/-0.10
1.75
+/-0.10
F
10.25
min
5.50
+/-0.05
P1
P0
8.0
+/-0.1
4.0
+/-0.1
K0
2.1
+/-0.10
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
T
Wc
0.450
+/0.150
9.2
+/-0.3
0.06
+/-0.02
0.5mm
maximum
20 deg maximum
Typical
component
cavity
center line
B0
Tc
0.5mm
maximum
20 deg maximum component rotation
Typical
component
center line
Sketch A (Side or Front Sectional View)
A0
Component Rotation
Sketch C (Top View)
Component lateral movement
Sketch B (Top View)
SOIC(8lds) Reel Configuration: Figure 4.0
Component Rotation
W1 Measured at Hub
Dim A
Max
Dim A
max
See detail AA
Dim N
7" Diameter Option
B Min
Dim C
See detail AA
W3
13" Diameter Option
Dim D
min
W2 max Measured at Hub
DETAIL AA
Dimensions are in inches and millimeters
Tape Size
Reel
Option
Dim A
Dim B
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
2.165
55
0.488 +0.078/-0.000
12.4 +2/0
0.724
18.4
0.469 – 0.606
11.9 – 15.4
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
7.00
178
0.488 +0.078/-0.000
12.4 +2/0
0.724
18.4
0.469 – 0.606
11.9 – 15.4
12mm
7" Dia
7.00
177.8
12mm
13" Dia
13.00
330
 1998 Fairchild Semiconductor Corporation
Dim C
Dim D
Dim N
Dim W1
Dim W2
Dim W3 (LSL-USL)
July 1999, Rev. B
SO-8 Tape and Reel Data and Package Dimensions, continued
SOIC-8 (FS PKG Code S1)
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in:
inches [millimeters]
Part Weight per unit (gram): 0.0774
9
September 1998, Rev. A
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench 
QFET™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
SyncFET™
TinyLogic™
UHC™
VCX™
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. D