FDS6672A 30V N-Channel PowerTrench MOSFET General Description Features This N-Channel MOSFET has been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized for low gate charge, low RDS(ON) and fast switching speed. • 12.5 A, 30 V. RDS(ON) = 8 mΩ @ VGS = 10 V RDS(ON) = 9.5 mΩ @ VGS = 4.5 V • High performance trench technology for extremely low RDS(ON) Applications • Low gate charge (33 nC typical) • DC/DC converter • High power and current handling capability D D D D SO-8 S S S G Absolute Maximum Ratings Symbol 5 4 6 3 7 2 8 1 o TA=25 C unless otherwise noted Parameter Ratings Units VDSS Drain-Source Voltage 30 V VGSS Gate-Source Voltage ±12 V ID Drain Current 12.5 A – Continuous (Note 1a) – Pulsed 50 Power Dissipation for Single Operation PD (Note 1a) 2.5 (Note 1b) 1.2 (Note 1c) TJ, TSTG W 1.0 -55 to +150 °C (Note 1a) 50 °C/W (Note 1) 25 °C/W Operating and Storage Junction Temperature Range Thermal Characteristics RθJA Thermal Resistance, Junction-to-Ambient RθJC Thermal Resistance, Junction-to-Case Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity FDS6672A FDS6672A 13’’ 12mm 2500 units 2000 Fairchild Semiconductor Corporation FDS6672A Rev B(W) FDS6672A February 2000 PRELIMINARY Symbol Parameter TA = 25°C unless otherwise noted Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain–Source Breakdown Voltage VGS = 0 V, ID = 250 µA ∆BVDSS ∆TJ IDSS Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current ID = 250 µA, Referenced to 25°C VDS = 24 V, VGS = 0 V 1 µA IGSSF Gate–Body Leakage, Forward VGS = 12 V, VDS = 0 V 100 nA IGSSR Gate–Body Leakage, Reverse VGS = –12 V VDS = 0 V –100 nA 2.0 V On Characteristics 30 V 20 mV/°C (Note 2) VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance ID = 250 µA, Referenced to 25°C ID(on) On–State Drain Current VGS = 10 V, VGS = 4.5 V, VGS = 4.5 V, TJ=125°C VGS = 10 V, gFS Forward Transconductance VDS = 10 V, 0.8 1.2 -4 6.8 8.2 11.5 ID = 14 A ID = 12.5 A ID = 12.5 A, VDS = 5 V mV/°C 8 9.5 16 50 ID = 15 A mΩ A 75 S 5070 pF 550 pF 230 pF Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn–On Delay Time tr Turn–On Rise Time td(off) VDS = 15 V, V GS = 0 V, f = 1.0 MHz (Note 2) VDD = 10 V, ID = 1 A, VGS = 4.5 V, RGEN = 6 Ω 17 25 ns 18 25 ns Turn–Off Delay Time 69 100 ns tf Turn–Off Fall Time 29 42 ns Qg Total Gate Charge 33 46 nC Qgs Gate–Source Charge Qgd Gate–Drain Charge VDS = 15 V, ID = 15 A, VGS = 4.5 V 7.5 nC 6.8 nC Drain–Source Diode Characteristics and Maximum Ratings IS VSD Maximum Continuous Drain–Source Diode Forward Current Drain–Source Diode Forward VGS = 0 V, IS = 2.1 A Voltage (Note 2) 0.7 2.1 A 1.2 V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 50°/W when 2 mounted on a 1in pad of 2 oz copper b) 105°/W when 2 mounted on a .04 in pad of 2 oz copper c) 125°/W when mounted on a minimum pad. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% FDS6672A Rev B(W) FDS6672A Electrical Characteristics FDS6672A Typical Characteristics 50 1.5 ID, DRAIN CURRENT (A) 3.5V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS = 4.5V 3.0V 40 2.5V 30 2.0V 20 10 VGS = 2.5V 1.3 3.0V 1.1 3.5V 4.0V 4.5V 0.9 0 0 0.5 1 0 1.5 10 20 Figure 1. On-Region Characteristics. 50 60 0.025 ID = 6 A ID = 15A VGS = 10V 1.6 RDS(ON), ON-RESISTANCE (OHM) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 40 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.8 1.4 1.2 1 0.8 0.6 -50 -25 0 25 50 75 100 125 0.02 0.015 TA = 125oC 0.01 TA = 25oC 0.005 0 150 0 2 TJ, JUNCTION TEMPERATURE (oC) 4 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 IS, REVERSE DRAIN CURRENT (A) 60 VDS = 5V ID, DRAIN CURRENT (A) 30 ID, DRAIN CURRENT (A) VDS, DRAIN-SOURCE VOLTAGE (V) 45 30 TA = 125oC 25oC 15 -55oC VGS = 0V 10 TA = 125oC 1 25oC -55oC 0.1 0.01 0.001 0 0.5 1 1.5 2 2.5 VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 3 0 0.2 0.4 0.6 0.8 1 1.2 1.4 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDS6672A Rev B(W) FDS6672A Typical Characteristics 8000 ID = 12.5A f = 1MHz VGS = 0 V 10V VDS = 5V 4 CAPACITANCE (pF) VGS, GATE-SOURCE VOLTAGE (V) 5 15V 3 2 6000 CISS 4000 2000 1 COSS CRSS 0 0 0 10 20 30 40 0 5 Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics. 20 25 30 50 P(pk), PEAK TRANSIENT POWER (W) 100µs RDS(ON) LIMIT ID, DRAIN CURRENT (A) 15 Figure 8. Capacitance Characteristics. 100 1ms 10ms 100ms 1s 10s 10 1 DC VGS = 10V SINGLE PULSE RθJA = 125oC/W 0.1 TA = 25oC 0.01 0.01 0.1 1 10 SINGLE PULSE RθJA = 125°C/W TA = 25°C 40 30 20 10 0 0.001 100 0.01 0.1 1 10 100 t1, TIME (sec) VDS, DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 10 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 10. Single Pulse Maximum Power Dissipation. 1 D = 0.5 RθJA(t) = r(t) + RθJA RθJA = 125°C/W 0.2 0.1 0.1 0.05 P(pk) 0.02 t1 0.01 t2 0.01 SINGLE PULSE 0.001 0.0001 0.001 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. FDS6672A Rev B(W) SO-8 Tape and Reel Data and Package Dimensions SOIC(8lds) Packaging Configuration: Figure 1.0 Packaging Description: EL ECT ROST AT IC SEN SIT IVE DEVICES DO NO T SHI P OR STO RE N EAR ST RO NG EL ECT ROST AT IC EL ECT RO M AGN ETI C, M AG NET IC O R R ADIO ACT IVE FI ELD S TNR D ATE PT NUMB ER PEEL STREN GTH MIN ___ __ ____ __ ___gms MAX ___ ___ ___ ___ _ gms Antistatic Cover Tape ESD Label SOIC-8 parts are shipped in tape. The carrier tape is made from a dissipative (carbon filled) polycarbonate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped with 2,500 units per 13" or 330cm diameter reel. The reels are dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 500 units per 7" or 177cm diameter reel. This and some other options are further described in the Packaging Information table. These full reels are individually barcode labeled and placed inside a standard intermediate box (illustrated in figure 1.0) made of recyclable corrugated brown paper. One box contains two reels maximum. And these boxes are placed inside a barcode labeled shipping box which comes in different sizes depending on the number of parts shipped. Static Dissipative Embossed Carrier Tape F63TNR Label Customized Label F852 NDS 9959 F852 NDS 9959 F852 NDS 9959 F852 NDS 9959 F852 NDS 9959 Pin 1 SOIC (8lds) Packaging Information Packaging Option Packaging type Qty per Reel/Tube/Bag Standard (no flow code) TNR 2,500 L86Z F011 D84Z Rail/Tube TNR TNR 95 4,000 500 13" Dia - 13" Dia 7" Dia 343x64x343 530x130x83 343x64x343 184x187x47 Max qty per Box 5,000 30,000 8,000 1,000 Weight per unit (gm) 0.0774 0.0774 0.0774 0.0774 Weight per Reel (kg) 0.6060 - 0.9696 0.1182 Reel Size Box Dimension (mm) SOIC-8 Unit Orientation Note/Comments 343mm x 342mm x 64mm Standard Intermediate box ESD Label F63TNR Label sample F63TNLabel F63TN Label LOT: CBVK741B019 QTY: 2500 FSID: FDS9953A SPEC: D/C1: D9842 D/C2: QTY1: QTY2: SPEC REV: CPN: N/F: F ESD Label (F63TNR)3 SOIC(8lds) Tape Leader and Trailer Configuration: Figure 2.0 Carrier Tape Cover Tape Components Trailer Tape 640mm minimum or 80 empty pockets Leader Tape 1680mm minimum or 210 empty pockets July 1999, Rev. B SO-8 Tape and Reel Data and Package Dimensions, continued SOIC(8lds) Embossed Carrier Tape Configuration: Figure 3.0 P0 D0 T E1 F K0 Wc W E2 B0 Tc A0 D1 P1 User Direction of Feed Dimensions are in millimeter Pkg type A0 B0 SOIC(8lds) (12mm) 6.50 +/-0.10 5.30 +/-0.10 W 12.0 +/-0.3 D0 D1 E1 E2 1.55 +/-0.05 1.60 +/-0.10 1.75 +/-0.10 F 10.25 min 5.50 +/-0.05 P1 P0 8.0 +/-0.1 4.0 +/-0.1 K0 2.1 +/-0.10 Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481 rotational and lateral movement requirements (see sketches A, B, and C). T Wc 0.450 +/0.150 9.2 +/-0.3 0.06 +/-0.02 0.5mm maximum 20 deg maximum Typical component cavity center line B0 Tc 0.5mm maximum 20 deg maximum component rotation Typical component center line Sketch A (Side or Front Sectional View) A0 Component Rotation Sketch C (Top View) Component lateral movement Sketch B (Top View) SOIC(8lds) Reel Configuration: Figure 4.0 Component Rotation W1 Measured at Hub Dim A Max Dim A max See detail AA Dim N 7" Diameter Option B Min Dim C See detail AA W3 13" Diameter Option Dim D min W2 max Measured at Hub DETAIL AA Dimensions are in inches and millimeters Tape Size Reel Option Dim A Dim B 0.059 1.5 512 +0.020/-0.008 13 +0.5/-0.2 0.795 20.2 2.165 55 0.488 +0.078/-0.000 12.4 +2/0 0.724 18.4 0.469 – 0.606 11.9 – 15.4 0.059 1.5 512 +0.020/-0.008 13 +0.5/-0.2 0.795 20.2 7.00 178 0.488 +0.078/-0.000 12.4 +2/0 0.724 18.4 0.469 – 0.606 11.9 – 15.4 12mm 7" Dia 7.00 177.8 12mm 13" Dia 13.00 330 1998 Fairchild Semiconductor Corporation Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL) July 1999, Rev. B SO-8 Tape and Reel Data and Package Dimensions, continued SOIC-8 (FS PKG Code S1) 1:1 Scale 1:1 on letter size paper Dimensions shown below are in: inches [millimeters] Part Weight per unit (gram): 0.0774 9 September 1998, Rev. A TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ISOPLANAR™ MICROWIRE™ POP™ PowerTrench QFET™ QS™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 ACEx™ CoolFET™ CROSSVOLT™ E2CMOSTM FACT™ FACT Quiet Series™ FAST® FASTr™ GTO™ HiSeC™ SyncFET™ TinyLogic™ UHC™ VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. D