Electrical Specifications Subject to Change LTC4055 USB Power Controller and Li-Ion Linear Charger U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO Charges Single Cell Li-Ion Batteries Directly from USB Port Load Dependent Charging Guarantees USB Input Current Compliance Automatic Battery Switchover When Input Supply is Removed Constant-Current/Constant-Voltage Operation with Thermal Feedback to Maximize Charging Rate Without Risk of Overheating Selectable 100% or 20% Current Limit (e.g., 500mA/100mA) Low Loss Full PowerPathTM Control with Ideal Diode Operation (Reverse Current Blocking) Preset 4.2V Charge Voltage with 0.8% Accuracy USB Compliant Suspend Mode Programmable Charge Current and Termination Timer Automatic Recharge Soft-Start Limits Inrush Current NTC Thermistor Input for Temperature Qualified Charging Tiny (4mm × 4mm × 0.8mm) QFN Package U APPLICATIO S ■ Portable USB Devices: Cameras, MP3 Players, PDAs The LTC®4055 is a USB power manager and Li-Ion battery charger designed to work in portable battery-powered applications. The part manages and limits the total current used by the USB peripheral for operation and battery charging. Depending on the state of the current select pin (HPWR), total input current can be limited to either 100mA or 500mA. The voltage drop from the USB supply or battery to the USB peripheral is typically less than 100mV at 400mA and 20mV at 80mA. Other management features include: automatic switch over to battery when input is removed, inrush current limiting, reverse current blocking, undervoltage lockout and thermal shutdown. The LTC4055 includes a complete constant-current/constant-voltage linear charger for single cell Li-ion batteries. The float voltage applied to the battery is held to a tight 0.8% (typ) tolerance, and charge current is programmable using an external resistor to ground. Fully discharged cells are automatically trickle charged at 10% of the programmed current until the cell voltage exceeds 2.8V. Total charge time is programmable by an external capacitor to ground. When the battery drops 100mV below the float voltage, automatic recharging of the battery occurs. Also featured is an NTC thermistor input used to monitor battery temperature while charging. The LTC4055 is available in a 16-pin low profile (4mm × 4mm) QFN package. , LTC and LT are registered trademarks of Linear Technology Corporation. PowerPath is a trademark of Linear Technology Corporation. U TYPICAL APPLICATIO 600 1Ω IN1 OUT IN2 BAT VNTC 10µF TO LDOs, REGs, ETC + NTC WALL LTC4055 CHRG ACPR SHDN SUSP SUSPEND USB POWER TIMER PROG 0.1µF Li-Ion CELL 400 ILOAD 300 200 IBAT CHARGING 100 HPWR 500mA/100mA SELECT IIN 500 10µF CURRENT (mA) 5V (NOM) FROM USB CABLE VBUS High Power/Full Charge RPROG = RCLPROG = 100k CLPROG 100k GND 0 100k –100 4055 TA01 0 100 200 300 400 ILOAD (mA) 600 IBAT (IDEAL DIODE) 500 4055 TA02 4055p 1 LTC4055 W U U U W W W ABSOLUTE MAXIMUM RATINGS PACKAGE/ORDER INFORMATION (Notes 1, 2, 3, 4, 5) ORDER PART NUMBER ACPR CHRG VNTC NTC TOP VIEW 16 15 14 13 IN2 1 LTC4055EUF 12 TIMER BAT 2 11 PROG 17 OUT 3 10 GND IN1 4 5 6 7 8 SHDN SUSP HPWR 9 CLPROG WALL Terminal Voltage IN1, IN2, OUT, BAT ................................ –0.3V to 6V NTC, VNTC, TIMER, PROG, CLPROG ..................... –0.3V to (VCC + 0.3V) CHRG, HPWR, SUSP, SHDN, WALL, ACPR .......................................... –0.3V to 6V IN2 .......................................................... VIN1 + 0.1V Pin Current (DC) IN1, IN2, OUT, BAT (Note 7) ............................. 1.6A Operating Temperature Range ............... – 40°C to 85°C Maximum Operating Junction Temperature......... 125°C Reflow Peak Body Temperature ........................... 260°C Storage Temperature Range ................ – 65°C to 125°C UF PART MARKING 4055 UF PACKAGE 16-LEAD (4mm × 4mm) PLASTIC QFN TJMAX = 125°C, θJA = 37°C/W EXPOSED PAD IS GND (PIN 17) MUST BE SOLDERED TO PCB Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● indicates specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN1 = VIN2 = 5V, VBAT = 3.5V, HPWR = 5V, WALL = 0V, RPROG = RCLPROG = 100k, unless otherwise noted. SYMBOL VIN VBAT IIN PARAMETER Input Supply Voltage Input Voltage Input Supply Current IOUT IBAT Output Supply Current Battery Drain Current ILIM(MAX) VUVLO Maximum Current Limit Input or Output Undervoltage Lockout ∆VUVLO Input or Output Undervoltage Lockout Hysteresis Current Limit ILIM Current Limit RON ON Resistance VIN to VOUT VPROG Programming Pin Voltage (PROG, CLPROG) Soft-Start Inrush Current Input Current Limit Enable Threshold Input Current Limit Enable Threshold Automatic Limit Enable Threshold Voltage ISS VCLEN ∆VCLEN VALEN CONDITIONS IN1, IN2 and OUT BAT VBAT = 4.2V Suspend Mode Suspend Mode, Wall = 2V, VOUT = 4.8V Shutdown VOUT = 5V, VIN1 = VIN2 = 0V, VBAT = 4.2V VBAT = 4.2V, Charging Stopped Suspend Mode Shutdown VIN1 = VIN2 = 0V, BAT Powers OUT, No Load (Note 8) VIN Powers Part, Rising Threshold VOUT Powers Part, Rising Threshold VIN Rising – VIN Falling or VOUT Rising – VOUT Falling RCLPROG = 100k, HPWR = 5V RCLPROG = 100k, HPWR = 0V HPWR = 5V, 400mA Load HPWR = 0V, 80mA Load RCLPROG = RPROG = 100k RCLPROG = RPROG = 50k IN or OUT VIN Rising VIN Rising – VIN Falling (VIN – VOUT) VIN Rising (VIN – VOUT) VIN Falling ● MIN 4.35 TYP ● ● ● ● ● ● ● ● ● ● ● 3.6 3.6 ● ● 465 89 ● ● 0.98 0.98 ● 3.6 25 –75 0.8 50 0.2 10 450 15 15 2.5 50 1 3.8 3.8 125 490 97 0.2 0.2 1.000 1.000 5 3.8 125 50 –50 MAX 5.5 4.3 1.6 100 20 900 30 30 5 100 4 4 515 105 1.02 1.02 4 75 –25 UNITS V V mA µA mA µA µA µA µA µA µA A V V mV mA mA Ω Ω V V mA/µs V mV mV mV 4055p 2 LTC4055 ELECTRICAL CHARACTERISTICS The ● indicates specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN1 = VIN2 = 5V, VBAT = 3.5V, HPWR = 5V, WALL = 0V, RPROG = RCLPROG = 100k, unless otherwise noted. SYMBOL PARAMETER CONDITIONS Battery Charger VFLOAT Regulated Output Voltage (0°C to 85°C) IBAT(MAX) ∆IB/∆IO ITRKL VTRKL VCENI VCENO VUVCL VRECHRG tTIMER TLIM Ideal Diode RFWD RDIO,ON VFWD VOFF IFWD IMAX Logic VOL VIH VIL IPULLDN VCHG,SD ICHG,SD VWALL VWALL,HYS IWALL Current Mode Charge Current Maximum Charge Current Charge Current Load Dependency Trickle Charge Current Trickle Charge Threshold Voltage Input Charger Enable Threshold Voltage Output Charger Enable Threshold Voltage Input/Output Undervoltage Current Limit Recharge Battery Threshold Voltage TIMER Accuracy Recharge Time Low-Battery Trickle Charge Time Junction Temperature in Constant Temperature Mode MAX UNITS 4.200 4.200 485 80 485 4.235 4.242 525 105 525 V V mA mA mA 980 980 1060 1060 mA mA RPROG = 100k, HPWR = 5V, No Load RPROG = 100k, HPWR = 0V, No Load RPROG = 100k, VOUT = 5V, VIN = 0V, VWALL = 2V RPROG = 50k, HPWR = 5V, No Load RPROG = 50k, VOUT = 5V, VIN = 0V, VWALL = 2V (Note 8) ∆IBAT/∆IOUT, IOUT = 100mA VBAT = 2V, RPROG = 100k VBAT Rising (VIN – VBAT) High to Low (VIN – VBAT) Low to High (VOUT – VBAT) High to Low (VOUT – VBAT) Low to High IBAT = ICHG/2 ● ● ● ● ● 900 900 ● ● 0.95 30 2.7 ● 4.23 VFLOAT – VRECHRG CTIMER = 0.1µF Percent of Total Charge Time Percent of Total Charge Time, VBAT < 2.8V ● 65 On Resistance, VON Regulation On Resistance VBAT to VOUT Voltage Forward Drop (VBAT – VOUT) VBAT = 3.5V, 100mA Load VBAT = 3.5V, 600mA Load VBAT = 3.5V, 5mA Load VBAT = 3.5V, 100mA Load VBAT = 3.5V, 600mA Diode Disable Battery Voltage VBAT Falling Load Current Limit for VON Regulation VIN = 3.5V Diode Current Limit VBAT = 3.5V, VOUT = 2.8V, Pulsed with 10% Duty Cycle Output Low Voltage (CHRG, ACPR) Enable Input High Voltage Enable Input Low Voltage Logic Input Pull-Down Current Charger Shutdown Threshold Voltage on TIMER Charger Shutdown Pull-Up Current on TIMER Wall Input Threshold Voltage Wall Input Hysteresis Wall Input Leakage Current TYP 4.165 4.158 445 55 445 ● IBAT MIN ● 10 1.4 1 1 45 2.85 70 80 70 80 4.3 100 ±10 50 25 105 0.1 0.2 30 55 120 2.8 550 1.8 ISINK = 5mA SUSP, SHDN, HPWR Pin Low to High SUSP, SHDN, HPWR Pin High to Low SUSP, SHDN, HPWR TIMER Falling ● 0.2 ● 0.15 VTIMER = 0V ● 2 4 VWALL Rising Threshold VWALL Rising – VWALL Falling Threshold VWALL = 1V ● 0.98 1.000 35 0 ● ● 1.05 60 3 4.37 135 50 2.2 0.4 1.2 0.4 2 0.4 A mA/mA mA V mV mV mV mV V mV % % % °C Ω Ω mV mV mV V mA A V V V µA V µA 1.02 ±50 V mV nA 4055p 3 LTC4055 ELECTRICAL CHARACTERISTICS The ● indicates specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN1 = VIN2 = 5V, VBAT = 3.5V, HPWR = 5V, WALL = 0V, RPROG = RCLPROG = 100k, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS IVNTC VNTC Pin Current VVNTC = 2.5V VVNTC VNTC Bias Voltage IVNTC = 500µA ● 1.5 2.5 3.5 mA ● 3.4 3.8 V VCOLD Cold Temperature Fault Threshold Voltage Rising Threshold Falling Threshold 0.74 • VVNTC 0.72 • VVNTC V V VHOT Hot Temperature Fault Threshold Voltage Falling Threshold Rising Threshold 0.29 • VVNTC 0.30 • VVNTC V V VDIS NTC Disable Voltage NTC Input Voltage to GND (Falling) Hysteresis NTC Note 1: Absolute Maximum Ratings are those beyond which the life of a device may be impaired. Note 2: VCC is the greater of VIN1, VOUT or VBAT Note 3: IN1 and IN2 should be tied together with a low impedance to ensure that the difference between the two pins does not exceed 100mV Note 4: All voltage values are with respect to GND. Note 5: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature protection is active. 75 ● 100 50 125 mV mV Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 6: The LTC4055EUF is guaranteed to meet performance specifications from 0°C to 70°C. Specifications over the – 40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 7: Guaranteed by long term current density limitations. Note 8: Accuracy of programmed current may degrade for currents greater than 1A. U W TYPICAL PERFOR A CE CHARACTERISTICS Input Supply Current vs Temperature 800 700 60 VIN = 5V VBAT = 4.2V RPROG = RCLPROG = 100k 50 60 500 400 VIN = 0V VBAT = 4.2V 50 40 IIN (µA) IIN (µA) 600 70 VIN = 5V VBAT = 4.2V RPROG = RCLPROG = 100k SUSP = 5V IBAT (µA) 900 Battery Drain Current vs Temperature (BAT Powers OUT, No Load) Input Supply Current vs Temperature (Suspend Mode) 30 40 30 20 300 20 200 10 10 100 0 –50 –25 0 25 50 TEMPERATURE (°C) 75 100 4055 G01 0 –50 –25 0 25 50 TEMPERATURE (°C) 75 100 4055 G02 0 –50 –25 50 25 0 TEMPERATURE (°C) 75 100 4055 G03 4055p 4 LTC4055 U W TYPICAL PERFOR A CE CHARACTERISTICS Input Current Limit vs Temperature, HPWR = 5V 515 505 Input Current Limit vs Temperature, HPWR = 0V 105.0 VIN = 5V VBAT = 3.5V RPROG = RCLPROG = 100k 102.5 RON vs Temperature 250 VIN = 5V VBAT = 3.5V RPROG = RCLPROG = 100k ILOAD = 400mA 225 VIN = 5V 200 485 475 465 –50 –25 50 25 0 75 TEMPERATURE (°C) 100 RON (mΩ) 495 IIN (mA) IIN (mA) 100.0 97.5 150 92.5 125 50 25 75 0 TEMPERATURE (°C) 100 4055 G04 1.020 VIN = 5V RPROG = 100k 1.015 4.220 VIN = 5V RCLPROG = 100k 1.005 1.005 4.205 VFLOAT (V) 4.210 1.000 0.995 4.195 0.990 4.190 0.985 0.985 4.185 –25 0 50 25 TEMPERATURE (°C) 75 0.980 –50 100 –25 0 50 25 TEMPERATURE (°C) 75 4055 G07 4.220 600 4.215 500 105 4.205 VFLOAT (V) 4.210 4.195 4.190 85 4.185 6 CHRG 0 50 25 TEMPERATURE (°C) 75 100 4055 G10 4.180 4.5 5 400 4 300 3 200 2 0.8AHr CELL VIN = 5V TA = 25°C RPROG = 105k 100 –25 100 VBAT 4.200 90 80 –50 75 0 4.75 5 5.25 VIN (V) 5.5 5.75 6 4055 G11 0 VBAT AND VCHRG (V) 110 95 0 50 25 TEMPERATURE (°C) Battery Current and Voltage vs Time IBAT (mA) VIN = 5V 100 –25 4055 G09 Battery Regulated Output (Float) Voltage vs Supply Voltage 115 VFLOAT-VRECHARGE (V) 4.180 –50 100 4055 G08 Regulated Output VoltageRecharge Threshold Voltage vs Temperature 120 VIN = 5V 4.200 0.990 0.980 –50 125 4.215 1.010 0.995 100 Battery Regulated Output (Float) Voltage vs Temperature 1.010 1.000 50 25 75 0 TEMPERATURE (°C) 4055 G06 CLPROG Pin Voltage vs Temperature VCLPROG (V) VPROG (V) 1.015 100 –50 –25 125 4055 G05 PROG Pin Voltage vs Temperature 1.020 VIN = 5.5V 95.0 90.0 –50 –25 125 VIN = 4.5V 175 IBAT 1 0 20 40 60 80 100 120 140 160 180 200 TIME (MINUTES) 4055 G12 4055p 5 LTC4055 U W TYPICAL PERFOR A CE CHARACTERISTICS 500 300 1.6 VIN = 5V VOUT = NO LOAD RPROG = 100k RCLPROG = 100k HPWR = 0 80 IBAT (mA) 400 IBAT (mA) 100 VIN = 5V VOUT = NO LOAD RPROG = 100k RCLPROG = 100k HPWR = 1 1.4 RPROG = 34k 1.2 RPROG = 50k 60 1.0 IBAT (A) 600 Undervoltage Current Limit, Charging from VIN, IBAT vs VIN Charging from USB, Low Power, IBAT vs VBAT Charging from USB, IBAT vs VBAT 40 0.8 0.6 200 20 100 RPROG = 100k HPWR = 0 0.2 0 0 0.5 1 1.5 2 2.5 VBAT (V) 3 3.5 4 0 4.5 0.5 1 1.5 2 2.5 VBAT (V) 3 3.5 Charge Current vs Temperature (Thermal Regulation) 1000 RPROG = 50k VBAT = 3.5V VIN = 0V 900 0.8 800 700 0.6 600 IOUT (mA) 0.7 RPROG = 100k 0.4 1000 25°C 4.420 0°C 800 –50°C 125°C 75°C 500 400 700 600 500 400 200 200 100 100 0 0 20 40 60 80 100 120 140 160 180 200 VFWD (mV) 4055 G16 VBAT = 3.5V VIN = 0V 900 0.2 125 4.380 Ideal Diode Forward Voltage and Resistance vs Current 300 100 4.340 4055 G15 0.3 VIN = 5V 0.1 VBAT = 3.5V θJA = 37°C/W 0 50 25 0 75 –50 –25 TEMPERATURE (°C) 4.300 VIN (V) Ideal Diode Forward Voltage vs Current and Temperature 1.0 0.5 0 4.260 4.5 4055 G14 4055 G13 0.9 4 IOUT (mA), RDIO (mΩ) 0 IBAT (A) RPROG = 100Ω 0.4 300 0 RDIO(ON) RFWD 0 20 40 60 80 100 120 140 160 180 200 VFWD (mV) 4055 G17 Ideal Diode and Schottky Diode Forward Voltage vs Current 4055 G18 Input Connect Waveforms Input Disconnect Waveforms 1000 VBAT = 3.5V 900 VIN = 0V 800 IOUT (mA) 700 600 500 400 SCHOTTKY 300 200 VIN 5V/DIV VIN 5V/DIV VOUT 5V/DIV IIN 0.5A/DIV VOUT 5V/DIV IIN 0.5A/DIV IBAT 0.5A/DIV IBAT 0.5A/DIV VBAT = 3.5V IOUT = 100mA 100 1ms/DIV 4055 G20 VBAT = 3.5V IOUT = 100mA 1ms/DIV 4055 G22 0 0 50 100 150 200 250 300 350 400 450 VFWD (mV) 4055 G19 4055p 6 LTC4055 U W TYPICAL PERFOR A CE CHARACTERISTICS HPWR 5V/DIV SUSPEND 5V/DIV IIN 0.5A/DIV OUT 5V/DIV IIN 0.5A/DIV IBAT 0.5A/DIV IBAT 0.5A/DIV VBAT = 3.5V IOUT = 50mA 250µs/DIV WALL Connect Waveforms VIN = 0V Response to Suspend Response to HPWR WALL 5V/DIV OUT 5V/DIV IWALL 0.5A/DIV IBAT 0.5A/DIV VBAT = 3.5V IOUT = 50mA 4055 G21 WALL Disconnect Waveforms VIN = 0V 1ms/DIV VBAT = 3.5V IOUT = 100mA RPROG = 57.6k 4055 G23 WALL Connect Waveforms VIN = 5V WALL 5V/DIV IIN 0.5A/DIV WALL 5V/DIV IIN 0.5A/DIV IWALL 0.5A/DIV IWALL 0.5A/DIV IWALL 0.5A/DIV IBAT 0.5A/DIV IBAT 0.5A/DIV IBAT 0.5A/DIV 1ms/DIV 4055 G25 VBAT = 3.5V IOUT = 100mA RPROG = 57.6k 1ms/DIV 4055 G24 WALL Disconnect Waveforms VIN = 5V WALL 5V/DIV OUT 5V/DIV VBAT = 3.5V IOUT = 100mA RPROG = 57.6k 1ms/DIV 4055 G26 VBAT = 3.5V IOUT = 100mA RPROG = 57.6k 1ms/DIV 4055 G27 4055p 7 LTC4055 U U U PI FU CTIO S BAT (Pin 2): Connect to a single cell Li-Ion battery. Used as an output when charging the battery and as an input when supplying power to OUT. When the OUT pin potential drops below the BAT pin potential, an ideal diode function connects BAT to OUT and prevents VOUT from dropping more than 100mV below VBAT. A precision internal resistor divider sets the final float potential on this pin. The internal resistor divider is disconnected when IN1/IN2 and OUT are in UVLO. OUT (Pin 3): Voltage Output. Used to provide controlled power to a USB device from either USB VBUS (IN1/IN2) or the battery (BAT) when the USB is not present. Can also be used as an input for battery charging when the USB is not present and a wall adaptor is applied to this pin. Should be bypassed with at least 10µF to GND. IN1/IN2 (Pin 4/Pin 1): Input Supply. Connect to USB supply, VBUS. Used as main supply while connected to USB VBUS for power control to a USB device. Input current is limited to either 20% or 100% of the current programmed by the CLPROG pin as determined by the state of the HPWR pin. Charge current (to BAT pin) supplied through the inputs is set to the current programmed by the PROG pin but will be limited by the input current limit if set greater than the current limit. Connect IN2 to IN1 with a resistance no greater than 0.05Ω. WALL (Pin 5): Wall Adapter Present Input. Pulling this pin above 1V will disable charging from IN1/IN2 and disconnect the power path from IN1/IN2 to OUT. The ACPR pin will also be pulled low to indicate that a wall adapter has been detected. Requires the voltage on IN1/IN2 or OUT to be 100mV greater than VBAT and greater than VUVLO to activate this function. SHDN (Pin 6): Shutdown Input. Pulling this pin high will disable the entire part and place it in a low supply current mode of operation. All power paths will be disabled. A weak pull-down current is internally applied to this pin to ensure it is enabled at power up when the input is not being driven externally. SUSP (Pin 7): Suspend Mode Input. Pulling this pin above 1.2V will disable charging from IN1/IN2 and disconnect the power path from IN1/IN2 to OUT. The supply current will be reduced to comply with the USB specification for Suspend mode. The BAT to OUT ideal diode function will remain active as well as the ability to charge the battery from OUT. Suspend mode will reset the charge timer if VOUT is less than VBAT while in suspend mode. If VOUT is kept greater than VBAT, such as when a wall adapter is present, the charge timer will not be reset when the part is put in suspend. A weak pull-down current is internally applied to this pin to ensure it is low at power up when the input is not being driven externally. HPWR (Pin 8): High Power Select. Used to control the amount of current drawn from the USB port. A logic HI on the pin will set the current limit to 100% of the current programmed by the CLPROG pin and 100% of the charge current programmed by the PROG pin. A logic low on the pin will set the current limit to 20% of the current programmed by the CLPROG pin and decrease battery charge current to 16% of the current programmed by the CLPROG pin. A weak pull-down current is internally applied to this pin to ensure it is low at power up when the input is not being driven externally. CLPROG (Pin 9): Current Limit Program. Connecting a resistor, RCLPROG to ground, programs the input to output current limit. The current limit is programmed as follows: ICL ( A) = VCLPROG 50, 000 V • 50, 000 = RCLPROG RCLPROG In USB applications the resistor RCLPROG should be set to no less than 105k. GND (Pin 10): Ground. PROG (Pin 11): Charge Current Program. Connecting a resistor, RPROG, to ground programs the battery charge current. The battery charge current is programmed as follows: ICHG( A) = VPROG 50, 000 V • 50, 000 = RPROG RPROG 4055p 8 LTC4055 U U U PI FU CTIO S TIMER (Pin 12): Timer Capacitor. Placing a capacitor CTIMER to GND sets the timer period. The timer period is: CTIMER • RPROG • 3 Hours 0.1µF • 100k Charge time is increased as charge current is reduced due to input voltage regulation, load current and current limit selection (HPWR). t TIMER(Hours) = Shorting the TIMER pin to GND disables the battery charging functions. ACPR (Pin 13): Wall Adapter Present Output. Active low open-drain output pin. A low on this pin indicates that the wall adapter input comparator has had its input pulled above the input threshold and power is present on IN1/IN2 or OUT (i.e., above UVLO threshold). CHRG (Pin 14): Open-Drain Charge Status Output. When the battery is being charged, the CHRG pin is pulled low by an internal N-channel MOSFET. When the timer runs out or the input supply or output supply is removed, the CHRG pin is forced to a high impedance state. VNTC (Pin 15): Output Bias Voltage for NTC. A resistor from this pin to the NTC pin will set up the bias for an NTC thermistor. NTC (Pin 16): Input to the NTC Thermistor Monitoring Circuits. Under normal operation, tie a thermistor from the NTC pin to ground and a resistor of equal value from NTC to VNTC. When the voltage on this pin is above 0.74 • VVNTC (Cold, 0°C) or below 0.29 • VVNTC (Hot, 50°C) the timer is suspended, but not cleared, the charging is disabled and the CHRG pin remains in its former state. When the voltage on NTC comes back between 0.74 • VVNTC and 0.29 • VVNTC, the timer continues where it left off and charging is re-enabled if the battery voltage is below the recharge threshold. There is approximately 3°C of temperature hysteresis associated with each of the input comparators. If the NTC function is not to be used, connect the NTC to ground. This will disable all of the LTC4055 NTC functions. Exposed Pad (Pin 17): Ground. The Exposed Pad must be soldered to a good thermally conductive PCB ground. 4055p 9 LTC4055 W BLOCK DIAGRA VBUS 4 3 IN1 2 1 BAT OUT IN2 –+ 25mV IDEAL DIODE IN1 0.2Ω OUT DIE TEMP – TA + 105°C VREF + – CURRENT LIMIT + SOFT-START 1V ILIM CNTL ENABLE – CLPROG SENSE CURRENT CONTROL SOFT-START2 I/O SEL + 8 BATTERY CHARGER + PROG HPWR 500mA/100mA 2u 13 ENABLE 1V – 11 CHARGER CC/CV REGULATOR ICHRG 100k 100k BAT 0.2Ω IN2 VR ILIM 9 0.2Ω ACPR – 0.25V + 2.8V BATTERY UVLO BAT UV – 5 WALL IN1 OUT BAT + + 1V VOLTAGE DETECT – 4.1V RECHARGE – UVLO BAT UV 15 VNTC RECHRG TIMER OSCILLATOR – 100k HOLD 2COLD 16 NTCERR + NTC 12 CONTROL LOGIC RESET CLK COUNTER CHRG 14 STOP NTC – 100k 2HOT + + NTC ENABLE 0.1V 2u 2u – 10 GND 6 SHDN 7 SUSP 4055 BD 4055p 10 LTC4055 U OPERATIO The LTC4055 is a complete PowerPath controller for battery-powered USB applications. The LTC4055 is designed to provide device power and Li-ion battery charging from the USB VBUS while maintaining the current limits as specified in the USB specification. This is accomplished by reducing battery charge current as output/load current is increased. In this scenario, the available bus current is maximized in an effort to minimize battery charge time. Another advantage to powering the load from the bus when the bus is available is in cases where the load is a switching regulator. The input power to a switching regulator can be thought of as constant. A higher voltage across a constant power load will require less current. Less load current in USB applications means more available charge current. More charge current translates to shorter charge times. An ideal diode function provides power from the battery when output/load current exceeds the input current limit set for the part or when input power is removed. The advantage to powering the load through the ideal diode (rather than connecting the load directly to the battery) is that when the bus is connected and the battery is fully charged, the battery remains fully charged until bus power is removed. Once bus power is removed the output drops until the ideal diode is forward biased. The forward biased ideal diode will then provide the output power to the load from the battery. The LTC4055 also has the ability to accommodate power from a wall adapter. Wall adapter power can be connected to the output (load side) of the LTC4055 through an external device such as a power Schottky or FET, as shown in Figure 1. The LTC4055 has the unique ability to use the output, which is powered by the wall adapter, as an alternate path to charge the battery while providing power to the load. A wall adapter comparator on the LTC4055 can be configured to detect the presence of the wall adapter and shut off the connection to the USB to prevent reverse conduction out to the bus. AC VBUS 4 1 IN1 OUT IN2 LOAD INPUT CHARGER CONTROL CURRENT LIMIT CONTROL OUTPUT CHARGER CONTROL ENABLE ENABLE ENABLE IDEAL BAT 5 3 2 + WALL + 1V – Li-Ion UVLO 4055 F01 Figure 1. Simplified Block Diagram—PowerPath 4055p 11 LTC4055 U OPERATIO Table 1. Operating Modes—PowerPath States Current Limited Input Power (IN1/IN2 to OUT) WALL PRESENT Y X X X X X N SHUTDOWN X Y X X X X N SUSPEND X X Y X X X N VIN > 3.8V X X X N X X Y VIN > (VOUT + 100mV) X X X X N X Y VIN > (VBAT + 100mV) X X X X X N Y CURRENT LIMIT ENABLED N N N N N N Y VIN > 4.35V X X X N X X Y VIN > (VOUT + 100mV) X X X X N X Y VIN > (VBAT + 100mV) X X X X X N Y INPUT CHARGER ENABLED N N N N N N Y SUSPEND X X X X X X VOUT > 4.35V X X N X X Y VOUT > (VIN + 100mV) X X X N X Y VOUT > (VBAT + 100mV) X X X X N Y OUTPUT CHARGER ENABLED N N N N N Y SUSPEND X X X X VBAT > 2.8V X N X Y VBAT > VOUT X X N Y VIN X X X X DIODE ENABLED N N N Y Input Powered Charger (IN1/IN2 to BAT) WALL PRESENT Y X X X X X N SHUTDOWN X Y X X X X N SUSPEND X X Y X X X N Output Powered Charger (OUT to BAT) WALL PRESENT N X X X X Y SHUTDOWN X Y X X X N Ideal Diode (BAT to OUT) WALL PRESENT X X X X SHUTDOWN Y X X N Table 2. Operating Modes—Pin Currents vs Programmed Currents (Charging from IN1/IN2) PROGRAMMING OUTPUT CURRENT BATTERY CURRENT INPUT CURRENT ICL = ICHG IOUT < ICL IOUT = ICL = ICHG IOUT > ICL IBAT = ICHG – IOUT IBAT = 0 IBAT = ICL – IOUT IIN = IQ + ICL IIN = IQ + ICL IIN = IQ + ICL ICHG < ICL IOUT < (ICL – ICHG) IOUT > (ICL – ICHG) IOUT = ICL IOUT > ICL IBAT = ICHG IBAT = ICL – IOUT IBAT = 0 IBAT = ICL – IOUT IIN = IQ + ICHG + IOUT IIN = IQ + ICL IIN = IQ + ICL IIN = IQ + ICL ICL < ICHG IOUT < ICL IOUT > ICL* IBAT = ICL – IOUT IBAT = ICL – IOUT IIN = IQ + ICL IIN = IQ + ICL *Charge current shuts off when VOUT drops below VBAT, i.e., when IOUT exceeds ICL. 4055p 12 VOUT < VBAT VOUT > VBAT VOUT < VBAT BATTERY POWERS VOUT • CHARGING SUSPENDED • CHRG PULLED LOW VIN POWERS PART LOW BATTERY BATTERY < 2.8V WALL ADAPTER PRESENT TEMP NOT OK • CHRG IS HI-Z • BATTERY POWER TO VOUT—DISABLED BAD BATTERY • BATTERY CHARGING ON • CHARGE CURRENT C/10 • VOUT CHARGE SWITCH OPEN • CHRG PULLED LOW • BATTERY POWER TO VOUT IS OFF VIN CHARGING LOW BATTERY TEMP OK AND BATTERY < 2.8V 1/4 TIMEOUT AND BATTERY < 2.8V WALL ADAPTER PRESENT • CHRG IS HI-Z • BATTERY POWER TO VOUT—DISABLED BAD BATTERY • CURRENT LIMIT SWITCH FROM VIN TO VOUT—OFF • BATTERY CHARGING ON • CHARGE CURRENT C/10 • VIN CHARGE SWITCH OPEN • CHRG PULLED LOW • ACPR PULLED LOW 4055 SD BATTERY > 2.8V TEMP OK AND BATTERY < 2.8V VOUT CHARGING LOW BATTERY TEMP NOT OK NTC FAULT BATTERY < 2.8V TEMP OK AND BATTERY > 2.8V • BATTERY CHARGING SUSPENDED • CHRG PULLED LOW BATTERY < 2.8V TEMP NOT OK NTC FAULT TEMP NOT OK • BATTERY CHARGING SUSPENDED • CHRG PULLED LOW TEMP OK AND BATTERY > 2.8V WALL ADAPTER PRESENT BATTERY < 4.1V VOUT CHARGING BATTERY BATTERY > 4.1V AND CHARGER TIMED OUT • CURRENT LIMIT SWITCH FROM VIN TO VOUT—OFF • ACPR PULLED LOW VOUT POWERS PART WALL ADAPTER PRESENT • CURRENT LIMIT SWITCH FROM VIN TO VOUT—OFF • BATTERY CHARGING ON • VIN CHARGE SWITCH OPEN • CHRG PULLED LOW • ACPR PULLED LOW 1/4 TIMEOUT AND BATTERY < 2.8V • CHRG IS HI-Z • BATTERY POWER TO VOUT—DISABLED BATTERY > 2.8V BATTERY > 4.1V AND CHARGER TIMED OUT UVLO • CHARGING DISABLED • BATTERY POWERS VOUT SHDN VIN CHARGING BATTERY BATTERY < 4.1V • CURRENT LIMIT SWITCH FROM VIN TO VOUT—ON SHUTDOWN • CHARGING DISABLED • ALL SWITCHES OPEN • CURRENT LIMIT SWITCH FROM VIN TO VOUT—ON • BATTERY CHARGING ON • VIN CHARGE SWITCH OPEN • CHRG PULLED LOW BATTERY > 2.8V VOUT > VBAT BATTERY POWERS VOUT • CHARGING SUSPENDED • CHRG HIGH-Z POWER APPLIED TO VIN (VIN AND VOUT) < UVLO SHUTDOWN Operational State Diagram LTC4055 U OPERATIO 4055p 13 LTC4055 U OPERATIO USB CURRENT LIMIT AND CHARGE CURRENT CONTROL The current limit and charger control circuits of the LTC4055 are designed to limit input current as well as control battery charge current as a function of IOUT. The programmed current limit, ICL is defined as: 50, 000 50, 000 V ICL = • VCLPROG = RCLPROG RCLPROG The programmed battery charge current, ICHG, is defined as: 50, 000 50, 000 V ICHG = • VPROG = RPROG RPROG IIN = IOUT + IBAT The current limiting circuitry in the LTC4055 can and should be configured to limit current to 500mA for USB applications (selectable using the HPWR pin and programmed using the CLPROG pin). When programmed for 500mA current limit and 500mA or more of charging current, powered from IN1/IN2 and battery charging is active, control circuitry within the For example, if typical 500mA current limit is required, calculate: RCLPROG = 1V • 50, 000 = 100k 500mA In USB applications, the minimum value for RCLPROG should be 105k. This will prevent the application current from exceeding 500mA due to LTC4055’s tolerances and 600 500 IBAT CHARGING 40 20 0 0 0 100 200 300 400 ILOAD (mA) 500 600 IBAT (IDEAL DIODE) 4055 F02a (2a) High Power Mode/Full Charge RPROG = RCLPROG = 100k ILOAD 60 100 –20 400 CURRENT (mA) 200 CURRENT (mA) ILOAD IIN IIN 80 300 VCLPROG • 50, 000 RCLPROG where VCLPROG is the CLPROG pin voltage and RCLPROG is the total resistance from the CLPROG pin to ground. 100 400 CURRENT (mA) The formula for current limit is: 120 IIN 500 –100 PROGRAMMING CURRENT LIMIT ICL = ICLPROG • 50, 000 = Input current, IIN, is equal to the sum of the BAT pin output current and the OUT pin output current. 600 LTC4055 reduces the battery charging current such that the sum of the battery charge current and the load current does not exceed 500mA (100mA when HPWR is low, see Figure 2) The battery charging current goes to zero when load current exceeds 500mA (80mA when HPWR is low). If the load current is greater than the current limit, the output voltage will drop to just under the battery voltage where the ideal diode circuit will take over and the excess load current will be drawn from the battery. IBAT CHARGING ILOAD 300 IBAT = ICHG 200 IBAT CHARGING 100 IBAT = ICL – IOUT 0 0 20 40 60 80 ILOAD (mA) 100 120 IBAT (IDEAL DIODE) –100 0 100 4055 F02b (2b) Low Power Mode/Full Charge (RPROG = RCLPROG = 100k) 200 300 400 ILOAD (mA) 500 600 IBAT (IDEAL DIODE) 4055 F02c (2c) High Power Mode with ICL = 500mA and ICHG = 250mA (RPROG = 200k, RCLPROG = 100k) Figure 2. Input and Battery Currents as a Function of Load Current 4055p 14 LTC4055 U OPERATIO quiescent currents. This will give a typical current limit of approximately 467mA in high power mode (HPWR = 1) or 92mA in low power mode (HPWR = 0). For best stability over temperature and time, 1% metal film resistors are recommended. Battery Charger The battery charger circuits of the LTC4055 are designed for charging single cell lithium-ion batteries. Featuring an internal P-channel power MOSFET, the charger uses a constant-current/constant-voltage charge algorithm with programmable current and a programmable timer for charge termination. Charge current can be programmed up to 1A. The final float voltage accuracy is ±0.8% typical. No blocking diode or sense resistor is required when charging through IN1/IN2. The CHRG open-drain status output provides information regarding the charging status of the LTC4055 at all times. An NTC input provides the option of charge qualification using battery temperature. An internal thermal limit reduces the programmed charge current if the die temperature attempts to rise above a preset value of approximately 105°C. This feature protects the LTC4055 from excessive temperature, and allows the user to push the limits of the power handling capability of a given circuit board without risk of damaging the LTC4055. Another benefit of the LTC4055 thermal limit is that charge current can be set according to typical, not worst-case, ambient temperatures for a given application with the assurance that the charger will automatically reduce the current in worst-case conditions. An internal voltage regulation circuit, called undervoltage current limit, UVCL, reduces the programmed charge current to keep the voltage on VIN or VOUT at least 4.4V. This feature prevents the charger from cycling in and out of undervoltage lockout due to resistive drops in the USB or wall adapter cabling. The charge cycle begins when the voltage at the input (IN1/IN2) rises above the input UVLO level and the battery voltage is below the recharge threshold. No charge current actually flows until the input voltage is greater than the VUVCL level. At the beginning of the charge cycle, if the battery voltage is below 2.8V, the charger goes into trickle charge mode to bring the cell voltage up to a safe level for charging. The charger goes into the fast charge constantcurrent mode once the voltage on the BAT pin rises above 2.8V. In constant current mode, the charge current is set by RPROG. When the battery approaches the final float voltage, the charge current begins to decrease as the LTC4055 switches to constant-voltage mode. An external capacitor on the TIMER pin sets the total minimum charge time. When this time elapses the charge cycle terminates and the CHRG pin assumes a high impedance state. While charging in constant-current mode, if the charge current is decreased due to load current, undervoltage charge current limiting or thermal regulation the charging time is automatically increased. In other words, the charge time is extended inversely proportional to charge current delivered to the battery. For lithium-ion and similar batteries that require accurate final float potential, the internal bandgap reference, voltage amplifier and the resistor divider provide regulation with ±1% maximum accuracy. TRICKLE CHARGE AND DEFECTIVE BATTERY DETECTION At the beginning of a charge cycle, if the battery voltage is low (below 2.8V) the charger goes into trickle charge reducing the charge current to 10% of the full-scale current. If the low battery voltage persists for one quarter of the total charge time, the battery is assumed to be defective, the charge cycle is terminated and the CHRG pin output assumes a high impedance state. If for any reason the battery voltage rises above ~2.8V, the charge cycle will be restarted. To restart the charge cycle (i.e., when the dead battery is replaced with a discharged battery), simply remove the input voltage and reapply it, cycle the TIMER pin to 0V or cycle the SHDN pin to 0V. PROGRAMMING CHARGE CURRENT The formula for the battery charge current, when not being limited, is: ICHG = IPROG • 50, 000 = VPROG • 50, 000 RPROG 4055p 15 LTC4055 U OPERATIO where VPROG is the PROG pin voltage and RPROG is the total resistance from the PROG pin to ground. For example, if typical 500mA charge current is required, calculate: RPROG = 1V • 50, 000 = 100k 500mA For best stability over temperature and time, 1% metal film resistors are recommended. Under trickle charge conditions, this current is reduced to 10% of the full-scale value. THE CHARGE TIMER The programmable charge timer is used to terminate the charge cycle. The timer duration is programmed by an external capacitor at the TIMER pin and is also a function of the resistance on PROG. Typically the charge time is: C •R • 3 Hours t TIMER(Hours) = TIMER PROG 0.1µF • 100k The timer starts when an input voltage greater than the undervoltage lockout threshold level is applied, or when leaving shutdown and the voltage on the battery is less than the recharge threshold. At power up or exiting shutdown with the battery voltage less than the recharge threshold, the charge time is a full cycle. If the battery is greater than the recharge threshold, the timer will not start and charging is prevented. If after power-up the battery voltage drops below the recharge threshold, or if after a charge cycle the battery voltage is still below the recharge threshold, the charge time is set to one half of a full cycle. The LTC4055 has a feature that extends charge time automatically. Charge time is extended if the charge current in constant-current mode is reduced due to load current, undervoltage charge current limiting or thermal regulation. This change in charge time is inversely proportional to the change in charge current. As the LTC4055 approaches constant-voltage mode the charge current begins to drop. This change in charge current is part of the normal charging operation of the part and should not affect the timer duration. Therefore, the LTC4055 detects that the change in charge current is due to voltage mode, and increases the timer period back to its programmed operating period. Once a time-out occurs and the voltage on the battery is greater than the recharge threshold, the charge current stops, and the CHRG output assumes a high impedance state to indicate that the charging has stopped. Connecting the TIMER pin to ground disables the battery charger. CHRG STATUS OUTPUT PIN When the charge cycle starts, the CHRG pin is pulled to ground by an internal N-channel MOSFET capable of driving an LED. After a time-out occurs, the pin assumes a high impedance state. NTC Thermistor The battery temperature is measured by placing a negative temperature coefficient (NTC) thermistor close to the battery pack. The NTC circuitry is shown in Figure 3. To use this feature, connect the NTC thermistor, RNTC, between the NTC pin and ground and a resistor, RNOM, from the NTC pin to VNTC. RNOM should be a 1% resistor with a value equal to the value of the chosen NTC thermistor at 25°C (this value is 10k for a Vishay NTHS0603N02N1002J thermistor). The LTC4055 goes into hold mode when the resistance, RHOT, of the NTC thermistor drops to 0.41 times the value of RNOM or approximately 4.1k, which should be at 50°C. The hold mode freezes the timer and stops the charge cycle until the thermistor indicates a return to a valid temperature. As the temperature drops, the resistance of the NTC thermistor rises. The LTC4055 is designed to go into hold mode when the value of the NTC thermistor increases to 2.82 times the value of RNOM. This resistance is RCOLD. For a Vishay NTHS0603N02N1002J thermistor, this value is 28.2k which corresponds to approximately 0°C. The hot and cold comparators each have approximately 3°C of hysteresis to prevent oscillation about the trip point. Grounding the NTC pin disables the NTC function. 4055p 16 LTC4055 U OPERATIO VNTC RNOM 100k NTC VNTC LTC4055 NTC BLOCK 15 0.74 • VNTC – TOO_COLD 16 + RNTC 100k – RNOM 121k NTC 0.74 • VNTC – TOO_COLD 16 + R1 13.3k – TOO_HOT TOO_HOT 0.29 • VNTC LTC4055 NTC BLOCK 15 0.29 • VNTC + RNTC 100k + + + NTC_ENABLE NTC_ENABLE 0.1V – 0.1V – 4055 F03b 4055 F03a (3a) (3b) Figure 3. NTC Circuits THERMISTORS The LTC4055 NTC trip points were designed to work with thermistors whose resistance-temperature characteristics follow Vishay Dale’s “R-T Curve 2.” The Vishay NTHS0603N02N1002J is an example of such a thermistor. However, Vishay Dale has many thermistor products that follow the “R-T Curve 2” characteristic in a variety of sizes. Furthermore, any thermistor whose ratio of RCOLD to RHOT is about 7.0 will also work (Vishay Dale R-T Curve 2 shows a ratio of RCOLD to RHOT of 2.815/0.4086 = 6.89). Power conscious designs may want to use thermistors whose room temperature value is greater than 10k. Vishay Dale has a number of values of thermistor from 10k to 100k that follow the “R-T Curve 1.” Using these as indicated in the NTC Thermistor section will give temperature trip points of approximately 3°C and 47°C, a delta of 44°C. This delta in temperature can be moved in either direction by changing the value of RNOM with respect to RNTC. Increasing RNOM will move both trip points to lower temperatures. Likewise a decrease in RNOM with respect to RNTC will move the trip points to higher temperatures. To calculate RNOM for a shift to lower temperature for example, use the following equation: RNOM = RCOLD • RNTC at 25°C 2.815 where RCOLD is the resistance ratio of RNTC at the desired cold temperature trip point. If you want to shift the trip points to higher temperatures use the following equation: RNOM = RHOT • RNTC at 25°C 0.4086 where RHOT is the resistance ratio of RNTC at the desired hot temperature trip point. Here is an example using a 100k R-T Curve 1 thermistor from Vishay Dale. The difference between the trip points is 44°C, from before, and we want the cold trip point to be 0°C, which would put the hot trip point at 44°C. The RNOM needed is calculated as follows: RCOLD • RNTC at 25°C 2.815 3.266 = • 100k = 116k 2.815 RNOM = 4055p 17 LTC4055 U OPERATIO The nearest 1% value for RNOM is 115k. This is the value used to bias the NTC thermistor to get cold and hot trip points of approximately 0°C and 44°C respectively. To extend the delta between the cold and hot trip points a resistor, R1, can be added in series with RNTC (see Figure␣ 3b). The values of the resistors are calculated as follows: RCOLD – RHOT 2.815 – 0.4086 0.4086 R1 = • (RCOLD – RHOT ) – RHOT 2.815 – 0.4086 RNOM = where RNOM is the value of the bias resistor, RHOT and RCOLD are the values of RNTC at the desired temperature trip points. Continuing the example from before with a desired hot trip point of 50°C: RCOLD – RHOT 100k • (3.266 – 0.3602) = 2.815 – 0.4086 2.815 – 0.4086 = 120.8k, 121k is nearest 1% RNOM = CHARGER UNDERVOLTAGE LOCKOUT Internal undervoltage lockout circuits monitor the VIN and VOUT voltages and keep the charger circuits of the part shut down until VIN or VOUT rises above the under-voltage lockout threshold. The charger UVLO circuit has a built-in hysteresis of 125mV. Furthermore, to protect against reverse current in the power MOSFET, the charger UVLO circuit keeps the charger shutdown if VBAT exceeds VOUT. If the charger UVLO comparator is tripped, the charger circuits will not come out of shutdown until VOUT exceeds VBAT by 50mV. SHUTDOWN The LTC4055 can be shut down by forcing the SHDN pin greater than 1V. In shutdown, the currents on IN1/IN2, OUT and BAT are decreased to less than 2.5µA and the internal battery charge timer is reset. All power paths are put in a Hi-Z state. SUSPEND 0.4086 R1 = 100k • • (3.266 – 0.3602) – 0.3602 2.815 – 0.4086 = 13.3k, 13.3k is nearest 1% The final solution is as shown if Figure 3b where RNOM = 121k, R1 = 13.3k and RNTC=100k at 25°C. CURRENT LIMIT UNDERVOLTAGE LOCKOUT An internal undervoltage lockout circuit monitors the input voltage and keeps the current limit circuits of the part in shutdown mode until VIN rises above the undervoltage lockout threshold. The current limit UVLO circuit has a built-in hysteresis of 125mV. Furthermore, to protect against reverse current in the power MOSFET, the current limit UVLO circuit keeps the current limit shutdown if VOUT exceeds VIN. If the current limit UVLO comparator is tripped, the current limit circuits will not come out of shutdown until VOUT falls 50mV below the VIN voltage. The LTC4055 can be put in suspend mode by forcing the SUSP pin greater than 1V. In suspend mode the ideal diode function from BAT to OUT and the output charger are kept alive. The rest of the part is shut down to conserve current and the battery charge timer is reset if VOUT becomes less than VBAT. VIN and Wall Adaptor Bypass Capacitor Many types of capacitors can be used for input bypassing. However, caution must be exercised when using multilayer ceramic capacitors. Because of the self resonant and high Q characteristics of some types of ceramic capacitors, high voltage transients can be generated under some start-up conditions, such as connecting the charger input to a hot power source. For more information, refer to Application Note 88. 4055p 18 LTC4055 U OPERATIO Selecting WALL Input Resistors The WALL input pin identifies the presence of a wall adaptor. This information is used to disconnect the inputs IN1/IN2 from the OUT pin in order to prevent back conduction to whatever may be connected to the inputs. It also forces the ACPR pin low when the voltage at the WALL pin exceeds the input threshold. The WALL pin has a 1V rising threshold and approximately 30mV of hysteresis. It needs to be noted that this function is disabled when the only power applied to the part is from the battery. Therefore the 1V threshold only applies when the voltage on either IN1/IN2 or OUT is 100mV greater than the voltage on BAT and the voltage on IN1/IN2 or OUT is greater than the VUVLO (3.8V typ) threshold. The wall adapter detection threshold is set by the following equation: R1 VTH( Adapter ) = VWALL • 1 + R2 R1 VHYST ( Adapter ) = VWALL−HYST • 1 + R2 where VTH(Adapter) is the wall adaptor detection threshold, VWALL is the WALL pin rising threshold (typically 1V), R1 is the resistor from the wall adapter input to WALL and R2 is the resistor from WALL to GND. Consider an example where the VTH(Adapter) is to be set somewhere around 4.5V. Resistance on the WALL pin should be kept relatively low (~10k) in order to prevent false tripping of the wall comparator due to leakages associated with the switching element used to connect the adapter to OUT. Pick R2 to be 10k and solve for R1. V ( Adapter ) R1 = R2 • TH − 1 VWALL The nearest 1% resistor is 34.8k. Therefore R1 = 34.8k and the rising trip point should be 4.48V. 34.8 VHYST ( Adapter ) ≈ 30mV • 1 + ≈ 134mV 10 The hysteresis is going to be approximately 124mV for this example. Power Dissipation The conditions that cause the LTC4055 to reduce charge current due to the thermal protection feedback can be approximated by considering the power dissipated in the part. For high charge currents and a wall adapter applied to VOUT, the LTC4055 power dissipation is approximately: PD = (VOUT – VBAT) • IBAT Where PD is the power dissipated, VOUT is the supply voltage, VBAT is the battery voltage and IBAT is the battery charge current. It is not necessary to perform any worstcase power dissipation scenarios because the LTC4055 will automatically reduce the charge current to maintain the die temperature at approximately 105°C. However, the approximate ambient temperature at which the thermal feedback begins to protect the IC is: TA = 105°C – PD • θJA TA = 105°C – (VOUT – VBAT) • IBAT • θJA Example: An LTC4055 operating from a wall adapter with 5V at VOUT providing 0.8A to a 3V Li-Ion battery. The ambient temperature above, which the LTC4055 will begin to reduce the 0.8A charge current, is approximately: TA = 105°C – (5V – 3V) • 0.8A • 37°C/W TA = 105°C – 1.6W • 37°C/W = 105°C – 59°C = 46°C 4.5 – 1 = 10k • 3.5 = 35k R1 = 10k • 1 4055p 19 LTC4055 U OPERATIO The LTC4055 can be used above 46°C, but the charge current will be reduced below 0.8A. The approximate charge current at a given ambient temperature can be approximated by: IBAT STABILITY 105°C – TA = ( VOUT – VBAT ) • θJA Consider the above example with an ambient temperature of 55°C. The charge current will be reduced to approximately: IBAT = LTC4055 can deliver over 1A to a battery from a 5V supply at room temperature. Without a backside thermal connection, this number could drop to less than 500mA. 105°C – 55°C 50°C = 0.675A = (5V – 3V) • 37°C / W 74°C /A The constant-voltage mode feedback loop is stable without any compensation when a battery is connected. However, a 1µF capacitor with a 1Ω series resistor to GND is recommended at the BAT pin to keep ripple voltage low when the battery is disconnected. Ideal Diode from BAT to OUT Board Layout Considerations In order to be able to deliver maximum charge current under all conditions, it is critical that the exposed pad on the backside of the LTC4055 package is soldered to the board. Correctly soldered to a 2500mm2 double-sided 1oz. copper board, the LTC4055 has a thermal resistance of approximately 37°C/W. Failure to make thermal contact between the exposed pad on the backside of the package and the copper board will result in thermal resistances far greater than 37°C/W. As an example, a correctly soldered Forward regulation for the LTC4055 from BAT to OUT has three operational ranges, depending on the magnitude of the load current. For small load currents, the LTC4055 will provide a constant voltage drop; this operating mode is referred to as “constant VON” regulation. As the current exceeds IFWD, the voltage drop will increase linearly with the current with a slope of 1/RDIO,ON; this operating mode is referred to as “constant RON” regulation. As the current increases further, exceeding IMAX, the forward voltage drop will increase rapidly; this operating mode is referred to as “constant ION” regulation. The characteristics for the following parameters: RFWD, RON, VFWD, and IFWD are specified with the aid of Figure 4. CONSTANT ION LTC4055 IMAX CONSTANT RON CURRENT (A) SLOPE: 1/RDIO,ON IFWD SLOPE: 1/RFWD 0 VFWD SCHOTTKY DIODE CONSTANT VON 4055 F04 FORWARD VOLTAGE (V) Figure 4. LTC4055 vs Schottky Diode Forward Voltage Drop 4055p 20 LTC4055 U TYPICAL APPLICATIO S LTC4055 Configured for USB Application with Wall Adapter allowing the input current supplied by VBUS to exceed the 500mA/100mA limits. Figure 5 shows an LTC4055 configured for USB applications with the optional wall adaptor input. The programming resistor (RCLPROG) is set to 105k which sets up a nominal current limit of 467mA in high power mode (92mA in low power). This is done to prevent the various tolerances in the part and programming resistors from The programming resistor (RPROG) with a value of 61.9k sets up a nominal charge current of approximately 800mA. Note that this is the charge current when the wall adapter is present. When the wall adapter is absent, the current limit supersedes the charge current programming and charge current is limited to 467mA. 5V WALL ADAPTER INPUT 5V (NOM) FROM USB CABLE VBUS R3 1Ω 10µF IN1 OUT IN2 BAT TO LDOs, REGs, ETC + 10µF Li-Ion CELL CHRG R1 34.8k R2 10k ACPR RNTCBIAS 100k LTC4055 SUSP SUSPEND USB POWER WALL HPWR 500mA/100mA SELECT VNTC SHDN SHUTDOWN NTC TIMER PROG NTC C TIMER 100k 0.1µF CLPROG RPROG 61.9k GND RCLPROG 105k 4055 F05 Figure 5. USB Power Control Application with Wall Adapter Input 4055p 21 LTC4055 U TYPICAL APPLICATIO S USB Hosting Application: The LTC4055’s IN1 and IN2 are Set Hi-Z by Pulling the SUSP Pin Above 1.2V application circuit. The wall adapter or the battery can still provide power to OUT, which in turn can provide power to VBUS when commanded from the USB controller. The ability to charge the battery is enabled when the wall adapter is present. In applications where the power is required to go back out on to the USB VBUS the LTC4055 can be configured to turn off its input power path, IN1 and IN2. Forcing the SUSP input pin above 1.2V does this. Figure 6 shows the 5V (NOM) FROM USB CABLE VBUS DC/DC VOUT CONVERTER VIN 1µF EN 5V WALL ADAPTER INPUT R1 34.8k IN1 OUT IN2 BAT USB CONTROLLER SUSP ACPR VNTC HPWR 500mA/100mA SELECT NTC SHDN GND SHUTDOWN TIMER PROG NTC C TIMER 100k 0.1µF Li-Ion CELL CHRG LTC4055 R3 100k 10µF + WALL R2 10k TO LDOs, REGs, ETC CLPROG RPROG 105k RCLPROG 105k 4055 F06 Figure 6. USB Hosting Application 4055p 22 LTC4055 U PACKAGE DESCRIPTIO UF Package 16-Lead Plastic QFN (4mm × 4mm) (Reference LTC DWG # 05-08-1692) 0.72 ±0.05 4.35 ± 0.05 2.15 ± 0.05 2.90 ± 0.05 (4 SIDES) PACKAGE OUTLINE 0.30 ±0.05 0.65 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS BOTTOM VIEW—EXPOSED PAD 4.00 ± 0.10 (4 SIDES) 0.75 ± 0.05 R = 0.115 TYP 0.55 ± 0.20 15 16 PIN 1 TOP MARK 1 2.15 ± 0.10 (4-SIDES) 2 (UF) QFN 0503 0.200 REF 0.00 – 0.05 0.30 ± 0.05 0.65 BSC NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGC) 2. ALL DIMENSIONS ARE IN MILLIMETERS 3. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 4. EXPOSED PAD SHALL BE SOLDER PLATED 4055p Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 23 LTC4055 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS Battery Chargers LTC1733 Monolithic Lithium-Ion Linear Battery Charger Standalone Charger with Programmable Timer, Up to 1.5A Charge Current LTC1734 Lithium-Ion Linear Battery Charger in ThinSOTTM Simple ThinSOT Charger, No Blocking Diode, No Sense Resistor Needed LTC1734L Lithium-Ion Linear Battery Charger in ThinSOT Low Current Version of LTC1734; 50mA ≤ ICHRG ≤ 180mA LTC4002 Switch Mode Lithium-Ion Battery Charger Standalone, 4.7V ≤ VIN ≤ 24V, 500kHz Frequency, 3 Hour Charge Termination LTC4050 Lithium-Ion Linear Battery Charger Controller Features Preset Voltages, C/10 Charger Detection and Programmable Timer, Input Power Good Indication, Thermistor Interface LTC4052 Monolithic Lithium-Ion Battery Pulse Charger No Blocking Diode or External Power FET Required, ≤1.5A Charge Current LTC4053 USB Compatible Monolithic Li-Ion Battery Charger Standalone Charger with Programmable Timer, Up to 1.25A Charge Current LTC4054 Standalone Linear Li-Ion Battery Charger with Integrated Pass Transistor in ThinSOT Thermal Regulation Prevents Overheating, C/10 Termination, C/10 Indicator, Up to 800mA Charge Current LTC4057 Lithium-Ion Linear Battery Charger Up to 800mA Charge Current, Thermal Regulation, ThinSOT Package LTC4058 Standalone 950mA Lithium-Ion Charger in DFN C/10 Charge Termination, Battery Kelvin Sensing, ±7% Charge Accuracy LTC4059 900mA Linear Lithium-Ion Battery Charger 2mm × 2mm DFN Package, Thermal Regulation, Charge Current Monitor Output LTC4411/LTC4412 Low Loss PowerPathTM Controller in ThinSOT Automatic Switching Between DC Sources, Load Sharing, Replaces ORing Diodes Power Management LTC3405/LTC3405A 300mA (IOUT), 1.5MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN = 2.7V to 6V, VOUT = 0.8V, IQ = 20µA, ISD < 1µA, ThinSOT Package LTC3406/LTC3406A 600mA (IOUT), 1.5MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN = 2.5V to 5.5V, VOUT = 0.6V, IQ = 20µA, ISD < 1µA, ThinSOT Package LTC3411 1.25A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN = 2.5V to 5.5V, VOUT = 0.8V, IQ = 60µA, ISD < 1µA, MS10 Package LTC3440 600mA (IOUT), 2MHz, Synchronous Buck-Boost DC/DC Converter 95% Efficiency, VIN = 2.5V to 5.5V, VOUT = 2.5V, IQ = 25µA, ISD < 1µA, MS Package ThinSOT and PowerPath are trademarks of Linear Technology Corporation. 4055p 24 Linear Technology Corporation LT/TP 0104 1K • PRINTED IN THE USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2004