SC824 Single-cell Li-Ion Charger Tri-Mode with Timer and NTC POWER MANAGEMENT Features Description The SC824 is a single input triple mode (adapter/USB High, USB Low) linear single-cell Li-Ion battery charger in a 10 lead 2×2 (mm) MLPD ultra-thin package. Single input 30V protected charger Adapter, USB High, USB Low modes Charging by current regulation, voltage regulation, and thermal limiting Programmable currents from 70mA to 1A Fast-charge current regulation — 15% at 70mA, 9% at 700mA Constant voltage — 4.2V, 1% regulation Input voltage protection — 30V Current-limited adapter support capability — reduces power dissipation in charger IC USB modes automatically reduce charge current if needed to prevent USB Vbus overload Instantaneous CC-to-CV transition for faster charging Battery temperature NTC thermistor interface Multi-stage charge timer for safety and alternative termination, IEEE Std. 1725-2006 compliant Termination on current or timer — first to occur Soft-start reduces adapter or USB load transients High operating voltage range permits use of unregulated adapters Complies with CCSA YD/T 1591-2006 High-current USB Dedicated Charger compatible Ultra-thin 2×2×0.6 (mm) MLPD package Lead-free and halogen-free WEEE and RoHS compliant Charging begins automatically when an input source is applied to the charging input. The input is designed to survive sustained input voltage up to 30V to protect against hot plug overshoot and faulty charging adapters. Thermal limiting protects the SC824 from excessive power dissipation. The SC824 provides three modes of charging: adapter mode, USB low power mode, and USB high power mode. Adapter mode charges up to 1A with the charging adapter operating either in voltage regulation or in current limit to obtain the lowest possible power dissipation. A single current programming pin is used to program precharge current, termination current, and fast-charge current in fixed proportions. The USB modes provide low and high power fast-charge currents. The two USB modes dynamically limit the charging load if necessary to automatically prevent overloading the USB Vbus supply. The SC824 provides a battery NTC thermistor interface to disable charging when the battery temperature exceeds programmed thresholds. An optional programmable multi-stage charge timer protects against a faulty battery, or terminates charging on timeout if the system load is too great to terminate charging on current. A 45 minute top-off period following termination ensures a fully charged battery. The monitor state restarts a charge cycle if the battery discharges after the charger has turned off. Applications Mobile phones Personal Media Players Personal Navigation Devices Typical Application Circuit RNPU SC824 VADAPTER VIN VSYS MODE SELECT CPU GPIO 1μF 2.2μF October 30, 2009 EN_NTC BAT MODE IPRGM RTIME STAT0 GND STAT1 RIPRGM © 2009 Semtech Corporation 2.2μF RNTC Thermistor Device Load Battery Pack 1 SC824 Pin Configuration VIN Ordering Information 1 VSYS 2 MODE 3 RTIME 4 GND 5 10 TOP VIEW T EN_NTC 9 BAT 8 IPRGM 7 STAT0 6 STAT1 Device Package SC824ULTRT(1)(2) MLPD-UT-10 2×2 SC824EVB Evaluation Board Notes: (1) Available in tape and reel only. A reel contains 3,000 devices. (2) Lead-free packaging only. Device is WEEE and RoHS compliant, and halogen-free. MLPD-UT10; 2×2, 10 LEAD θJA = 68°C/W Marking Information 824 yw yw = Date Code 2 SC824 Absolute Maximum Ratings Recommended Operating Conditions VIN, STAT0, STAT1 (V) . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +30.0 Operating Ambient Temperature (°C) . . . . . . . . . -40 to +85 VSYS, BAT (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.5 VIN Adapter Mode Operating Voltage(2) (V) . . . 4.36 to 8.20 MODE (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (BAT + 0.3) VIN USB Modes Operating Voltage(2) (V) . . . . . . 4.70 to 8.20 EN_NTC, RTIME, IPRGM (V) . . . . . . . . . . . . . -0.3 to (VSYS + 0.3) VIN input current (A) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 BAT, IPRGM Short to GND Duration . . . . . . . . . . Continuous ESD Protection Level(1) (kV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal Information Thermal Resistance, Junction to Ambient(3) (°C/W) . . . . . 68 Maximum Junction Temperature (°C) . . . . . . . . . . . . . . +150 Storage Temperature Range (°C) . . . . . . . . . . . . -65 to +150 Peak IR Reflow Temperature (°C) . . . . . . . . . . . . . . . . . . . +260 Exceeding the above specifications may result in permanent damage to the device or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not recommended. NOTES: (1) Tested according to JEDEC standard JESD22-A114. (2) Operating Voltage is the input voltage at which the charger is guaranteed to begin operation. These ranges apply to charging sources operating in voltage regulation. Charging sources operating in current limit may be pulled below these ranges by the charging load. Maximum operating voltage is the maximum Vsupply as defined in EIA/JEDEC Standard No. 78, paragraph 2.11. (3) Calculated from package in still air, mounted to 3 x 4.5 (in), 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards. Electrical Characteristics Test Conditions: VVIN = 5.00V (1), VBAT = 3.70V unless specified; Typ values at 25°C; Min and Max at -40°C < TA < 85°C, unless specified. Parameter Symbol Conditions Min Typ Max Units 4.16 4.26 4.36 V 2.70 2.85 3.00 V 9.3 9.6 V VIN Under-Voltage Lockout Rising Threshold VTUVLO-R VIN Under-Voltage Lockout Falling Threshold (2) VTUVLO-F VIN OVP Rising Threshold VTOVP-R VIN OVP Falling Threshold VTOVP-F VIN OVP Hysteresis VTOVP-H VTOVP-R - VTOVP-F VIN Charging Disabled Operating Current ICCVIN_DIS VEN_NTC = 0V, VRTIME = 0V 0.8 1.5 mA VIN Charging Enabled Operating Current ICCVIN_EN VEN_NTC = 2.3V, VRTIME = 0V, IBAT = 1mA; excluding IBAT and IIPRGM 1.8 2.5 mA VCV IBAT = 50mA, -40°C ≤ TJ ≤ 125°C 4.20 4.24 V Voltage Load Regulation VCV_LOAD 1mA ≤ IBAT ≤ 1A, -40°C ≤ TJ ≤ 125°C BAT Re-charge Threshold VTReQ VCV - VBAT BAT Pre-charge Threshold (rising) VTPreQ Regulation Voltage VVIN >VBAT 8.2 8.5 V 500 800 mV 4.16 -20 mV/A 60 100 140 mV 2.85 2.90 2.95 V 3 SC824 Electrical Characteristics (continued) Parameter Battery Leakage Current IPRGM Programming Resistor IBAT Fast-Charge Current, adapter mode or USB High Power mode Symbol Conditions lBAT V0 Typ Max Units VBAT = VCV, VVIN = 0V, VEN_NTC = 0V 0.1 1 μA lBATDIS VBAT = VCV, VVIN = 5V, VEN_NTC = 0V 0.1 1 μA lBATMON VBAT = VCV, VEN_NTC = 2.3V, VRTIME = 0V and charging terminated 0.1 1 μA 29.4 kΩ RIPRGM Min 2.05 IFQ RIPRGM = 2.94kΩ, VTPreQ < VBAT < VCV RIPRGM = 4.42kΩ, VTPreQ < VBAT < VCV 643 427 694 462 745 497 mA IFQ_Low RIPRGM = 2.94kΩ, VTPreQ < VBAT < VCV RIPRGM = 4.42kΩ, VTPreQ < VBAT < VCV 105 69 139 92 173 116 mA IBAT Pre-Charge Current IPreQ RIPRGM = 2.94kΩ, 1.8V < VBAT < VTPreQ RIPRGM = 4.42kΩ, 1.8V < VBAT < VTPreQ 105 69 139 92 173 116 mA IBAT Termination Current ITERM RIPRGM = 2.94kΩ, VBAT = VCV RIPRGM = 4.42kΩ, VBAT = VCV 59 38 69 46 80 55 mA VIN - BAT Dropout Voltage VDO IBAT = 700mA, 0°C ≤ TJ ≤ 125°C 0.4 0.6 V IPRGM Fast-charge Regulated Voltage VIPRGM_FQ VVIN = 5.0V, VTPreQ < VBAT < VCV 2.04 V IPRGM Pre-charge Regulated Voltage VIPRGM_PQ VBAT < VTPreQ 0.408 V IPRGM Termination Threshold Voltage VTIPRGM_TERM VBAT = VCV 0.204 V VUVLR 5mA ≤ VIN supply current limit ≤ 500mA, VMODE = 2V, RIPRGM = 2.94kΩ (694mA) USB Low Power mode Fast-Charge current VIN USB Modes Under-Voltage Load Regulation Limiting Voltage Thermal Limiting Threshold Temperature T TL Thermal Limit Rate iT VSYS Output Voltage VVSYS VSYS Output Current IVSYS 4.40 4.51 4.70 V 130 °C TJ > T TL -50 mA/ °C VVIN ≥ 5V, IVSYS ≤ 1mA 4.6 V 1 mA RTNTC_DIS Charger Disable/Reset (Falling) 9 10 11.5 %VVSYS RTNTC_HF NTC Hot (Falling) 29 30 31 %VVSYS RTNTC_CR NTC Cold (Rising) 74 75 76 %VVSYS RTNTC_NBR No-Battery Mode select (Rising) 94 95 96 %VVSYS EN_NTC Hysteresis VTNTC_HYS VVIN = 5V EN_NTC Disable/Reset Hold Time (3) tNTC_DIS_H Momentary disable resets charger EN_NTC Thresholds 45 500 mV ns 4 SC824 Electrical Characteristics (continued) Parameter Symbol Conditions Min Typ 19.6 Max Units 200 kΩ RTIME Programming Resistor RRTIME RTIME Regulated Voltage VRTIME RRTIME = 130kΩ to GND Precharge Fault Time-Out tPreQF Internal Timer Only 38 45 52 mins RRTIME = 130kΩ to GND 8.5 10 11.5 hrs Constant Current (CC) Fault Time-Out tCCF RRTIME connected to VSYS (Int. Timer) 2.55 3 3.45 hrs 1.1 V Constant Voltage (CV) Time-Out tCV Internal Timer Only 2.55 3 3.45 hrs Top-off Time-Out tTO Internal Timer Only 38 45 52 mins Charge-done Status Delay tSD Internal Timer Only 17 20 23 s MODE Input High Voltage Threshold VIH 1.6 MODE Input Mid Voltage Range VIM 0.65 MODE Input Low Voltage Threshold VIL MODE Input High-range Input Current IIH VMODE = Min VIH MODE Input Mid-range Load Limit IIM Input will float to mid range when this load limit is observed. -5 MODE Input Low-range Input Current IIL 0V ≤ VMODE ≤ Max VIL -25 MODE Input Monitor State Input Current IMODE_MON VMODE = VBAT = VCV, VEN_NTC = 2.3V, VRTIME = 0V and charging terminated 1 μA IILEAK VVIN = 5V and VEN_NTC = 0V, or VVIN = 0V, VMODE = VCV 1 μA STAT0, STAT1 Output Low Voltage VSTAT_LO ISTATx_SINK = 1mA 0.5 V STAT0, STAT1 Output High Current ISTAT_HI VSTATx = 5V 1 μA MODE Input Leakage V 23 1.3 V 0.3 V 75 μA 5 μA -12 μA Notes: (1) Electrical Characteristics apply for VVIN = 4.75V to 5.25V, but are tested only at VVIN = 5.00V, unless noted. (2) Sustained operation to VTUVLO-F ≤ VVIN is guaranteed only if a current limited charging source applied to VIN is pulled below VTUVLO-R by the charging load in adapter mode; forced VIN voltage below VTUVLO-R may in some cases result in regulation errors or other unexpected behavior. (3) Not tested. Guaranteed by design. 5 SC824 Typical Characteristics CV Line Regulation CV Load Regulation ο ο TA = 25 C, IBAT = 50mA 4.24 4.208 TA = 25 C, VVIN = 5V 4.23 4.22 4.204 VBAT (V) VBAT (V) 4.21 4.2 4.2 4.19 4.18 4.196 4.17 4.192 5 5.5 6 6.5 7 7.5 4.16 0 8 100 200 300 400 500 600 700 800 900 1000 IBAT (mA) VVIN (V) CV Temperature Regulation CC AD or USB High FQ Line Regulation ο TA = 25 C, VBAT = 3.7V VVIN = 5V, IBAT = 50mA 720 4.208 680 RIPRGM = 2.94kΩ 640 IBAT (mA) VBAT (V) 4.204 4.2 600 560 520 4.196 RIPRGM = 4.42kΩ 480 4.192 -40 -20 0 20 40 60 80 100 440 4.5 120 5 5.5 6 Ambient Temperature ( C) CC AD or USB High FQ VBAT Regulation 7.5 8 VVIN = 5V, VBAT = 3.7V 720 720 680 680 RIPRGM = 2.94kΩ RIPRGM = 2.94kΩ 640 IBAT (mA) 640 IBAT (mA) 7 CC AD or USB High FQ Temperature Regulation ο TA = 25 C, VVIN = 5V 600 560 520 600 560 520 RIPRGM = 4.42kΩ 480 440 2.9 6.5 VVIN (V) o 3.1 3.3 3.5 VBAT (V) RIPRGM = 4.42kΩ 480 3.7 3.9 4.1 440 -40 -20 0 20 40 60 80 100 120 o Ambient Temperature ( C) 6 SC824 Typical Characteristics (continued) CC PQ Line Regulation CC PQ Temperature Regulation ο TA = 25 C, VBAT = 2.7V VVIN = 5V, VBAT = 2.7V 150 150 140 140 RIPRGM = 2.94kΩ 120 110 RIPRGM = 4.42kΩ 100 120 110 RIPRGM = 4.42kΩ 100 90 80 RIPRGM = 2.94kΩ 130 IBAT (mA) IBAT (mA) 130 90 5 5.5 6 6.5 7 7.5 80 8 -40 VVIN (V) 0 20 40 60 80 100 120 o Ambient Temperature ( C) CC USB Low Power FQ Line Regulation CC USB Low Power FQ VBAT Regulation ο ο TA = 25 C, VBAT = 3.7V TA = 25 C, VVIN = 5V 150 150 140 140 RIPRGM = 2.94kΩ 130 120 110 RIPRGM = 4.42kΩ 100 RIPRGM = 2.94kΩ 130 IBAT (mA) IBAT (mA) -20 120 110 RIPRGM = 4.42kΩ 100 90 90 80 4.5 5 5.5 6 6.5 7 7.5 80 2.9 8 VVIN (V) 3.1 3.3 3.5 3.7 3.9 4.1 VBAT (V) IFQ vs. RIPRGM, Adapter or USB High Power Modes CC USB Low Power FQ Temperature Regulation ο VVIN = 5V, VBAT = 3.7V, TA = 25 C VVIN = 5V, VBAT = 3.7V 150 1000 140 RIPRGM = 2.94kΩ 800 IBAT (mA) IBAT (mA) 130 120 110 400 RIPRGM = 4.42kΩ 100 200 90 80 600 -40 -20 0 20 40 60 80 o Ambient Temperature ( C) 100 120 0 2 6 10 14 18 22 26 30 RIPRGM (kΩ) 7 SC824 Typical Characteristics (continued) Charging Cycle Battery Voltage and Current IPQ vs. RIPRGM; IFQ vs. RIPRGM, USB Low Power Mode ο ο VVIN = 5V, VBAT = 3.7V, TA = 25 C 700mAhr battery, RIPRGM = 2.94kΩ, VVIN = 5.0V, TA = 25 C, timer enabled 200 7 700 6 600 120 80 5 500 VBAT 400 4 300 3 IBAT 2 VSTAT1 IBAT (mA) VBAT, VSTAT1 (V) IBAT (mA) 160 200 40 100 1 10 14 18 22 26 0 0 30 0.25 0.5 0.75 1 Pre-Charging Battery Voltage and Current 1.75 2 2.25 2.5 0 2.75 ο 4 800 3.75 700 3.5 700mAhr battery, RIPRGM = 2.94kΩ, VVIN = 5.0V, TA = 25 C 4.22 600 IBAT 3 400 2.75 300 2.5 200 2.25 100 VBAT (V) 500 VBAT 760 VBAT IBAT (mA) VBAT (V) 1.5 CC-to-CV Battery Voltage and Current ο 700mAhr battery, RIPRGM = 2.94kΩ, VVIN = 5.0V, TA = 25 C 3.25 1.25 Time (hrs) RIPRGM (kΩ) 4.205 730 4.19 700 IBAT 4.175 670 4.16 2 0 1 2 3 4 5 6 0 8 7 640 4.145 30 Time (s) 30.5 31 4.25 4.15 500 4.25 400 4.15 33 33.5 34 34.5 35 35.5 610 36 250 200 300 4.05 200 3.95 VBAT (V) VBAT IBAT (mA) VBAT (V) 32.5 700mAhr battery, RIPRGM = 4.42kΩ, VVIN = 5.0V, Load = 10mA VBAT 150 4.05 100 3.95 IBAT IBAT 3.85 7 32 USB Low-Power Re-Charge Cycle 700mAhr battery, RIPRGM = 2.94kΩ, VVIN = 5.0V, Load = 10mA 6 31.5 Time (min) Re-Charge Cycle BAT Pin Voltage and Current 3.75 5 IBAT (mA) 6 IBAT (mA) 0 2 8 9 Time (hrs) 10 11 12 13 100 3.85 0 3.75 50 6 7 8 9 10 11 12 13 14 0 Time (hrs) 8 SC824 Typical Characteristics (continued) Mode Reselection — USB Low to USB High Mode Reselection — USB High to USB Low VVIN=5V, VBAT=3.7V, RIPRGM = 2.94kΩ VVIN=5V, VBAT=3.7V, RIPRGM = 2.94kΩ IBAT (100mA/div)) VMODE (2V/div) VMODE (2V/div) VMODE=0V— VMODE=0V— IBAT (100mA/div) IBAT=0mA— 100μs/div Mode Reselection — AD to USB High IBAT=0mA— 100μs/div Mode Reselection — USB High to AD VVIN=5V, VBAT=3.7V, RIPRGM = 2.94kΩ VVIN=5V, VBAT=3.7V, RIPRGM = 2.94kΩ IBAT (100mA/div) IBAT (100mA/div) VMODE (2V/div) VMODE (2V/div) VMODE=0V— IBAT=0mA— VMODE=0V— 100μs/div Mode Reselection — USB Low to AD IBAT=0mA— 100μs/div Mode Reselection — AD to USB Low VVIN=5V, VBAT=3.7V, RIPRGM = 2.94kΩ VVIN=5V, VBAT=3.7V, RIPRGM = 2.94kΩ IBAT (100mA/div) VMODE (2V/div) VMODE (2V/div) VMODE=0V— VMODE=0V— IBAT (100mA/div) IBAT=0mA— 100μs/div IBAT=0mA— 100μs/div 9 SC824 Pin Descriptions Pin # Pin Name 1 VIN 2 VSYS System reference voltage supply — 4.6V reference used internally and externally by the NTC circuit. Must have a 1μF capacitor connected between VSYS and GND. 3 MODE Charging mode selection (tri-level logical) input — Logical high selects USB high power mode, floating selects USB low power mode, ground selects adapter mode. 4 RTIME Timer setting pin — Connect a resistor between this pin and ground to set the time-out value of the CC mode timer. Connect to ground to disable the timer. Tie to VSYS to select the 3 hour CC timer using the internal oscillator. 5 GND Ground 6 STAT1 Status open drain output pin that is active low when charging is in progress, with or without a charging fault. When charging is complete, pin is released. See STATx Pin Truth Table. 7 STAT0 Status open drain output pin that is pulled low when a valid charging adapter is connected and the voltage is greater than the UVLO level and less than the OVP level, and no charging fault is detected. Pin is released when the input is disconnected from a power supply, or to indicate a charging fault. See STATx Pin Truth Table. 8 IPRGM Charging current programming pin — Connect a resistor from this pin to ground to program charge current. Pre-charge current (also USB low power mode fast-charge current) is 20% of IPRGM-programmed fast-charge current in all modes. The charging termination current threshold for all modes is 10% of the IPRGM programmed fast-charge current. If this pin is grounded, pin-short detection holds the SC824 in logical reset, with charging disabled. 9 BAT 10 EN_NTC T Thermal Pad Pin Function Supply pin — Connect to charging adapter (wall adapter or USB). This pin is protected against damage due to high voltage up to 30V. Charger output — Connect to battery positive terminal. Battery NTC thermistor connection pin — EN_NTC pin input voltage ranges are ratiometric with respect to the VSYS pin output voltage. The safe-to-charge battery temperature range is programmed with a resistor from the EN_NTC pin to the VSYS pin, and a battery pack NTC thermistor to ground; charging is suspended when the EN_NTC pin voltage is less than 30%, or greater than 75%, of VVSYS. When pulled down below 10% of VVSYS, charging is unconditionally disabled. When the level exceeds 95% of VVSYS, the battery is assumed to be disconnected and the device operates in No-Battery mode. Pad is for heatsinking purposes — The thermal pad is not connected internally. Connect exposed pad to ground plane using multiple vias. 10 SC824 Block Diagram V_Adapter or V_USB 3 MODE VTMODE_HIGH = ~1.50V 1V Tri-level Control VSYS VSYS Regulator 2 VSYS 1μF VTMODE_LOW = ~0.55V No Batt 1 VIN (USB modes only) NTC Cold Fault UVLR RNPU (NTC Pull-Up Resistor) VUV_LIM = 4.5V NTC Hot Fault CV VCV = 4.2V Disable CC VIREF EN_NTC 10 VSYS RSENSE BAT Die Temperature 7 6 STAT0 VT_CT Precharg, CC/CV & Termination Controller, Logical State Machine STAT1 RTIME To System Load Thermal Limiting RNTC Thermistor Termination VTIPRGM_TERM GND IPRGM 4 8 RRTIME 9 5 LithiumIon Single Cell Battery Pack RIPRGM 11 SC824 Applications Information Charger Operation Optional Top-off Charging, and Monitoring The SC824 is a single input, tri-mode, stand-alone Li-Ion battery charger. It has a tri-state MODE input pin that allows the device to be put in USB high power, USB low power, or adapter mode. Fast-charge current is programmed with a resistor from the IPRGM pin to ground. USB high power mode is equal to adapter mode current. USB low power current is 20% of fast-charge current. Depending on the state of the RTIME pin, upon termination the SC824 either tops-off the battery by operating as a voltage regulator (known as float charging) for 45 minutes or it immediately turns off its output. Once the output is turned off, the device enters the monitor state. In this state, the output remains off until the BAT pin voltage decreases by the re -charge threshold (VTReQ = 100mV typically). A re-charge cycle then begins automatically and the process repeats. If the timer is enabled, then the multistage timer also protects the recharge cycle. Re-charge cycles are not indicated by the STAT1 pin. When a valid input supply is detected, the STAT0 output goes low. A charge cycle is initiated and the STAT1 output goes low. When the battery voltage is less than the precharge threshold voltage, the pre-charge current is output to the battery. Pre-charge current is fixed at 20% of the programmed adapter mode or USB high power mode fast-charge current, and is equal to the USB low power mode fast-charge current. Fast-charge Constant Current (CC) regulation begins when the battery voltage exceeds the pre-charge threshold. The charge current soft-starts in three steps (20%, 60%, and 100% of programmed fast charge current) to reduce adapter load transients. In USB low power mode, the CC current is held at the 20% step. The charger begins Constant Voltage (CV) regulation when the battery voltage rises to the fully-charged singlecell Li-Ion regulation voltage (VCV ), nominally 4.2V. When regulating the output voltage, the charge current gradually decreases as the battery charges. The STAT1 output goes high, after a 20 second delay, when the output current IBAT drops below the termination current threshold. This is known as charge termination. The termination current threshold is 10% of the IPRGM-programmed fastcharge current regardless of the mode selected. Each step of the charge cycle is separately timed using the optional programmable charge timer. Time-out of the fixed 45 minute pre-charge stage timer or the fixed or programmable CC stage timer is indicated as a fault, which is encoded in the STAT0 and STAT1 outputs. Time-out during the CV timer stage has the same result as normal charge termination. When the timer is used, the output remains on for 45 minutes following termination to ensure that the battery is fully topped-off, then turns off. If the timer is not used, the charger turns off immediately upon reaching the termination current. A forced re-charge cycle can also be periodically commanded by the processor to maintain the battery in a fully charged state without discharging to the re-charge threshold, and without top-off charging. See the Monitor State section for details. Charging Input Mode Dependencies In adapter mode, a programmed charging current greater than the adapter’s current limit will pull down the VIN pin voltage to the battery voltage plus charger dropout voltage. This is referred to as Current-Limited-Adapter (CLA) operation. The UVLO falling threshold is set close to the battery voltage pre-charge threshold to permit low-dissipation charging from a current limited adapter. Both USB modes provide Under-Voltage Load Regulation (UVLR) in which the charging current is reduced if needed to prevent overloading of the USB Vbus supply. UVLR ensures the integrity of the USB Vbus supply for all devices sharing a host or hub supply. UVLR can also serve as a low-cost alternative to commanding USB low power charge current where there is no signal available to indicate whether USB low or high power mode should be selected. CC Fast-charge Current Programming CC regulation is active when the battery voltage is above VTPreQ and less than VCV. When either adapter mode or USB high power mode is selected, the programmed CC regulation fast-charge (FQ) current is inversely proportional to the IPRGM pin resistance to GND according to the following equation: 12 SC824 Applications Information (continued) IFQ VIPRGM _ Typ RIPRGM Pre-charge and USB Low Power Mode Fastcharge Current Regulation u 1000 The nominal fast charge current can be programmed to any value between 70mA and 1000mA. Current regulation accuracy is dominated by gain error at high current settings, and offset error at low current settings. The range of expected fast-charge output current versus programming resistance RIPRGM is shown in Figures 1a and 1b. Each figure shows the nominal fast-charge current versus nominal RIPRGM resistance as the center plot, and two theoretical limit plots indicating maximum and minimum current versus nominal programming resistance. These plots are derived from models of the expected worst-case contribution of error sources depending on programmed current. The current range includes the uncertainty due to 1% tolerance resistors. The dots on each plot indicate the currents obtained with the Electronic Industries Association (EIA) E96 standard value 1% tolerance resistors. Figures 1a and 1b show low and high resistance ranges, respectively. The USB low power mode fast-charge current accuracy is exactly like that of pre-charge in high power mode. USB low power mode current regulation accuracy is described in the next section. Pre-charging is automatically selected when the battery voltage is below the pre-charge threshold voltage (VTPreQ). Pre-charge current conditions the battery for fast charging. The pre-charge current value is fixed at 20% of the programmed fast-charge current. Note that USB low power mode pre-charge current is equal to USB low power mode fast-charge current. Pre-charge current regulation accuracy is dominated by offset error. The range of expected pre-charge output current versus programming resistance RIPRGM is shown in Figures 2a and 2b. Each figure shows the nominal precharge current versus nominal RIPRGM resistance as the center plot and two theoretical limit plots indicating maximum and minimum current versus nominal programming resistance. These plots are derived from models of the expected worst-case contribution of error sources depending on programmed current. The current range includes the uncertainty due to 1% tolerance resistors. The dots on each plot indicate the currents obtained with EIA E96 standard value 1% tolerance resistors. Figures 2a and 2b show low and high resistance ranges, respectively. 1100 325 1050 300 1000 950 275 250 850 Fast-charge Current (mA) Fast-charge Current (mA) 900 800 750 700 650 600 550 500 225 200 175 150 125 450 100 400 350 75 300 250 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 RIPRGM (kΩ), R-tol = 1% Figure 1a — Fast-charge Current Tolerance versus Programming Resistance, Low Resistance Range 7 50 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 RIPRGM (kΩ), R-tol = 1% Figure 1b — Fast-charge Current Tolerance versus Programming Resistance, High Resistance Range 13 SC824 Applications Information (continued) 80 270 260 75 70 230 220 65 210 60 200 190 55 Pre-charge Current (mA) Pre-charge Current (mA) 250 240 180 170 160 150 140 130 120 110 100 50 45 40 35 30 25 90 20 80 70 15 60 50 10 5 40 30 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 0 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 RIPRGM (kΩ), R-tol = 1% Figure 2a — Pre-charge Current and USB Low Power Mode Fast-charge Current Tolerance vs. Programming Resistance, Low Resistance Range Termination When the battery voltage reaches VCV, the SC824 transitions from constant current regulation to constant voltage regulation. The current into the battery decreases while the BAT voltage is regulated to VCV as the battery becomes fully charged. When the output current drops below the termination current threshold, charging terminates. Upon termination, the charger either enters monitor state or float charges the battery for the top-off timer duration, depending on the configuration of the charge timer. After a 20 second delay following termination, the STAT1 pin open drain output turns off. The termination current threshold is fixed at 10% of the fast-charge current, as programmed by the IPRGM pin resistance to ground, for all charging modes. Charger output current is the sum of the battery charge current and the system load current. Battery charge current changes gradually and establishes a slowly diminishing lower bound on the output current while charging in CV regulation. The load current into a typical digital system is highly transient in nature. Charge cycle termination is detected when the sum of the battery charging current and the greatest load current occurring within the immediate 300μs to 550μs past interval is less than the programmed termination current. This timing behavior permits charge cycle termination to occur during a brief RIPRGM (kΩ), R-tol = 1% Figure 2b — Pre-charge Current and USB Low Power Mode Fast-charge Current Tolerance vs. Programming Resistance, High Resistance Range low-load-current interval, and does not require that the longer interval average load current be small. Termination current threshold accuracy is dominated by offset error. The range of expected termination current versus programming resistance RIPRGM (for any charging mode) is shown in Figures 3a and 3b. Each figure shows the nominal termination current versus nominal RIPRGM resistance as the center plot and two theoretical limit plots indicating maximum and minimum current vs. nominal programming resistance. These plots are derived from models of the expected worst-case contribution of error sources depending on programmed current. The current range includes the uncertainty due to a 1% tolerance resistor. The dots on each plot indicate the currents obtained with EIA E96 standard value 1% tolerance resistors. Figures 3a and 3b show low and high resistance ranges, respectively. Monitoring Output Current The output current IBAT is indicated by the voltage at the IPRGM pin according to the following equation. IBAT VIPRGM 1000 R IPRGM Ensure that the IPRGM pin is not loaded or corrupted by the processor Analog to Digital Converter (ADC). An RC 14 SC824 Applications Information (continued) 115 35 110 105 30 95 Termination Current Threshold (mA) Termination Current Threshold (mA) 100 90 85 80 75 70 65 60 55 50 45 40 35 25 20 15 10 5 30 25 20 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 RIPRGM (kΩ), R-tol = 1% Figure 3a — Termination Current Tolerance vs. Programming Resistance, Low Resistance Range 0 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 RIPRGM (kΩ), R-tol = 1% Figure 3b — Termination Current Tolerance vs. Programming Resistance, High Resistance Range filter (R at least 100×R IPRGM, C large compared to the Sample-and-Hold capacitance of the ADC) can prevent corruption of the IPRGM pin voltage by the ADC. Any noise introduced onto the IPRGM pin will be seen as current noise at the SC824 output during CC regulation, and can introduce errors in the termination current. When no charging source is present, while the charger is disabled, or while operating in the monitor state (described in a later section), the MODE pin enters a high impedance state, suspending the tri-level functionality. Upon recharge or re-enabling the charger, the MODE pin trilevel interface is reactivated. The IPRGM pin will see a brief (<1ms) pulse whenever the charger turns on, just prior to enabling the output. This pulse is part of the startup IPRGM pin-short (to ground) test. When the charger first turns on, the processor should allow time for this pulse prior to reading the IPRGM voltage. See the section Short Circuit Protection. While the tri-level interface is active, the equivalent circuit looking into the MODE pin is a variable resistance, minimum 15kΩ, to an approximately 1V source. The input will float to mid range whenever the external driver sinks or sources less than 5μA. This is a common worst-case characteristic of a high impedance GPIO, or a weak pull-up or pull-down GPIO, configured as an input. The driving GPIO must be able to sink or source at least 75μA to ensure a low or high state, respectively, although the drive current required is typically far less. (See the electrical characteristics table.) Typically a processor GPIO port direction defaults to input upon processor reset, or is high impedance when unpowered. This is the ideal initial condition for driving the MODE pin, since this will select USB Low Power mode, which is the safest default mode with the lowest fast charge current. MODE Pin Tri-level Logical Input The MODE pin is designed to interface to a processor GPIO port that is powered from a peripheral supply voltage as low as 1.8V or as high as a fully charged battery. The processor writes 0 to select MODE low-range, and 1 to select high-range. The GPIO port is configured as an input to select mid-range. While driven high (VMODE > Min VIH), the SC824 will operate in USB High Power mode. While the MODE input voltage is within its specified mid range (Min VIM < VENB < Max VIM), either by floating (by reconfiguring its GPIO as an input) or by being externally forced, the SC824 will operate in USB Low Power mode. While driven low (VMODE < Max VIL), the SC824 will operate in adapter mode. For fixed mode operation, this pin can be permanently grounded to select low-range, left unconnected to select mid-range, or permanently connected to a logical high voltage source, such as BAT or a regulated peripheral supply voltage, to select high-range. 15 SC824 Applications Information (continued) Monitor State Upon termination (charge timer disabled) or time-out of the top-off timer (charge timer enabled), the charger will enter the monitor state. If the battery voltage falls below the recharge threshold (VCV - VReQ) while in the monitor state, the charger will automatically initiate a re-charge cycle. This operation will turn on the charger output, but will not assert the STAT1 output. A recharge cycle is subject to normal timer operation if the timer is enabled. The battery leakage current during monitor state is no more than 1μA over temperature and typically less than 0.1μA at room temperature. The SC824 can be forced out of the monitor state by disabling and re-enabling the charger using the EN_NTC pin. This operation will initiate a new charge cycle. This forced re-charge behavior can be used for periodically testing the battery state-of-charge and topping off the battery without requiring the battery to discharge to the automatic re-charge voltage. A single CPU instruction cycle is a sufficient disable hold-time to initiate a re-charge cycle. Following termination, the host processor can schedule a forced re-charge at any desired interval. Forced re-charge will assert the STAT1 output, which will remain on for 20 seconds following termination, regardless of whether the charge timer is enabled. VSYS pin The voltage of the VSYS pin is regulated from the VIN input and is present only when VIN is powered. A capacitor of at least 1μF should be connected from VSYS to ground near the pin. Capacitance must be rated at the expected bias voltage of 4.6V. The recommended EN_NTC network is a fixed-value pullup resistor (designated RNPU) from the EN_NTC pin to the VSYS pin, and the battery pack NTC thermistor (designated RNTC) from the EN_NTC pin to ground. In this configuration, an increasing battery temperature produces a decreasing NTC pin voltage. When VEN_NTC is greater than the high (cold) threshold (but below the No-Battery detector threshold) or less than the low (hot) threshold (but above the disable threshold), the charge cycle is suspended by turning off the output. This suspends but does not reset the charge timer, in any timer stage, and a charging fault is indicated by asserting (pulling low) STAT1 and releasing STAT0. Hysteresis is included for both high and low NTC thresholds to avoid chatter at the NTC temperature fault thresholds. When VEN_NTC returns to the Temperature-OK-to-Charge range, the charge timer resumes, STAT0 and STAT1 are asserted, and the charge cycle continues. The charge timer will expire when the output on-time exceeds the timer setting, regardless of how long it has been disabled due to an NTC fault. All EN_NTC input thresholds are proportional to the VSYS pin voltage (VVSYS). See the Block Diagram. When the recommended external NTC circuit shown in the Block Diagram is used, the external EN_NTC pin voltage is also proportional to VVSYS, with the proportionality varying with the thermistor resistance. This ensures that all EN_NTC thresholds are insensitive to VVSYS. The ratiometric hot and cold thresholds are given by the parameters RTNTC_HF and RTNTC_CR. EN_NTC pin voltage VEN_NTC between RTNTC_HF×VVSYS and RTNTC_CR×VVSYS enables charging. See Table 1. Table 1 — EN_NTC Pin Ratiometric Thresholds The internal CC timer is selected when the RTIME pin is connected to VSYS. VSYS provides an external voltage reference and supply for the NTC network. The total external load on the VSYS pin should not exceed 1mA. % of VVSYS RTNTC_NBR = 95% Range No-Battery NTC Cold Fault EN_NTC Interface The EN_NTC pin is the interface to a battery pack temperature sensing Negative Temperature Coefficient (NTC) thermistor, which can be used to suspend charging if the battery pack temperature is outside of a safe-to-charge range. The EN_NTC interface also often serves as a charger disable input and as a battery removal detector. VEN_NTC Ratiometric Thresholds RTNTC_CR = 75% NTC TemperatureOK-to-Charge RTNTC_HF = 30% NTC Hot Fault RTNTC_DIS = 10% Charger Disabled 16 SC824 Applications Information (continued) When VEN_NTC < RTNTC_DIS×VVSYS (nominally 10% of VVSYS), the SC824 charger is disabled. This threshold allows the EN_NTC pin to be used as a disable pin, allowing the system controller to asynchronously disable or reset the device by pulling EN_NTC to ground. When VEN_NTC < RTNTC_DIS×VVSYS, the charger is turned off, the charge timer is reset, and the STAT1 status output is turned off. While disabled, the VIN input UVLO and OVP threshold detectors remain active, and the STAT0 pin continues to indicate whether the VIN input voltage is valid for charging. No-Battery operation is selected when the battery (along with the thermistor) is removed, determined by the NTC pin exceeding RTNTC_NBR × VVSYS, which is 95% of the VSYS pin voltage. In No-Battery operation, the charge timer is disabled and the output is regulated to VCV, subject to the output current limit determined by the selected mode and IPRGM pin resistance to GND. The STAT0 output remains asserted to indicate that the charging source is present and STAT1 is released. When returning to normal charging (by reinstalling the battery and thermistor), the timer is reset. The response of the SC824 to an EN_NTC pin voltage above the NTC Cold Fault threshold (but below RTNTC_NBR) or below the low NTC Hot Fault threshold (but above VTNTC_DIS) is the same. Therefore the EN_NTC network can be configured with the battery pack thermistor between EN_NTC and VSYS, and a fixed resistor between EN_NTC and ground, reversing the designation of the hot and cold thresholds. This configuration may be used to disable the charger when the battery pack is removed. For detailed design guidance for ratiometric NTC interfaces, including thermistor selection guidelines, see the Semtech Application Note AN–PM–0801, NTC Thermistor Network Design for Ratiometric Thresholds. Charge Timer The SC824 provides a multi-stage charge timer. Each stage of the charge cycle is timed separately, in compliance with IEEE Std. 1725-2006, Section 7.3.5. The pre-charge stage timer indicates a fault and halts charging if the battery voltage has not exceeded the precharge threshold within 45 minutes after the start of the charge cycle. The pre-charge stage timer is active even if the timer function has been disabled. When the battery voltage exceeds the pre-charge threshold, the timer is reset and begins timing the CC stage. The CC stage timer indicates a fault and halts charging if the battery voltage has not reached VCV within the CC stage fault timer duration (tCCF). The CC stage timer is not active if the timer function has been disabled. An internally programmed CC stage duration of three hours can be selected by connecting RTIME directly to VSYS. Or it can be programmed from two hours to 16 hours by selection of the resistance from the RTIME pin to ground, as shown in the Block Diagram. The broad CC stage timer programming range permits timer-protected charging of large batteries with small charging currents, such as in USB low power mode charging. The value of tCCF is programmed according to Figures 4a and 4b. Each figure shows the nominal tCCF duration versus nominal RRTIME resistance as the center plot and two theoretical limit plots indicating maximum and minimum tCCF duration versus nominal programming resistance. These plots are derived from models of the expected worst-case contribution of error sources that depend on programmed current. The tCCF tolerance range includes the uncertainty due to 1% tolerance resistors. The dots on each plot indicate the currents obtained with EIA E96 standard value 1% tolerance resistors. Figures 4a and 4b show low and high resistance ranges, respectively. When the battery voltage has risen to VCV, the CC timer stage ends, the timer is reset, and the CV timer stage begins. The CV stage timer is set to expire in three hours using a fixed-duration internal timer. Upon termination by current (10% of fast charge current) or expiration of the CV stage timer (whichever occurs first), end-of-charge is indicated by releasing STAT1 and the timer is reset. Note that CV stage time-out is not a fault, but rather is regarded as termination by another means. This alternative termination-by-time behavior ensures termination in the case that the minimum load current exceeds the programmed termination current. Following termination, by current or by timer CV stage time-out, the post-termination top-off timer stage begins. 17 SC824 Applications Information (continued) 5.5 18 5.25 17 5 16 4.75 15 4.5 14 13 4 tCCF (hours) tCCF (hours) 4.25 3.75 3.5 3.25 12 11 10 9 3 8 2.75 2.5 7 2.25 6 2 5 1.75 20 25 30 35 40 45 50 55 60 4 60 70 80 90 RRTIME (kΩ) 100 110 120 130 140 150 160 170 180 190 200 RRTIME (kΩ) Figure 4a — CC Stage Fault Timeout vs. Programming Resistance, Low Resistance Range Figure 4b — CC Stage Fault Timeout vs. Programming Resistance, High Resistance Range Top-off charging maintains the BAT pin voltage at VCV by acting as a voltage regulator until the time-out of the topoff timer. The top-off timer times-out in 45 minutes, at which time the charger is turned off and enters the monitor state. An NTC temperature fault will suspend but will not reset the charge timer, in any timer stage. The timer resumes from its current state when the battery temperature returns to the safe-to-charge range. The charge timer is disabled when the RTIME pin is grounded. In this case, the output is turned off immediately upon current termination and the charger enters the monitor state. Note that the pre-charge stage timer will be active regardless of whether the RTIME pin is grounded, to detect a grossly defective battery or output short to ground. A pre-charge timeout will signal a fault and turn off the charging output. During the CC timer interval, momentarily grounding (at least 300μs) and releasing the RTIME pin will reset the CC mode timer. This feature allows the CC mode timer to be used as a watchdog timer, enabling the host processor to extend the CC interval as long as needed for charging a large battery with a low fast-charge current. While the charger is in the top-off interval and the timer is enabled, the RTIME pin can be grounded momentarily (at least 300μs) to immediately end the charging cycle and place the charger in the monitor state. In this condition, the charge timer remains enabled for operation in a subsequent recharge cycle. See the section Logical State Machine for details of timer stage transitions and sequencing. Status Outputs The STAT0 and STAT1 pins are open-drain status indicating outputs. STAT0 is asserted (driven low) whenever a valid charging source is present at the VIN input pin. A valid charging source has a voltage greater than the UVLO threshold and less than the OVP threshold. STAT1 is asserted as charging begins and is subsequently released upon charge termination (by CV stage timeout or by charge current) to indicate end-of-charge. It is also released when the charger is disabled and in No-Battery mode. If the battery is already fully charged when a charge cycle is initiated, STAT1 is asserted and will remain asserted for approximately 22 seconds before being released. The STAT1 pin is not asserted for automatic recharge cycles. The STAT0 and STAT1 pins may be connected to processor GPIO ports to notify a host controller of the charging status, or they can be used as LED drivers. Both are high voltage inputs, so they can be safely pulled up to the input 18 SC824 Applications Information (continued) supply to power LEDs. The conditions indicated by STAT0 and STAT1 are summarized in Table 2. Table 2 — STATx Pin Truth Table Condition STAT0 STAT1 Power applied (VT UVLO < V VIN < 0 1 VTOVP), prior to charging (asserted) (released) Charging 0 0 (asserted) (asserted) Charging Done, any stage of a 0 1 recharge cycle, or No-Battery (asserted) (released) Mode Charging Fault (Pre-charge or CC 1 0 time-out, NTC temperature fault, (released) (asserted) IPRGM pin short to ground) No valid input supply 1 1 (released) (released) The STAT0 and STAT1 outputs indicate charging faults by asserting STAT1 while releasing STAT0. Charging faults include pre-charge or CC-stage timeout, a battery NTC temperature fault (hot or cold), and the shorting of the IPRGM pin to ground. Charging status is indicated during precharge, CC charging, and CV charging until termination. Top-off charging is not indicated. Upon termination, whether the timer is enabled or disabled, charging status will be indicated for an additional 22 seconds, either while top-off charging with the timer enabled, or while in monitor state with the output off if the timer is disabled. This feature ensures that “charging” will be indicated long enough to be seen, even if the adapter voltage is applied when the battery is already fully charged. It informs the user that a charge cycle was begun and completed normally. Note that the SC824 can terminate charging of a fully charged battery in as little as a millisecond; without this feature the “charging” indication would not be visible. Logical CC-to-CV Transition The SC824 differs from monolithic linear single cell Li-Ion chargers that implement a linear transition from CC to CV regulation. The linear transition method uses two simultaneous feedback signals — output voltage and output current — to the closed-loop controller. When the output voltage is sufficiently below the CV regulation voltage, the influence of the voltage feedback is negligible and the output current is regulated to the desired current. As the battery voltage approaches V CV (nominally 4.2V), the voltage feedback signal begins to influence the control loop, which causes the output current to decrease even though the output voltage has not yet reached VCV. The output voltage limit dominates the controller when the battery reaches VCV, and eventually the controller is entirely in CV regulation. The soft transition effectively reduces the charge current below that which is permitted for a portion of the charge cycle, which increases charge time. The SC824 uses a logical transition from CC to CV to recover the charge current lost due to a soft transition. The controller regulates only current until the output voltage exceeds the transition threshold voltage. It then switches to CV regulation. The transition voltage from CC to CV regulation is typically 7mV higher than the CV regulation voltage, which provides a sharp and clean transition free of chatter between regulation modes. The difference between the transition voltage and the regulation voltage is referred to as the CC/CV overshoot. While in CV regulation, the output current sense remains active. If the output current exceeds the mode-dependent programmed fastcharge current by approximately 5%, the controller reverts to current regulation. The logical transition from CC to CV results in a faster charging cycle that is compliant with the specified current and voltage limits of the Li-Ion cell. The output current is constant at the CC limit, then decreases abruptly when the output voltage steps from the overshoot voltage to the regulation voltage at the transition to CV control. Thermal Limiting Device Thermal Limiting (TL) is the third output constraint of the CC/CV/TL control. This feature permits a higher input OVP threshold in the SC824, and thus the use of higher regulation voltage or poorly regulated adapters. If high input voltage results in excessive power dissipation, the output current is reduced to prevent overheating of the SC824. The thermal limiting controller reduces the output current at the rate of iT ≈ −50mA/ºC for any junction temperature TJ > T TL. 19 SC824 Applications Information (continued) When thermal limiting is inactive, TJ = TA + VΔ IFQ θJA, where TA is the ambient temperature, VΔ is the voltage difference between the VIN pin and the BAT pin, IFQ is the programmed fast charge current, and θJA is the thermal resistance from junction to ambient. However, if TJ computed this way exceeds T TL, then thermal limiting will become active and the thermal limiting junction temperature will be TJTL = TA + VΔ I(TJTL) θJA, where I(TJTL) = IFQ + iT (TJTL − T TL). (Note that iT is a negative quantity.) Combining these two equations and solving for TJTL, the steady state junction temperature during active thermal limiting is TJTL TA V' IFQ iT TTL T JA 1 V' iT T JA . The thermal limiting controller is able to reduce output current to zero. However, this does not happen in practice. Output current is reduced to I(TJTL), reducing power dissipation such that die temperature equilibrium TJTL is reached. While thermal limiting is active, all charger functions remain active and the charger logical state is preserved. See the section Input Over-Voltage Protection for an example of thermal limiting operation. Operating a Charging Adapter in Current Limit In high charging current applications, charger power dissipation can be greatly reduced by operating the charging adapter in current limit. The SC824 supports adaptercurrent-limited charging with a low UVLO falling threshold and with internal circuitry designed for low input voltage operation. To operate an adapter in current limit, RIPRGM is chosen such that the programmed fast-charge current IFQ exceeds the current limit of the charging adapter IAD-LIM. The charging load will pull the adapter output voltage (the VIN pin input voltage) down to the battery voltage plus the charger dropout voltage. Power dissipation in the SC824 will be reduced to the charger dropout voltage multiplied by IAD-LIM. If IAD-LIM is less than 20% of IFQ, then the adapter voltage can be pulled down to the battery voltage while the battery voltage is still below the precharge threshold. In this case, ensure that the adapter will maintain its current limit below 20% of IFQ at least until the battery voltage exceeds the precharge threshold. Failure to do so could permit charge current to exceed the precharge current while the battery voltage is below the precharge threshold. This is because the low input voltage can also compress the precharge threshold internal reference voltage to below the battery voltage. This will prematurely advance the charger logic from precharge current regulation to fast-charge regulation, and the charge current will be permitted, by the charger, to exceed the safe level recommended for pre-charge conditioning. The low UVLO falling threshold (VT UVLO-F) permits the adapter voltage to be pulled down to just above the battery voltage only in adapter mode (MODE pin grounded). In either USB mode, Under-Voltage Load Regulation (UVLR) prevents the input being pulled down by the charging current to below the UVLR limit of VUVLR = 4.51V typically. The SC824 should be operated with the adapter voltage below the rising selection threshold (VTUVLO-R) only if the low input voltage is the result of adapter current limiting. This implies that the VIN pin voltage first exceeds VTUVLO-R to begin charging and is subsequently pulled down by the charging current to just above the battery voltage. Interaction of Thermal Limiting and CLA Charging To permit the charge current to be limited by the adapter, it is necessary that the adapter mode fast-charge current be programmed greater than the maximum adapter current, (IAD-LIM). In this configuration, the CC regulator will operate with its pass device fully on (in saturation, also called “dropout”). The voltage drop from VIN to BAT is determined by the RDS-ON of the internal pass device multiplied by the adapter current. 20 SC824 Applications Information (continued) In dropout, the power dissipation in the SC824 is PILIM = (RDS-ON) x (IAD-LIM)2. Since RDS-ON does not vary with battery voltage, dropout power dissipation is constant throughout the CC portion of the charge cycle while the adapter remains in current limit. The SC824 junction temperature will rise above ambient by PILIM x θJA. If the device temperature rises to the temperature at which the TL control loop limits charging current (rather than the current being limited by the adapter), the input voltage will rise to the adapter regulation voltage. The power dissipation will increase so that the TL regulation will further limit charge current. This will keep the adapter in voltage regulation for the remainder of the charge cycle. In this case, the SC824 will continue to charge with thermal limiting until charge current decreases while in CV regulation (reducing power dissipation sufficiently), resulting in a slow charge cycle, but with no other negative effect. To ensure that the adapter remains in current limit, the internal device temperature must never rise to T TL. This implies that θJA must be kept small enough, through careful layout, to ensure that TJ = TA + (PILIM × θJA) < T TL. Under-Voltage Load Regulation in USB Modes The VIN pin UVLR feature, enabled in either USB mode, prevents the battery charging current from overloading the USB Vbus network, regardless of the programmed fast charge value (IFQ_USB). When either USB High Power or USB Low Power mode is selected, the SC824 monitors the input voltage (VVIN) and reduces the charge current by the amount necessary to keep V VIN no lower than the UVLR limit (VUVLR). UVLR is active only when one of the USB modes is selected. UVLR ensures the integrity of the USB Vbus supply for all devices sharing a host or hub supply. In either USB mode, the UVLR feature will reduce the charging current to zero if VVIN is externally pulled below VUVLR. This condition will not be interpreted as termination and will not result in an end-of-charge indication. The STAT1 pin will remain asserted as if charging is continuing. This behavior prevents repetitive indications of end-ofcharge alternating with start-of-charge in the case that the external VIN load is removed or is intermittent. STAT0 remains asserted until the input voltage is less than VTUVLO-F. USB High Power and Low Power Support The USB specification restricts the load on the USB Vbus power network to 100mA for low power devices and for high power devices prior to granting permission for high power operation. The USB specification restricts the Vbus load to 500mA for high power devices after granting permission to operate as a high power device. A fixed 1:5 ratio of low power to high power charging current is desirable for charging batteries with maximum fast charge current of at least 500mA. For this application, the SC824 provides fixed 1:5 current ratio low-to-high power mode support via the tri-level MODE input pin. For batteries with maximum fast charge current less than 500mA, a fixed 1:5 low/high power charge current ratio will result in suboptimal charging in USB low power mode. For example, a 300mAh battery will typically require a fast-charge current of 300mA or less. A fixed 1:5 ratio for USB low-to-high power charging current will unnecessarily reduce charging current to 60mA, well below the 100mA permitted. In this case, it may be preferable to program USB low-power fast-charge current by switching an external programming resistor. See the section Design Considerations — Small Battery. Input Over-Voltage Protection The VIN pin is protected from over-voltage to at least 30V above GND. When the input voltage exceeds the OverVoltage Protection rising threshold (VTOVP-R), charging is halted. Charging resumes when the input voltage falls below the OVP falling threshold. OVP turns off the STAT0 and STAT1 outputs. All modes use the same input OVP threshold, which has been set relatively high to permit the use of poorly regulated adapters. Such adapters may output a high voltage until loaded by the charger. A too-low OVP threshold could prevent the charger from ever turning on and loading the adapter to a lower voltage. If the adapter voltage remains high despite the charging load, the fast thermal limiting feature will immediately reduce the charging current to prevent overheating of the charger. This behavior is illustrated in Figure 5, in which VBAT = 3.0V, IFQ = 700mA, and VVIN is stepped from 0V to 8.1V. Initially, power dissipation in the SC824 is 3.6W. 21 SC824 Applications Information (continued) VVIN=8.1V, VBAT=3.0V IBAT=700mA (Initially), PDISSIPATION=3.6W (Initially) VIPRGM (1V/div) IBAT (100mA/div) VIPRGM=0V— IBAT (500mA/div) VVIN (2V/div) IBAT=0mA— VVIN (5V/div) VBAT (2V/div) VVIN =0V— VVIN ,VBAT=0V— IBAT=0mA— 400μs/div 1s/div Figure 5 — Thermal Limiting Example Note that the BAT output current is rapidly reduced to limit the internal die temperature. It then continues to decline as the circuit board temperature gradually rises, further reducing the conduction of heat from the die to the ambient environment. The fast thermal limiting feature ensures compliance with CCSA YD/T 1591-2006, Telecommunication Industrial Standard of the People’s Republic of China — Technical Requirements and Test M e t h o d o f C h a rg e r a n d I n t e r fa ce f o r M o b i l e Telecommunication Terminal, Section 4.2.3.1. Short Circuit Protection The SC824 can tolerate a BAT pin short circuit to ground indefinitely. The current into a ground short (while VBAT < 1.8V) is approximately 10mA. For VBAT > 1.8V, normal pre-charge current regulation is active. A short circuit or too little programming resistance to ground on the IPRGM pin (<< 2kΩ) will prevent proper regulation of the BAT pin output current. Prior to enabling the output a check of the IPRGM pin is performed to ensure that there is sufficient resistance to ground. A test current is output on the IPRGM pin. If the test current produces a voltage of sufficient amplitude, then the output is enabled. An example with RIPRGM = 2.94kΩ is illustrated in Figure 6, in which the test current is applied for approximately 250μs to determine that there is no pin short. If a short is detected, the test current persists until the short to ground is removed, and then the charging startup sequence will continue. Figure 6 — IPRGM Pin Short-to-Ground Test During Startup A short to ground applied to the IPRGM pin while charging will also be detected, by a different mechanism. IPRGM pin short-to-ground detection on the IPRGM pin forces the SC824 into reset, turning off the output and clearing the logical state, including the timer. A short-to-ground on the IPRGM pin will halt charging and prevent startup regardless of the mode selected. It is indicated as a fault condition on the STATx pins. When the IPRGM ground short is removed, the charger begins normal operation automatically without input power cycling. Over-Current Protection Over-current protection is provided in all modes of operation, including CV regulation. The output current is limited to the programmed pre-charge current limit value when the battery voltage is below the pre-charge threshold and the fast-charge current limit value otherwise. Logical State Machine The SC824 logical behavior described in the preceding sections is derived from two distinct state machines, as illustrated in the following diagrams. The charger state machine permits transitions to most states from most other states, as shown. The multi-stage timer state machine enforces a unidirectional flow. Once the timer has advanced from one stage to the next, there is no return to the previous stage except by a re-charge cycle, a reset (by disabling and re-enabling the SC824), or by cycling the input power off and on. 22 SC824 Applications Information (continued) — Charger Logical State Machine UVLO or POR or (VIN < VOUT + δ) or NTC_Disable (asynchronously) Constant Current Regulation I BAT = 20 % of IFQ From Any State CHARGE or NO_BATTERY States: BAT output CC/CV regulator operation Pre-Charge DISABLE IPRGM Dynamic Pinshort Detection From Any State Except DISABLE & STATIC_ PINSHORT NTC_NoBatt V BAT < VPreQ CC Regulation Initiate Soft-Start Clear and Hold Timer STAT1 turned off ~(UVLO or POR or (VIN < VOUT + δ) or NTC_Disable) Constant Current Regulation IBAT = IFQ NO BATTERY Output off Indicate FAULT on STAT pins Initiate Soft-Start Suspend the Timer clock & resume upon return to CHARGE IPRGM STATIC PINSHORT CHECK Signal to Charger State Machine VBAT > VPreQ I BAT > IFQ Signal to Charger State Machine VBAT > VCV NTC_ NoBatt CV Regulation Constant Voltage Regulation V BAT = VCV NTC FAULT NTC Hot or Cold ~IPRGM Static Pinshort Detected NTC OK-to- Charge IPRGM Static Pinshort Detected Timer Running (if Enabled ) STAT1 turned on Initiate Soft-Start Start Timer (if Enabled ) STAT1 turned on. START CHARGE NTC OK-to-Charge Timer Fault MONITOR Timer Fault Signal, from Timer State Machine Immediate V BAT < VReQ RECHARGE CHARGE TIMER FAULT Initiate Soft-Start Start Timer (if Enabled ) STAT1 remains off. VBAT > VReQ (Timer Disabled AND(I BAT < I TERM)) OR (Timer Enabled AND Top-Off Timer Expired) Signals to and from Charger State Machine Transition Comments KEY: Logical State State Exit Path State Comments State Transition Condition State Entry Path Logical State 23 SC824 Applications Information (continued) — Multi-stage Timer Logical State Machine TIMER START Immediate & Unconditional Clear the timer counter Timer Enabled PRECHARGE TIMER Clear the timer counter Signal from Charger State Machine VBAT > VPreQ t > tPreQF Timer Disabled TIMER HOLD TimerFault Signal to Charger State Machine CC TIMER (t > tCCF ) OR (( t > ¼tCCF ) AND (V BAT < VPreQ )) Clear the timer counter Timer clock stopped Timer Enabled AND (V BAT > VCV) Signal from Charger State Machine Timer Disabled Timer Disabled AND (I BAT < ITERM) AND (VBAT = V CV) CV TIMER (t > t PreQF ) AND (VBAT < VPreQ ) Clear the timer counter Timer Enabled AND ((t > tCV) OR ( IBAT < I TERM)) STATUS DELAY TIMER Clear the timer counter Spawned timer, can run simultaneously with TOP-OFF TIMER t > tSD Signals to and from Charger State Machine TOP-OFF TIMER KEY: State Transition Condition Timer Disabled OR ( t > tTO ) State Exit Path Turn off STAT1 TIMER HALT Logical State Transition Comments State Entry Path Logical State State Comments 24 SC824 Applications Information (continued) Operation Without a Battery Design Considerations — Large Battery The SC824 can be operated as a 4.2V LDO regulator without the battery present, for example, for factory testing. If this use is required, the total output capacitance, CBAT plus any other capacitors tied directly to BAT pin network, should be at least 2.2μF but less than 22μF to ensure stability in CV regulation. To operate the charger without a battery, the NTC pin should be pulled up to the VSYS voltage to select No-Battery mode. This can be accomplished automatically when a battery is absent if the recommended NTC network is used. See the section EN_NTC Interface for details. A battery with a desired fast-charge current exceeding 500mA is most compatible with the USB fixed 1:5 current ratio low-to-high power model of operation. For example, consider an 800mAhr battery, with maximum fast-charge current of 800mA. The adapter input fast-charge should be configured for 800mA max (RIPRGM = 2.78kΩ equivalent is required). Select RIPRGM = 4.53kΩ to set USB high power fast-charge to 450mA, and the USB low power fast-charge set to 450/5 = 90mA. The MODE pin tri-level logical input can be used to select between USB high power and USB low power modes whenever a fixed 5:1 current ratio is desired. For adapter mode charging, set the MODE pin high for USB high power mode if UVLR is desired, or low for adapter mode if current limited adapter capability is desired. Then switch in a parallel 7.15kΩ IPRGM resistor, as shown in Figure 7, for an equivalent 2.77kΩ IPRGM resistance. This will program the desired 800mA max adapter mode fast charge current. Capacitor Selection Low cost, low ESR ceramic capacitors such as the X5R and X7R dielectric material types are recommended. The BAT pin capacitor should be at least 1μF, but can be as large as desired to accommodate the required input capacitors of regulators connected directly to the battery terminal. BAT pin total capacitance must be limited if the SC824 is to be operated without the battery present. See the section Operation Without a Battery. The VIN pin capacitor is typically between 0.1μF and 2.2μF, although larger values will not degrade performance. The VSYS pin capacitor must be at least 1μF. Capacitance must be rated at the expected bias voltage (4.2V for the BAT pin capacitor, 4.6V for the VSYS pin capacitor, the expected VVIN supply regulation voltage for the VIN pin capacitor), rather than the zero-volt capacitance rating. PCB Layout Considerations Layout for linear devices is not as critical as for a switching regulator. However, careful attention to detail will ensure reliable operation. • • • Place input and output capacitors close to the device for optimal transient response and device behavior. Connect all ground connections directly to the ground plane. If there is no ground plane, connect to a common local ground point before connecting to board ground near the GND pin. Attaching the device to a larger copper footprint will enable better heat transfer from the device on PCBs with internal ground and power planes. IPRGM 8 RIPRGM_HI Hi/Lo Current Select RIPRGM Figure 7 — External Programming of Arbitrary USB High Power and Low Power Charge Currents Design Considerations — Small Battery A battery with a desired fast-charge current less than 500mA will not be charged in the minimum charge time when in USB low power mode with a 1:5 low-to-high power mode current ratio. A 300mAhr battery can be used as an example with maximum fast-charge current of 300mA. In this example, the adapter input and USB input high power fast-charge currents should both be set to 300mA. In this case, the fixed USB low-to-high power charging current ratio of 1:5 would provide a USB low power mode fast charge current of 60mA. For this example, setting the USB low power fast-charge current to 90mA would provide a shorter charge time without violating USB Vbus current requirements. An arbitrary ratio of USB low-to-high power charging currents can be obtained using an external n-channel FET operated with a processor GPIO signal to engage a second 25 SC824 Applications Information (continued) parallel IPRGM resistor, while selecting high power mode (MODE pin driven high) for both low or high power USB charging. The external circuit is similar to that illustrated in Figure 7. For USB low power mode charging, the external transistor is turned off. For adapter mode or USB high power mode, the external transistor is turned on. The effect of the switched parallel IPRGM resistor is to reduce the effective programming resistance and thus raise the fast-charge current. A 300mAhr battery with maximum fast-charge current of 300mA is an example. The adapter mode and USB high power mode fast-charge currents should both be set to 300mA max. The USB input low power fast-charge current is 100mA max. Refer to the circuit in Figure 7 and the data of Figures 1a and 1b. For IFQ = 300mA max, RIPRGM = 7.50kΩ is desired. A fixed IPRGM resistor of RIPRGM = 23.2kΩ programs IFQ = 100mA max for USB low power charging. When parallel resistor RIPRGM_HI = 11.0kΩ is switched in, the equivalent IPRGM resistor is 7.50kΩ, for IFQ = 300mA max. USB Low Power Mode Alternative Where a USB mode selection signal is not available, or for a low capacity battery where system cost or board space make USB low power mode external current programming impractical, USB low power charging can be supported indirectly. The IPRGM pin resistance can be selected to obtain the desired USB high power charge current. Then, with the MODE pin always configured for USB high power mode, the UVLR feature will ensure that the charging load on the VIN pin will never pull the USB Vbus supply voltage below VUVLR regardless of the host or hub supply limit. The UVLR limit voltage guarantees that the voltage of the USB Vbus supply will not be loaded below the low power voltage specification limit, as seen by any other low power devices connected to the same USB host or hub. Under-voltage load regulation can also be beneficial for charging small batteries. Instead of switching the programming resistor depending on the USB mode, UVLR (while selecting USB high power mode) can permit charging at whatever charge current a USB hub low-power supply can provide without compromising the integrity of the hub power supply for other devices. USB Dedicated Charger Compatibility The SC824 is especially well suited to the USB Charging Specification, Revision 1.0, Dedicated Charger, Sections 3.5 and 4.1. Important features that support compliance include low quiescent current when disabled (less than 1.5mA), and selectable current limited supply charging behavior. The USB Dedicated Charger is required to limit its output current to more than 0.5A and less than 1.5A. A dedicated charger identifies itself by shorting together the USB D+ and D- lines. Once the dedicated charger is detected, the SC824, with its 1A max programmed fast charge current in any mode, permits the fast-charge current to be set higher than the 500mA USB High Power Mode limit to permit faster charging of a large battery. (See the section Design Considerations — Large Battery.) Regardless of the SC824 programmed current, any specification compliant USB Dedicated Charger will either supply more than the programmed fast charge current (and so will regulate to its specified output voltage), or will limit its output current such that its output voltage will be pulled down. The USB Dedicated Charger is required to maintain its current limit down to 2V. By selecting Adapter Mode, the SC824 input will be pulled down to the battery voltage plus charging path dropout. This behavior is recognized in the USB Battery Charging Specification, Section 3.5, as an accepted means to reduce power dissipation in the device while charging at high current. If there are additional system circuits requiring that the USB Vbus node voltage be maintained above the USB Low Power Mode minimum voltage specification (4.4V), the SC824 USB High Power Mode should be selected. This mode enables Under-Voltage Load Regulation, which will regulate the charging output current, if necessary, to match the Dedicated Charger current limit while maintaining VUVLR (nominally 4.51V) at the VIN pin. Either of these SC824 charging modes will ensure reliable charging at any programmed charge current, using any USB Battery Charging Specification compliant Dedicated Charger, regardless of its current limit. 26 SC824 Applications Information (continued) DBYPASS Opt. QISO RISO_PD VADAPTER VIN VSYS MODE SELECT CPU GPIO 1μF 2.2μF RRTIME Device Load RNPU SC824 EN_NTC BAT MODE IPRGM RTIME STAT0 GND STAT1 RIPRGM 2.2μF RNTC Thermistor Battery Pack Figure 8 — Battery Isolation and Power Path Bypass − Powering the Load Directly From the Charging Adapter External Power Path Management Some applications require that the battery be isolated from the load while charging. Figure 8 illustrates a typical charger bypass circuit. This circuit powers the load directly from the charging source via the Schottky diode DBYPASS. When the charging source is present, the p-channel MOSFET battery isolation switch Q ISO source-to-gate voltage VSG is equal to minus the DBYPASS forward-biased voltage drop, ensuring that the switch QISO is off (open). When the charging source is removed, the MOSFET gate is pulled down to ground by RISO_PD, closing the battery isolation switch and connecting the battery to the load. When the charging source is removed, the turn-on of QISO could be delayed due to its gate capacitance. If so, the substrate PN diode of QISO will become forward biased, holding the load voltage to within 0.7V of the battery voltage until VSG > V TH, turning on QISO. This momentary voltage drop can be mitigated by the use of an optional Schottky diode in parallel with QISO, as shown. With the load isolated from the battery, the charging adapter must supply both the load current and the charging current. If the sum of these should ever exceed the current capacity of the adapter, VADAPTER will be pulled down. Selection of either of the SC824 USB modes will enable Under-Voltage Load Regulation. UVLR will reduce the charge current if needed to ensure that VADAPTER will remain at or above VUVLR, maintaining the load supply voltage To better understand the trade-offs between charger bypass and direct connection of the load to the battery, see the Semtech Application Note AN–PM–0802, Tradeoffs Between Direct Battery Connection vs. Bypassing the Charger. 27 SC824 Outline Drawing — MLPD-UT10 2x2 B D A DIMENSIONS INCHES MILLIMETERS DIM MIN NOM MAX MIN NOM MAX E PIN 1 INDICATOR (LASER MARK) A aaa C A2 A1 1 E/2 SEATING PLANE C D1 2 A A1 A2 b D D1 E E1 e L N aaa bbb .024 .002 (.006) .006 .008 .010 .075 .079 .083 .053 .057 .061 .075 .079 .083 .031 .035 .039 .016 BSC .010 .012 .014 10 .003 .004 .020 .000 0.50 0.00 - - 0.60 0.05 (0.152) 0.15 0.20 0.25 1.90 2.00 2.10 1.35 1.45 1.55 1.90 2.00 2.10 0.80 0.90 1.00 0.40 BSC 0.25 0.30 0.35 10 0.08 0.10 LxN E1 N bxN e bbb C A B D/2 NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. 28 SC824 Land Pattern — MLPD-UT10 2x2 H R DIM (C) K G Y X Z C G H K P R X Y Z DIMENSIONS INCHES MILLIMETERS (.079) .051 .057 .035 .016 .004 .008 .028 .106 (2.00) 1.30 1.45 0.90 0.40 0.10 0.20 0.70 2.70 P NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. 3. THERMAL VIAS IN THE LAND PATTERN OF THE EXPOSED PAD SHALL BE CONNECTED TO A SYSTEM GROUND PLANE. FAILURE TO DO SO MAY COMPROMISE THE THERMAL AND/OR FUNCTIONAL PERFORMANCE OF THE DEVICE. Contact Information Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805) 498-2111 Fax: (805) 498-3804 www.semtech.com 29