Revised March 2000 DM74LS645 Octal Bus Transceiver General Description Features These octal bus transceivers are designed for asynchronous two-way communication between data buses. The devices transmit data from the A bus to the B bus or from the B bus to the A bus depending upon the level at the direction control (DIR) input. The enable input (G) can be used to disable the device so that the buses are effectively isolated. ■ Bi-directional bus transceivers in high-density 20-pin packages ■ Hysteresis at bus inputs improves noise margins ■ 3-STATE outputs Ordering Code: Order Number Package Number Package Description DM74LS645WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide DM74LS645N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table Control Inputs G DM74LS645 DIR L L B data to A bus L H A data to B bus H X Isolation H = HIGH Level L = LOW Level X = Irrelevant © 2000 Fairchild Semiconductor Corporation DS009056 www.fairchildsemi.com DM74LS645 Octal Bus Transceiver August 1986 DM74LS645 Absolute Maximum Ratings(Note 1) Supply Voltage Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. 7V Input Voltage 7V 0°C to +70°C Operating Free Air Temperature Range −55°C to +150°C Storage Temperature Range Recommended Operating Conditions Symbol Parameter Min Nom Max Units 4.75 5 5.25 V LOW Level Input Voltage 0.6 V IOH HIGH Level Output Current −15 mA IOL LOW Level Output Current 24 mA TA Free Air Operating Temperature 70 °C VCC Supply Voltage (Note 2) VIH HIGH Level Input Voltage VIL 2 V 0 Note 2: Voltage values are with respect to the network ground terminal. Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions (Note 3) VI Input Clamp Voltage VCC = Min, II = 18 mA HYS Hysteresis (VT+ − V −) VCC = Min Min Typ (Note 4) Max −1.5 0.2 0.4 2.4 3.4 Units V V A or B Input VOH VOL IOZH IOZL II HIGH Level Output Voltage LOW Level Output Voltage VCC = Min, VIH = 2V, IOH = −3 mA VIL = Max IOH = Max V 2 VCC = Min, VIH = 2V, IOL = 12 mA 0.25 0.4 VIL = Max IOL = 24 mA 0.35 0.5 Off-State Output Current, VCC = Max, G at 2V, HIGH Level Voltage Applied VO = 2.7V Off-State Output Current, VCC = Max, G at 2V LOW Level Voltage Applied VO = 0.4V Input Current at VCC = Max Maximum Input Voltage V 20 µA −400 µA A or B VI = 5.5V 0.1 DIR or G VI = 7V 0.1 mA IIH HIGH Level Input Current VCC = Max, VIH = 2.7 20 µA IIL LOW Level Input Current VCC = Max, VIL = 0.4V −0.4 mA IOS Short Circuit Output Current (Note 5) VCC = Max −225 mA ICC Total Supply Outputs HIGH VCC = Max, 48 70 Current Outputs LOW Outputs Open 62 90 64 95 −40 Outputs at Hi-Z Note 3: For conditions shown as Min or Max, use the appropriate value specified under Recommended Operating Conditions. Note 4: All typicals are at VCC = 5V, TA = 25°C. Note 5: Not more than one output should be shorted at a time, and the duration should not exceed one second. www.fairchildsemi.com 2 mA at VCC = 5V and TA = 25°C RL = 667Ω From (Input) Symbol Parameter CL = 45 pF To (Output) Min tPLH Propagation Delay Time LOW-to-HIGH Level Output tPHL Propagation Delay Time HIGH-to-LOW Level Output tPLH Propagation Delay Time LOW-to-HIGH Level Output tPHL Propagation Delay Time HIGH-to-LOW Level Output tPZL Output Enable Time to LOW Level tPZH Output Enable Time to HIGH Level tPZL Output Enable Time to LOW Level tPZH Output Enable Time to HIGH Level tPLZ Output Disable Time to LOW Level tPHZ Output Disable Time to HIGH Level tPLZ Output Disable Time to LOW Level tPHZ Output Disable Time to HIGH Level Max CL = 5 pF Min Units Max A to B 15 ns A to B 15 ns B to A 15 ns B to A 15 ns G to A 40 ns G to A 40 ns G to B 40 ns G to B 40 ns G to A 25 ns G to A 25 ns G to B 25 ns G to B 25 ns 3 www.fairchildsemi.com DM74LS645 Switching Characteristics DM74LS645 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B www.fairchildsemi.com 4 DM74LS645 Octal Bus Transceiver Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 5 www.fairchildsemi.com