FAIRCHILD 74LS75

Revised March 2000
DM74LS75
Quad Latch
General Description
These latches are ideally suited for use as temporary storage for binary information between processing units and
input/output or indicator units. Information present at a data
(D) input is transferred to the Q output when the enable is
HIGH, and the Q output will follow the data input as long as
the enable remains HIGH. When the enable goes LOW, the
information (that was present at the data input at the time
the transition occurred) is retained at the Q output until the
enable is permitted to go HIGH.
These latches feature complementary Q and Q outputs
from a 4-bit latch, and are available in 16-pin packages.
Ordering Code:
Order Number
Package Number
Package Description
DM74LS75M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
DM74LS75N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagram
(Each Latch)
Function Table
(Each Latch)
Inputs
Outputs
D
Enable
Q
Q
L
H
L
H
H
H
H
L
X
L
Q0
Q0
H = HIGH Level
L = LOW Level
X = Don't Care
Q0 = The Level of Q Before the HIGH-to-LOW Transition of ENABLE
© 2000 Fairchild Semiconductor Corporation
DS006374
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DM74LS75 Quad Latch
August 1986
DM74LS75
Absolute Maximum Ratings(Note 1)
Supply Voltage
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
7V
Input Voltage
7V
0°C to +70°C
Operating Free Air Temperature Range
−65°C to +150°C
Storage Temperature Range
Recommended Operating Conditions
Symbol
Parameter
Min
Nom
Max
4.75
5
5.25
Units
VCC
Supply Voltage
VIH
HIGH Level Input Voltage
V
VIL
LOW Level Input Voltage
0.8
V
IOH
HIGH Level Output Current
−0.4
mA
8
mA
2
V
IOL
LOW Level Output Current
tW
Enable Pulse Width (Note 5)
20
ns
tSU
Setup Time (Note 5)
20
ns
tH
Hold Time (Note 5)
0
TA
Free Air Operating Temperature
0
ns
°C
70
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
VI
Input Clamp Voltage
VCC = Min, II = −18 mA
VOH
HIGH Level
VCC = Min, IOH = Max
VOL
Output Voltage
VIL = Max, VIH = Min
LOW Level
VCC = Min, IOL = Max
Output Voltage
Min
2.7
VIL = Max, VIH = Min
IOL = 4 mA, VCC = Min
II
Input Current @ Max
VCC = Max, VI = 7V
Input Voltage
IIH
HIGH Level Input
VCC = Max, VI = 2.7V
Current
IIL
LOW Level Input
VCC = Max, VI = 0.4V
Current
IOS
Short Circuit Output Current
VCC = Max (Note 2)
ICC
Supply Current
VCC = Max (Note 3)
V
V
0.5
0.25
0.4
0.1
Enable
0.4
D
20
Enable
80
D
−0.4
Enable
−1.6
Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second.
2
−1.5
0.35
6.3
Note 4: ICC is measured with all outputs open and all inputs grounded.
Units
3.5
−20
Note 5: TA = 25°C and V CC = 5V.
Max
D
Note 2: All typicals are at VCC = 5V, TA = 25°C.
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Typ
(Note 2)
V
mA
µA
mA
−100
mA
12
mA
at VCC = 5V and TA = 25°C
RL = 2 kΩ
From (Input)
Symbol
Parameter
CL = 15 pF
To (Output)
Min
tPLH
Propagation Delay Time
LOW-to-HIGH Level Output
tPHL
Propagation Delay Time
HIGH-to-LOW Level Output
tPLH
Propagation Delay Time
LOW-to-HIGH Level Output
tPHL
Propagation Delay Time
HIGH-to-LOW Level Output
tPLH
Propagation Delay Time
LOW-to-HIGH Level Output
tPHL
Propagation Delay Time
HIGH-to-LOW Level Output
tPLH
Propagation Delay Time
LOW-to-HIGH Level Output
tPHL
Propagation Delay Time
HIGH-to-LOW Level Output
Max
CL = 50 pF
Min
Units
Max
D to Q
27
30
ns
D to Q
17
25
ns
D to Q
20
25
ns
D to Q
15
20
ns
Enable to Q
27
30
ns
Enable to Q
25
30
ns
Enable to Q
30
30
ns
Enable to Q
15
20
ns
3
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DM74LS75
Switching Characteristics
DM74LS75
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A
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4
DM74LS75 Quad Latch
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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5
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