MOTOROLA MC74F164

MC54/74F164
8-BIT SERIAL-IN, PARALLEL-OUT
SHIFT REGISTER
The MC54/74F164 is a high-speed 8-bit serial-in/parallel-out shift register.
Serial data is entered through a 2-input AND gate synchronous with the
LOW-to-HIGH transition of the clock. The device features an asynchronous
Master Reset which clears the register, setting all outputs LOW independent
of the clock.
•
•
•
•
8-BIT SERIAL-IN, PARALLEL-OUT
SHIFT REGISTER
FAST SHOTTKY TTL
Typical Shift Frequency of 90 MHz
Asynchronous Master Reset
Gated Serial Data Input
Fully Synchronous Data Transfers
J SUFFIX
CERAMIC
CASE 632-08
14
1
CONNECTION DIAGRAM
VCC
Q7
Q6
Q5
Q4
MR
CP
14
13
12
11
10
9
8
N SUFFIX
PLASTIC
CASE 646-06
14
1
1
2
3
4
5
6
7
A
B
Q0
Q1
Q2
Q3
GND
D SUFFIX
SOIC
CASE 751A-02
14
1
ORDERING INFORMATION
MC54FXXXJ
MC74FXXXN
MC74FXXXD
MODE SELECT TABLE
Inputs
Operating Mode
Ceramic
Plastic
SOIC
Outputs
MR
A
B
Q0
Q1 –Q7
Reset (Clear)
L
X
X
L
L–L
Shift
H
l
l
L
q0–q6
H
l
h
L
q0–q6
H
h
l
L
q0–q6
H
h
h
H
q0–q6
H(h) = HIGH Voltage Levels
L(l) = LOW Voltage Levels
X = Don’t Care
qn = Lower case letters indicate the state of the referenced input or output one setup time prior to
the LOW-to-HIGH clock transition.
FAST AND LS TTL DATA
4-79
LOGIC SYMBOL
1
2
8
A
B
CP
MR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
9 3 4 5 6 10 11 12 13
VCC = PIN 14
GND = PIN 7
MC54/74F164
LOGIC DIAGRAM
A
B
D
D
Q
CD
D
Q
CD
D
Q
CD
D
Q
CD
D
Q
CD
D
Q
CD
D
Q
CD
Q
CD
CP
MR
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
FUNCTIONAL DESCRIPTION
Each LOW-to-HIGH transition on the Clock (CP) input
shifts data one place to the right and enters into Q0 the logical
AND of the two data inputs (A • B) that existed before the rising
clock edge. A LOW level on the Master Reset (MR) input overrides all other inputs and clears the register asynchronously,
forcing all Q outputs LOW.
The F164 is an edge-triggered 8-bit shift register with serial data entry and an output from each of the eight stages.
Data is entered serially through one of two inputs (A or B); either of these inputs can be used as an active HIGH Enable
for data entry through the other input. An unused input must
be tied HIGH.
GUARANTEED OPERATING RANGES
Symbol
Parameter
VCC
Supply Voltage
TA
Operating Ambient Temperature Range
Min
Typ
Max
Unit
54, 74
4.5
5.0
5.5
V
54
–55
25
125
°C
74
0
25
70
IOH
Output Current  High
54, 74
–1.0
mA
IOL
Output Current  Low
54, 74
20
mA
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol
Parameter
Min
Typ
Max
VIH
Input HIGH Voltage
2.0
VIL
Input LOW Voltage
VIK
Input Clamp Diode Voltage
VOH
Output HIGH Voltage
VOL
Output LOW Voltage
0.5
IIH
Input HIGH Current
54, 74
2.5
74
2.7
IIL
Input LOW Current
IOS
Output Short Circuit Current (Note 2)
ICC
Power Supply Current
–60
35
Unit
Test Conditions
V
Guaranteed Input HIGH Voltage
0.8
V
Guaranteed Input LOW Voltage
–1.2
V
VCC = MIN, IIN = –18 mA
V
IOH = –1.0 mA
VCC = MIN
V
IOH = –1.0 mA
VCC = 4.75 V
V
IOL = 20 mA
VCC = MIN
20
µA
VCC = MAX, VIN = 2.7 V
0.1
mA
VCC = MAX, VIN = 7.0 V
–0.6
mA
VCC = MAX, VIN = 0.5 V
–150
mA
VCC = MAX, VOUT = 0 V
55
mA
A, B = GND, VCC = MAX
CP = HIGH, MR = GND
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable device type.
2. Not more than one output should be shorted at a time, nor for more than 1 second.
FAST AND LS TTL DATA
4-80
MC54/74F164
AC CHARACTERISTICS
Symbol
Parameter
54/74F
54F
74F
TA = + 25°C
VCC = + 5.0 V
CL = 50 pF
TA = –55°C to +125°C
VCC = 5.0 V ± 10%
CL = 50 pF
TA = 0°C to + 70°C
VCC = 5.0 V ± 10%
CL = 50 pF
Min
Typ
Max
Min
Max
70
Min
Max
fmax
Maximum Clock Frequency
80
90
80
tPLH
Propagation Delay
3.0
6.0
8.0
3.0
11
3.0
9.0
tPHL
CP to Qn
5.0
7.5
10
5.0
13
5.0
11
tPHL
Propagation Delay
MR to Qn
5.5
10.5
13
5.5
16
5.5
14
Unit
MHz
ns
ns
AC OPERATING REQUIREMENTS
Symbol
Parameter
54/74F
54F
74F
TA = + 25°C
VCC = + 5.0 V
TA = –55°C to +125°C
VCC = 5.0 V ± 10%
TA = 0°C to + 70°C
VCC = + 5.0 V ± 10%
Min
Typ
Max
Min
Max
Min
ts(H)
Setup Time, HIGH or LOW
7.0
7.0
7.0
ts(L)
Dn to CP
7.0
7.0
7.0
th(H)
Hold Time, HIGH or LOW
1.0
1.0
1.0
th(L)
Dn to CP
1.0
1.0
1.0
tw(H)
CP Pulse Width, HIGH or LOW
4.0
4.0
4.0
7.0
7.0
7.0
tw(L)
Max
Unit
ns
ns
tw(L)
MR Pulse Width, LOW
7.0
7.0
7.0
ns
trec
Recovery Time, MR to CP
7.0
7.0
7.0
ns
FAST AND LS TTL DATA
4-81