September 2003 ASM3P2183A rev 1.0 EMI Reduction IC Features FCC approved method of EMI attenuation. Provides up to 15dB EMI reduction. Generates a 1X low EMI spread spectrum clock of the input frequency. Input frequency range: 6MHz to 103MHz. Internal loop filter minimizes external components and board space. Selectable spread options: Down and Center Spread signals. The ASM3P2183A allows significant system cost savings by reducing the number of circuit board layers ferrite beads, shielding and other passive components that are traditionally required to pass EMI regulations. The ASM3P2183A uses the most efficient and optimized in order to “spread” the bandwidth of a synthesized clock, Low power CMOS design. Supports notebook VGA and other LCD timing controller applications. Products are available for industrial temperature range. and more importantly, decreases the peak amplitudes of its harmonics. This results in significantly lower system EMI compared to the typical narrow band signal produced by oscillators and most frequency generators. Lowering EMI by increasing a signal’s bandwidth is called ‘spread Available in 8-pin SOIC and TSSOP. spectrum clock generation’. Product Description is down stream clock and data dependent The ASM3P2183A modulates the output of a single PLL 3.3V operating voltage range. ASM3P2183 of EMI of implemented in a proprietary all digital method. -1.25% or ± 0.42% Low inherent cycle-to-cycle jitter. The (EMI) at the clock source, allowing system wide reduction modulation profile approved by the FCC and is 2 spread frequency deviation selections: o The ASM3P2183A reduces electromagnetic interference Applications a versatile spread spectrum frequency modulators designed specifically for a wide The ASM3P2183A is targeted towards EMI management range of input clock frequencies from 6MHz to 103MHz. for memory and LVDS interfaces in mobile graphic (Refer Input Frequency and Modulation Rate Table). The chipsets and high-speed digital applications such as PC ASM3P2183A can generate an EMI reduced clock from peripheral devices, consumer electronics, and embedded an OSC or a system generated clock. The ASM3P2183A controller systems. offers a Down Spread clock with a percentage deviation of -1.25% and a Center Spread clock with a percentage deviation of ± 0.42%. Alliance Semiconductor 2575, Augustine Drive • Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com Notice: The information in this document is subject to change without notice. September 2003 ASM3P2183A rev 1.0 Block Diagram FS0 VDD SS% FS1 PLL Modulation XIN Crystal Oscillator XOUT Frequency Divider Phase Detector Feedback Divider Loop Filter VCO Output Divider ModOUT VSS Pin Configuration XIN 1 8 FS1 XOUT 2 7 FS0 GND 3 6 VDD SS% 4 5 ModOUT ASM3P2183A LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 2 of 9 September 2003 ASM3P2183A rev 1.0 Pin Description Pin# Pin Name Type Description 1 XIN I 2 XOUT I 3 GND P Ground to entire chip. 4 SS% I Spread range select. Digital logic input used to select frequency deviation (Refer Spread Deviation Selection Table). This pin has an internal pull-up resistor. 5 ModOUT O Spread spectrum low EMI output. 6 VDD P Power supply for the entire chip (3.3V). 7 FS0 I 8 FS1 I Crystal connection or external frequency input. This pin has dual functions. It can be connected to either an external crystal or an external reference clock. Crystal connection. Input connection for an external crystal. If using an external reference, this pin must be left unconnected. Frequency range select. Digital logic input used to select frequency range (Refer Input Frequency and Modulation Rate Table). This pin has an internal pull-up resistor. Frequency range select. Digital logic input used to select frequency range (Refer Input Frequency and Modulation Rate Table). This pin has an internal pull-up resistor. Input Frequency and Modulation Rate Table FS1 (pin 8) FS0 (pin 7) Frequency Range 0 0 6 MHz to 13 MHz 0 1 12 MHz to 25 MHz 1 0 25 MHz to 50 MHz 1 1 50 MHz to 103 MHz Spread Deviation Selection Table SS% (pin 4) Spread Deviation (%) 0 - 1.25 1 ± 0.42 LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 3 of 9 September 2003 ASM3P2183A rev 1.0 Absolute Maximum Ratings Symbol VDD, VIN Parameter Voltage on any pin with respect to GND Rating Unit -0.5 to + 7.0 V TSTG Storage temperature -65 to +125 °C TA Operating temperature 0 to 70 °C Note: These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability. DC Electrical Characteristics Symbol Parameter Min Typ Max Unit VIL Input low voltage GND – 0.3 - 0.8 V VIH Input high voltage 2.0 - VDD + 0.3 V IIL Input low current - - -35 µA IIH Input high current - - 35 µA - TBD - mA - TBD - mA IXOL IXOH XOUT Output low current (@ 0.4V, VDD = 3.3V) XOUT Output high current (@ 2.5V, VDD = 3.3V) VOL Output low voltage (VDD = 3.3V, IOL = 20mA) - - 0.4 V VOH Output high voltage (VDD = 3.3V, IOH = 20mA) 2.5 - - V 8.46 12 17.78 mA IDD Dynamic supply current Normal mode (3.3V and 10pF loading) Static supply current Standby mode VDD Operating voltage tON ZOUT ICC 0.6 mA 2.7 3.3 3.7 V Power up time (first locked clock cycle after power up) - 0.18 - mS Clock out impedance - 50 - Ω LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 4 of 8 September 2003 ASM3P2183A rev 1.0 AC Electrical Characteristics Symbol Parameter Min Typ Max Unit fIN Input frequency 6 - 103 MHz ModOUT Output frequency 6 - 103 MHz tLH* Output rise time (measured at 0.8V to 2.0V) 1.2 1.32 1.4 ns tHL* Output fall time (measured at 2.0V to 0.8V) 0.8 0.9 1.0 ns tJC Jitter (cycle to cycle) - - 200 ps TD Output duty cycle 45 50 55 % * tLH and tHL are measured into a capacitive load of 15pF LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 5 of 8 September 2003 ASM3P2183A rev 1.0 Package Information 8-Pin SOIC H E D A2 A C θ e A1 B Symbol Dimensions in inches D L Dimensions in millimeters Min Max Min Max A 0.057 0.071 1.45 1.80 A1 0.004 0.010 0.10 0.25 A2 0.053 0.069 1.35 1.75 B 0.012 0.020 0.31 0.51 C 0.004 0.01 0.10 0.25 D 0.186 0.202 4.72 5.12 E 0.148 0.164 3.75 4.15 e 0.050 BSC 1.27 BSC H 0.224 0.248 5.70 6.30 L 0.012 0.028 0.30 0.70 θ 0° 8° 0° 8° LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 6 of 8 September 2003 ASM3P2183A rev 1.0 8-Pin TSSOP H E D A2 A C θ e A1 L B Dimensions in inches Symbol Min A 0.047 A1 0.002 0.006 0.05 0.15 A2 0.031 0.041 0.80 1.05 B 0.007 0.012 0.19 0.30 C 0.004 0.008 0.09 0.20 D 0.114 0.122 2.90 3.10 E 0.169 0.177 4.30 4.50 e Max Dimensions in millimeters Min Max 1.10 0.026 BSC 0.65 BSC H 0.244 0.260 6.20 6.60 L 0.018 0.030 0.45 0.75 θ 0° 8° 0° 8° LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 7 of 8 September 2003 ASM3P2183A rev 1.0 Alliance Semiconductor Corporation 2595, Augustine Drive, Santa Clara, CA 95054 Tel# 408-855-4900 Fax: 408-855-4999 www.alsc.com Copyright © Alliance Semiconductor All Rights Reserved Preliminary Information Part Number: ASM3P2183A Document Version: v1.0 © Copyright 2003 Alliance Semiconductor Corporation. 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Alliance does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use. LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 8 of 8