P2042A August 2005 rev 1.3 LCD Panel EMI Reduction IC Features wide reduction of EMI of dependent signals. The P2042A allows significant system FCC approved method of EMI attenuation. Provides up to 15dB of EMI suppression. Generates a low EMI spread spectrum clock of the Input frequency range: 30MHz to 110MHz. Optimized for 32.5MHz, 54MHz, 65MHz and cost savings by reducing the number of circuit board input frequency. Internal loop filter minimizes external components and board space. Eight selectable high spread ranges up to ± 1.9%. SSON# control pin for spread spectrum enable and Low cycle-to-cycle jitter. 3.3V ± 0.3V operating range. Low power CMOS design. Supports most mobile graphic accelerator and LCD disable options. shielding and other passive components that are traditionally required to pass EMI The P2042A uses the most efficient and optimized modulation profile approved by the FCC and is implemented in a proprietary all digital method. The P2042A modulates the output of a single PLL in order to “spread” the bandwidth of a synthesized clock, and more importantly, decreases the peak amplitudes of its harmonics. This results in significantly lower system EMI compared to the typical narrow band signal produced timing controller specifications. layers ferrite beads, regulations. 108MHz pixel clock frequencies. down stream clock and data by oscillators and most frequency generators. Lowering EMI by increasing a signal’s bandwidth is called ‘spread spectrum clock generation’. Available in 8-pin SOIC and TSSOP Packages. Product Description Applications The P2042A is a versatile spread spectrum frequency The P2042A is targeted towards digital flat panel modulator designed specifically for digital flat panel applications for notebook PCs, palm-size PCs, office applications. automation equipments and LCD monitors. The P2042A reduces electromagnetic interference (EMI) at the clock source, allowing system Block Diagram VDD SR0 CP1 CP0 SSON# PLL Modulation CLKIN Frequency Divider Feedback Divider Phase Detector Loop Filter VCO Output Divider ModOUT VSS Alliance Semiconductor 2575 Augustine Drive • Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com Notice: The information in this document is subject to change without notice. P2042A August 2005 rev 1.3 Pin Configuration CLKIN 1 CP0 2 CP1 VSS 8 VDD 7 SR0 3 6 ModOUT 4 5 SSON# P2042A Pin Description Pin# Pin Name Type 1 CLKIN I 2 CP0 I 3 CP1 I 4 VSS P Ground to entire chip. Connect to system ground. Description External reference frequency input. Connect to externally generated reference signal. Digital logic input used to select charge pump current. This pin has an internal pull-up resistor. Refer Modulation Selection Table. Digital logic input used to select charge pump current. This pin has an internal pull-up resistor. Refer Modulation Selection Table. 5 SSON# I Digital logic input used to enable Spread Spectrum function (Active LOW). Spread Spectrum function enabled when LOW, disabled when HIGH. This pin has an internal pull-low resistor. 6 ModOUT O Spread spectrum clock output. 7 SR0 I Digital logic input used to select Spreading Range. This pin has an internal pull-up resistor. 8 VDD P Power supply for the entire chip Modulation Selection Spreading Range (±%) CP0 CP1 SR0 32.5MHz 54MHz 65MHz 81MHz 108MHz 0 0 0 0.56 1.05 1.00 0.98 0.80 0 0 1 1.94 1.68 1.56 1.48 1.22 0 1 0 1.36 1.05 1.00 0.92 0.67 0 1 1 1.92 1.68 1.56 1.48 1.06 1 0 0 1.24 0.81 0.66 0.40 0.27 1 0 1 1.91 1.29 1.02 0.74 0.43 1 1 0 0.91 0.45 0.34 0.05 0.15 1 1 1 1.47 0.71 0.54 0.36 0.21 LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. Modulation Rate (KHz) (FIN /40) * 62.49 KHz 2 of 8 P2042A August 2005 rev 1.3 Spread Spectrum Selection The Modulation Selection Table defines the possible spread spectrum options. The optimal setting should minimize system EMI to the fullest without affecting system performance. The spreading is described as a percentage deviation of the center frequency. (Note: The center frequency is the frequency of the external reference input on CLKIN, pin1). For example, P2042A is designed for high-resolution, flat panel applications and is able to support an XGA (1024 x 768) flat panel operating at 65MHz (FIN) clock speed. A spreading selection of CP0=0, CP1=1 and SR0=0 provides a percentage deviation of ±1.00% from FIN. This results in the frequency on ModOUT being swept from 65.65 to 64.35MHz at a modulation rate of 101.54KHz. Refer Modulation Selection Table. The example in the following illustration is a common EMI reduction method for a notebook LCD panel and has already been implemented by most of the leading OEM and mobile graphic accelerator manufacturers. Application Schematic for Mobile LCD Graphics Controllers 65MHz from graphics accelerator 1 CLKIN VDD 8 2 CP0 SR0 7 3 CP1 ModOUT 6 4 VSS SSON# 0.1µF +3.3V Modulated 65MHz signal with ±1.00% deviation and modulation rate of 101.54KHz. This signal is connected back to the spread spectrum input pin (SSIN) of the graphics accelerator. 5 P2042A LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. Digital control for the SS enable or disable 3 of 8 P2042A August 2005 rev 1.3 Absolute Maximum Ratings Symbol Parameter Rating Unit VDD, VIN Voltage on any pin with respect to Ground -0.5 to +7.0 V Storage temperature -65 to +125 °C TA Operating temperature -40 to +85 °C Ts Max. Soldering Temperature (10 sec) 260 °C TJ Junction Temperature 150 °C 2 KV TSTG Static Discharge Voltage TDV (As per JEDEC STD22- A114-B) Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. DC Electrical Characteristics Symbol Parameter Min Typ Max Unit VSS - 0.3 - 0.8 V 2.0 - VDD + 0.3 V - - -35 µA - - 35 µA Output low voltage (VDD = 3.3 V, IOL = 20 mA) - - 0.4 V VOH Output high voltage (VDD = 3.3 V, IOL = 20 mA) 2.5 - - V IDD Static supply current standby mode - 0.6 - mA ICC Dynamic supply current (3.3V and 10pF loading) 9 16 22 mA VDD Operating voltage 3.0 3.3 3.6 V tON Power-up time (first locked cycle after power up) - 0.18 - mS Clock output impedance - 50 - Ω VIL Input low voltage VIH Input high voltage Input low current (pull-up resistor on inputs CP0, CP1 and SR0) Input high current (pull-down resistor on input SSON#) IIL IIH VOL ZOUT AC Electrical Characteristics Symbol Parameter Min Typ Max Unit fIN Input frequency 30 65 110 MHz fOUT Output frequency 30 65 110 MHz tLH* Output rise time (measured at 0.8V to 2.0V) 0.7 0.9 1.1 nS tHL* Output fall time (measured at 2.0V to 0.8V) 0.6 0.8 1.0 nS tJC Jitter (cycle to cycle) - - 360 pS tD Output duty cycle 45 50 55 % *tLH and tHL are measured into a capacitive load of 15pF LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 4 of 8 P2042A August 2005 rev 1.3 Package Information 8-lead SOIC Package H E D A2 A C A1 D θ e L B Dimensions Symbol Inches Min Max Millimeters Min Max A1 0.004 0.010 0.10 0.25 A 0.053 0.069 1.35 1.75 A2 0.049 0.059 1.25 1.50 B 0.012 0.020 0.31 0.51 C 0.007 0.010 0.18 0.25 D 0.193 BSC 4.90 BSC E 0.154 BSC 3.91 BSC e 0.050 BSC 1.27 BSC H 0.236 BSC 6.00 BSC L 0.016 0.050 0.41 1.27 θ 0° 8° 0° 8° LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 5 of 8 P2042A August 2005 rev 1.3 8-lead TSSOP Package H E D A2 A C θ e A1 L B Dimensions Symbol Inches Min Millimeters Max A Min Max 0.043 1.10 A1 0.002 0.006 0.05 0.15 A2 0.033 0.037 0.85 0.95 B 0.008 0.012 0.19 0.30 c 0.004 0.008 0.09 0.20 D 0.114 0.122 2.90 3.10 E 0.169 0.177 4.30 4.50 e 0.026 BSC 0.65 BSC H 0.252 BSC 6.40 BSC L 0.020 0.028 0.50 0.70 θ 0° 8° 0° 8° LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 6 of 8 P2042A August 2005 rev 1.3 Ordering Information Part Number Marking Package Type P2042A-08ST P2042A 8-Pin SOIC, TUBE P2042A-08SR P2042A 8-Pin SOIC, TAPE & REEL P2042A-08TT P2042A 8-Pin TSSOP, TUBE P2042A-08TR P2042A 8-Pin TSSOP, TAPE & REEL P2042AF-08ST P2042AF 8-Pin SOIC, TUBE, Pb Free P2042AF-08SR P2042AF 8-Pin SOIC, TAPE & REEL, Pb Free P2042AF-08TT P2042AF 8-Pin TSSOP, TUBE, Pb Free P2042AF-08TR P2042AF 8-Pin TSSOP, TAPE & REEL, Pb Free P2042AG-08ST P2042AG 8-Pin SOIC, TUBE, Green P2042AG-08SR P2042AG 8-Pin SOIC, TAPE & REEL, Green P2042AG-08TT P2042AG 8-Pin TSSOP, TUBE, Green P2042AG-08TR P2042AG 8-Pin TSSOP, TAPE & REEL, Green Qty/reel Temperature Commercial 2500 Commercial Commercial 2500 Commercial Commercial 2500 Commercial Commercial 2500 Commercial 2500 Commercial Commercial Commercial 2500 Commercial Device Ordering Information P 2042 A F - 08 XX SR - SOIC, T/R TT – TSSOP, TUBE TR - TSSOP, T/R ST – SOIC, TUBE Pin Count F =Lead Free and and RoHS compliant part G = Green Deviation (%) and Spread option Identifier DEVICE NUMBER Flow: P = Commercial Temperature Range (0°C to 70°C) I = Industrial Temperature Range (-40°C to 85°C) Licensed under U.S Patent Nos 5,488,627 and 5,631,921 LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 7 of 8 P2042A August 2005 rev 1.3 Alliance Semiconductor Corporation 2575 Augustine Drive, Santa Clara, CA 95054 Tel# 408-855-4900 Fax: 408-855-4999 www.alsc.com Copyright © Alliance Semiconductor All Rights Reserved Preliminary Information Part Number: P2042A Document Version: v1.3 Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to Alliance Semiconductor, dated 11-11-2003 © Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are trademarks or registered trademarks of Alliance. All other brand and product names may be the trademarks of their respective companies. Alliance reserves the right to make changes to this document and its products at any time without notice. Alliance assumes no responsibility for any errors that may appear in this document. The data contained herein represents Alliance's best data and/or estimates at the time of issuance. Alliance reserves the right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. Alliance does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of Alliance products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in Alliance's Terms and Conditions of Sale (which are available from Alliance). All sales of Alliance products are made exclusively according to Alliance's Terms and Conditions of Sale. The purchase of products from Alliance does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of Alliance or third parties. Alliance does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use. LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 8 of 8