19-3353; Rev 0; 8/04 300MHz to 450MHz Low-Power, Crystal-Based +10dBm ASK/FSK Transmitter The MAX1479 crystal-referenced phase-locked-loop (PLL) VHF/UHF transmitter is designed to transmit ASK, OOK, and FSK data in the 300MHz to 450MHz frequency range. The MAX1479 supports data rates up to 100kbps in ASK mode and 20kbps in FSK mode (both Manchester coded). The device provides an adjustable output power of more than +10dBm into a 50Ω load. The crystal-based architecture of the MAX1479 eliminates many of the common problems of SAW-based transmitters by providing greater modulation depth, faster frequency settling, higher tolerance of the transmit frequency, and reduced temperature dependence. These improvements enable better overall receiver performance when using the MAX1479 together with a superheterodyne receiver such as the MAX1470, MAX1471, MAX1473, or MAX7033. The MAX1479 is available in a 16-pin thin QFN package (3mm x 3mm) and is specified for the automotive temperature range from -40°C to +125°C. Features ♦ ETSI-Compliant EN300 220 ♦ +2.1V to +3.6V Single-Supply Operation ♦ Supports ASK, OOK, and FSK Modulations ♦ Adjustable FSK Shift ♦ +10dBm Output Power into 50Ω Load ♦ Low Supply Current (6.7mA in ASK Mode, and 10.5mA in FSK Mode) ♦ Uses Small Low-Cost Crystal ♦ Small 16-Pin Thin QFN Package ♦ Fast-On Oscillator—200µs Startup Time ♦ Programmable Clock Output Ordering Information Applications PART Remote Keyless Entry Tire Pressure Monitoring Security Systems Radio-Controlled Toys Wireless Game Consoles Wireless Computer Peripherals Wireless Sensors RF Remote Controls Garage Door Openers MAX1479ATE TEMP RANGE PIN-PACKAGE -40°C to +125°C 16 Thin QFN-EP* *EP = Exposed paddle. Typical Application Circuit appears at end of data sheet. LOOP FILTER PD/CP 11 DEV0 ASK FSK DIVIDE BY 32 VCO 3 10 CLK1 MAX1479 6 PA 9 7 ROUT 5 VDD_PA 4 ENVELOPE SHAPING CLKOUT ENABLE CLOCK DIVIDER CLK0 DEV2 16 15 14 13 VDD 1 12 DEV1 MODE 2 11 DEV0 DIN 3 10 CLK1 ENABLE 4 9 CLK0 MAX1479 EP 5 6 7 8 8 PAOUT DIN 12 DEV1 PAOUT DEV2 DEVIATION XTAL1 XTAL1 CRYSTAL DRIVER TOP VIEW ROUT XTAL2 13 XTAL2 2 14 GND MODE 15 VDD_PA 1 16 Pin Configuration CLKOUT VDD GND Functional Diagram THIN QFN (3mm x 3mm) ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX1479 General Description MAX1479 300MHz to 450MHz Low-Power, Crystal-Based +10dBm ASK/FSK Transmitter ABSOLUTE MAXIMUM RATINGS VDD to GND .............................................................-0.3V to +4V All Other Pins to GND ................................-0.3V to (VDD + 0.3V) Continuous Power Dissipation (TA = +70°C) 16-Pin Thin QFN (derate 14.7mW/°C above +70°C)...1176.5mW Operating Temperature Range .........................-40°C to +125°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-60°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (Typical Application Circuit, all RF inputs and outputs are referenced to 50Ω, VDD = +2.1V to +3.6V, VENABLE = VDD, TA = -40°C to +125°C, unless otherwise noted. Typical values are at VDD = +2.7V, TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER Supply Voltage Supply Current Standby Current SYMBOL CONDITIONS VDD IDD ISTDBY MIN TYP 2.1 MAX UNITS 3.6 V PA off, VDIN at 0% duty cycle (ASK or FSK) (Note 2) fRF = 315MHz 2.9 4.3 fRF = 433MHz 3.3 4.8 VDIN at 50% duty cycle (ASK) (Notes 3, 4) fRF = 315MHz 6.7 10.7 fRF = 433MHz 7.3 11.4 VDIN at 100% duty cycle (FSK) fRF = 315MHz (Note 2) 10.5 17.1 fRF = 433MHz (Note 4) 11.4 18.1 VENABLE < VIL TA = +25°C 0.2 TA < +85°C (Note 4) 120 300 TA < +125°C (Note 2) 700 1600 mA nA DIGITAL INPUTS AND OUTPUTS Data Input High VIH (Note 2) Data Input Low VIL (Note 2) Maximum Input Current IIN V 0.25 20 Output Voltage High VOH CLKOUT, load = 10kΩ || 10pF (Note 4) Output Voltage Low VOL CLKOUT, load = 10kΩ || 10pF (Note 4) 2 VDD 0.25 VDD 0.25 _______________________________________________________________________________________ V µA V 0.25 V 300MHz to 450MHz Low-Power, Crystal-Based +10dBm ASK/FSK Transmitter (Typical Application Circuit, all RF inputs and outputs are referenced to 50Ω, VDD = +2.1V to +3.6V, VENABLE = VDD, TA = -40°C to +125°C, unless otherwise noted. Typical values are at VDD = +2.7V, TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 450 MHz SYSTEM PERFORMANCE Frequency Range fRF Turn-On Time (Note 5) tON Maximum Data Rate (Note 4) Maximum FSK Frequency Deviation Output Power (Note 2) (Note 2) Settle to within 50kHz 200 Settle to within 5kHz 350 ASK mode (Manchester coded) 100 FSK mode (Manchester coded) 20 DEV[2:0] = 111 (Note 6) POUT 300 fRF = 315MHz 55 fRF = 433MHz 80 TA = +25°C, VDD = +2.7V 6.8 10 TA = +125°C, VDD = +2.1V 2.7 5.3 TA = -40°C, VDD = +3.6V Transmit Efficiency with CW Tone (Note 7) Transmit Efficiency at 50% Duty Cycle 12.2 fRF = 315MHz 35 fRF = 433MHz 34 fRF = 315MHz 27 fRF = 433MHz 25 µs kbps kHz 12.0 dBm 16.1 % % PHASE-LOCKED-LOOP PERFORMANCE VCO Gain KVCO 280 fRF = 315MHz Phase Noise fRF = 433MHz Maximum Carrier Harmonics fOFFSET = 100kHz -75 fOFFSET = 1MHz -98 fOFFSET = 100kHz -74 fOFFSET = 1MHz -98 fRF = 315MHz -50 fRF = 433MHz -45 Reference Spur Loop Bandwidth Crystal Frequency Range Clock Output Frequency Note 1: Note 2: Note 3: Note 4: Note 5: Note 6: Note 7: Note 8: dBc/Hz dBc -40 dBc BW 300 kHz fXTAL fRF/32 MHz 50 ppm 4.5 pF FXTAL / N MHz Crystal Tolerance Crystal Load Capacitance MHz/V CLOAD (Note 8) Determined by CLK0 and CLK1; see Table 1 Supply current, output power, and efficiency are greatly dependent on board layout and PAOUT match. 100% tested at TA = +125°C. Guaranteed by design and characterization over temperature. 50% duty cycle at 10kHz ASK data (Manchester coded). Guaranteed by design and characterization, not production tested. VENABLE = VIL to VENABLE = VIH. fOFFSET is defined as the frequency deviation from the desired carrier frequency. Dependent on crystal and PC board trace capacitance. VENABLE > VIH, VDATA > VIH, Efficiency = POUT / (VDD x IDD). Dependent on PC board trace capacitance. _______________________________________________________________________________________ 3 MAX1479 AC ELECTRICAL CHARACTERISTICS Typical Operating Characteristics (Typical Application Circuit, VDD = +2.7V, TA = +25°C, unless otherwise noted.) 11 TA = +85°C 9 TA = +125°C TA = +85°C 8.0 7.5 TA = +125°C 7.0 TA = +25°C 6.5 TA = -40°C 3.0 3.3 3.6 7 2.1 2.4 SUPPLY VOLTAGE (V) SUPPLY CURRENT vs. SUPPLY VOLTAGE TA = +85°C 8.0 TA = +125°C TA = +25°C 7.0 6.5 10 7 6 5 3 2 2.7 3.0 3.3 3.6 -6 9 PA ON 8 7 6 5 50% DUTY CYCLE -2 2 10 6 -14 MAX1479 toc07 fRF = 315MHz PA ON -2 2 4 10 0 -4 MAX1479 toc08 fRF = 433MHz PA ON 16 SUPPLY CURRENT (mA) 8 12 CURRENT -6 16 12 POWER 14 8 12 4 10 0 8 -4 CURRENT 6 -8 6 -8 4 -12 4 -12 -16 2 2 0.1 1 10 100 EXTERNAL RESISTOR (Ω) 1k 10k 6 AVERAGE OUTPUT POWER (dBm) 18 16 12 POWER -10 SUPPLY CURRENT AND OUTPUT POWER vs. EXTERNAL RESISTOR OUTPUT POWER (dBm) SUPPLY CURRENT (mA) 10 4 SUPPLY CURRENT AND OUTPUT POWER vs. EXTERNAL RESISTOR 8 fRF = 433MHz 11 AVERAGE OUTPUT POWER (dBm) 14 3.6 2 -10 SUPPLY VOLTAGE (V) 16 3.3 3 -14 18 3.0 12 50% DUTY CYCLE 4 5.0 2.4 PA ON 8 2.7 SUPPLY CURRENT vs. OUTPUT POWER 9 5.5 2.1 2.4 SUPPLY VOLTAGE (V) fRF = 315MHz 11 TA = -40°C 6.0 2.1 SUPPLY CURRENT vs. OUTPUT POWER SUPPLY CURRENT (mA) 9.0 7.5 3.6 3.3 12 MAX1479 toc04 fRF = 433MHz PA 50% DUTY CYCLE AT 10kHz 8.5 3.0 SUPPLY VOLTAGE (V) 10.0 9.5 2.7 SUPPLY CURRENT (mA) 2.7 TA = +125°C 8 MAX1479 toc05 2.4 TA = +85°C 10 5.0 2.1 MAX1479 toc03 TA = +25°C 11 5.5 7 4 12 9 6.0 8 TA = -40°C 13 MAX1479 toc06 TA = +25°C 8.5 fRF = 433MHz PA ON 14 SUPPLY CURRENT (mA) 12 10 9.0 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) TA = -40°C 13 fRF = 315MHz PA 50% DUTY CYCLE AT 10kHz 9.5 SUPPLY CURRENT vs. SUPPLY VOLTAGE 15 MAX1479 toc02 MAX1479 toc01 fRF = 315MHz PA ON 14 SUPPLY CURRENT vs. SUPPLY VOLTAGE 10.0 -16 0.1 1 10 100 1k EXTERNAL RESISTOR (Ω) _______________________________________________________________________________________ 10k OUTPUT POWER (dBm) SUPPLY CURRENT vs. SUPPLY VOLTAGE 15 SUPPLY CURRENT (mA) MAX1479 300MHz to 450MHz Low-Power, Crystal-Based +10dBm ASK/FSK Transmitter 10 300MHz to 450MHz Low-Power, Crystal-Based +10dBm ASK/FSK Transmitter TA = +25°C 12 10 TA = +85°C 8 OUTPUT POWER vs. SUPPLY VOLTAGE TA = -40°C TA = +25°C 12 10 TA = +85°C 8 TA = +125°C 12 TA = +85°C 8 TA = +125°C 6 4 6 4 3.0 3.3 3.6 4 2.1 2.4 2.7 SUPPLY VOLTAGE (V) 3.0 2.4 10 -50 -60 PHASE NOISE (dBc/Hz) TA = -40°C 3.0 3.3 3.6 PHASE NOISE vs. OFFSET FREQUENCY -40 MAX1479 toc12 fRF = 433MHz PA ON ENVELOPE SHAPING DISABLED TA = +25°C 2.7 SUPPLY VOLTAGE (V) OUTPUT POWER vs. SUPPLY VOLTAGE 12 2.1 SUPPLY VOLTAGE (V) 16 14 3.6 3.3 TA = +85°C 8 MAX1479 toc13 2.7 OUTPUT POWER (dBm) TA = +125°C fRF = 315MHz -70 -80 -90 fRF = 433MHz -100 -110 -120 6 -130 4 -140 2.4 2.7 3.0 3.3 1k 10k 100k 1M CLOCK SPUR MAGNITUDE vs. SUPPLY VOLTAGE FREQUENCY STABILITY vs. SUPPLY VOLTAGE -50 fCLKOUT = fXTAL/16 -55 -60 fCLKOUT = fXTAL/8 fCLKOUT = fXTAL/4 10 10M MAX1479 toc15 fRF = 315MHz CLKOUT SPUR = fRF ± fCLKOUT 10pF LOAD CAPACITANCE -65 100 OFFSET FREQUENCY (Hz) -40 -45 3.6 SUPPLY VOLTAGE (V) 8 FREQUENCY STABILITY (ppm) 2.1 MAX1479 toc14 2.4 TA = -40°C 10 TA = +125°C 6 2.1 fRF = 315MHz PA ON ENVELOPE SHAPING DISABLED TA = +25°C 14 MAX1479 toc11 16 MAX1479 toc10 fRF = 433MHz PA ON 14 OUTPUT POWER (dBm) TA = -40°C CLKOUT SPUR MAGNITUDE (dBc) OUTPUT POWER (dBm) MAX1479 toc09 fRF = 315MHz PA ON 14 OUTPUT POWER vs. SUPPLY VOLTAGE 16 OUTPUT POWER (dBm) OUTPUT POWER vs. SUPPLY VOLTAGE 16 6 fRF = 315MHz 4 2 0 -2 fRF = 433MHz -4 -6 -8 -70 -10 2.1 2.4 2.7 3.0 SUPPLY VOLTAGE (V) 3.3 3.6 2.1 2.4 2.7 3.0 3.3 3.6 SUPPLY VOLTAGE (V) _______________________________________________________________________________________ 5 MAX1479 Typical Operating Characteristics (continued) (Typical Application Circuit, VDD = +2.7V, TA = +25°C, unless otherwise noted.) 300MHz to 450MHz Low-Power, Crystal-Based +10dBm ASK/FSK Transmitter MAX1479 Pin Description PIN NAME 1 VDD DESCRIPTION 2 MODE Mode Select. A logic low on MODE enables the device in ASK mode. A logic high on MODE enables the device in FSK mode. 3 DIN Data Input. Power amplifier is on when DIN is high in ASK mode. Frequency is high when DIN is high in FSK mode. Supply Voltage. Bypass to GND with a 10nF and 220pF capacitor as close to the pin as possible. 4 ENABLE Standby/Power-Up Input. A logic low on ENABLE sets the device in standby mode. 5 CLKOUT Buffered Clock Output. Programmable through CLK0 and CLK1. See Table 1. 6 VDD_PA Power-Amplifier Supply Voltage. Bypass to GND with a 10nF and 220pF capacitor as close to the pin as possible. 7 ROUT Envelope-Shaping Output. ROUT controls the power-amplifier envelope rise and fall. Bypass to GND with a 680pF and 220pF capacitor as close to the pin as possible. 8 PAOUT Power-Amplifier Output. Requires a pullup inductor to the supply voltage, which can be part of the outputmatching network to an antenna. 9 CLK0 1st Clock Divider Setting. See Table 1. 10 CLK1 2nd Clock Divider Setting. See Table 1. 11 DEV0 1st FSK Frequency-Deviation Setting. See Table 2. 12 DEV1 2nd FSK Frequency-Deviation Setting. See Table 2. 13 DEV2 3rd FSK Frequency-Deviation Setting. See Table 2. 14 XTAL1 1st Crystal Input. fRF = 32 x fXTAL. 15 XTAL2 2nd Crystal Input. fRF = 32 x fXTAL. 16 GND Ground. Connect to system ground. — EP Exposed Ground Paddle. EP is the power amplifier’s ground. It must be connected to PC board through a low-inductance path. Detailed Description The MAX1479 is a highly integrated ASK/FSK transmitter operating over the 300MHz to 450MHz frequency band. The device requires only a few external components to complete a transmitter solution. The MAX1479 includes a complete PLL and a highly efficient power amplifier. The device can be set into a 0.2nA low-power shutdown mode. Shutdown Mode ENABLE (pin 4) is internally pulled down with a 20µA current source. If it is left unconnected or pulled low, the MAX1479 goes into a low-power shutdown mode. In this mode, the supply current drops to 0.2nA. When ENABLE is high, the device is enabled and is ready for transmission after 200µs (frequency settles to within 50kHz). The 200µs turn-on time of the MAX1479 is mostly dominated by the crystal oscillator startup time. Once the 6 oscillator is running, the 300kHz PLL bandwidth allows fast frequency recovery during power-amplifier toggling. Mode Selection MODE (pin 2) sets the MAX1479 in either ASK or FSK mode. When MODE is set low, the device operates as an ASK transmitter. If MODE is set high, the device operates as an FSK transmitter. In the ASK mode, the DIN pin controls the output of the power amplifier. A logic low on DIN turns off the PA, and a logic high turns on the PA. In the FSK mode, a logic low on the DIN pin is represented by the low FSK frequency, and a logichigh input is represented by the high FSK frequency. (The ASK carrier frequency and the lower FSK frequency are the same.) The deviation is proportional to the crystal load impedance and pulling capacitance. The maximum frequency deviation is 55kHz for f RF = 315MHz and 80kHz for fRF = 433MHz. _______________________________________________________________________________________ 300MHz to 450MHz Low-Power, Crystal-Based +10dBm ASK/FSK Transmitter Table 1. Clock Divider Settings CLK1 CLK0 0 0 Logic 0 0 1 fXTAL / 4 1 0 fXTAL / 8 1 1 fXTAL / 16 MAX1479 Clock Output The MAX1479 has a dedicated digital output pin for the frequency-divided crystal clock signal. This is to be used as the time base for a microprocessor. The frequency-division ratio is programmable through two digital input pins (CLK0, CLK1), and is defined in Table 1. The clock output is designed to drive a 3.5MHz CMOS rail-to-rail signal into a 10pF capacitive load. CLKOUT Envelope-Shaping Resistor The envelope-shaping resistor allows for a gentle turnon/turn-off of the PA in ASK mode. This results in a smaller spectral width of the modulated PA output signal. Table 2. Frequency-Deviation Settings DEV2 DEV1 DEV0 DEVIATION Phase-Locked Loop 0 0 0 1/8 x max The PLL block contains a phase detector, charge pump, integrated loop filter, VCO, asynchronous 32x clock divider, and crystal oscillator. The PLL requires no external components. The relationship between the carrier and crystal frequency is given by: fXTAL = fRF / 32 0 0 1 1/4 x max 0 1 0 3/8 x max 0 1 1 1/2 x max 1 0 0 5/8 x max 1 0 1 3/4 x max 1 1 0 7/8 x max 1 1 1 Max Crystal Oscillator The crystal oscillator in the MAX1479 is designed to present a capacitance of approximately 3pF to ground from the XTAL1 and XTAL2 pins in ASK mode. In most cases, this corresponds to a 4.5pF load capacitance applied to the external crystal when typical PC board parasitics are added. In FSK mode, a percentage (defined by bits DEV0 to DEV2) of the 3pF internal crystal oscillator capacitance is removed for a logic 1 on the DIN pin to pull the transmit frequency. The frequency deviation is shown in Table 2. It is very important to use a crystal with a load capacitance that is equal to the capacitance of the MAX1479 crystal oscillator plus PC board parasitics. If very large FSK frequency deviations are desired, use a crystal with a larger motional capacitance and/or reduce PC board parasitic capacitances. Power Amplifier The PA of the MAX1479 is a high-efficiency, open-drain, class-C amplifier. With a proper output-matching network, the PA can drive a wide range of impedances, including small-loop PC board trace antennas and any 50Ω antennas. The output-matching network for a 50Ω antenna is shown in the Typical Application Circuit. The output-matching network suppresses the carrier harmonics and transforms the antenna impedance to an optimal impedance at PAOUT (pin 8), which is about 250Ω. When the output-matching network is properly tuned, the power amplifier is highly efficient. The Typical Application Circuit delivers +10dBm at a supply voltage of +2.7V, and draws a supply current of 6.7mA for ASK/OOK operation (V DIN at 50% duty cycle) and 10.5mA for FSK operation. Thus, the overall efficiency at 100% duty cycle is 35%. The efficiency of the power amplifier itself is about 50%. An external resistor at ROUT sets the output power. Applications Information Output Matching to 50Ω When matched to a 50Ω system, the MAX1479 PA is capable of delivering more than +10dBm of output power at VDD = 2.7V. The output of the PA is an opendrain transistor that requires external impedance matching and pullup inductance for proper biasing. The pullup inductance from PAOUT to VDD serves three main purposes: It forms a resonant tank circuit with the capacitance of the PA output, provides biasing for the PA, and becomes a high-frequency choke to reduce the RF energy coupling into VDD. Maximum efficiency is achieved when the PA drives a load of 250Ω. The recommended output-matching network topology is shown in the Typical Application Circuit. _______________________________________________________________________________________ 7 MAX1479 300MHz to 450MHz Low-Power, Crystal-Based +10dBm ASK/FSK Transmitter Output Matching to PC Board Loop Antenna In most applications, the MAX1479 power-amplifier output has to be impedance matched to a small-loop antenna. The antenna is usually fabricated out of a copper trace on a PC board in a rectangular, circular, or square pattern. The antenna has an impedance that consists of a lossy component and a radiative component. To achieve high radiating efficiency, the radiative component should be as high as possible, while minimizing the lossy component. In addition, the loop antenna has an inherent loop inductance associated with it (assuming the antenna is terminated to ground). For example, in a typical application, the radiative impedance is less than 0.5Ω, the lossy impedance is less than 0.7Ω, and the inductance is approximately 50nH to 100nH. The objective of the matching network is to match the power-amplifier output to the impedance of the smallloop antenna. The matching components thus tune out the loop inductance and transform the low radiative and resistive parts of the antenna into the much higher value of the PA output. This gives higher efficiency. The low radiative and lossy components of the small-loop antenna result in a higher Q matching network than the 50Ω network; thus, the harmonics are lower. Layout Considerations A properly designed PC board is an essential part of any RF/microwave circuit. On the power-amplifier output, use controlled-impedance lines and keep them as short as possible to minimize losses and radiation. Keeping the traces short reduces parasitic inductance. Generally, 1in of PC board trace adds about 20nH of parasitic inductance. Parasitic inductance can have a dramatic effect on the effective inductance. For example, a 0.5in trace connecting a 100nH inductor adds an extra 10nH of inductance, or 10%. To reduce the parasitic inductance, use wider traces and a solid ground or power plane below the signal traces. Using a solid ground plane can reduce the parasitic inductance from approximately 20nH/in to 7nH/in. Also, use low-inductance connections to ground on all GND pins and place decoupling capacitors close to all VDD connections. Chip Information TRANSISTOR COUNT: 2369 PROCESS: CMOS Table 3. Component Values for Typical Application Circuit 8 COMPONENT VALUE FOR fRF = 433MHz VALUE FOR fRF = 315MHz L1 22nH 27nH L3 18nH 22nH C1 6.8pF 15pF C2 10pF 22pF C3 10nF 10nF C4 680pF 680pF C6 6.8pF 15pF C8 220pF 220pF C10 10nF 10nF C11 220pF 220pF C12 220pF 220pF C14 100pF 100pF C15 100pF 100pF _______________________________________________________________________________________ 300MHz to 450MHz Low-Power, Crystal-Based +10dBm ASK/FSK Transmitter C15 C10 MODE-SELECT INPUT 15 DIN DEV2 DEVIATION 2 11 DIVIDE BY 32 3 10 CLOCK DIVIDER ENVELOPE SHAPING 5 6 CLOCK OUTPUT VCC C3 C8 CLK1 CLOCKDIVIDER INPUTS 9 CLK0 8 ROUT C12 FREQUENCYDEVIATION INPUTS DEV0 PA 7 VDD_PA 4 CLKOUT ENABLE DEV1 VCO MAX1479 ENABLE INPUT 12 LOOP FILTER PD/CP ASK FSK DATA INPUT 13 CRYSTAL DRIVER 1 C11 MODE 14 PAOUT VDD XTAL1 XTAL2 GND 16 VCC C14 L1 C4 C1 C2 L3 RF OUTPUT C6 _______________________________________________________________________________________ 9 MAX1479 Typical Application Circuit Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) 12x16L QFN THIN.EPS MAX1479 300MHz to 450MHz Low-Power, Crystal-Based +10dBm ASK/FSK Transmitter D2 0.10 M C A B b D D2/2 D/2 E/2 E2/2 CL (NE - 1) X e E E2 L e CL k (ND - 1) X e CL 0.10 C CL 0.08 C A A2 A1 L L e e PACKAGE OUTLINE 12, 16L, THIN QFN, 3x3x0.8mm 21-0136 10 ______________________________________________________________________________________ E 1 2 300MHz to 450MHz Low-Power, Crystal-Based +10dBm ASK/FSK Transmitter EXPOSED PAD VARIATIONS DOWN BONDS ALLOWED NOTES: 1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994. 2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES. 3. N IS THE TOTAL NUMBER OF TERMINALS. 4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE. 5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.20 mm AND 0.25 mm FROM TERMINAL TIP. 6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY. 7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION. 8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS. 9. DRAWING CONFORMS TO JEDEC MO220 REVISION C. PACKAGE OUTLINE 12, 16L, THIN QFN, 3x3x0.8mm 21-0136 E 2 2 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 11 © 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. MAX1479 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)