MICREL MAQRF112YMM

MAQRF112
Automotive, 300MHz to 450MHz,
+10dBm, 1.8V to 3.6V, ASK/FSK
Transmitter with Shutdown
General Description
Features
The MAQRF112 is a high-performance, easy to use, true
“Data-In, RF-Out”, ASK/FSK, phase-locked loop (PLL)
based, transmitter IC for automotive applications in the
300MHz to 450MHz frequency range. These applications
include remote keyless entry (RKE) and tire pressure
monitoring systems (TPMS). The device needs only a lowcost crystal to precisely set the desired RF frequency, and
a few external components for matching the power
amplifier output to the antenna.
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•
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The MAQRF112 operates over the 1.8V to 3.6V operating
range. It delivers +10dBm (CW) output power into a 50Ω
load, while consuming 11.5mA of supply current from a
3.0V power supply. In ASK mode, the device consumes
6.9mA of supply current at a data rate of 1kbps
(Manchester 50%). It features a low-power shutdown
mode in which the device typically consumes 50nA of
supply current. This makes it an ideal solution for battery
powered applications.
The MAQRF112 is Automotive Qualified (AEC-Q100) and
is rated to operate over the –40°C to +125°C temperature
range. For non-automotive applications that do not require
AEC-Q100 qualification, consider the MICRF112. For
ASK-only applications that do not require shutdown,
consider the MICRF113 in SOT23-6.
AEC-Q100 Automotive Qualified
300MHz to 450MHz frequency range
Data rates up to 50kbps ASK/10kbps FSK
1.8V to 3.6V operating voltage range
+10dBm output power (CW) at 3.0V
11.5mA of supply current at +10dBm (CW)
6.9mA of supply current at 1kbps (ASK, Manchester)
50nA supply current in shutdown mode
Needs only one crystal to set the desired RF frequency
–40˚C to +125˚C operating temperature range
10-pin MSOP package (4.9mm x 3.0mm)
Applications
• Remote keyless entry systems (RKE)
• Tire pressure monitoring systems (TPMS)
Ordering Information
Part Number
Temp. Range
Package
MAQRF112YMM
–40°C to +125°C
10-Pin MSOP
Datasheets and support documentation are available on
Micrel’s web site at: www.micrel.com.
Typical Application
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
February 7, 2013
Revision 1.0
Micrel, Inc.
MAQRF112
Pin Configuration
10-Pin MSOP (YMM)
Pin Description
Pin Number
Pin Name
Pin Function
1
ASK
ASK Data Input and PA Enable. When EN is set to a logic-level HIGH and ASK is set to a logiclevel HIGH, the power amplifier (PA) is enabled. A logic-level LOW on ASK disables the power
amplifier. Apply a data stream less than 50Kbps (Manchester Encoded, 50% duty-cycle) for ASK
modulation. To transmit with FSK modulation, both EN and ASK need to be set to a logic-level
HIGH, while the FSK pin is modulated.
2
XTLIN
Reference Oscillator Input Connection. Connect a crystal between XTLIN and XTLOUT. Connect
a load capacitor from XTLIN to ground, based on the recommendations of the crystal
manufacturer.
3
XTLOUT
Reference Oscillator Output Connection. Connect a crystal between XTLIN and XTLOUT.
Connect a load capacitor from XTLOUT to ground, based on the recommendations of the crystal
manufacturer.
4
VSS
5
XTAL_MOD
6
FSK
FSK Data Input. A logic-level LOW opens the FSK crystal pulling switch, providing high
impedance (>1MΩ) between the XTAL_MOD pin and VSS (ground). A logic-level HIGH closes
the switch, providing low impedance (15Ω) between XTAL_MOD and VSS (ground). This parallels
the crystal pulling capacitor, CFSK, with the crystal load capacitor, CLOAD, and pulls the reference
frequency to achieve FSK modulation. For ASK-only operation, pulling this pin low is
recommended.
7
EN
Enable/Shutdown Input. A logic-level LOW disables the entire device, placing it in a low-power
shutdown mode. A logic-level HIGH enables the crystal oscillator, PLL, voltage-controlled
oscillator (VCO), and control blocks, if the supply voltage is above the undervoltage lockout
(UVLO) voltage. The power amplifier is enabled when a logic-level HIGH is applied to EN and
ASK.
Ground.
FSK Crystal Pulling Switch Connection. For FSK modulation, connect a capacitor between the
XTAL_MOD pin and XTLOUT. For ASK-only operation, this pin can be left unconnected.
8
VSSPA
Power Amplifier Ground.
9
PAOUT
Open Collector of Power Amplifier Output. Pull the PA_OUT pin to VDD through an inductor to
properly bias the output stage. Add a pull-up resistor in series to reduce bias current and to
achieve lower output power and lower supply current operation. A matching network is required to
match the output to desired load (PCB antenna, wire antenna, or 50Ω load) to achieve best output
power, supply current, and spectral performance. See the “Applications Information” section for
recommended power supply bypassing.
10
VDD
February 7, 2013
Power Supply for Crystal Oscillator, Phase-Locked Loop, Voltage-Controlled Oscillator, and
Control Blocks. See the “Applications Information” section for recommended power supply
bypassing.
2
Revision 1.0
Micrel, Inc.
MAQRF112
Absolute Maximum Ratings(1)
Operating Ratings(2)
Supply Voltage (VVDD) ................................................. +4.3V
Voltage on PAOUT (VPAOUT) ........................................ +7.2V
Logic Inputs (VASK, VFSK, VEN) ....... VVSS – 0.3 to VVDD + 0.3V
Storage Temperature Range ................... –65°C to + 150°C
Lead Temperature (soldering, 10s) .......................... +260°C
ESD Rating.................................................................Note 3
Supply Voltage (VVDD, VPAOUT)………………+1.8V to +3.6V
Input Voltage (VASK, VFSK, VEN)….........................0V to VVDD
Junction Temperature (TJ) ........................ –40°C to +125°C
Transmitter Frequency Range (fRF) ...... 300MHz to 450MHz
Thermal Resistance, (θJA)………………………….130°C/W
Electrical Characteristics(4)
VVDD = 3.0V, TA = +25°C, fREFOSC = 9.84375MHz for 315MHz, fREFOSC = 13.560MHz for 433.92MHz, ASK = EN = VDD.
MICRF/MAQRF112 50Ω Evaluation Board. Bold values indicate TA = –40°C to +125°C unless otherwise noted. 1Kbps data rate, 50%
duty cycle, pulse width = 500µs.
Parameter
Condition
Min
Typ
Max
Units
0.05
3
µA
Power Supply
Standby Supply Current
VVDD = 3.6V, VEN = 0V
VVDD = VASK = 3.0V
11.5
VVDD = VASK = 3.6V
12.1
VVDD = VASK = 3.0V
11.6
VVDD = VASK = 3.6V
12.1
VVDD = 3.0V, VASK = 0V
2.4
VVDD = 3.6V, VASK = 0V
2.5
VVDD = 3.0V, VASK = 0V
2.7
VVDD = 3.6V, VASK = 0V
2.8
fRF = 315MHz
VVDD = 3.0V, VASK = 1kHz
6.9
mA
fRF = 433.92MHz
VVDD = 3.0V, VASK = 1kHz
7.2
mA
fRF = 315MHz
Mark Supply Current
fRF = 433.92MHz
fRF = 315MHz
SPACE Supply Current
fRF = 433.92MHz
ASK Modulated Supply
Current
mA
14.5
mA
mA
15.0
mA
mA
3.5
mA
mA
3.8
mA
RF Output Section and Modulation Limits
Output Power Level
fRF = 315MHz
5
10
dBm
fRF = 433.92MHz
6
10
dBm
fHARMONIC = 630MHz
–53
dBc
fHARMONIC = 945MHz
–53
dBc
fHARMONIC = 867.84MHz
–51
dBc
fHARMONIC = 1301.76MHz
–65
dBc
fRF = 315MHz
80
dBc
fRF = 433.92MHz
90
dBc
10
Kbps
±25
kHz
VASK = 3.0V
fRF = 315MHz
Harmonic Output
fRF = 433.92MHz
Extinction Ratio for ASK
FSK Modulation
(4)
Maximum Data Rate
Manchester Encoded (50% Duty Cycle)
Maximum Frequency
Deviation
Crystal = HC49/US, load capacitor = 10pF
XTAL_MOD to VSS
Impedance, RDSon
(4)
1
FSK = VSS
MΩ
FSK = VDD
15
Manchester Encoded (50% Duty Cycle)
50
35
Ω
ASK Modulation
Maximum Data Rate
February 7, 2013
3
kbps
Revision 1.0
Micrel, Inc.
Parameter
MAQRF112
Condition
Min
(5)
Occupied Bandwidth
fRF = 315MHz
Typ
Max
Units
630
kHz
670
kHz
fOFFSET = 100kHz
–76
dBc/Hz
fOFFSET = 1000kHz
–79
dBc/Hz
fOFFSET = 100kHz
–72
dBc/Hz
fOFFSET = 1000kHz
–81
dBc/Hz
2
pF
400
µs
(5)
fRF = 433.92MHz
VCO Section
fRF = 315MHz
Single Side-Band Phase
Noise
fRF = 433.92MHz
Reference Oscillator Section
XTLIN, XTLOUT,
XTLMOD
Pin capacitance
Oscillator Start-Up Time
Crystal: HC49S, Note 4
Digital/Control Section
Digital Input Threshold
Voltage
(EN, ASK, and FSK)
High (VIH)
Digital Input Current
(EN, ASK, and FSK)
High (IIH), VDD = 3.6V
Low (IIL), VDD = 3.6V
0.8VDD
V
0.2VDD
V
0.05
1
µA
0.05
1
µA
Low (VIL)
Supply Undervoltage Lock
Out (UVLO)
1.6
V
Notes:
1. Exceeding the absolute maximum ratings can damage the device.
2. The device is not guaranteed to function outside its operating ratings.
3. Devices are ESD sensitive. Handling precautions are recommended. Human body model, 1.5kΩ in series with 100pF.
4. Dependent on crystal.
5. RBW = 100kHz, OBW measured at –20dBc.
6. Data rate = 50kbps, pulse width = 10µs, pulse repetition time = 20µs.
February 7, 2013
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Revision 1.0
Micrel, Inc.
MAQRF112
Typical Characteristics
(MAQRF112, 50Ω Evaluation Board, VVDD = 3.0V, VASK = VEN = VDD, TA = +25°C unless otherwise noted)
Supply Current vs. Supply Voltage
fRF = 315MHz, VASK = GND
Supply Current vs. Supply Voltage
fRF = 315MHz, VASK = VDD
2.6
12.0
7.5
TA = +25˚C
ASK Modulated
Supply Current vs. Supply Voltage
fRF = 315MHz, VASK = 1Kbps (50%)
10.5
10.0
9.5
TA = -40˚C
9.0
2.5
2.4
TA = +125˚C
2.3
TA = +25˚C
2.2
8.5
2.1
2.4
2.7
3.0
3.3
1.8
3.6
2.1
TA = +25˚C
TA = +125˚C
6.5
6.0
TA = -40˚C
5.5
2nd HARMONIC SUPPRESSION (dBc)
11.0
TA = +25˚C
10.0
9.5
9.0
8.5
8.0
TA = -40˚C
7.0
6.5
6.0
TA = +125˚C
5.5
5.0
1.8
2.1
2.4
2.7
3.0
3.0
3.3
5.0
3.6
1.8
2.1
3.3
3.6
SUPPLY VOLTAGE (V)
Output Power and Supply Current
vs. RBIAS
fRF = 315MHz, VASK = VDD
TA = +125˚C
-45
TA = -40˚C
-50
TA = +25˚C
-55
2.1
2.4
2.7
3.0
SUPPLY VOLTAGE (V)
2.7
3.0
3.3
3.6
3rd Harmonic vs. Supply Voltage
fRF = 315MHz, VASK = VDD
-40
1.8
2.4
SUPPLY VOLTAGE (V)
2nd Harmonic vs. Supply Voltage
fRF = 315MHz, VASK = VDD
Output Power vs. Supply Voltage
fRF = 315MHz, VASK = VDD
7.5
2.7
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
10.5
2.4
3rd HARMONIC SUPPRESSION (dBc)
1.8
OUTPUT POWER (dBm)
7.0
TA = -40˚C
2.1
8.0
12
SUPPLY CURRENT (mA)
TA = +125˚C
11.0
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
11.5
3.3
3.6
-50
-51
-52
TA = +25˚C
-53
-54
TA = +125˚C
-55
TA = -40˚C
-56
1.8
2.1
2.4
2.7
3.0
3.3
3.6
SUPPLY VOLTAGE (V)
13
10
12
8
11
6
10
4
Supply Current
9
2
8
0
7
-2
6
-4
0
SUPPLY CURRENT (mA)
OUTPUT POWER (dBm)
Output Power
5
100 200 300 400 500 600 700 800 900 1000
RBIAS (Ω)
February 7, 2013
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Revision 1.0
Micrel, Inc.
MAQRF112
Typical Characteristics (Continued)
Supply Current vs. Supply Voltage
fRF = 433.92MHz, VASK = GND
Supply Current vs. Supply Voltage
fRF = 433.92MHz, VASK = VDD
2.9
12.5
TA = +125˚C
11.0
10.5
10.0
TA = -40˚C
9.5
2.8
TA = +125˚C
2.7
2.6
TA = +25˚C
2.5
2.4
8.5
2.1
2.4
2.7
3.0
3.3
2.1
SUPPLY VOLTAGE (V)
OUTPUT POWER (dBm)
2nd HARMONIC SUPPRESSION (dBc)
TA = +25˚C
10.0
TA = -40˚C
9.0
8.5
8.0
7.5
7.0
6.5
TA = +25˚C
6.0
5.5
5.0
1.8
2.1
2.4
2.7
3.0
2.7
2.4
3.0
3.3
6.0
TA = -40˚C
3.6
1.8
2.1
3.3
3.6
SUPPLY VOLTAGE (V)
TA = -40˚C
-50
TA = +25˚C
-55
TA = +125˚C
-60
2.1
2.4
2.7
3.0
SUPPLY VOLTAGE (V)
2.7
3.0
3.3
3.6
3rd Harmonic vs. Supply Voltage
fRF = 433.92MHz, VASK = VDD
-45
1.8
2.4
SUPPLY VOLTAGE (V)
2nd Harmonic vs. Supply Voltage
fRF = 433MHz, VASK = VDD
11.0
9.5
6.5
SUPPLY VOLTAGE (V)
Output Power vs. Supply Voltage
fRF = 433.92MHz, VASK = VDD
10.5
7.0
5.5
1.8
3.6
3rd HARMONIC SUPPRESSION (dBc)
1.8
TA = +25˚C
TA = -40˚C
9.0
3.3
3.6
-55
TA = +25˚C
-60
-65
TA = +125˚C
-70
TA = -40˚C
-75
1.8
2.1
2.4
2.7
3.0
3.3
3.6
SUPPLY VOLTAGE (V)
Output Power and Supply Current
vs. RBIAS
fRF = 433.92MHz, VASK = VDD (Mark)
13
12
Output Power
8
11
6
10
4
Supply Current 9
2
8
0
7
-2
6
-4
5
0 100 200 300 400 500 600 700 800 900 1000
SUPPLY CURRENT (mA)
10
OUTPUT POWER (dBm)
SUPPLY CURRENT (mA)
TA = +25˚C
11.5
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
7.5
TA = +125˚C
12.0
12
Supply Current vs. Supply Voltage
fRF = 433MHz, VASK = 1Kbps (50%)
RBIAS (Ω)
February 7, 2013
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Micrel, Inc.
MAQRF112
Functional Diagram
Figure 1. Functional Block Diagram MAQRF112
Phase-Locked Loop (PLL) Synthesizer
The PLL of the MAQRF112 integrates a VCO, a “Divideby-32” frequency divider, a phase-frequency detector
(PFD), a charge pump, and a loop -filter. The VCO tunes
from 300MHz to 450MHz and drives both the PA and the
divider. The divider divides the VCO frequency by 32,
and the PFD compares the divided frequency against
the reference frequency generated by the crystal
oscillator. Any phase difference between these signals
generates a current into the loop filter, which closes the
loop with the VCO providing a precise, low phase-noise
VCO, with quick start-up time. The PLL also includes an
internal Lock indicator which will keep the PA disabled
until the PLL has locked.
Functional Description
The MAQRF112 is a 1.8V to 3.6V, 300MHz to 450MHz,
+10dBm ASK/FSK transmitter. It has an integrated
crystal oscillator, phase-locked loop (PLL), voltagecontrolled oscillator (VCO), power amplifier (PA),
undervoltage lockout (UVLO) and three logic-level inputs
for ASK modulation/PA enable, FSK modulation, and
on/off control. The device requires only a crystal, crystal
loading capacitors, supply bypassing capacitors, and a
few output matching components to match the PA to the
load (loop antenna, 50Ω load, or whip antenna).
The device achieves ASK modulation using on and off
modulation of the power amplifier. FSK modulation is
achieved by pulling the crystal oscillator when an on-chip
switch shunts an additional capacitance across the
crystal.
The MAQRF112 is enabled or placed into a low-power
shutdown mode through the logic-level EN input. An
undervoltage lockout disables the PA until the power
supply has reached a valid operating range. The only
external components required are a crystal, antenna
matching components, and power supply bypassing.
Figure 1 shows the block diagram of the MAQRF112.
February 7, 2013
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Micrel, Inc.
MAQRF112
Crystal Oscillator
The crystal oscillator provides a precision reference
frequency to the PLL. The MAQRF112 uses a Pierce
oscillator, which is operated in parallel resonant mode. It
is designed to accept fundamental mode crystals, which
operate
from
9.375MHz
to
14.0625MHz,
to
accommodate the “Divide-by-32” divider of the PLL. The
crystal frequency is:
fXTAL = fRF ÷ 32
ESR
(Ω)
CPAR
(pF)
CMO
(fF)
CLOAD
(pF)
20
1 to 10
10 to 40
10 to 70
300
1 to 5
10 to 40
10 to 30
Table 1. Recommended Crystal Oscillator Values
Referring to Figure 2, Equation 2 is an example of CL1
and CL2 calculation for a crystal load capacitance, CLOAD
= 10pF. The load capacitance seen by the crystal is
calculated as follows:
Eq. 1
Most applications require an initial frequency tolerance
of <±30ppm at TA = +25°C and an overtemperature
stability of ±25ppm to ±50ppm, but that can vary
depending on the desired operating temperature range
and performance required versus crystal cost. The
MAQRF112 Pierce oscillator can work with values of
equivalent series resistance (ESR) in the range of 5Ω to
300Ω.
C LOAD =
1
+ C STRAY
1
1
+
C L1 C L 2
Eq. 2
Therefore, the calculation of CL1 and CL2 for a specified
CLOAD of 10 pF is as follows:
ASK Crystal Oscillator Operation
Figure 2 shows a reference oscillator circuit
configuration for ASK operation. The crystal is placed
between the XTLIN (pin 2) and XTLOUT (pin 3). Table 1
shows corresponding ESR values to crystal parameter
values. CPAR is the parallel capacitance determined from
internal crystal substrate contacts and board parasitic
capacitance.
CSTRAY = 1.5pF (stray pin and PCB capacitance)
CL1 = CL2 = (CLOAD – CSTRAY) × 2
CL1 = CL2 = 18pF
The final value of CL1 and CL2 may need to be optimized
on the bench because of board stray parasitics.
Capacitors, CL1 and CL2, are placed from XTLIN to
ground and from XTLOUT to ground. When specifying a
crystal to a crystal manufacturer, the load capacitance,
CLOAD, must be specified as part of the manufacturing
crystal design.
For ASK-only operation, connect the FSK pin to VSS
and leave XTAL_MOD unconnected.
Figure 2. Reference Oscillator ASK Operation
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Micrel, Inc.
MAQRF112
FSK Operation
Figure 3 shows the reference oscillator circuit
configuration for FSK operation. To operate the
MAQRF112 device in FSK mode, one additional
capacitor, CFSK, is needed between the XTLOUT pin and
the XTAL_MOD pin. Crystal parameters for FSK
operation are the same as for ASK operation except:
•
When the ESR of the crystal is at 20Ω,
CFSK + CLOAD must not exceed 70pF.
•
When the ESR of the crystal is at 300Ω,
CFSK + CLOAD must not exceed 30pF.
Figure 4. MAQRF112 Frequency Deviation
FSK modulation is achieved by pulling the crystal at the
desired data rate. Pulling the crystal frequency is done
by shunting CFSK with CL2. A logic-level LOW on the FSK
data input opens the internal switch, removing CFSK,
which pulls the reference oscillator high. A logic-level
HIGH closes the switch, paralleling the crystal CFSK with
CL2, which pulls the reference frequency low. See
Figure 4. RS is used to minimize crystal RF spurs when
using a low-quality crystal. A typical value of RS is 0Ω to
1000Ω and depends on the crystal chosen. Board-level
optimization is required to optimize for frequency
deviation and occupied bandwidth requirements.
Figure 3. Reference Oscillator FSK Operation
CL1, CL2 and CFSK Calculation
Referring to Figure 3, CL1, CL2, and CFSK values depend
on CLOAD. Capacitor calculation is similar to ASK
operation, with the addition of a shunt capacitor, CFSK.
Selection of CL1, CL2, and CFSK determine RF center
frequency, high-side, and low-side RF frequency. See
Figure 4.
Use Equation 3 to calculate the FSK high-side frequency
calculation.
C LOAD =
1
+ C STRAY
1
1
+
C L1 C L 2
Eq. 3
Use Equation 4 to calculate the FSK low-side frequency
calculation.
C LOAD =
1
+ C STRAY
1
1
+
C L1 C L 2 + C FSK
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Eq. 4
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Micrel, Inc.
MAQRF112
Power Amplifier
The power amplifier serves two purposes: to buffer the
VCO from external elements and to amplify the phaselocked signal. The power amplifier can produce +10dBm
at 3V (typical). The PA output matching network to a
50Ω load or to a PCB antenna serves two purposes: to
optimize PA output power and to minimize unwanted
harmonics. Matching values are a function of operational
frequency and load impedance seen by the MAQRF112.
The “Application Information” section provides matching
values for 315MHz and 433.92MHz.
Enable Control
The Enable control gates the ASK data to the PA. It
allows transmission only when the lock, crystal
amplitude, and undervoltage detect conditions are valid.
An Enable and ASK logic-level HIGH places the PA in
the Mark condition. An Enable logic-level LOW disables
the power amplifier. An Enable logic-level HIGH and an
ASK logic-level LOW places the PA in the Space
condition. To transmit with FSK modulation, both the EN
and ASK pins must be set to a logic-level HIGH while the
FSK pin is digitally modulated with a logic-level signal.
Power Control Using an External Resistor
A resistor (R7 on the 50Ω evaluation board) is in series
with the output RF choke and can be used to adjust the
RF output power and supply current. This adjustment
can also be used to lower the power to meet FCC
compliance. See the “Output Power and Supply Current
vs. RBIAS” graphs in the “Typical Characteristics” section
for examples of performance on the 50Ω evaluation
boards. An evaluation board using a PCB antenna can
have its radiated power lowered by adjusting this series
resistor. The resistor value must be calibrated
empirically, and will vary depending on the final product
PCB layout and form factor.
ASK Input Control
An ASK logic-level data input modulates the RF carrier
when the PA is enabled. Apply a data stream less than
50Kbps (Manchester Encoded, 50% duty-cycle) for ASK
modulation. Tying the FSK pin low is recommended
when ASK modulation is used.
February 7, 2013
Undervoltage Detect
The undervoltage detect block senses the operating
voltage. If the operating voltage falls below 1.6V, the
undervoltage detect block sends a signal to the enable
control block to disable the PA.
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Micrel, Inc.
MAQRF112
Application Information
Crystal PCB Layout
Crystal PCB board layout affects the calculated
frequency deviation. It is recommended that the crystal
be located close to the XTLIN and XTLOUT pins to
minimize trace lengths. Trace thickness should be no
greater than 20mil.
The MAQRF112 is ideal for driving a 50Ω load monopole
or a PCB loop antenna. The following sections discuss
PCB loop antenna and 50Ω output configurations.
Output Matching Network
Part of the function of the output network is to attenuate
the second and third harmonics. When matching to a
transmit frequency, take care not only to optimize for
maximum output power but to attenuate unwanted
harmonics. Proper matching to a PCB antenna or a 50Ω
load optimizes current requirements.
Antenna Layout
The antenna trace layout affects directivity. No ground
plane should be under the antenna trace. For consistent
performance, do not place components inside the loop of
the antenna. Gerbers for a suggested layout are
available on the Micrel website at: www.micrel.com.
Layout Issues
PCB layout is extremely important to achieve optimum
performance and consistent manufacturing results. Be
careful with the orientation of the components to ensure
that they do not couple or decouple the RF signal. PCB
trace length should be short, to minimize parasitic
inductance (1in ~ 20nH). For example, depending on
inductance values, a 0.5in trace can change the
inductance by as much as 10%. To reduce parasitic
inductance, the use of wide traces and a ground plane
under signal traces is recommended. Use vias with low
inductance values for components requiring a
connection to ground.
ASK PCB Loop Antenna Application Circuit
Figure 5 is an example of an ASK circuit configuration
using a PCB loop antenna. Table 2 lists modified values
for both 315MHz and 433.92MHz configurations,
including crystal values for 315MHz and 433.92MHz
operation. Values are dependent on PCB board layout.
Refer to the Micrel website for a reference design and
PCB Gerber files.
Frequency
(MHz)
L1
(nH)
C5
(pF)
L4
(nH)
C7
(pF)
Y1
(MHz)
315
470
10
150
4.7
9.84375
433.92
680
10
82
3.9
13.5600
Table 2. PCB Antenna Matching Network
Figure 5. MAQRF112 ASK Application Circuit with PCB Loop Antenna
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Micrel, Inc.
MAQRF112
FSK PCB Loop Antenna Application Circuit
Figure 6 is an example of a FSK circuit configuration
using a PCB loop antenna. Table 3 lists modified values
for both 315MHz and 433.92MHz configurations,
including crystal values for 315MHz and 433.92MHz
operation. Antenna matching values are dependent on
PCB board layout. Refer to the Micrel website for a
reference design and PCB Gerber files. Table 4 lists
crystal capacitor load values for a frequency deviation of
±25kHz. For crystal capacitor calculations, refer to the
“FSK Operation” section.
Frequency
(MHz)
L1
(nH)
C5
(pF)
L4
(nH)
C7
(pF)
Y1
(MHz)
315
470
10
150
4.7
9.84375
(1)
433.92
680
10
82
3.9
13.5600
(2)
Table 3. PCB Antenna Matching Network
Notes:
1. Y1 = Abracon ABLS-9.84375MHz-10-R50-K4Q for 315MHz
2. Y1 = Abracon ABLS-13.5600MHz-10-R50-K4Q for 433.92MHz
Center
Frequency
(MHz)
C14
(pF)
C13
(pF)
C8
(pF)
Frequency
Deviation
(kHz)
315
15
10
22
±25
433.92
18
6.8
15
±25
Table 4. Crystal Capacitor Values for FSK Operation
Figure 6. MAQRF112 FSK Application Circuit with PCB Loop Antenna
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Micrel, Inc.
MAQRF112
ASK 50Ω Load Application Circuit
Figure 7 is an example of an ASK circuit configuration
used to drive a 50Ω load. Table 5 lists modified values
for both 315MHz and 433.92MHz configurations,
including crystal values for 315MHz and 433.92MHz
operation. The matching network values are dependent
on PCB board layout. Refer to the Micrel website for a
reference design and the PCB Gerber files
Frequency
(MHz)
L1
(nH)
C5
(pF)
L2
(nH)
C7
(pF)
C11
(pF)
Y1
(MHz)
315
470
8.2
82
8.2
2.2
9.84375
433.92
470
2.2
82
6.8
1.2
13.5600
Table 5. 50Ω Load Matching Network
Figure 7. MAQRF112 ASK 50Ω Evaluation Board
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Micrel, Inc.
MAQRF112
FSK- 50Ω Load Application Circuit
Figure 8 is an example of a FSK circuit configuration
used to drive a 50Ω load. Table 6 lists modified values
for both 315MHz and 433.92MHz configurations,
including crystal values for 315MHz and 433.92MHz
operation. The matching network values are dependent
on PCB board layout. Refer to the Micrel website for a
reference design and PCB Gerber files. Table 7 lists
crystal capacitor load values for a frequency deviation of
±25 kHz. For crystal capacitor calculations, refer to the
“FSK Operation” section.
Frequency
(MHz)
L1
(nH)
C5
(pF)
L2
(nH)
C7
(pF)
C11
(pF)
Y1 (MHz)
315
470
8.2
82
8.2
2.2
9.84375
(1)
433.92
470
2.2
82
6.8
1.2
13.5600
(2)
Table 6. 50Ω Load Matching Network
Notes:
1. Y1 = Abracon ABLS-9.84375MHz-10-R50-K4Q for 315MHz
2. Y1 = Abracon ABLS-13.5600MHz-10-R50-K4Q for 433.92MHz
Center
Frequency
(MHz)
C17
(pF)
C18
(pF)
C9
(pF)
Frequency
Deviation
(kHz)
315
15
10
22
±25
433.92
18
6.8
15
±25
Table 7. 50Ω Load Matching Network
Figure 8. MAQRF112 FSK 50Ω Evaluation Board
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Micrel, Inc.
MAQRF112
Package Information(1)
10-Pin MSOP Package Type (YMM)
Note:
1. Package information is correct as of the publication date. For updates and most current information, go to www.micrel.com.
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Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this datasheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,
specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual
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February 7, 2013
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Revision 1.0