19-3806; Rev 1; 7/07 I2C Port Expander with 4 Push-Pull Outputs and 4 Open-Drain I/Os Features The MAX7323 2-wire serial-interfaced peripheral features eight I/O ports. Four ports are push-pull outputs and the other four are open-drain I/O ports, independent of supply voltage. The four I/O ports configured as inputs are continuously monitored for state changes (transition detection). State changes are indicated by the open-drain INT output. The interrupt is latched, allowing detection of transient changes. When the MAX7323 is subsequently accessed through the serial interface, any pending interrupt is cleared. The four push-pull and four open-drain outputs are rated to sink 20mA and are capable of driving LEDs. ♦ 400kHz Serial Interface ♦ +1.71V to +5.5V Operating Voltage ♦ 4 Push-Pull Output Ports Rated at 20mA Sink Current ♦ 4 Open-Drain I/O Ports Rated to 20mA Sink Current ♦ 4 I/O Ports Are Overvoltage Protected to +6V ♦ Transient Changes Are Latched, Allowing Detection Between Read Operations ♦ INT Output Alerts Change on Inputs ♦ AD0 and AD2 Inputs Select from 16 Slave Addresses The RST input clears the serial interface, terminating any I2C communication to or from the MAX7323. The MAX7323 uses two address inputs with four-level logic to allow 16 I 2 C slave addresses. The slave address also determines the power-up logic state for the I/O ports, and enables or disables internal 40kΩ pullups for the input ports in groups of two ports. The MAX7323 is one device in a family of pin-compatible port expanders with a choice of input ports, open-drain I/O ports, and push-pull output ports (see Table 1). The MAX7323 is available in 16-pin QSOP and 16-pin TQFN packages, and is specified over the automotive temperature range (-40°C to +125°C). Applications Cell Phones SAN/NAS Servers I2C ♦ Low 0.6µA (typ) Standby Current ♦ -40°C to +125°C Operating Temperature Range Ordering Information PART TEMP RANGE PINPACKAGE MAX7323AEE+ -40°C to +125°C 16 QSOP MAX7323ATE+ -40°C to +125°C 16 TQFN-EP* 3mm x 3mm 3.3V 0.047μF SCL SCL SDA SDA O6 RST RST P5 INT INT MAX7323 O7 P4 P3 P2 AD0 AD2 GND O1 O0 — E16-4 ADE T1633-4 Selector Guide Typical Application Circuit V+ PKG CODE +Denotes a lead-free package. *EP = Exposed paddle. Notebooks RAID Automotive μC TOP MARK OUTPUT OUTPUT I/O I/O I/O I/O OUTPUT OUTPUT OPENPUSH-PULL DRAIN OUTPUTS OUTPUTS INPUTS INTERRUPT MASK MAX7319 8 Yes — MAX7320 — — — 8 MAX7321 Up to 8 — Up to 8 — MAX7322 4 Yes — 4 MAX7323 Up to 4 — Up to 4 4 MAX7328 Up to 8 — Up to 8 — MAX7329 Up to 8 — Up to 8 — PART — Pin Configurations and Functional Diagram appear at end of data sheet. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX7323 General Description MAX7323 I2C Port Expander with 4 Push-Pull Outputs and 4 Open-Drain I/Os ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND.) Supply Voltage V+....................................................-0.3V to +6V SCL, SDA, AD0, AD2, RST, INT, P2–P5 ...................-0.3V to +6V O0, O1, O6, O7...............................................-0.3 to (V+ + 0.3V) O0, O1, O6, O7 Output Current........................................±25mA P2–P5 Sink Current...........................................................±25mA SDA Sink Current ............................................................... 10mA INT Sink Current..................................................................10mA Total V+ Current..................................................................50mA Total GND Current ...........................................................100mA Continuous Power Dissipation (TA = +70°C) 16-Pin QSOP (derate 8.3mW/°C above +70°C)...........667mW 16-Pin TQFN (derate 15.6mW/°C above +70°C) .......1250mW Operating Temperature Range .........................-40°C to +125°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (V+ = +1.71V to +5.5V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, TA = +25°C.) (Note 1) PARAMETER Operating Supply Voltage SYMBOL CONDITIONS V+ MIN TYP 1.71 MAX UNITS 5.50 V 1.6 V Power-On Reset Voltage VPOR V+ falling Standby Current (Interface Idle) ISTB SCL and SDA and other digital inputs at V+ 0.6 1.5 µA fSCL = 400kHz; other digital inputs at V+ 23 55 µA Supply Current (Interface Running) I+ Input High Voltage SDA, SCL, AD0, AD2, RST, P2–P5 VIH Input Low Voltage SDA, SCL, AD0, AD2, RST, P2–P5 VIL Input Leakage Current SDA, SCL, AD0, AD2, RST, P2–P5 IIH, IIL V+ ≤ 1.8V 0.8 x V+ V+ ≥ 1.8 0.7 x V+ V+ ≤ 1.8V 0.2 x V+ V+ ≥ 1.8V 0.3 x V+ SDA, SCL, AD0, AD2, RST, P2–P5 at V+ or GND, internal pullup disabled 10 VOL 105 180 V+ = +2.5V, ISINK = 10mA 131 240 V+ = +3.3V, ISINK = 15mA 154 290 160 310 VOH V+ = +1.71V, ISOURCE = 2mA V+ - 250 V+ - 30 V+ = +2.5V, ISOURCE = 5mA V+ - 360 V+ - 70 V+ = +3.3V, ISOURCE = 5mA V+ - 260 V+ - 100 V+ = +5V, ISOURCE = 10mA V+ - 350 V+ - 120 Output Low Voltage SDA VOLSDA ISINK = 6mA Output Low Voltage INT VOLINT ISINK = 5mA Port Input Pullup Resistor 2 RPU 25 V µA pF V+ = +1.71V, ISINK = 5mA V+ = +5V, ISINK = 20mA Output High Voltage O0, O1, O6, O7 +0.2 -0.2 Input Capacitance SDA, SCL, AD0, AD2, RST, P2–P5 Output Low Voltage O0, O1, O6, O7, P2–P5 V mV mV 250 mV 130 250 mV 40 55 kΩ _______________________________________________________________________________________ I2C Port Expander with 4 Push-Pull Outputs and 4 Open-Drain I/Os MAX7323 PORT AND INTERRUPT INT TIMING CHARACTERISTICS (V+ = +1.71V to +5.5V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Port Output Data Valid tPPV CL ≤ 100pF Port Input Setup Time tPSU CL ≤ 100pF 0 µs Port Input Hold Time tPH CL ≤ 100pF 4 µs INT Input Data Valid Time tIV CL ≤ 100pF 4 µs INT Reset Delay Time from STOP tIP CL ≤ 100pF 4 µs INT Reset Delay Time from Acknowledge tIR CL ≤ 100pF 4 µs 4 µs TIMING CHARACTERISTICS (V+ = +1.71V to +5.5V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 400 kHz Serial-Clock Frequency fSCL Bus Free Time Between a STOP and a START Condition tBUF 1.3 µs Hold Time (Repeated) START Condition tHD, STA 0.6 µs Repeated START Condition Setup Time tSU, STA 0.6 µs STOP Condition Setup Time tSU, STO Data Hold Time tHD, DAT 0.6 µs Data Setup Time tSU, DAT 100 ns SCL Clock Low Period tLOW 1.3 µs SCL Clock High Period tHIGH 0.7 µs (Note 2) 0.9 µs Rise Time of Both SDA and SCL Signals, Receiving tR (Notes 3, 4) 20 + 0.1Cb 300 ns Fall Time of Both SDA and SCL Signals, Receiving tF (Notes 3, 4) 20 + 0.1Cb 300 ns Fall Time of SDA, Transmitting tF,TX (Notes 3, 4) 20 + 0.1Cb 250 ns Pulse Width of Spike Suppressed tSP (Note 5) Capacitive Load for Each Bus Line Cb (Note 3) RST Pulse Width tW 500 ns tRST 1 µs RST Rising to START Condition Setup Time 50 ns 400 pF Note 1: All parameters tested at TA = +25°C. Specifications over temperature are guaranteed by design. Note 2: A master device must provide a hold time of at least 300ns for the SDA signal (referred to VIL of the SCL signal) in order to bridge the undefined region of SCL’s falling edge. Note 3: Guaranteed by design. Note 4: Cb = total capacitance of one bus line in pF. tR and tF measured between 0.3 x V+ and 0.7 x V+ with ISINK ≤ 6mA. Note 5: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns. _______________________________________________________________________________________ 3 Typical Operating Characteristics (TA = +25°C, unless otherwise noted.) STANDBY CURRENT vs. TEMPERATURE SUPPLY CURRENT (μA) 1.4 1.2 V+ = +5.0V 1.0 0.8 V+ = +3.3V V+ = +2.5V 0.6 0.4 V+ = +1.71V 40 V+ = +3.3V 30 20 V+ = +2.5V 10 0.2 V+ = +1.71V 0 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) TEMPERATURE (°C) OUTPUT VOLTAGE LOW vs. TEMPERATURE 0.30 V+ = +5.0V ISINK = 20mA 0.25 0.15 V+ = +3.3V ISINK = 15mA V+ = +2.5V ISINK = 10mA 0.10 0 3 2 V+ = +1.71V V+ = +2.5V ISOURCE = 2mA ISOURCE = 5mA 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) PIN 4 V+ = +3.3V ISOURCE = 15mA 4 1 V+ = +1.71V ISINK = 5mA 0.05 V+ = +5.0V ISOURCE = 20mA 5 OUTPUT VOLTAGE HIGH (V) 0.35 0.20 6 MAX7323 toc03 0.40 OUTPUT VOLTAGE HIGH vs. TEMPERATURE MAX7323 toc04 STANDBY CURRENT (μA) 1.6 fSCL = 400kHz V+ = +5.0V 50 MAX7323 toc02 fSCL = 0kHz 1.8 SUPPLY CURRENT vs. TEMPERATURE 60 MAX7323 toc01 2.0 OUTPUT VOLTAGE LOW (V) MAX7323 I2C Port Expander with 4 Push-Pull Outputs and 4 Open-Drain I/Os -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) NAME Pin Description FUNCTION QSOP TQFN 1, 3 15, 1 AD0, AD2 Address Inputs. Select device slave address with AD0 and AD2. Connect AD0 and AD2 to either GND, V+, SCL, or SDA to give four logic combinations (see Table 3). 2 16 RST Reset Input, Active Low. Drive RST low to clear the 2-wire interface. 4, 5, 11, 12 2, 3, 9, 10 6, 7, 9, 10 4, 5, 7, 8 P2–P5 O0, O1, Output Ports. O0, O1, O6, and O7 are push-pull outputs. O6, O7 I/O Ports. P2 to P5 are open-drain I/Os rated to +6V, 20mA. 8 6 GND 13 11 INT Ground Interrupt Output. INT is an open-drain output. 14 12 SCL I2C-Compatible Serial Clock Input 15 13 SDA I2C-Compatible Serial Data I/O 16 14 V+ Positive Supply Voltage. Bypass V+ to GND with a ceramic capacitor of at least 0.047µF as close to the device as possible. — EP EP Exposed Pad. Connect exposed pad to GND. _______________________________________________________________________________________ I2C Port Expander with 4 Push-Pull Outputs and 4 Open-Drain I/Os MAX7319–MAX7329 Family Comparison The MAX7319–MAX7323 family consists of five pincompatible, eight-port expanders. Each version is optimized for different applications. The MAX7328 and MAX7329 are industry-standard parts. The MAX7324–MAX7327 family consists of four pincompatible, 16-port expanders that integrate the functions of the MAX7320 and one of either the MAX7319, MAX7321, MAX7322, or MAX7323. Functional Overview The MAX7323 is a general-purpose port expander, operating from a +1.71V to +5.5V supply, that provides four push-pull output ports with 20mA sink, 10mA source drive capability, and four open-drain I/O ports with a 20mA sink capability. The four open-drain outputs are overvoltage protected to +6V independent of supply voltage. The MAX7323 is set to one of 16 I2C slave addresses (0x60 to 0x6F) using the address select inputs AD0 and AD2, and is accessed over an I2C serial interface up to 400kHz. The RST input clears the serial interface in case of a bus lockup, terminating any serial transaction to or from the MAX7323. Table 1. MAX7319–MAX7329 Family Comparison PART I2C SLAVE INPUTS ADDRESS INPUT INTERRUPT MASK OPENDRAIN OUTPUTS PUSHPULL OUTPUTS APPLICATION 8-PORT EXPANDERS Input-only versions: 8 input ports with programmable latching transition detection interrupt and selectable pullups. MAX7319 110xxxx 8 Yes — — MAX7320 101xxxx — — — 8 Offers maximum versatility for automatic input monitoring. An interrupt mask selects which inputs cause an interrupt on transitions, and transition flags identify which inputs have changed (even momentarily) since the ports were last read. Output-only versions: 8 push-pull outputs with selectable power-up default levels. Push-pull outputs offer faster rise time than opendrain outputs, and require no pullup resistors. I/O versions: 8 open-drain I/O ports with latching transition detection interrupt and selectable pullups. MAX7321 110xxxx Up to 8 — Up to 8 — MAX7322 110xxxx 4 Yes — 4 Open-drain outputs can level shift the logic-high state to a higher or lower voltage than V+ using external pullup resistors. Any port can be used as an input by setting the open-drain output to logic-high. Transition flags identify which inputs have changed (even momentarily) since the ports were last read. 4 input-only, 4 output-only versions: 4 input ports with programmable latching transition detection interrupt and selectable pullups; 4 push-pull outputs with selectable power-up default levels. _______________________________________________________________________________________ 5 MAX7323 Detailed Description MAX7323 I2C Port Expander with 4 Push-Pull Outputs and 4 Open-Drain I/Os Table 1. MAX7319–MAX7329 Family Comparison (continued) PART I2C SLAVE INPUTS ADDRESS INPUT INTERRUPT MASK OPENDRAIN OUTPUTS PUSHPULL OUTPUTS MAX7323 110xxxx Up to 4 — Up to 4 4 MAX7328 MAX7329 0100xxx 0111xxx Up to 8 — Up to 8 — APPLICATION 4 I/O, 4 output-only versions: 4 open-drain I/O ports with latching transition detection interrupt and selectable pullups. 4 push-pull outputs with selectable power-up default levels. 8 open-drain I/O ports with nonlatching transition detection interrupt and pullups on all ports. All ports power up as inputs (or logic-high outputs). Any port can be used as an input by setting the open-drain output to logic-high. 16-PORT EXPANDERS MAX7324 MAX7325 MAX7326 MAX7327 101xxxx and 110xxxx 8 Yes — 8 Software equivalent to a MAX7320 plus a MAX7319. Up to 8 — Up to 8 8 Software equivalent to a MAX7320 plus a MAX7321. 4 Yes — 12 Software equivalent to a MAX7320 plus a MAX7322. Up to 4 — Up to 4 12 Software equivalent to a MAX7320 plus a MAX7323. Any of the four open-drain ports can be configured as a logic input by setting the port output logic-high (logichigh for an open-drain output is high impedance). When the MAX7323 is read through the serial interface, the actual logic levels at the ports are read back. The four ports offer latching transition detection functionality. All input ports are continuously monitored for changes. An input change sets 1 of 4 flag bits that identify changed input(s). All flags are cleared upon a subsequent read or write transaction to the MAX7323. A latching interrupt output, INT, automatically flags data changes on any of the I/O ports used as inputs. The interrupt output INT, and all transition flags are deasserted when the MAX7323 is next accessed through the serial interface. Internal pullup resistors to V+ are selected by the address select inputs, AD0 and AD2. Pullups are enabled on the input ports in groups of two (see Table 3). Use the slave address selection to ensure that I/O ports used as inputs are logic-high on power-up. I/O ports with internal pullups enabled default to a logic-high output state. I/O ports with internal pullups disabled default to a logic-low output state. Output port power-up logic states are selected by the address select inputs AD0 and AD2. Ports default to logic-high or logic-low on power-up in groups of two (see Table 3). 6 Initial Power-Up On power-up, the transition detection logic is reset, and INT is deasserted. The interrupt mask register is set to 0x3C, enabling the interrupt output for transitions on all four input ports. The transition flags are cleared to indicate no data changes. The power-up default state of the four push-pull outputs is set according to the I2C slave address selection inputs, AD0 and AD2 (see Table 3). Power-On Reset The MAX7323 contains an integral power-on-reset (POR) circuit that ensures all registers are reset to a known state on power-up. When V+ rises above VPOR (1.6V max), the POR circuit releases the registers and 2-wire interface for normal operation. When V+ drops to less than VPOR, the MAX7323 resets all ports to the POR defaults (see Table 3). RST Input The active-low RST input operates as a reset that voids any current I 2C transaction involving the MAX7323, forcing the MAX7323 into the I2C STOP condition. The reset action does not clear the interrupt output (INT). Standby Mode When the serial interface is idle, the MAX7323 automatically enters standby mode, drawing minimal supply current. _______________________________________________________________________________________ I2C Port Expander with 4 Push-Pull Outputs and 4 Open-Drain I/Os MAX7323 Table 2. Read and Write Access to Eight-Port Expander Family PART I2C SLAVE ADDRESS INPUTS INTERRUPT MASK OPENDRAIN OUTPUTS PUSHPULL OUTPUTS I2C DATA WRITE I2C DATA READ MAX7319 110xxxx 8 Yes — — <I7–I0 interrupt mask> <I7–I0 port inputs> <I7–I0 transition flags> MAX7320 101xxxx — — — 8 <O7–O0 port outputs> <O7-O0 port inputs> MAX7321 110xxxx Up to 8 — Up to 8 — <P7–P0 port outputs> <P7–P0 port inputs> <P7–P0 transition flags> <O7, O6, I5–I2, O1, O0 port inputs> <0, 0, I5–I2 transition flags, 0, 0> <O7, O6, P5–P2, O1, O0 port inputs> <0, 0, P5–P2 transition flags, 0, 0> MAX7322 110xxxx 4 Yes — 4 <O7, O6 outputs, I5–I2 interrupt mask, O1, O0 outputs> MAX7323 110xxxx Up to 4 — Up to 4 4 <port outputs> MAX7328 0100xxx Up to 8 — Up to 8 — <P7–P0 port outputs> <P7–P0 port inputs> MAX7329 0111xxx Up to 8 — Up to 8 — <P7–P0 port outputs> <P7–P0 port inputs> Slave Address and Input Pullup Selection Address inputs AD0 and AD2 determine the MAX7323 slave address, select which inputs have pullup resistors, and set the default logic state on outputs. Pullups are enabled on the input ports in groups of two (see Table 3). The MAX7319, MAX7321, MAX7322, and MAX7323 use a different range of slave addresses (110xxxx) than the MAX7320 (101xxxx). The MAX7323 slave address is determined on each I2C transmission, regardless of whether the transmission is actually addressing the MAX7323. The MAX7323 distinguishes whether address inputs AD2 and AD0 are connected to SDA or SCL instead of fixed logic levels V+ or GND during this transmission. Therefore, the MAX7323 slave address can be configured dynamically in the application without cycling the device supply. On initial power-up, the MAX7323 cannot decode address inputs AD2 and AD0 fully until the first I 2C transmission. AD0 and AD2 initially appear to be connected to V+ or GND. This is important because the address selection determines the power-up default states of the output ports and I/O port initial logic state, and whether pullups are enabled. However, at powerup, the I2C SDA and SCL bus interface lines are high impedance at the pins of every device (master or slave) connected to the bus, including the MAX7323. This is guaranteed as part of the I2C specification. Therefore, address inputs AD2 and AD0 that are connected to SDA or SCL normally appear at power-up to be connected to V+. The pullup selection logic uses AD0 to select whether pullups are enabled for ports P2 and P3, and to set the initial logic state for O0 and O1. AD2 selects whether pullups are enabled for ports P4 and P5 and sets the initial logic state for O6 and O7. The rule is that a logic-high, SDA, or SCL connection selects the pullups and sets the default logic state to high. A logic-low deselects the pullups and sets the default logic state low (see Table 3). The port configuration is correct on power-up for a standard I2C configuration, where SDA or SCL are pulled up to V+ by the external I2C pullup resistors. There are circumstances where the assumption that SDA = SCL = V+ on power-up is not true—for example, in applications in which there is legitimate bus activity during power-up. Also, if SDA and SCL are terminated with pullup resistors to a different supply voltage than the MAX7323’s supply voltage, and if that pullup supply rises later than the MAX7323’s supply, then SDA or SCL may appear at power-up to be connected to GND. In such applications, use the four address combinations that are selected by connecting address inputs _______________________________________________________________________________________ 7 Table 3. MAX7323 Address Map DEVICE ADDRESS OUTPUTS POWER-UP DEFAULT A0 O7 O6 AD2 AD0 A6 A5 A4 A3 A2 A1 P5 P4 P3 SCL GND 1 1 0 0 0 0 0 1 1 1 1 0 0 0 0 Y Y — SCL V+ 1 1 0 0 0 0 1 1 1 1 1 1 1 1 1 Y Y Y Y SCL SCL 1 1 0 0 0 1 0 1 1 1 1 1 1 1 1 Y Y Y Y P2 O1 O0 O7 O6 P5 P4 P3 P2 O1 O0 SCL SDA 1 1 0 0 0 1 1 1 1 1 1 1 1 1 1 SDA GND 1 1 0 0 1 0 0 1 1 1 1 0 0 0 0 SDA V+ 1 1 0 0 1 0 1 1 1 1 1 1 1 1 1 SDA SCL 1 1 0 0 1 1 0 1 1 1 1 1 1 1 1 SDA SDA 1 1 0 0 1 1 1 1 1 1 1 1 1 1 1 GND GND 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 GND V+ 1 1 0 1 0 0 1 0 0 0 0 1 1 1 1 GND SCL 1 1 0 1 0 1 0 0 0 0 0 1 1 1 1 GND SDA 1 1 0 1 0 1 1 0 0 0 0 1 1 1 1 V+ GND 1 1 0 1 1 0 0 1 1 1 1 0 0 0 0 V+ V+ 1 1 0 1 1 0 1 1 1 1 1 1 1 1 1 V+ SCL 1 1 0 1 1 1 0 1 1 1 1 1 1 1 1 V+ SDA 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 AD2 and AD0 to V+ or GND (shown in bold in Table 3). These selections are guaranteed to be correct at power-up, independent of SDA and SCL behavior. If one of the other 12 address combinations is used, an unexpected combination of pullups might be asserted until the first I2C transmission (to any device, not necessarily the MAX7323) is put on the bus. I/O Port Inputs I/O port inputs switch at the CMOS logic levels as determined by the expander’s supply voltage, and are overvoltage tolerant to +6V, independent of the expander’s supply voltage. I/O Port Input Transition Detection All four I/O ports configured as inputs are monitored for changes since the expander was last accessed through the serial interface. The state of the I/O ports is stored in an internal “snapshot” register for transition monitoring. The snapshot is continuously compared with the actual input conditions, and if a change is detected for any port input, INT is asserted to signal a state change. An internal transition flag is set for that port. The input ports are sampled (internally latched into the snapshot register) and the old transition flags cleared during the I2C acknowledge of every MAX7323 read and write access. The previous port transition 8 40kΩ INPUT PULLUPS ENABLED — Y Y Y Y Y Y — — Y Y Y Y Y Y Y Y Y Y Y Y — — — — — — Y Y — — Y Y — — Y Y Y Y — — Y Y Y Y Y Y Y Y Y Y Y Y Pullups are not enabled for push-pull outputs. PIN CONNECTION Pullups are not enabled for push-pull outputs. MAX7323 I2C Port Expander with 4 Push-Pull Outputs and 4 Open-Drain I/Os flags are read through the serial interface as the second byte of a 2-byte read sequence. A long read sequence (more than 2 bytes) can be used to poll the expander continuously without the overhead of resending the slave address. If more than 2 bytes are read from the expander, the expander repeatedly returns the input port data, alternating with the transition flags. The inputs are repeatedly resampled and the transition flags repeatedly reset for each pair of bytes read. All changes that occur during a long read sequence are detected and reported. The INT output is not reasserted during a read sequence to avoid recursive reentry into an interrupt service routine. Instead, if a data change occurs that would normally cause the INT output to be set, the INT assertion is delayed until the STOP condition. INT is not reasserted upon a STOP condition if the changed input data is read before the STOP occurs. The INT logic ensures that unnecessary interrupts are not asserted, yet data changes are detected and reported no matter when the change occurs. Port Outputs Write 1 byte to the MAX7323 to set the output port levels for the four push-pull outputs, and the four opendrain I/O ports simultaneously. _______________________________________________________________________________________ I2C Port Expander with 4 Push-Pull Outputs and 4 Open-Drain I/Os MAX7323 SDA tLOW tBUF tSU,STA tSU,DAT tHD,STA tSU,STO tHD,DAT tHIGH SCL tHD,STA tR tF START CONDITION REPEATED START CONDITION STOP CONDITION START CONDITION Figure 1. 2-Wire Serial Interface Timing Details Serial Interface Serial Addressing The MAX7323 operates as a slave that sends and receives data through an I2C interface. The interface uses a serial data line (SDA) and a serial clock line (SCL) to achieve bidirectional communication between master(s) and slave(s). The master initiates all data transfers to and from the MAX7323 and generates the SCL clock that synchronizes the data transfer (Figure 1). SDA operates as both an input and an open-drain output. A pullup resistor, typically 4.7kΩ, is required on SDA. SCL operates only as an input. A pullup resistor, typically 4.7kΩ, is required on SCL if there are multiple masters on the 2-wire interface, or if the master in a single-master system has an open-drain SCL output. Each transmission consists of a START condition sent by a master, followed by the MAX7323’s 7-bit slave address plus R/W bit, 1 or more data bytes, and finally a STOP condition (Figure 2). START and STOP Conditions Both SCL and SDA remain high when the interface is not busy. A master signals the beginning of a transmission with a START (S) condition by transitioning SDA from high to low while SCL is high. When the master has finished communicating with the slave, the master issues a STOP (P) condition by transitioning SDA from low to high while SCL is high. The bus is then free for another transmission (Figure 2). Bit Transfer One data bit is transferred during each clock pulse. The data on SDA must remain stable while SCL is high (Figure 3). SDA SCL S P START CONDITION STOP CONDITION Figure 2. START and STOP Conditions Acknowledge The acknowledge bit is a clocked 9th bit the recipient uses to acknowledge receipt of each byte of data (Figure 4). Each byte transferred effectively requires 9 bits. The master generates the 9th clock pulse, and the recipient pulls down SDA during the acknowledge clock pulse, such that the SDA line is stable low during the high period of the clock pulse. When the master is transmitting to the MAX7323, the device generates the acknowledge bit because the MAX7323 is the recipient. When the MAX7323 is transmitting to the master, the master generates the acknowledge bit because the master is the recipient. Slave Address The MAX7323 has a 7-bit-long slave address (Figure 5). The 8th bit following the 7-bit slave address is the R/W bit. It is low for a write command, and high for a read command. The first (A6), second (A5), and third (A4) bits of the MAX7323 slave address are always 1, 1, and 0. Connect AD2 and AD0 to GND, V+, SDA, or SCL to select slave address bits A3, A2, A1, and A0. The MAX7323 has 16 possible slave addresses (Table 3), allowing up to 16 MAX7323 devices on an I2C bus. _______________________________________________________________________________________ 9 MAX7323 I2C Port Expander with 4 Push-Pull Outputs and 4 Open-Drain I/Os Accessing the MAX7323 The MAX7323 is accessed through an I2C interface. The transition flags are cleared, and INT is deasserted each time the device acknowledges the I2C slave address. A single-byte read from the MAX7323 returns the status of the four I/O ports and the four output ports (read back as inputs). A 2-byte read returns first the status of the four I/O ports and the four output ports (as for a single-byte read), followed by the four transition flags for the four I/O ports. A multibyte read (more than 2 bytes before the I2C STOP bit) repeatedly returns the port data, alternating with the transition flags. As the input data is resampled for each transmission, and the transition flags are reset each time, a multibyte read continuously returns the current data and identifies any changing I/O ports. If a port data change occurs during the read sequence, INT is reasserted after the I2C STOP bit. The MAX7323 does not generate another interrupt during a singlebyte or multibyte read. Port data is sampled during the preceding I 2 C acknowledge bit (the acknowledge bit for the I2C slave address in the case of a single-byte or 2-byte read). A single-byte write to the MAX7323 sets the logic state of the four I/O ports and the 4-bit interrupt mask register, and clears both the internal transition flags and the INT output when the master acknowledges the slave address byte. A multibyte write to the MAX7323 sets the logic state of the four I/O ports and the interrupt mask register repeatedly. Reading from the MAX7323 A read from the MAX7323 starts with the master transmitting the MAX7323’s slave address with the R/W bit set high. The MAX7323 acknowledges the slave address, and samples the ports during the acknowledge bit. INT deasserts during the slave address acknowledge. Typically, the master reads 1 or 2 bytes from the MAX7323, each byte being acknowledged by the master upon reception, with the exception of the last byte. When the master reads 1 byte from the MAX7323 it subsequently issues a STOP condition (Figure 6). 10 SDA SCL DATA LINE STABLE; CHANGE OF DATA DATA VALID ALLOWED Figure 3. Bit Transfer START CONDITION SCL CLOCK PULSE FOR ACKNOWLEDGMENT 1 2 8 9 SDA BY TRANSMITTER SDA BY RECEIVER S Figure 4. Acknowledge The MAX7323 transmits the current port data, clears the change flags, and resets the transition detection. INT deasserts during the slave acknowledge. The new snapshot data is the current input port data transmitted to the master, so any input port changes that occur during the transmission are detected. INT remains high until the STOP condition. The master can read 2 bytes from the MAX7323 and then issues a STOP condition (Figure 7). In this case, the MAX7323 transmits the current port data, followed by the change flags. The change flags are cleared, and transition detection restarted. INT goes high (high impedance if an external pullup resistor is not fitted) during the slave acknowledge. The new snapshot data is the current port data transmitted to the master, so any port changes occurring during the transmission are detected. INT remains high until the STOP condition. ______________________________________________________________________________________ I2C Port Expander with 4 Push-Pull Outputs and 4 Open-Drain I/Os MAX7323 . 1 SDA 1 0 A2 A3 A1 A0 R/W ACK LSB MSB SCL Figure 5. Slave Address PORT I/O P6 P7 S 1 1 0 MAX7321 SLAVE ADDRESS 1 A R/W D7 P5 D6 P4 P3 DATA D5 D4 P1 P2 D3 D2 P0 D1 D0 P N PORT SNAPSHOT PORT SNAPSHOT SCL tPH PORT I/O tIV tPSU tIR INT OUTPUT tIP INT REMAINS HIGH UNTIL STOP CONDITION Figure 6. Reading the MAX7323 (1 Data Byte) PORT I/O O7 S 1 1 0 MAX7321 SLAVE ADDRESS 1 A D7 R/W O6 D6 P5 D5 PORT SNAPSHOT P4 D4 P3 D3 INTERRUPT FLAGS P2 D2 O1 D1 O0 D0 PORT SNAPSHOT A 0 0 D7 D6 F5 D5 F4 D4 F3 D3 F2 D2 0 0 D1 D0 N P PORT SNAPSHOT SCL tPH PORTS tPSU tIV tIR INT OUTPUT INT REMAINS HIGH UNTIL STOP CONDITION tIP S = START CONDITION P = STOP CONDITION SHADED = SLAVE TRANSMISSION A = ACKNOWLEDGE N = NOT ACKNOWLEDGE Figure 7. Reading the MAX7323 (2 Data Bytes) ______________________________________________________________________________________ 11 MAX7323 I2C Port Expander with 4 Push-Pull Outputs and 4 Open-Drain I/Os 1 SCL 2 3 4 5 6 7 8 DATA TO PORT SLAVE ADDRESS SDA S START CONDITION 0 A DATA TO PORT DATA 1 A DATA 2 A R/W tPV INTERNAL WRITE TO PORT DATA OUT FROM PORT tPV DATA 1 VALID tPV S = START CONDITION P = STOP CONDITION DATA 2 VALID tPV SHADED = SLAVE TRANSMISSION N = NOT ACKNOWLEDGE Figure 8. Writing to the MAX7323 Writing to the MAX7323 A write to the MAX7323 starts with the master transmitting the MAX7323’s slave address with the R/W bit set low. The MAX7323 acknowledges the slave address, and samples the input ports during acknowledge. INT goes high (high impedance if an external pullup resistor is not fitted) during the slave acknowledge. The master can now transmit 1 or more bytes of data. The MAX7323 acknowledges these subsequent bytes of data and updates the interrupt mask register with each new byte until the master issues a STOP condition (Figure 8). Applications Information Port Input and I2C Interface Level Translation from Higher or Lower Logic Voltages The MAX7323’s SDA, SCL, AD0, AD1, RST, INT, and P2–P5 are overvoltage protected to +6V independent of V+. This allows the MAX7323 to operate from a lower supply voltage, such as +3.3V, while the I2C interface and/or some of the four I/O ports are driven from a higher logic level, such as +5V. The MAX7323 can operate from a higher supply voltage, such as +3V, while the I2C interface and/or some of the four I/O ports P2–P5 are driven from a lower logic level, such as +2.5V. Apply a minimum voltage of 0.7 x V+ to assert a logic-high on any input. For example, a MAX7323 operating from a +5V supply may not recognize a +3.3V nominal logic-high. One solution for inputlevel translation is to drive the MAX7323 inputs from open-drain outputs. Use a pullup resistor to V+ or a 12 higher supply to ensure a high logic voltage greater than 0.7 x V+. Port-Output Port-Level Translation The open-drain output architecture allows for level translation to higher or lower voltages than the MAX7323’s supply. Use an external pullup resistor on any output to convert the high-impedance logic-high condition to a positive voltage level. The resistor can be connected to any voltage up to +6V, and the resistor value chosen to ensure no more than 20mA is sunk in the logic-low condition. For interfacing CMOS inputs, a pullup resistor value of 220kΩ is a good starting point. Use a lower resistance to improve noise immunity, in applications where power consumption is less critical, or where a faster rise time is needed for a given capacitive load. Each of the four output ports O0, O1, O6, and O7 has protection diodes to GND (Figure 10). When a port is driven to a voltage lower than GND, the protection diode clamps the output to a diode drop below GND. Each of the four I/O ports P2–P5 also has a 40kΩ (typ) pullup resistor that can be enabled or disabled. When a port is driven to a voltage higher than V+, the body diode of the pullup enable switch conducts and the 40kΩ pullup resistor is enabled. When the MAX7323 is powered down (V+ = 0), each I/O port appears as a 40kΩ resistor in series with a diode connected to zero. Each port is protected to +6V under any of these circumstances (Figure 10). ______________________________________________________________________________________ I2C Port Expander with 4 Push-Pull Outputs and 4 Open-Drain I/Os AD0 O0 O1 P2 P3 P4 P5 O6 O7 AD2 SCL SDA INPUT I2C CONTROL FILTER I/O PORTS INT RST POWERON RESET MAX7323 Driving LED Loads When driving LEDs from one of the four output ports (O0, O1, O6, or O7), a resistor must be connected in series with the LED to limit the LED current to no more than 20mA. Connect the LED cathode to the MAX7321 port, and the LED anode to V+ through the series current-limiting resistor, RLED. Set the port output low to illuminate the LED. Choose the resistor value according to the following formula: RLED = (VSUPPLY - VLED - VOL) / ILED where: RLED is the resistance of the resistor in series with the LED (Ω). VSUPPLY is the supply voltage used to drive the LED (V). VLED is the forward voltage of the LED (V). VOL is the output-low voltage of the MAX7323 when sinking ILED (V). ILED is the desired operating current of the LED (A). For example, to operate a 2.2V red LED at 10mA from a +5V supply: RLED = (5 - 2.2 - 0.07) / 0.010 = 270Ω. V+ V+ MAX7323 PORTS O0, O1, O6, O7 OUTPUT Figure 9. MAX7323 Push-Pull Output Port Structure V+ V+ MAX7323 PULLUP ENABLE 40kΩ PORTS P2–P5 INPUT D S OUTPUT G Figure 10. MAX7323 I/O Port Structure ______________________________________________________________________________________ 13 MAX7323 Functional Diagram Driving Load Currents Higher than 20mA The MAX7323 can be used to drive loads, such as relays, that draw more than 20mA by paralleling outputs. Use at least one output per 20mA of load current; for example, a 5V, 330mW relay draws 66mA, and therefore, requires four paralleled outputs. Any combination of outputs can be used as part of a load-sharing design because any combination of ports can be set or cleared at the same time by writing to the MAX7323. Do not exceed a total sink current of 100mA for the device. The MAX7323 must+ be protected from the negative voltage transient generated when switching off inductive loads (such as relays), by connecting a reverse-biased diode across the inductive load. Choose the peak current for the diode to be greater than the inductive load’s operating current. Power-Supply Considerations The MAX7323 operates with a supply voltage of +1.71V to +5.5V over the -40°C to +125°C temperature range. Bypass the supply to GND with a ceramic capacitor of at least 0.047µF as close as possible to the device. For the TQFN version, additionally connect the exposed paddle to GND. O0 4 MAX7323 13 INT O1 5 12 O7 P2 6 11 O6 P3 7 10 P5 9 GND 8 QSOP P4 O6 14 SCL 12 11 10 9 SDA 13 8 P5 V+ 14 7 P4 6 GND 5 P3 MAX7323 AD0 15 RST 16 + *EP 1 2 3 4 P2 AD2 3 O7 15 SDA O1 RST 2 TOP VIEW INT 16 V+ O0 + AD0 1 SCL Pin Configurations AD2 MAX7323 I2C Port Expander with 4 Push-Pull Outputs and 4 Open-Drain I/Os TQFN *EXPOSED PADDLE, CONNECTED TO GND + 14 ______________________________________________________________________________________ I2C Port Expander with 4 Push-Pull Outputs and 4 Open-Drain I/Os QSOP.EPS PACKAGE OUTLINE, QSOP .150", .025" LEAD PITCH 21-0055 F 1 1 ______________________________________________________________________________________ 15 MAX7323 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) (NE - 1) X e E MARKING 12x16L QFN THIN.EPS MAX7323 I2C Port Expander with 4 Push-Pull Outputs and 4 Open-Drain I/Os E/2 D2/2 (ND - 1) X e D/2 AAAA e CL D D2 k CL b 0.10 M C A B E2/2 L E2 0.10 C C L 0.08 C C L A A2 A1 L L e e PACKAGE OUTLINE 8, 12, 16L THIN QFN, 3x3x0.8mm 21-0136 16 ______________________________________________________________________________________ I 1 2 I2C Port Expander with 4 Push-Pull Outputs and 4 Open-Drain I/Os PKG 8L 3x3 12L 3x3 REF. MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. A 0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80 b 0.25 0.30 0.35 0.20 0.25 0.30 0.20 0.25 0.30 D 2.90 3.00 3.10 2.90 3.00 3.10 2.90 3.00 3.10 E 2.90 3.00 3.10 2.90 3.00 3.10 2.90 3.00 3.10 e L 0.55 0.75 0.45 0.55 0.65 0.30 0.40 N 8 12 16 ND 2 3 4 NE 2 3 4 0 A1 A2 k 0.02 0.05 0 0.20 REF 0.25 - 0.02 0.05 0 0.20 REF - 0.25 - EXPOSED PAD VARIATIONS 0.50 BSC. 0.50 BSC. 0.65 BSC. 0.35 16L 3x3 0.02 0.50 0.05 0.20 REF - 0.25 - PKG. CODES TQ833-1 E2 D2 PIN ID MIN. NOM. MAX. MIN. NOM. MAX. 0.25 0.70 1.25 0.25 0.70 1.25 0.35 x 45° JEDEC WEEC T1233-1 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45° WEED-1 T1233-3 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45° WEED-1 T1233-4 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45° WEED-1 T1633-2 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45° WEED-2 T1633F-3 0.65 0.80 0.95 0.65 0.80 0.95 0.225 x 45° WEED-2 T1633FH-3 0.65 0.80 0.95 0.65 0.80 0.95 0.225 x 45° WEED-2 T1633-4 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45° WEED-2 T1633-5 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45° WEED-2 - NOTES: 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES. N IS THE TOTAL NUMBER OF TERMINALS. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.20 mm AND 0.25 mm FROM TERMINAL TIP. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS. DRAWING CONFORMS TO JEDEC MO220 REVISION C. MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONLY. NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY. WARPAGE NOT TO EXCEED 0.10mm. PACKAGE OUTLINE 8, 12, 16L THIN QFN, 3x3x0.8mm 21-0136 I 2 2 ____________________Revision History Pages changed at Rev 1: Title change—all pages, 1–17 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 17 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc. MAX7323 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)