KIT ATION EVALU E L B AVAILA 19-3879; Rev 0; 10/05 I2C Port Expander with Eight Push-Pull Outputs The MAX7320 2-wire serial-interfaced peripheral features eight push-pull outputs with selectable power-up logic states. The +5.5V tolerant RST input clears the serial interface, terminating any I 2 C † communication to or from the MAX7320. The MAX7320 uses two address inputs with four-level logic to allow 16 I 2 C slave addresses. The slave address also determines the power-up state level for the outputs in groups of four ports. The MAX7320 supports hot insertion. The serial interface SDA, SCL, AD0, AD2, and RST remain high impedance in power-down (V+ = 0V) with up to +6V asserted on them. Features ♦ 400kHz, +5.5V-Tolerant I2C Serial Interface ♦ +1.71V to +5.5V Operating Voltage ♦ Eight Push-Pull Output Ports with Selectable Power-Up Logic States ♦ RST Clears the Serial Interface, Terminating Any Serial Transaction to or from the MAX7320 ♦ AD0 and AD2 Inputs Select from 16 Slave Addresses ♦ Low 0.6µA (typ) Standby Current ♦ -40°C to +125°C Temperature Range The MAX7320 is one device in a family of pin-compatible port expanders with a choice of input ports, open-drain I/O ports, and push-pull output ports (see Table 1). The MAX7320 is available in 16-pin QSOP and 16-pin TQFN packages, and is specified over the automotive temperature range (-40°C to +125°C). Applications Cell Phones/PDAs Satellite Radios Notebooks Automotive RAID Servers Ordering Information PART TEMP RANGE PINPACKAGE MAX7320AEE+ -40°C to +125°C 16 QSOP MAX7320ATE+ -40°C to +125°C 16 TQFN 3mm x 3mm x 0.8mm TOP MARK PKG CODE — E16-4 ADB T1633-4 +Denotes lead-free package. Pin Configurations, Typical Application Circuit, and Functional Diagram appear at end of data sheet. Selector Guide PART INPUTS INTERRUPT MASK OPEN-DRAIN OUTPUTS PUSH-PULL OUTPUTS 8 Yes — — MAX7319 MAX7320 — — — 8 MAX7321 MAX7322 Up to 8 4 — Yes Up to 8 — — 4 MAX7323 Up to 4 — Up to 4 4 MAX7328* MAX7329** Up to 8 — — Up to 8 — — *Second source to PCF8574. **Second source to PCF8574A. †Pa lC S. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX7320 General Description MAX7320 I2C Port Expander with Eight Push-Pull Outputs ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND.) Supply Voltage V+....................................................-0.3V to +6V SCL, SDA, AD0, AD2, RST .......................................-0.3V to +6V O0–07...............................................................0.3V to V+ + 0.3V 00–07 Output Current .......................................................±25mA SDA Input Current.............................................................. 10mA Total V+ Current..................................................................50mA Total GND Current ...........................................................100mA Continuous Power Dissipation (TA = +70°C) 16-Pin QSOP (derate 8.3mW/°C over +70°C)..............667mW 16-Pin Thin QFN (derate 15.6mW/°C over +70°C) ....1250mW Operating Temperature Range .........................-40°C to +125°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (V+ = +1.71V to +5.5V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, TA = +25°C.) (Note 1) PARAMETER Operating Supply Voltage SYMBOL CONDITIONS V+ Power-On Reset Voltage VPOR Standby Current Voltage (Interface Idle) ISTB Supply Current (Interface Running) I+ Input High-Voltage SDA, SCL, AD0, AD2, RST VIH Input Low-Voltage SDA, SCL, AD0, AD2, RST VIL Input Leakage Current SDA, SCL, AD0, AD2, RST IIH, IIL Output Low Voltage SDA 2 MAX UNITS 5.50 V 1.6 V 0.6 1.5 µA fSCL = 400kHz; other digital inputs at V+ 23 55 µA V+ < 1.8V 0.8 x V+ V+ ≥ 1.8V 0.7 x V+ V V+ < 1.8V 0.2 x V+ V+ ≥ 1.8V 0.3 x V+ SDA, SCL, AD0, AD2, RST, O0–O7 at V+ or GND -0.2 +0.2 10 VOL 120 240 V+ = +2.5V, ISINK = 2mA 140 280 V+ = +3.3V, ISINK = 3mA 170 310 220 380 VOH VOLSDA V+ = +1.71V, ISOURCE = 1mA V+ - 250 V+ - 130 V+ = +2.5V, ISOURCE = 2mA V+ - 350 V+ - 200 V+ = +3.3V, ISOURCE = 3mA V+ - 290 V+ - 150 V+ = +5V, ISOURCE = 5mA V+ - 380 V+ - 230 ISINK = 6mA _______________________________________________________________________________________ V µA pF V+ = +1.71V, ISINK = 1mA V+ = +5V, ISINK = 5mA Output High Voltage O0–O7 TYP SCL and SDA and other digital inputs at V+ Input Capacitance SDA, SCL, AD0, AD2, RST Output Low Voltage O0–O7 MIN 1.71 mV mV 250 mV I2C Port Expander with Eight Push-Pull Outputs MAX7320 PORT AND TIMING CHARACTERISTICS (V+ = +1.71V to +5.5V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, TA = +25°C.) (Note 1) PARAMETER Port Output Data Valid SYMBOL tPPV CONDITIONS MIN TYP CL ≤ 100pF MAX UNITS 4 µs TIMING CHARACTERISTICS (V+ = +1.71V to +5.5V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 400 kHz Serial Clock Frequency fSCL Bus Free Time Between a STOP and a START Condition tBUF 1.3 µs Hold Time (Repeated) START Condition tHD, STA 0.6 µs Repeated START Condition Setup Time tSU, STA 0.6 µs STOP Condition Setup Time tSU, STO 0.6 µs Data Hold Time tHD, DAT Data Setup Time tSU, DAT SCL Low to Data Out Valid tVD, DAT (Note 3) 0.9 100 µs ns SCL low to SDA output valid 3.4 µs SCL Clock Low Period tLOW 1.3 µs SCL Clock High Period tHIGH 0.7 µs Rise Time of Both SDA and SCL Signals, Receiving tR (Notes 2, 4) 20 + 0.1Cb 300 ns Fall Time of Both SDA and SCL Signals, Receiving tF (Notes 2, 4) 20 + 0.1Cb 300 ns tF,TX (Notes 2, 4) 20 + 0.1Cb 250 ns Fall Time of SDA Transmitting Pulse Width of Spike Suppressed tSP (Note 5) Capacitive Load for Each Bus Line Cb (Note 2) RST Pulse Width tW 500 ns tRST 1 µs RST Rising to START Condition Setup Time 50 ns 400 pF Note 1: All parameters tested at TA = +25°C. Specifications over temperature are guaranteed by design. Note 2: Guaranteed by design. Note 3: A master device must provide a hold time of at least 300ns for the SDA signal (referred to VIL of the SCL signal) to bridge the undefined region of SCL’s falling edge. Note 4: Cb = total capacitance of one bus line in pF. tR and tF measured between 0.3 x V+ and 0.7 x V+, ISINK ≤ 6mA. Note 5: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns. _______________________________________________________________________________________ 3 Typical Operating Characteristics (TA = +25°C, unless otherwise noted.) STANDBY CURRENT vs. TEMPERATURE 1.4 1.2 V+ = +5.0V 1.0 V+ = +3.3V V+ = +2.5V 0.8 0.6 0.4 V+ = +1.71V MAX7320 toc02 40 V+ = +3.3V 30 20 V+ = +2.5V 10 0.2 V+ = +1.71V 0 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) TEMPERATURE (°C) OUTPUT VOLTAGE LOW vs. TEMPERATURE OUTPUT VOLTAGE HIGH vs. TEMPERATURE 6 MAX7320 toc03 0.50 0.40 0.35 V+ = +5.0V ISINK = 5mA 0.30 0.25 V+ = +2.5V ISINK = 2mA V+ = +3.3V ISINK = 3mA 0.20 0.15 0.10 V+ = +1.71V ISINK = 1mA 0.05 V+ = +5.0V ISOURCE = 5mA 5 OUTPUT VOLTAGE HIGH (V) 0.45 4 V+ = +3.3V ISOURCE = 3mA 3 2 V+ = +2.5V ISOURCE = 2mA 1 0 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) MAX7320 toc04 STANDBY CURRENT (μA) 1.6 fSCL = 400kHz V+ = +5.0V 50 SUPPLY CURRENT (μA) fSCL = 0kHz 1.8 SUPPLY CURRENT vs. TEMPERATURE 60 MAX7320 toc01 2.0 OUTPUT VOLTAGE LOW (V) MAX7320 I2C Port Expander with Eight Push-Pull Outputs V+ = +1.71V ISOURCE = 1mA -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) Pin Description PIN QSOP TQFN 1, 3 15, 1 NAME AD0, AD2 FUNCTION Address Inputs. Select device slave address with AD0 and AD2. Connect AD0 and AD2 to either GND, V+, SCL, or SDA to give four logic combinations (see Table 3). 2 16 RST 4–7, 9–12 2–5, 7–10 O0–O7 8 6 GND Ground 13 11 N.C. No Connection. Not internally connected. 14 12 SCL I2C-Compatible Serial Clock Input 15 13 SDA I2C-Compatible Serial Data I/O 16 14 V+ Positive Supply Voltage. Bypass V+ to GND with a 0.047µF ceramic capacitor. — EP EP Exposed Pad. Connect exposed pad to GND. 4 Reset Input, Active Low. Drive RST low to clear the 2-wire interface. Output Ports. O0 to O7 are push-pull outputs. _______________________________________________________________________________________ I2C Port Expander with Eight Push-Pull Outputs MAX7319–MAX7329 Family Comparison The MAX7319–MAX7323 family consists of five pincompatible, eight-port expanders. Each version is optimized for different applications. The MAX7328 and MAX7329 are second sources to the PCF8574 and PCF8574A. The MAX7324–MAX7327 family consists of four pincompatible, 16-port expanders that integrate the functions of the MAX7320 and one of either the MAX7319, MAX7321, MAX7322, or MAX7323. Functional Overview The MAX7320 is a general-purpose port expander operating from a +1.71V to +5.5V supply that provides eight push-pull output ports. The MAX7320 is rated to sink a total of 100mA and source a total of 50mA from all eight combined outputs. The MAX7320 is set to one of 16 I2C slave addresses (0x50 to 0x5F) using address select inputs AD0 and AD2, and is accessed over an I 2 C serial interface up to 400kHz. Note the MAX7320 offers a different range of I2C slave addresses than the MAX7319, MAX7321, MAX7322, and MAX7323 (these expanders use the address range 0x60 to 0x6F). Table 1. MAX7319–MAX7329 Family Comparison PART I2C SLAVE INPUTS ADDRESS INPUT INTERRUPT MASK OPENDRAIN OUTPUTS PUSHPULL OUTPUTS APPLICATION 8-PORT EXPANDERS MAX7319 110xxxx 8 Yes — — MAX7320 101xxxx — — — 8 MAX7321 110xxxx Up to 8 — Up to 8 — MAX7322 110xxxx 4 Yes — 4 Input-only versions: Eight input ports with programmable latching transition detection interrupt and selectable pullups. Offers maximum versatility for automatic input monitoring. An interrupt mask selects which inputs cause an interrupt on transitions, and transition flags identify which inputs have changed (even momentarily) since the ports were last read. Output-only versions: Eight push-pull outputs with selectable power-up default states. Push-pull outputs offer faster rise time than opendrain outputs, and require no pullup resistors. I/O versions: Eight open-drain I/O ports with latching transition detection interrupt and selectable pullups. Open-drain outputs can level shift the logic-high state to a higher or lower voltage than V+ using external pullup resistors. Any port can be used as an input by setting the open-drain output to logic-high. Transition flags identify which inputs have changed (even momentarily) since the ports were last read. Four input-only, four output-only versions: Four input ports with programmable latching transition detection interrupt and selectable pullups. Four push-pull outputs with selectable power-up default levels. _______________________________________________________________________________________ 5 MAX7320 Detailed Description MAX7320 I2C Port Expander with Eight Push-Pull Outputs Table 1. MAX7319–MAX7329 Family Comparison (continued) PART I2C SLAVE INPUTS ADDRESS INPUT INTERRUPT MASK OPENDRAIN OUTPUTS PUSHPULL OUTPUTS MAX7323 110xxxx Up to 4 — Up to 4 4 MAX7328 MAX7329 0100xxx 0111xxx Up to 8 — Up to 8 — APPLICATION Four I/O, four output-only versions: Four open-drain I/O ports with latching transition detection interrupt and selectable pullups. Four push-pull outputs with selectable power-up default levels. PCF8574-, PCF8574A-compatible versions: Eight open-drain I/O ports with nonlatching transition detection interrupt and pullups on all ports. All ports power up as inputs (or logic-high outputs). Any port can be used as an input by setting the open-drain output to logic-high. 16-PORT EXPANDERS MAX7324 MAX7325 MAX7326 101xxxx and 110xxxx MAX7327 8 Yes — 8 Up to 8 — Up to 8 8 Software equivalent to a MAX7320 plus a MAX7321. Software equivalent to a MAX7320 plus a MAX7319. 4 Yes — 12 Software equivalent to a MAX7320 plus a MAX7322. Up to 4 — Up to 4 12 Software equivalent to a MAX7320 plus a MAX7323. Table 2. Read and Write Access to Eight-Port Expander Family PART I2C SLAVE ADDRESS INPUTS INTERRUPT MASK OPENDRAIN OUTPUTS PUSHPULL OUTPUTS I2C DATA WRITE I2C DATA READ MAX7319 110xxxx 8 Yes — — <I7–I0 interrupt mask> <I7–I0 port inputs> <I7–I0 transition flags> MAX7320 101xxxx — — — 8 <O7–O0 port outputs> <O7-O0 port inputs> MAX7321 110xxxx Up to 8 — Up to 8 — <P7–P0 port outputs> <P7–P0 port inputs> <P7–P0 transition flags> <O7, O6, I5–I2, O1, O0 port inputs> <0, 0, I5–I2 transition flags, 0, 0> <O7, O6, P5–P2, O1, O0 port inputs> <0, 0, P5-P2 transition flags, 0, 0> MAX7322 110xxxx 4 Yes — 4 <O7, O6 outputs, I5–I2 interrupt mask, O1, O0 outputs> MAX7323 110xxxx Up to 4 — Up to 4 4 <port outputs> MAX7328 0100xxx Up to 8 — Up to 8 — <P7–P0 port outputs> <P7–P0 port inputs> MAX7329 0111xxx Up to 8 — Up to 8 — <P7–P0 port outputs> <P7–P0 port inputs> 6 _______________________________________________________________________________________ I2C Port Expander with Eight Push-Pull Outputs PIN CONNECTION DEVICE ADDRESS OUTPUTS POWER-UP DEFAULT AD2 AD0 A6 A5 A4 A3 A2 A1 A0 O7 O6 O5 O4 O3 O2 O1 O0 SCL GND 1 0 1 0 0 0 0 1 1 1 1 0 0 0 0 SCL V+ 1 0 1 0 0 0 1 1 1 1 1 1 1 1 1 SCL SCL 1 0 1 0 0 1 0 1 1 1 1 1 1 1 1 SCL SDA 1 0 1 0 0 1 1 1 1 1 1 1 1 1 1 SDA GND 1 0 1 0 1 0 0 1 1 1 1 0 0 0 0 SDA V+ 1 0 1 0 1 0 1 1 1 1 1 1 1 1 1 SDA SCL 1 0 1 0 1 1 0 1 1 1 1 1 1 1 1 SDA SDA 1 0 1 0 1 1 1 1 1 1 1 1 1 1 1 GND GND 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 GND V+ 1 0 1 1 0 0 1 0 0 0 0 1 1 1 1 GND SCL 1 0 1 1 0 1 0 0 0 0 0 1 1 1 1 GND SDA 1 0 1 1 0 1 1 0 0 0 0 1 1 1 1 V+ GND 1 0 1 1 1 0 0 1 1 1 1 0 0 0 0 V+ V+ 1 0 1 1 1 0 1 1 1 1 1 1 1 1 1 V+ SCL 1 0 1 1 1 1 0 1 1 1 1 1 1 1 1 V+ SDA 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 The RST input clears the serial interface in case of a hung bus, terminating any serial transaction to or from the MAX7320. When the MAX7320 is read through the serial interface, the actual logic states at the ports are read back. Output port power-up logic states are selected by the address select inputs AD0 and AD2. Ports default to logic-high or logic-low on power-up in groups of four (see Table 3). RST Input The RST input voids any I2C transaction involving the MAX7320 and forces the MAX7320 into the I2C STOP condition. A reset does not change the contents of the output register. RST is overvoltage tolerant to +5.5V. Standby Mode When the serial interface is idle, the MAX7320 automatically enters standby mode, drawing minimal supply current. Slave Address and Power-Up Default Logic States Address inputs AD0 and AD2 determine the MAX7320 slave address and set the power-up output logic states. Power-up logic states are set in groups of four (see Table 3). The MAX7320 uses a different range of slave addresses (101xxxx) than the MAX7319, MAX7321, MAX7322, and MAX7323 (110xxxx). The MAX7320 slave address is determined on each I2C transmission, regardless of whether the transmission is actually addressing the MAX7320. The MAX7320 distinguishes whether address inputs AD0 and AD2 are connected to SDA or SCL instead of fixed logic levels V+ or GND during this transmission. This means that the MAX7320 slave address can be configured dynamically in the application without cycling the device supply. On initial power-up, the MAX7320 cannot decode the address inputs AD0 and AD2 fully until the first I2C transmission. AD0 and AD2 initially appear to be connected to V+ or GND. This is important because the address selection determines the power-up logic levels of the output ports. However, at power-up, the I2C SDA and SCL bus interface lines are high impedance at the pins of every device (master or slave) connected to the bus, including the MAX7320. This is guaranteed as part of the I2C specification. Therefore, address inputs AD0 and AD2 that are connected to SDA or SCL normally appear at power-up to be connected to V+. The powerup output state selection logic uses AD0 to select the power-up state for ports O3–O0, and uses AD2 to select the power-up state for ports O7–O4. The rule is that a logic-high, SDA, or SCL connection selects a _______________________________________________________________________________________ 7 MAX7320 Table 3. MAX7320 Address Map MAX7320 I2C Port Expander with Eight Push-Pull Outputs SDA tLOW tBUF tSU,STA tSU,DAT tHD,STA tSU,STO tHD,DAT tHIGH SCL tHD,STA tR tF tVD,DAT START CONDITION REPEATED START CONDITION STOP CONDITION START CONDITION Figure 1. 2-Wire Serial-Interface Timing Details logic-high power-up state, and a logic-low selects a logic-low power-up state for each set of four ports (see Table 3). The output power-up logic level configuration is correct for a standard I2C configuration, where SDA or SCL appear to be connected to V+ by the external I2C pullups. There are circumstances where the assumption that SDA = SCL = V+ on power-up is not true; for example, in true hot-swap applications in which there is legitimate bus activity during power-up. Also, if SDA and SCL are terminated with pullup resistors to a different supply voltage than the MAX7320’s supply, and if that pullup supply rises later than the MAX7320’s, then SDA or SCL may appear at power-up to be connected to GND. In such applications, use the four address combinations that are selected by connecting address inputs AD0 and AD2 to GND or V+ (shown in bold in Table 3). These selections are guaranteed to be correct at power-up, independent of SDA and SCL behavior. If one of the other 12 address combinations is used, be aware that unexpected port power-up default states may occur until the first I2C transmission (to any device, not necessarily the MAX7320). Port Outputs Write one byte to the MAX7320 to set all output port states simultaneously. Serial Interface Serial-Addressing The MAX7320 operates as a slave that sends and receives data through an I2C interface. The interface uses a serial data line (SDA) and a serial clock line (SCL) to achieve bidirectional communication between master(s) and slave(s). A master initiates all data trans- 8 SDA SCL S P START CONDITION STOP CONDITION Figure 2. START and STOP Conditions fers to and from the MAX7320, and generates the SCL clock that synchronizes the data transfer (Figure 1). SDA operates as both an input and an open-drain output. A pullup resistor, 4.7kΩ (typ), is required on SDA. SCL operates only as an input. A pullup resistor, 4.7kΩ (typ), is required on SCL if there are multiple masters on the 2wire interface, or if the master in a single-master system has an open-drain SCL output. Each transmission consists of a START condition sent by a master, followed by the MAX7320’s 7-bit slave address plus R/W bit, one or more data bytes, and finally a STOP condition (Figure 2). START and STOP Conditions Both SCL and SDA remain high when the interface is not busy. A master signals the beginning of a transmission with a START (S) condition by transitioning SDA from high to low while SCL is high. When the master has finished communicating with the slave, the master issues a STOP (P) condition by transitioning SDA from low to high while SCL is high. The bus is then free for another transmission (Figure 2). Bit Transfer One data bit is transferred during each clock pulse. The data on SDA must remain stable while SCL is high (Figure 3). _______________________________________________________________________________________ I2C Port Expander with Eight Push-Pull Outputs Slave Address The MAX7320 has a 7-bit slave address (Figure 5). The 8th bit following the 7-bit slave address is the R/W bit. It is low for a write command, and high for a read command. The 1st (A6), 2nd (A5), and 3rd (A4) bits of the MAX7320 slave address are always 1, 0, and 1. Connect AD0 and AD2 to GND, V+, SDA, or SCL to select the slave address bits A3, A2, A1, and A0. The MAX7320 has 16 possible slave addresses (Table 3), allowing up to 16 MAX7320 devices on an I2C bus. Note the MAX7320 offers a different range of I2C slave addresses from the MAX7319, MAX7321, MAX7322 and MAX7323, for which 1st (A6), 2nd (A5), and 3rd (A4) bits of the slave address are always 1, 1, and 0. Accessing the MAX7320 A single-byte read from the MAX7320 returns the status of the eight output ports, read back as inputs. A 2-byte read repeatedly returns the status of the eight output ports, read back as inputs. A multibyte read (more than 2 bytes before the I2C STOP bit) repeatedly returns the status of the eight output ports, read back as inputs. A single-byte write to the MAX7320 sets the logic state of all eight outputs. A multibyte write to the MAX7320 repeatedly sets the logic state of all eight outputs. Reading from the MAX7320 A read from the MAX7320 starts with the master transmitting the MAX7320’s slave address with the R/W bit set high. The MAX7320 acknowledges the slave address, and samples the logic state of the output ports during the acknowledge bit. The master can read one or more bytes from the MAX7320 and then issue a STOP condition (Figure 6). The MAX7320 transmits the MAX7320 Acknowledge The acknowledge bit is a clocked 9th bit the recipient uses to acknowledge receipt of each byte of data (Figure 4). Each byte transferred effectively requires 9 bits. The master generates the ninth clock pulse, and the recipient pulls down SDA during the acknowledge clock pulse, such that the SDA line is stable low during the high period of the clock pulse. When the master is transmitting to the MAX7320, the device generates the acknowledge bit because the MAX7320 is the recipient. When the MAX7320 is transmitting to the master, the master generates the acknowledge bit because the master is the recipient. SDA SCL DATA LINE STABLE; CHANGE OF DATA DATA VALID ALLOWED Figure 3. Bit Transfer CLOCK PULSE FOR ACKNOWLEDGMENT START CONDITION SCL 1 2 8 9 SDA BY TRANSMITTER SDA BY RECEIVER S Figure 4. Acknowledge current port data, read back from the actual port outputs (not the port output latches) during the acknowledge. If a port is forced to a logic state other than its programmed state, the read back reflects this. If driving a capacitive load, readback port level verification algorithms may need to take the RC rise/fall time into account. Typically, the master reads one byte from the MAX7320, then issues a STOP condition (Figure 6). However, the master can read 2 or more bytes from the MAX7320, then issue a STOP condition. In this case, the MAX7320 resamples the port outputs during each acknowledge and transmits the new data each time. Writing to the MAX7320 A write to the MAX7320 starts with the master transmitting the MAX7320’s slave address with the R/W bit set low. The MAX7320 acknowledges the slave address and samples the ports during the acknowledge bit. The master can transmit one or more bytes of data. The MAX7320 acknowledges each subsequent byte of data and updates the output ports until the master issues a STOP condition (Figure 7). _______________________________________________________________________________________ 9 MAX7320 I2C Port Expander with Eight Push-Pull Outputs SDA 1 0 1 A3 A2 A1 A0 R/W ACK LSB MSB SCL Figure 5. Slave Address PORT SNAPSHOT DATA S 1 0 1 MAX7320 SLAVE ADDRESS 1 A R/W O7 O6 O5 O4 O3 DATA 1 O2 O1 O0 D7 D6 D5 D4 D2 D1 D0 PORT SNAPSHOT TAKEN D3 N P ACKNOWLEDGE FROM MASTER PORT SNAPSHOT TAKEN SCL S = START CONDITION P = STOP CONDITION SHADED = SLAVE TRANSMISSION N = NOT ACKNOWLEDGE Figure 6. Reading the MAX7320 1 SCL 2 3 4 5 6 7 8 DATA TO PORT SLAVE ADDRESS SDA S START CONDITION 0 A DATA TO PORT DATA 1 A DATA 2 A ACKNOWLEDGE FROM SLAVE R/W ACKNOWLEDGE FROM SLAVE DATA OUT FROM PORT ACKNOWLEDGE FROM SLAVE DATA 1 VALID tPPV DATA 2 VALID tPPV Figure 7. Writing to the MAX7320 10 ______________________________________________________________________________________ I2C Port Expander with Eight Push-Pull Outputs V+ AD0 AD2 SCL SDA RST INPUT FILTER I2C CONTROL OUTPUT PORTS O7 O6 O5 O4 O3 O2 O1 O0 POWERON RESET MAX7320 GND Applications Information V+ Hot Insertion SDA, SCL, AD0, AD2, and RST are overvoltage protected to +6V independent of V+. This allows the MAX7320 to be operated from a lower supply voltage, such as +3.3V, while the I2C interface is driven from a higher logic level, such as +5V. Each of the output ports, O0–O7, has a protection diode to V+ and to GND (Figure 8). When a port output is driven to a voltage higher than V+ or lower than GND, the appropriate protection diode clamps the output to a diode drop above V+ or below GND. When the MAX7320 is powered down (V+ = 0V), each output port appears as a diode connected to GND (Figure 8). V+ MAX7320 PORT Figure 8. Output Port Structure Power-Supply Considerations The MAX7320 operates with a supply voltage of +1.71V to +5.5V over the -40°C to +125°C temperature range. Bypass V+ to GND with a ceramic capacitor of at least 0.047µF as close to the device as possible. For the TQFN version, additionally connect the exposed pad to GND. ______________________________________________________________________________________ 11 MAX7320 Functional Block Diagram Compatibility with MAX6965, MAX7315, and MAX7316 Table 4. MAX7320, MAX6965, MAX7315, and MAX7316 Pin Compatibility N.C. O7 O6 12 11 10 9 SDA 13 V+ 14 MAX7320 AD0 15 *EP RST 16 1 2 3 4 O1 O2 PIN FUNCTION O0 PIN-PACKAGE TOP VIEW SCL The MAX7320 is subset pin compatible with the MAX6965, MAX7315, and MAX7316. The pin differences are shown in Table 4. The MAX7320 is not software compatible with MAX6965, MAX7315, or MAX7316. In many cases it is possible to design a PC board to work with all these port expanders, providing design flexibility. Pin Configurations AD2 MAX7320 I2C Port Expander with Eight Push-Pull Outputs 16 QSOP 16 TQFN MAX7320 MAX7315 MAX6965 AND MAX7316 1 15 AD0 AD0 BLINK TQFN 3mm x 3mm x 0.8mm 2 16 RST AD1 RST *EXPOSED PAD. CONNECT TO GND. 3 1 AD2 AD2 AD0 Typical Application Circuit +3.3V V+ μC SCL SDA SDA O6 RST RST O5 MAX7320 O4 O3 O2 AD0 AD2 GND 12 O7 O1 O0 OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT 7 O4 6 GND 5 O3 16 V+ RST 2 15 SDA AD2 3 14 SCL MAX7320 13 N.C. O1 5 12 O7 O2 6 11 O6 O3 7 10 O5 9 GND 8 SCL O5 AD0 1 O0 4 47nF 8 O4 QSOP Chip Information PROCESS: BiCMOS Connect EP to GND ______________________________________________________________________________________ I2C Port Expander with Eight Push-Pull Outputs 12x16L QFN THIN.EPS (NE - 1) X e E MARKING E/2 D2/2 (ND - 1) X e AAAA D/2 e CL D D2 k CL b 0.10 M C A B E2/2 L E2 0.10 C C L C L 0.08 C A A2 A1 L L e e PACKAGE OUTLINE 8, 12, 16L THIN QFN, 3x3x0.8mm 21-0136 PKG 8L 3x3 12L 3x3 16L 3x3 REF. MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. A 0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80 b 0.25 0.30 0.35 0.20 0.25 0.30 0.20 0.25 0.30 D 2.90 3.00 3.10 2.90 3.00 3.10 2.90 3.00 3.10 E 2.90 3.00 3.10 2.90 3.00 3.10 2.90 3.00 3.10 e L 0.65 BSC. 0.35 0.55 0.75 0.45 0.55 0.65 0.30 0.40 N 8 12 16 ND 2 3 4 2 NE 0 A1 A2 k 0.02 3 0.05 0 0.20 REF 0.25 - 0.02 - 0.25 - 0.50 0.05 0 0.02 0.05 0.20 REF - 0.25 - PKG. CODES D2 2 E2 PIN ID JEDEC MIN. NOM. MAX. MIN. NOM. MAX. TQ833-1 0.25 0.70 1.25 0.25 0.70 1.25 0.35 x 45° T1233-1 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45° WEED-1 T1233-3 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45° WEED-1 T1233-4 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45° WEED-1 T1633-2 4 0.20 REF 1 EXPOSED PAD VARIATIONS 0.50 BSC. 0.50 BSC. I 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45° WEEC WEED-2 T1633F-3 0.65 0.80 0.95 0.65 0.80 0.95 0.225 x 45° WEED-2 T1633FH-3 0.65 0.80 0.95 0.65 0.80 0.95 0.225 x 45° WEED-2 T1633-4 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45° WEED-2 T1633-5 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45° WEED-2 - NOTES: 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES. N IS THE TOTAL NUMBER OF TERMINALS. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.20 mm AND 0.25 mm FROM TERMINAL TIP. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS . DRAWING CONFORMS TO JEDEC MO220 REVISION C. MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONLY. NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY. WARPAGE NOT TO EXCEED 0.10mm. PACKAGE OUTLINE 8, 12, 16L THIN QFN, 3x3x0.8mm 21-0136 I 2 2 ______________________________________________________________________________________ 13 MAX7320 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) QSOP.EPS MAX7320 I2C Port Expander with Eight Push-Pull Outputs Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 14 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.