ETC 5962F9955801V9A

REVISIONS
LTR
DESCRIPTION
DATE (YR-MO-DA)
APPROVED
A
Make change to table IIB. - ro
00-02-15
R. MONNIN
B
Add case outlines E and 2. Make changes to VREF, ISC, dFO/DV, VCLKH,
01-02-15
R. MONNIN
IOS, CMRR, VTH, and VSATL1 tests as specified in table I. - ro
C
Make change to the ambient operating temperature range. - ro
01-03-12
R. MONNIN
D
Add new footnote to the soft start section as specified in table I and
figure 1. - ro
01-04-25
R. MONNIN
REV
SHEET
REV
D
D
D
D
D
D
SHEET
15
16
17
18
19
20
REV STATUS
REV
D
D
D
D
D
D
D
D
D
D
D
D
D
D
OF SHEETS
SHEET
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PMIC N/A
PREPARED BY
RICK OFFICER
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216
http://www.dscc.dla.mil
CHECKED BY
RAJESH PITHADIA
APPROVED BY
RAYMOND MONNIN
DRAWING APPROVAL DATE
00-01-24
REVISION LEVEL
D
MICROCIRCUIT, LINEAR, RADIATION
HARDENED, HIGH SPEED, DUAL OUTPUT
PULSE WIDTH MODULATOR, MONOLITHIC
SILICON
SIZE
CAGE CODE
A
67268
SHEET
DSCC FORM 2233
APR 97
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
1 OF
5962-99558
20
5962-E387-01
1. SCOPE
1.1 Scope. This drawing documents three product assurance class levels consisting of high reliability (device classes Q and
M), space application (device class V) and for appropriate satellite and similar applications (device class T). A choice of case
outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of
Radiation Hardness Assurance (RHA) levels are reflected in the PIN. For device class T, the user is encouraged to review the
manufacturer’s Quality Management (QM) plan as part of their evaluation of these parts and their acceptability in the intended
application.
1.2 PIN. The PIN is as shown in the following example:
5962



Federal
stock class
designator
\
F



RHA
designator
(see 1.2.1)
99558
01



Device
type
(see 1.2.2)
V



Device
class
designator
(see 1.2.3)
/
X



Case
outline
(see 1.2.4)
C



Lead
finish
(see 1.2.5)
\/
Drawing number
1.2.1 RHA designator. Device classes Q, T and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and
are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A
specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type
Generic number
01
Circuit function
HS-1825ARH
Radiation hardened DI dual output pulse
width modulator
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as
follows:
Device class
Device requirements documentation
M
Vendor self-certification to the requirements for MIL-STD-883 compliant,
non-JAN class level B microcircuits in accordance with MIL-PRF-38535,
appendix A
Q, V
Certification and qualification to MIL-PRF-38535
T
Certification and qualification to MIL-PRF-38535 with performance as specified
in the device manufacturers approved quality management plan.
1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
E
X
2
Descriptive designator
CDIP2-T16
CDFP4-F16
CQCC1-N20
Terminals
16
16
20
Package style
Dual-in-line
Flat pack
Square leadless chip carrier
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q, T and V or MIL-PRF-38535,
appendix A for device class M.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
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APR 97
SIZE
5962-99558
A
REVISION LEVEL
D
SHEET
2
1.3 Absolute maximum ratings. 1/ 2/ 3/
Supply voltage (VS) .............................................................................................. 36 V dc
Power dissipation (PD) ......................................................................................... 1.6 W
Junction temperature (TJ) .................................................................................... +175°C maximum
Lead temperature (soldering, 10 seconds)........................................................... +260°C maximum
Storage temperature range .................................................................................. -65°C to +150°C
Thermal resistance, junction-to-case (θJC):
Cases E and 2 .................................................................................................. 18°C/W
Case X .............................................................................................................. 8°C/W
Thermal resistance, junction-to-ambient (θJA):
Cases E and 2 ................................................................................................. 70°C/W
Case X .............................................................................................................. 90°C/W
1.4 Recommended operating conditions. 2/ 3/
Supply voltage (VS) .............................................................................................. 12 V to 30 V
Ambient operating temperature range (T A) .......................................................... -50°C to +125°C
1.5 Radiation features:
Maximum total dose available (dose rate = 50 – 300 rad(Si)/s):
5
Device classes M, Q, or V ................................................................................ 3 x 10 Rads (Si)
5
Device class T .................................................................................................. 1 x 10 Rads (Si)
Latch-up ............................................................................................................... None 4/
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a
part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in
the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the
solicitation.
SPECIFICATION
DEPARTMENT OF DEFENSE
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
1/
2/
3/
4/
Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
Unless otherwise noted, all voltages are referenced to GND.
The limits for the parameters specified herein shall apply over the full specified VCC range and ambient temperature range
of -50°C to +125°C unless otherwise noted.
Guaranteed by process or design.
STANDARD
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SIZE
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A
REVISION LEVEL
D
SHEET
3
STANDARDS
DEPARTMENT OF DEFENSE
MIL-STD-883 MIL-STD-1835 -
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
HANDBOOKS
DEPARTMENT OF DEFENSE
MIL-HDBK-103 MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q, T and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for
device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein.
3.1.1 Microcircuit die. For the requirements for microcircuit die, see appendix A to this document.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535 and herein for device classes Q, T and V or MIL-PRF-38535, appendix A and herein for device class M.
3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Logic diagram. The logic diagram shall be as specified on figure 2.
3.2.4 Irradiation test connections. The irradiation test connections shall be as specified in figure 3.
3.3 Electrical performance characteristics and post irradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and post irradiation parameter limits are as specified in table I and shall apply over the
full ambient operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical
tests for each subgroup are defined in table I.
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space
limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the
RHA designator shall still be marked. Marking for device classes Q, T and V shall be in accordance with MIL-PRF-38535.
Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A.
3.5.1 Certification/compliance mark. The certification mark for device classes Q, T and V shall be a "QML" or "Q" as
required in MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix
A.
STANDARD
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REVISION LEVEL
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4
TABLE I. Electrical performance characteristics.
Test
Symbol
Test conditions 1/
-50°C ≤ TA ≤ +125°C
unless otherwise specified
Device
type
Group A
subgroups
Limits
Unit
Min
Max
1
5.05
5.15
2,3
5.025
5.25
1
5.025
5.25
1
-15
15
2,3
-20
20
1
-20
20
1
-25
25
2,3
-50
50
Reference section
Output voltage
01
VREF
M,D,P,L,R,F
Line regulation
VLINE
01
12 < VC < 20 V
M,D,P,L,R,F
Load regulation
VLOAD
01
1 mA < IOUT < 10 mA
M,D,P,L,R,F
Total output
VOM
variation
01
VC = 12 V, 20 V,
IL = 1 mA, 10 mA
M,D,P,L,R,F
Short circuit current
ISC
01
VREF = 0 V
M,D,P,L,R,F
1
-50
50
1
5.00
5.20
2,3
5.00
5.30
1
5.00
5.30
1
30
V
mV
mV
V
mA
2,3
20
1
20
4
350
425
5,6
300
425
4
300
425
4
-2
2
5,6
-7
7
4
-3
3
4
350
425
5,6
300
425
425
Oscillator section
Initial accuracy
01
FO
M,D,P,L,R,F
Voltage stability
dFO/DV
01
12 V < VC < 20 V
M,D,P,L,R,F
Total variation
FOM
01
VC = 12 V, 20 V
M,D,P,L,R,F
Clock out high
01
VCLKH
voltage
M,D,P,L,R,F
Clock out low
01
VCLKL
voltage
4
300
1
4.0
2,3
3.75
1
3.75
%
kHz
V
1,2,3
0.2
1
0.2
M,D,P,L,R,F
kHz
V
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
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COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
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REVISION LEVEL
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5
TABLE I. Electrical performance characteristics. – Continued.
Test
Symbol
Device
type
Test conditions 1/
-50°C ≤ TA ≤ +125°C
unless otherwise specified
Group A
subgroups
Limits
Unit
Min
Max
Error amplification section
Input offset voltage
VOS
VCM = 3.0 V, VO = 3.0 V
01
1,2,3
-10
10
1
-10
10
01
1,2,3
-1
1
1
-1
1
01
1,2,3
-2
2
1
-2
2
4,5,6
60
4
60
4
65
M,D,P,L,R,F
Input bias current
IIB
VCM = 3.0 V, VO = 3.0 V
M,D,P,L,R,F
Input offset current
IOS
VCM = 3.0 V, VO = 3.0 V
M,D,P,L,R,F
Open loop gain
AVOL
Common mode
CMRR
01
1 V < VO < 4 V
M,D,P,L,R,F
01
1.5 V < VCM < 4.0 V
rejection ratio
Power supply
PSRR
12 V < VC < 20 V
rejection ratio
Output sink
IOSK
VE/A OUT = 1.0 V
current
45
65
01
4,5,6
80
4
80
01
1,2,3
1
1
1
1,2,3
-0.5
1
-0.5
01
1,2,3
4.0
1
4.0
01
1,2,3
1.0
1
1.0
1,2,3
-8
1
-8
M,D,P,L,R,F
Output source
IOSC
01
VE/A OUT = 4.0 V
current
M,D,P,L,R,F
Output high voltage
VOH1
IE/A OUT = -0.5 mA
M,D,P,L,R,F
Output low voltage
VOL1
IE/A OUT = 1 mA
M,D,P,L,R,F
µA
dB
4
M,D,P,L,R,F
µA
dB
5,6
M,D,P,L,R,F
mV
dB
mA
mA
V
V
Pulse width modulator (PWM) comparator section
Ramp bias current
IRAMP
01
VRAMP = 0 V
M,D,P,L,R,F
Duty cycle range
DCRNG
01
4,5,6
4
40
01
1,2,3
0.89
1
0.89
M,D,P,L,R,F
E/A out zero DC
VTH
Ramp voltage = 0 V
threshold voltage
M,D,P,L,R,F
40
µA
%
V
See footnotes at end of table.
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REVISION LEVEL
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6
TABLE I. Electrical performance characteristics – Continued.
Test
Symbol
Device
type
Test conditions 1/
-50°C ≤ TA ≤ +125°C
unless otherwise specified
Group A
subgroups
Limits
Unit
Min
Max
8
20
Soft start section 2/
Charge current
ICHG
Soft start voltage = 2.5 V
01
M,D,P,L,R,F
Discharge current
IDCHG
Soft start voltage = 2.5 V
01
M,D,P,L,R,F
1
2,3
8
25
1
8
25
1,2,3
0.1
0.350
1
0.1
0.350
µA
mA
Current limit / Start sequence / Fault section
Restart threshold
01
VRS
M,D,P,L,R,F
ILIM bias current
IBLIM
01
0 < VILIM < 2 V
M,D,P,L,R,F
Current limit threshold
VLIMIT
01
VOVER
threshold
0.5
1
0.5
1,2,3
15
1
01
M,D,P,L,R,F
Over current
1,2,3
M,D,P,L,R,F
V
µA
15
1
0.95
1.10
2,3
0.90
1.10
1
0.90
1.10
1,2,3
1.14
1.26
1
1.14
1.26
V
V
Output section
Output low
VSATL1
01
IOUT = 20 mA
saturation 1
VSATL2
IOUT = 200 mA
saturation 2
Output high
1.0
1
0.8
01
1,2,3
2.2
01
1,2,3
10
1
10
01
1,2,3
9
1
9
M,D,P,L,R,F
VSATH1
M,D,P,L,R,F
VSATH2
IOUT = 200 mA
saturation 2
Under voltage lockout
(UVLO) output low
1
IOUT = 20 mA
saturation 1
Output high
M,D,P,L,R,F
VOLS
01
IO = 20 mA
saturation voltage
0.8
2,3
M,D,P,L,R,F
Output low
1
M,D,P,L,R,F
V
V
2.2
V
V
1,2,3
1.2
1
1.2
V
See footnotes at end of table.
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REVISION LEVEL
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TABLE I. Electrical performance characteristics – Continued.
Test
Symbol
Device
type
Test conditions 1/
-50°C ≤ TA ≤ +125°C
unless otherwise specified
Group A
subgroups
Limits
Unit
Min
Max
9.6
Under voltage section
Start threshold
VSTART
voltage
01
1,2,3
8.4
1
8.4
01
1,2,3
9.6
1
9.6
M,D,P,L,R,F
Stop threshold
VSTOP
voltage
M,D,P,L,R,F
Under voltage lockout
01
VHYS
(UVLO) hysteresis
M,D,P,L,R,F
V
9.6
1,2,3
0.3
1.2
1
0.3
1.2
V
V
Supply current section
Startup current
ISU
01
VCC = 8.0 V
M,D,P,L,R,F
Supply current
ICC
Inverting input, RAMP, and current
LIM / SD voltage = 0 V,
Non-inverting input voltage = 1.0 V
M,D,P,L,R,F
01
1,2,3
300
1
300
1,2,3
36
1
36
µA
mA
1/
Devices supplied to this drawing meet all levels M, D, P, L, R, and F for device classes M, Q, and V and for device class T,
will meet levels M, D, P, L, and R of irradiation. However, this device is only tested at the "F" level for device classes M, Q,
and V and at the “R” level for device class T (see 1.5 herein). Pre and post irradiation values are identical unless otherwise
specified in table I. When performing post irradiation electrical measurements for any RHA level, TA = +25°C.
2/
Grounding of the SOFT START pin does not inhibit the outputs.
3.6 Certificate of compliance. For device classes Q, T and V, a certificate of compliance shall be required from a
QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a
certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MILHDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of
supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q, T and V, the requirements of
MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q, T and V in MIL-PRF-38535 or
for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.
3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2
herein) involving devices acquired to this drawing is required for any change as defined in MIL-PRF-38535, appendix A.
3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain
the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made
available onshore at the option of the reviewer.
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in
microcircuit group number 90 (see MIL-PRF-38535, appendix A).
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REVISION LEVEL
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Device type
01
Case outlines
E and X
Terminal number
2
Terminal symbol
1
INV
NC
2
NON-INV
INV
3
E/A OUT
NON-INV
4
CLOCK
E/A OUT
5
RT
CLOCK/LEB
6
CT
NC
7
RAMP
RT
8
SOFT START
CT
(SEE NOTE 2)
9
ILIM/SD
10
GND
RAMP
SOFT START
(SEE NOTE 2)
11
OUTPUT A
NC
12
POWER GND
ILIM/SD
13
VC
GND
14
OUTPUT B
OUTPUT A
15
VS
POWER GND
16
VREF 5.1 V
NC
17
---
VC
18
---
OUTPUT B
19
---
VS
20
---
VREF 5.1 V
NOTES:
1. NC = No connection
2. Grounding of the SOFT START pin does not inhibit the outputs.
FIGURE 1. Terminal connections.
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FIGURE 2. Logic diagram.
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Figure 3. Irradiation connections.
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4. QUALITY ASSURANCE PROVISIONS
4.1 Sampling and inspection. For device classes Q, and V, sampling and inspection procedures shall be in accordance with
MIL-PRF-38535 or as modified in the device manufacturer’s Quality Management (QM) plan, including screening (4.2),
qualification (4.3), and conformance inspection (4.4). The modification in the QM plan shall not affect the form, fit, or function
as described herein.
For device class T, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 and the device
manufacturer’s QM plan, including screening, qualification, and conformance inspection. The performance envelope and
reliability information shall be as specified in the manufacturer’s QM plan.
For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A.
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted
on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in
accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.
For device class T, screening shall be in accordance with the device manufacturer’s Quality Management (QM) plan, and shall
be conducted on all devices prior to qualification and technology conformance inspection.
4.2.1 Additional criteria for device class M.
a.
Burn-in test, method 1015 of MIL-STD-883.
(1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision
level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
test method 1015.
(2) TA = +125°C, minimum.
b.
Interim and final electrical test parameters shall be as specified in table IIA herein.
4.2.2 Additional criteria for device classes Q, T and V.
a.
The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the
device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under
document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test
method 1015 of MIL-STD-883.
b.
Interim and final electrical test parameters shall be as specified in table IIA herein.
c.
Additional screening for device class V beyond the requirements of device class Q shall be as specified in
MIL-PRF-38535, appendix B or as modified in the device manufacturer’s Quality Management (QM) plan.
STANDARD
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TABLE IIA. Electrical test requirements.
Test requirements
Subgroups
(in accordance with
MIL-PRF-38535, table III)
Subgroups
(in accordance with
MIL-STD-883,
method 5005, table I)
Device
class M
Device
class Q
Device
class V
Device
class T
Interim electrical
parameters (see 4.2)
1,4
1,4
1,4
As specified in
QM plan
Final electrical
parameters (see 4.2)
1,2,3,4,5,6 1/
1,2,3,4,5,6 1/
1,2,3,4, 2/ 3/
5,6
Group A test
requirements (see 4.4)
1,2,3,4,5,6
1,2,3,4,5,6
1,2,3,4,5,6
Group C end-point electrical
parameters (see 4.4)
1,2,3,4,5,6
1,2,3,4,5,6
Group D end-point electrical
parameters (see 4.4)
1,4
1,4
1,4
Group E end-point electrical
parameters (see 4.4)
1,4
1,4
1,4
1,2,3,4,5,6 3/
1/ PDA applies to subgroups 1 and 4.
2/ PDA applies to subgroups 1, 4, and ∆'s.
3/ Delta limits as specified in table IIB herein shall be required where specified, and the delta values shall be
completed with reference to the zero hour electrical parameters (see table I).
TABLE IIB. Burn-in delta parameters (+25°) and group C delta parameters.
Parameters 1/
Symbol
Supply current
ICC
±2.0 mA
Input bias current
IIB
±50 nA
Delta limits
1/ These parameters shall be recorded before and after the required burn-in and life test to
determine delta limits.
4.3 Qualification inspection for device classes Q, T and V. Qualification inspection for device classes Q and V shall be in
accordance with MIL-PRF-38535. Qualification inspection for device class T shall be in accordance with the device
manufacturer’s Quality Management (QM) plan. Inspections to be performed shall be those specified in MIL-PRF-38535 and
herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).
4.3.1 Electrostatic discharge sensitivity (ESDS) qualification inspection . ESDS testing shall be performed in accordance
with MIL-STD-883, method 3015. ESDS testing shall be measured only for initial qualification and after process or design
changes which may affect ESDS classification.
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4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with
MIL-PRF-38535, or as specified in the QM plan, including groups A, B, C, D, and E inspections and as specified herein. Quality
conformance inspection for device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein.
Inspections to be performed for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups
A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). Technology conformance inspection for class T shall be in accordance
with the device manufacturer’s Quality Management (QM) plan.
4.4.1 Group A inspection.
a.
Tests shall be as specified in table IIA herein.
b.
Subgroups 7, 8, 9, 10, and 11 in table I, method 5005 of MIL-STD-883 shall be omitted.
4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883:
a.
Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method
1005 of MIL-STD-883.
b.
TA = +125°C, minimum.
c.
Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
4.4.2.2 Additional criteria for device classes Q, T and V. The steady-state life test duration, test condition and test
temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in
accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test
circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
test method 1005 of MIL-STD-883.
4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured
(see 3.5 herein). RHA levels for device classes M, Q and V shall be as specified in MIL-PRF-38535 and the end-point electrical
parameters shall be as specified in table IIA herein. For device class T, the RHA requirements shall be in accordance with the
Class T Radiation Requirements of MIL-PRF-38535. The end-point electrical parameters for class T devices shall be as
specified in Table I, Group A subgroups, or as modified in the QM plan.
4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883
method 1019, condition A, and as specified herein. For device class T, the total dose requirements shall be in accordance with
the class T radiation requirements of MIL-PRF-38535 (see 1.5 herein).
4.4.4.1.1 Accelerated aging testing. Accelerated aging testing shall be performed on all devices requiring a RHA level
greater than 5k rads (Si). The post-anneal end-point electrical parameter limits shall be as specified in table I herein and shall
be the pre-irradiation end-point electrical parameter limits at 25°C ±5°C. Testing shall be performed at initial qualification and
after any design or process changes which may affect the RHA response of the device.
4.5 Methods of inspection. Methods of inspection shall be specified as follows:
4.5.1 Voltage and current. Unless otherwise specified, all voltages given are referenced to the microcircuit GND terminal.
Currents given are conventional current and positive when flowing into the referenced terminal.
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5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device
classes Q, T and V or MIL-PRF-38535, appendix A for device class M.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor
prepared specification or drawing.
6.1.2 Substitutability. Device class Q devices will replace device class M devices.
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.
6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus when a system
application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users
and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering
microelectronic devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544.
6.4 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43216-5000, or telephone
(614) 692-0547.
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535 and MIL-HDBK-1331.
6.6 Sources of supply.
6.6.1 Sources of supply for device classes Q, T and V. Sources of supply for device classes Q, T and V are listed in
QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and
have agreed to this drawing.
6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103.
The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been
submitted to and accepted by DSCC-VA.
STANDARD
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APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-99558
10. SCOPE
10.1 Scope. This appendix establishes minimum requirements for microcircuit die to be supplied under the Qualified
Manufacturers List (QML) Program. QML microcircuit die meeting the requirements of MIL-PRF-38535 and the manufacturers
approved QML plan for use in monolithic microcircuits, multi-chip modules (MCMs), hybrids, electronic modules, or devices
using chip and wire designs in accordance with MIL-PRF-38534 are specified herein. Two product assurance classes
consisting of military high reliability (device class Q) and space application (device Class V) are reflected in the Part or
Identification Number (PIN). When available a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.
10.2 PIN. The PIN is as shown in the following example:
5962



Federal
stock class
designator
\
F



RHA
designator
(see 10.2.1)
99558
01



Device
type
(see 10.2.2)
/
V



Device
class
designator
(see 10.2.3)
9



Die
code
A



Die
Details
(see 10.2.4)
\/
Drawing number
10.2.1 RHA designator. Device classes Q and V RHA identified die shall meet the MIL-PRF-38535 specified RHA levels. A
dash (-) indicates a non-RHA die.
10.2.2 Device type(s). The device type(s) shall identify the circuit function as follows:
Device type
Generic number
01
Circuit function
HS-1825ARH
Radiation hardened DI dual output
pulse width modulator
10.2.3 Device class designator.
Device class
Q or V
Device requirements documentation
Certification and qualification to the die requirements of MIL-PRF-38535
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APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-99558
10.2.4. Die Details. The die details designation shall be a unique letter which designates the die’s physical dimensions,
bonding pad location(s) and related electrical function(s), interface materials, and other assembly related information, for each
product and variant supplied to this appendix.
10.2.4.1 Die physical dimensions.
Die type
Figure number
01
A-1
10.2.4.2. Die bonding pad locations and electrical functions.
Die type
Figure number
01
A-1
10.2.4.3. Interface materials.
Die type
Figure number
01
A-1
10.2.4.4. Assembly related information.
Die type
Figure number
01
A-1
10.3. Absolute maximum ratings. See paragraph 1.3 within the body of this drawing for details.
10.4 Recommended operating conditions. See paragraph 1.4 within the body of this drawing for details.
20. APPLICABLE DOCUMENTS.
20.1 Government specifications, standards, and handbooks. Unless otherwise specified, the following specification,
standard, and handbook of the issue listed in that issue of the Department of Defense Index of Specifications and Standards
specified in the solicitation, form a part of this drawing to the extent specified herein.
SPECIFICATION
DEPARTMENT OF DEFENSE
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
STANDARDS
DEPARTMENT OF DEFENSE
MIL-STD-883
- Test Method Standard Microcircuits.
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APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-99558
HANDBOOK
DEPARTMENT OF DEFENSE
MIL-HDBK-103 - List of Standard Microcircuit Drawings.
(Copies of the specification, standard, and handbook required by manufacturers in connection with specific acquisition
functions should be obtained from the contracting activity or as directed by the contracting activity).
20.2. Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the
text of this drawing shall take precedence.
30. REQUIREMENTS
30.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer’s Quality Management (QM) plan. The
modification in the QM plan shall not effect the form, fit or function as described herein.
30.2 Design, construction and physical dimensions. The design, construction and physical dimensions shall be as specified
in MIL-PRF-38535 and the manufacturer’s QM plan, for device classes Q and V and herein.
30.2.1 Die physical dimensions. The die physical dimensions shall be as specified in 10.2.4.1 and on figure A-1.
30.2.2 Die bonding pad locations and electrical functions. The die bonding pad locations and electrical functions shall be as
specified in 10.2.4.2 and on figure A-1.
30.2.3 Interface materials. The interface materials for the die shall be as specified in 10.2.4.3 and on figure A-1.
30.2.4 Assembly related information. The assembly related information shall be as specified in 10.2.4.4 and figure A-1.
30.2.5 Radiation exposure circuit. The radiation exposure circuit shall be as defined within paragraph 3.2.4 of the body of
this document.
30.3 Electrical performance characteristics and post-irradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and post-irradiation parameter limits are as specified in table I of the body of this
document.
30.4 Electrical test requirements. The wafer probe test requirements shall include functional and parametric testing sufficient
to make the packaged die capable of meeting the electrical performance requirements in table I.
30.5 Marking. As a minimum, each unique lot of die, loaded in single or multiple stack of carriers, for shipment to a
customer, shall be identified with the wafer lot number, the certification mark, the manufacturer’s identification and the PIN
listed in 10.2 herein. The certification mark shall be a “QML” or “Q” as required by MIL-PRF-38535.
30.6 Certification of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML38535 listed manufacturer in order to supply to the requirements of this drawing (see 60.4 herein). The certificate of compliance
submitted to DSCC-VA prior to listing as an approved source of supply for this appendix shall affirm that the manufacturer’s
product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and the requirements herein.
30.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535
shall be provided with each lot of microcircuit die delivered to this drawing.
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APPENDIX A
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40. QUALITY ASSURANCE PROVISIONS
40.1 Sampling and inspection. For device classes Q and V, die sampling and inspection procedures shall be in accordance
with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modifications in the QM
plan shall not effect the form, fit or function as described herein.
40.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and as defined in the
manufacturer’s QM plan. As a minimum it shall consist of:
a)
Wafer lot acceptance for Class V product using the criteria defined within MIL-STD-883 test method 5007.
b)
100% wafer probe (see paragraph 30.4).
c)
100% internal visual inspection to the applicable class Q or V criteria defined within MIL-STD-883 test method 2010
or the alternate procedures allowed within MIL-STD-883 test method 5004.
40.3 Conformance inspection.
40.3.1 Group E inspection. Group E inspection is required only for parts intended to be identified as radiation assured (see
30.5 herein). RHA levels for device classes Q and V shall be as specified in MIL-PRF-38535. End point electrical testing of
packaged die shall be as specified in table IIA herein. Group E tests and conditions are as specified within paragraphs 4.4.4.1
and 4.4.4.1.1.
50. DIE CARRIER
50.1 Die carrier requirements. The requirements for the die carrier shall be accordance with the manufacturer’s QM plan or
as specified in the purchase order by the acquiring activity. The die carrier shall provide adequate physical, mechanical and
electrostatic protection.
60 NOTES
60.1 Intended use. Microcircuit die conforming to this drawing are intended for use in microcircuits built in accordance with
MIL-PRF-38535 or MIL-PRF-38534 for government microcircuit applications (original equipment), design applications and
logistics purposes.
60.2 Comments. Comments on this appendix should be directed to DSCC-VA, Columbus, Ohio, 43216-5000 or telephone
(614)-692-0536.
60.3 Abbreviations, symbols and definitions. The abbreviations, symbols, and definitions used herein are defined within
MIL-PRF-38535 and MIL-STD-1331.
60.4 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535.
The vendors listed within QML-38535 have submitted a certificate of compliance (see 30.6 herein) to DSCC-VA and have
agreed to this drawing.
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APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-99558
NOTE: Pad numbers reflect terminal numbers when placed in case outline X (see figure 1).
Die physical dimensions.
Die size: 4710 microns x 3570 microns.
Die thickness: 19 mils ± 1 mils.
Interface materials.
Top metallization: Al Si Cu 16.0 kÅ ±2 kÅ
Backside metallization: None
Glassivation.
Type: PSG
Thickness: 8.0 kÅ ±1.0 kÅ
Type: Si3 N4
Thickness: 4.0 kÅ ±0.5 kÅ
Substrate: DI (dielectric isolation)
Assembly related information.
Substrate potential: Unbiased
Special assembly instructions: Note 1. The oscillator ground (OSC GND) pad must be connected to ground.
Note 2. PGND and VC each require 2 bond pad connections.
FIGURE A-1. Die bonding pad locations and electrical functions.
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STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 01-04-25
Approved sources of supply for SMD 5962-99558 are listed below for immediate acquisition information only and
shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be
revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a
certificate of compliance has been submitted to and accepted by DSCC-VA. This bulletin is superseded by the next
dated revision of MIL-HDBK-103 and QML-38535.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962F9955801QEC
34371
HS1-1825ARH-8
5962F9955801QXC
34371
HS9-1825ARH-8
5962F9955801Q2C
34371
HS4-1825ARH-8
5962R9955801TXC
34371
HS9-1825ARH-T
5962F9955801VEC
34371
HS1-1825ARH-Q
5962F9955801VXC
34371
HS9-1825ARH-Q
5962F9955801V2C
34371
HS4-1825ARH-Q
5962F9955801V9A
34371
HS0-1825ARH-Q
1/ The lead finish shown for each PIN representing
a hermetic package is the most readily available
from the manufacturer listed for that part. If the
desired lead finish is not listed contact the vendor
to determine its availability.
2/ Caution. Do not use this number for item acquisition.
Items acquired to this number may not satisfy the
performance requirements of this drawing.
Vendor CAGE
number
34371
Vendor name
and address
Intersil Corporation
P.O. Box 883
Melbourne, FL 32902-0883
The information contained herein is disseminated for convenience only and
the Government assumes no liability whatsoever for any inaccuracies in the
information bulletin.