ETC 5962-8951105V2A

REVISIONS
LTR
DESCRIPTION
A
DATE (YR-MO-DA)
APPROVED
94-02-28
M. A. FRYE
Add case outlines F and 2. Add output noise voltage test to table I, reference
section. Change minimum limit for VTH(SYNC) test in table I, oscillator section.
Editorial changes throughout.
B
Add device class V device and make change to TABLE II. - ro
00-11-30
R. MONNIN
C
Add device type 05. Make Changes to 1.2.2, 1.3, 1.4, table I, figure 1, and
figure 2. - ro
01-03-21
R. MONNIN
THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED.
REV
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REV STATUS
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OF SHEETS
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PMIC N/A
PREPARED BY
JOSEPH A. KERBY
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216
http://www.dscc.dla.mil
CHECKED BY
D. H. JOHNSON
APPROVED BY
MICHAEL A. FRYE
MICROCIRCUIT, LINEAR, REGULATING, PULSE
WIDTH MODULATOR, MONOLITHIC SILICON
DRAWING APPROVAL DATE
89-04-27
REVISION LEVEL
C
SIZE
CAGE CODE
A
67268
SHEET
DSCC FORM 2233
APR 97
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
1 OF
5962-89511
15
5962-E265-01
1. SCOPE
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and
M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the
Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the
PIN.
1.2 PIN. The PIN is as shown in the following examples.
For device classes M and Q:
5962
-
~
~
~
~
~
~
Federal
stock class
designator
\
89511
E
01
~
~
~
RHA
designator
(see 1.2.1)
Device
type
(see 1.2.2)
~
~
~
X
~
~
~
Case
outline
(see 1.2.4)
Lead
finish
(see 1.2.5)
V
~
~
~
/
\/
Drawing number
For device class V:
5962
-
~
~
~
~
~
~
Federal
stock class
designator
\
89511
03
~
~
~
RHA
designator
(see 1.2.1)
Device
type
(see 1.2.2)
/
~
~
~
Device
class
designator
(see 1.2.3)
2
Case
outline
(see 1.2.4)
X
~
~
~
Lead
finish
(see 1.2.5)
\/
Drawing number
1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and
are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A
specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type
Generic number
01
02
03
04
05
1525A
1527A
UC1525A
UC1527A
UC1525B
STANDARD
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DSCC FORM 2234
APR 97
Circuit function
Regulating pulse width modulator
Regulating pulse width modulator
Regulating pulse width modulator
Regulating pulse width modulator
Regulating pulse width modulator
SIZE
5962-89511
A
REVISION LEVEL
C
SHEET
2
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as listed
below. Since the device class designator has been added after the original issuance of this drawing, device classes M and Q
designators will not be included in the PIN and will not be marked on the device.
Device class
Device requirements documentation
M
Vendor self-certification to the requirements for MIL-STD-883 compliant,
non-JAN class level B microcircuits in accordance with MIL-PRF-38535,
appendix A
Q or V
Certification and qualification to MIL-PRF-38535
1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
E
F
2
Descriptive designator
GDIP1-T16 or CDIP2-T16
GDFP2-F16 or CDFP3-F16
CQCC1-N20
Terminals
16
16
20
Package style
Dual-in-line
Flat pack
Square leadless chip carrier
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535,
appendix A for device class M.
1.3 Absolute maximum ratings. 1/
Input voltage (+VIN) ...........................................................................+40 V dc
Collector voltage (VC) ........................................................................+40 V dc
Logic inputs range..............................................................................-0.3 V dc to +5.5 V dc
Analog inputs range ...........................................................................-0.3 V dc to +V IN
Output current, source or sink............................................................500 mA
Reference output current ...................................................................50 mA
Oscillator charging current .................................................................5 mA
Maximum power dissipation (PD).......................................................1,000 mW
Lead temperature (soldering, 10 seconds) ........................................+300 qC
Junction temperature (TJ) ..................................................................+150qC
Storage temperature range ...............................................................-65qC to +150qC
Thermal resistance, junction-to-case (TJC)........................................See MIL-STD-1835
Thermal resistance, junction-to-ambient (TJA):
Cases E and F................................................................................100qC/W
Case 2 ............................................................................................70qC/W
1.4 Recommended operating conditions.
Input voltage (+VIN) ...........................................................................+8 V dc to +35 V dc
Collector voltage (VC) ........................................................................+4.5 V dc to +35 V dc
Sink/source load current (steady-state) .............................................0 mA to 100 mA
Sink/source load current (peak) .........................................................0 mA to 400 mA
Reference load current range ...........................................................0 mA to 20 mA
Oscillator frequency range:
Device types 01 - 04 ......................................................................100 Hz to 350 kHz
Device type 05 ...............................................................................100 Hz to 400 kHz
1/
Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
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DSCC FORM 2234
APR 97
SIZE
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A
REVISION LEVEL
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SHEET
3
1.4 Recommended operating conditions – continued.
Oscillator timing resistor (RT):
Device types 01 – 04 .....................................................................2 k : to 200 k:
Device type 05 ...............................................................................2 k: to 150 k:
Oscillator timing capacitor range (CT):
Device types 01 – 04 .....................................................................470 pF to 0.1 PF
Device type 05 ...............................................................................0.001 pF to 0.1 PF
Dead time resistor range (device type 05 only) ................................0 : to 500 :
Ambient operating temperature range (T A)........................................-55qC to +125qC
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a
part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in
the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the
solicitation.
SPECIFICATION
DEPARTMENT OF DEFENSE
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
STANDARDS
DEPARTMENT OF DEFENSE
MIL-STD-883 MIL-STD-1835 -
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
HANDBOOKS
DEPARTMENT OF DEFENSE
MIL-HDBK-103 MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for
device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified
herein.
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APR 97
SIZE
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A
REVISION LEVEL
C
SHEET
4
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.
3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein.
3.2.2 Terminal connection(s). The terminal connection(s) shall be as specified on figure 1.
3.2.3 Logic diagram(s). The logic diagram(s) shall be as specified on figure 2.
3.3 Electrical performance characteristics and post irradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and post irradiation parameter limits are as specified in table I and shall apply over the
full ambient operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are defined in table I.
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space
limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the
RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535.
Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A.
3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in
MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.
3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of
compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see
6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this
drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535
and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for
device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.
3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2
herein) involving devices acquired to this drawing is required for any change as defined in MIL-PRF-38535, appendix A.
3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain
the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made
available onshore at the option of the reviewer.
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in
microcircuit group number 110 (see MIL-PRF-38535, appendix A).
STANDARD
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DSCC FORM 2234
APR 97
SIZE
5962-89511
A
REVISION LEVEL
C
SHEET
5
TABLE I. Electrical performance characteristics.
Test
Symbol
Conditions 1/
-55qC d TA d +125qC
unless otherwise specified
Group A
subgroups
Device
type
Limits 2/
Unit
Min
Max
5.05
5.15
5.0
5.2
Reference section
Reference voltage out
1
VREF
01-04
2,3
Line regulation
Load regulation
Short-circuit current
VRLINE
VLOAD
IOS
VIN = 8 V to 35 V
1
05
5.062
5.138
1,2,3
01-04
-30
30
05
-10
10
01-04
-50
50
05
-15
15
01-04
-100
1,2,3
IL = 0 mA to 20 mA
1
VREF = 0 V, t < 25 ms,
TA = +25qC
mA
2,3
05
50
1,2,3
05
2
05
10
mV
7
All
200
PVrms
4
All
37.5
42.5
kHz
5,6
All
35.2
44.8
kHz
3/
Total output variation
VTOV
Line, load, and
temperature
Long term stability
VLTS
1000 hours,
NO
10 Hz d f d 10 kHz,
Initial accuracy
FOSC
TA = +25qC
Oscillator accuracy over
temperature
FOSC
TA = -55qC and +125qC
Voltage stability
VSTAB
VIN = 8 V to 35 V
4,5,6
All
Clock pulse amplitude
VOSC
3/
4,5,6
All
3
Clock pulse width
tPW
TA = +25qC 3/
9
All
0.3
Max oscillator frequency
FMAX
RT = 2 k:, CT = .001 PF
4,5,6
01,02
300
03,04
350
05
400
5.036
5.164
TA = +125qC
3/
mV
100
VTS
Output noise voltage
mV
05
Temperature stability
3/
V
TA = +25qC
mV
V
Oscillator section
(OT)
RT = 2 k:, CT = 470 PF
r1
%
V
1.0
Ps
kHz
See footnotes at end of table.
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SIZE
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REVISION LEVEL
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SHEET
6
TABLE I. Electrical performance characteristics – Continued.
Test
Symbol
Conditions 1/
-55qC d TA d +125qC
unless otherwise specified
Group A
subgroups
Device
type
Limits 2/
Min
Unit
Max
Oscillator section – continued.
Min oscillator frequency
FMIN
RT = 150 k:, CT = 0.1 PF
4,5,6
RT = 200 k:, CT = 0.1 PF
Threshold SYNC
voltage
VTH
SYNC input current
II
01,02
150
03,04,
05
120
1,2,3
All
1,2,3
9,10,11
1.2
Hz
2.8
V
All
2.5
mA
01-04
.001
%
05
0
(SYNC)
SYNC voltage = 3.5 V
(SYNC)
Pulse width modulator comparator section
Min duty cycle
tON(min) /
VCOMP = 0.6 V
tOSC
Max duty cycle
tON(max) /
VCOMP = 3.6 V
9,10,11
All
45
1,2,3
All
-5
%
tOSC
Error amplitude section, VCM = 5.1 V (unless otherwise specified)
RS d 2 k:
Input offset voltage
VIO
Input bias current
IIB
1,2,3
All
Input offset current
IIO
1,2,3
All
-1
DC open loop gain
AVOL
4
All
60
TA = +25qC, VCM = 5.1 V,
5
10
1
mV
PA
PA
dB
RL t 10 M:
Output low level
VOL
1,2,3
All
0.5
V
Output high level
VOH
1,2,3
All
3.8
V
Common mode
rejection ratio
CMRR
VCM = 1.5 V to 5.2 V
1,2,3
All
60
dB
Power supply
rejection ratio
PSRR
VIN = 8 V to 35 V
4,5,6
All
50
dB
Unity gain bandwidth
GBW
AV = 0 dB, TA = +25qC 3/
7
All
1
MHz
See footnotes at end of table.
STANDARD
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DSCC FORM 2234
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REVISION LEVEL
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SHEET
7
TABLE I. Electrical performance characteristics – Continued.
Test
Symbol
Conditions 1/
-55qC d TA d +125qC
unless otherwise specified
Group A
subgroups
Device
type
Limits 2/
Unit
Min
Max
25
80
PA
Soft start section
Soft start current
ISS
VSD = 0 V, VSS = 0 V
1,2,3
All
Soft start voltage
VSS
VSD = 2.5 V
1,2,3
All
0.7
V
Shutdown input current
ISD
VSD = 2.5 V
1,2,3
All
1.0
mA
Shutdown threshold
voltage
VTH
To outputs, VSS = 5.1 V,
4
03,04,
05
1,2,3
All
TA = +25qC
0.6
V
Output section (each output), VC = +20 V (unless otherwise specified)
Output low level
VOL
ISINK = 20 mA
0.4
2.2
ISINK = 100 mA
Output high level
VOH
1,2,3
ISOURCE = -20 mA
All
18
VUL
VCOMP and VSS = high
Shutdown delay
tSD
VSD = 3 V, TA = +25qC 3/
V
17
ISOURCE = -100 mA
Under voltage lockout
V
1,2,3
All
9
VSD = 2.5 V, TA = +25qC 3/
6
8
V
01,02
500
ns
03,04,
05
500
Rise time
tr
CL = 1 nF, TA = +25qC 3/
9
All
600
ns
Collector fall time
tf
CL = 1 nF, TA = +25qC 3/
9
All
300
ns
Collector leakage
voltage
VCL
VC = 35 V
1,2,3
05
200
VC off current
IVC
VC = 35 V
1,2,3
01,03
200
PA
PA
VIN = 35 V
1,2,3
All
20
mA
(off)
Total standby current section
Supply current
IS
1/ Unless otherwise specified, +VIN = 20 V, RT = 3.6 k:, CT = 0.01 PF, and RD = 0 :.
2/ The algebraic convention, whereby the most negative value is a minimum and the most positive is a maximum, is used
in this table. Negative current shall be defined as conventional current flow out of a device terminal.
3/ If not tested, shall be guaranteed to the limits specified in table I herein.
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Device types
01,02,03,04, and 05
Case outlines
E and F
2
Terminal
number
1
Terminal symbol
INVERTING INPUT
NC
2
NONINVERTING INPUT
INVERTING INPUT
3
SYNC
NONINVERTING INPUT
4
OSCILLATOR OUTPUT
SYNC
5
CT
OSCILLATOR OUTPUT
6
RT
NC
7
DISCHARGE
CT
8
SOFT-START
RT
9
COMPENSATION
DISCHARGE
10
SHUTDOWN
SOFT START
11
OUTPUT A
NC
12
GROUND
COMPENSATION
13
VC
SHUTDOWN
14
OUTPUT B
OUTPUT A
15
+VIN
GROUND
16
VREF
NC
17
---
VC
18
---
OUTPUT B
19
---
+VIN
20
---
VREF
NC = No connection
FIGURE 1. Terminal connections.
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Device types 01 and 02
FIGURE 2. Logic diagram .
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Device types 03 and 04
FIGURE 2. Logic diagram – Continued.
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Device type 05
FIGURE 2. Logic diagram – Continued.
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4. QUALITY ASSURANCE PROVISIONS
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with
MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan
shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be
in accordance with MIL-PRF-38535, appendix A.
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted
on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in
accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.
4.2.1 Additional criteria for device class M.
a.
Burn-in test, method 1015 of MIL-STD-883.
(1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision
level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
test method 1015.
(2) TA = +125qC, minimum.
b.
Interim and final electrical test parameters shall be as specified in table II herein.
4.2.2 Additional criteria for device classes Q and V.
a.
The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the
device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under
document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test
method 1015 of MIL-STD-883.
b.
Interim and final electrical test parameters shall be as specified in table II herein.
c.
Additional screening for device class V beyond the requirements of device class Q shall be as specified in
MIL-PRF-38535, appendix B.
4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in
accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for
groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).
4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with
MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified herein. Quality conformance inspection for
device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed
for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections
(see 4.4.1 through 4.4.4).
4.4.1 Group A inspection.
a.
Tests shall be as specified in table II herein.
b.
Subgroup 8 in table I, method 5005 of MIL-STD-883 shall be omitted.
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TABLE II. Electrical test requirements.
Test requirements
Subgroups
(in accordance with
MIL-PRF-38535, table III)
Subgroups
(in accordance with
MIL-STD-883,
method 5005, table I)
Device
class M
Device
class Q
Device
class V
Interim electrical
parameters (see 4.2)
---
---
---
Final electrical
parameters (see 4.2)
1,2,3,4,9 1/
1,2,3,4,9 1/
1,2,3,4,9 1/
Group A test
requirements (see 4.4)
1,2,3,4,5,6,
7,9,10,11
1,2,3,4,5,6,
7,9,10,11
1,2,3,4,5,6,
7,9,10,11
Group C end-point electrical
parameters (see 4.4)
1
1
1,2,3
Group D end-point electrical
parameters (see 4.4)
1
1
1,2,3
Group E end-point electrical
parameters (see 4.4)
---
---
---
1/ PDA applies to subgroup 1.
4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table II herein.
4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883:
a.
Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method
1005 of MIL-STD-883.
b.
TA = +125qC, minimum.
c.
Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature,
or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The
test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of
MIL-STD-883.
4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table II herein.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-89511
A
REVISION LEVEL
C
SHEET
14
4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness
assured (see 3.5 herein).
a.
End-point electrical parameters shall be as specified in table II herein.
b.
For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as
specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to
radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All
device classes must meet the post irradiation end-point electrical parameter limits as defined in table I at
TA = +25qC r5qC, after exposure, to the subgroups specified in table II herein.
c.
When specified in the purchase order or contract, a copy of the RHA delta limits shall be supplied.
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device
classes Q and V or MIL-PRF-38535, appendix A for device class M.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a
contractor-prepared specification or drawing.
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.
6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus when a system
application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users
and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering
microelectronic devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544.
6.4 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43216-5000, or telephone
(614) 692-0547.
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535 and MIL-HDBK-1331.
6.6 Sources of supply.
6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535.
The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have agreed to
this drawing.
6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103.
The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been
submitted to and accepted by DSCC-VA.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-89511
A
REVISION LEVEL
C
SHEET
15
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 01-03-21
Approved sources of supply for SMD 5962-89511 are listed below for immediate acquisition information only and
shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be
revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a
certificate of compliance has been submitted to and accepted by DSCC-VA. This bulletin is superseded by the next
dated revision of MIL-HDBK-103 and QML-38535.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
Reference
military specification
PIN
5962-8951101EA
U3158
IP1525AJ/883B
M38510/12602BEA
01295
UC1525AJ/883B
34333
SG1525AJ/883B
64155 3/
LT1525AJ/883
5962-8951101FA
34333
SG1525AF/883B
5962-89511012A
01295
UC1525AL/883B
5962-8951102EA
U3158
IP1527AJ/883B
01295
UC1527AJ/883B
34333
SG1527AJ/883B
64155 3/
LT1527AJ/883
5962-89511022A
01295
UC1527AL/883B
5962-8951103EA
01295
UC1525AJ/883B
5962-89511032A
01295
UC1525AL/883B
5962-8951103VEA
01295
UC1525AJQMLV
5962-8951103V2A
01295
UC1525ALQMLV
1 of 2
M38510/12604BEA
STANDARD MICROCIRCUIT DRAWING BULLETIN - CONTINUED
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962-8951104EA
01295
UC1527AJ/883B
5962-89511042A
01295
UC1527AL/883B
5962-8951105EA
01295
UC1525BJ/883B
5962-89511052A
01295
UC1525BL/883B
5962-8951105VEA
01295
UC1525BJQMLV
5962-8951105V2A
01295
UC1525BLQMLV
Reference
military specification
PIN
1/ The lead finish shown for each PIN representing a hermetic package is the
most readily available from the manufacturer listed for that part. If the
desired lead finish is not listed contact the vendor to determine its availability.
2/ Caution. Do not use this number for item acquisition. Items acquired to this
number may not satisfy the performance requirements of this drawing.
3/ The end-of-life date for this device is 30 March 2001.
Vendor CAGE
number
Vendor name
and address
U3158
Semelab PLC
Coventry Road, Lutterworth
Leicestershire, LE174JB
United Kingdom
Point of contact: 19 Palham Island Road
Wayland, MA 01778
01295
Texas Instruments, Incorporated
Semiconductor Group
8505 Forest Lane
P.O. Box 660199
Dallas, TX 75243
Point of contact:
6412 Highway 75 South
Sherman, TX 75090-9493
34333
Linfinity Microelectronics, Incorporated
11861 Western Avenue
Garden Grove, CA 92641
64155
Linear Technology Corporation
720 Sycamore Drive
Milpitas, CA 95035-7487
The information contained herein is disseminated for convenience only and the
Government assumes no liability whatsoever for any inaccuracies in the
information bulletin.
2 of 2