REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED REV SHEET REV SHEET 15 16 17 18 19 20 REV STATUS REV OF SHEETS SHEET PMIC N/A PREPARED BY Kenneth Rice STANDARD MICROCIRCUIT DRAWING CHECKED BY Jeff Bowling THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A 21 22 23 1 2 3 APPROVED BY Raymond Monnin 4 5 6 7 8 9 10 11 12 13 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216 http://www.dscc.dla.mil MICROCIRCUIT, MEMORY, DIGITAL, CMOS, FIELD PROGRAMMABLE GATE ARRAY, 20,000 GATES, MONOLITHIC SILICON DRAWING APPROVAL DATE 99 - 01 - 22 REVISION LEVEL SIZE A SHEET DSCC FORM 2233 APR 97 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited. CAGE CODE 67268 1 OF 5962-99527 23 5962-E091-99 14 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 | | | Federal stock class designator \ - 99527 01 | | | Device type (see 1.2.2) | | | RHA designator (see 1.2.1) Q | | | Device class designator (see 1.2.3) / X | | | Case outline (see 1.2.4) C | | | Lead finish (see 1.2.5) \/ Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type 01 02 Generic number Circuit function A32200DX A32200DX-1 Bin speed 20,000 gate, field programmable gate array 20,000 gate, field programmable gate array 227 ns 192 ns 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter X Y Descriptive designator See Figure 1 1/ See Figure 1 1/ Terminals Package style 256 208 Ceramic Quad Flat Pack Ceramic Quad Flat Pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1/ All exposed metalized areas and leads are gold plated 100 microinches (2.5µm) min. thickness over 80 to 350 microinches (2.0 to 8.9 µm) thickness of nickel. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-99527 A REVISION LEVEL SHEET 2 1.3 Absolute maximum ratings. 2/ DC supply voltage range (VDD) ------------------------------Input voltage range (VI) - --------------------------------------Output voltage range (VO)-------------------------------------I/O source sink current (IIO) ----------------------------------Storage temperature range (TSTG) -------------------------Lead temperature (soldering, 10 seconds) --------------Thermal resistance, junction-to-case (θJC) ---------------Case outline X and Y ------------------------------------------Maximum junction temperature (TJ) ----------------------- -0.5 V dc to +7.0 V dc -0.5 V dc to VDD + 0.5 V dc -0.5 V dc to VDD + 0.5 V dc ±20 mA -65°C to +150°C 300°C 10°C/W 3/ +150°C 1.4 Recommended operating conditions. Supply voltage (VDD) -----------------------------------------Case operating temperature range (TC) ---------------- +4.5 V dc to +5.5 V dc -55°C to +125°C 1.5 Digital logic testing for device classes Q and V. Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012)----------- 100 percent 4/ 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DEPARTMENT OF DEFENSE MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 MIL-STD-973 MIL-STD-1835 - Test Method Standard Microcircuits. Configuration Management. Interface Standard For Microcircuit Case Outlines. HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings (SMD's). Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 3/ When a thermal resistance for this case is specified in MIL-STD-1835 that value shall supersede the value indicated herein. 4/ 100 percent test coverage of blank programmable logic devices. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-99527 A REVISION LEVEL SHEET 3 2.2 Non-Government publications. The following documents form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents which are DoD adopted are those listed in the issue of the DODISS cited in the solicitation. Unless otherwise specified, the issues of documents not listed in the DODISS are the issues of the documents cited in the solicitation. AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM Standard F1192-95 - Standard Guide for the Measurement of Single Event Procedures from Heavy Ion Irradiation of Semiconductor Devices. (Applications for copies of ASTM publications should be addressed to the American Society for Testing and Materials, 1916 Race Street, Philadelphia, Pennsylvania 19103). ELECTRONICS INDUSTRIES ALLIANCE (EIA) JEDEC Standard No. 17 - A Standard Test Procedure for the Characterization of Latch-up in CMOS Integrated Circuits. (Applications for copies should be addressed to the Electronics Industries Alliance, 2500 Wilson Blvd., Arlington, VA 22201.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table(s). 3.2.3.1 Unprogrammed devices. The truth table or test vectors for unprogrammed devices for contracts involving no altered item drawing is not part of this drawing. When required in screening (see 4.2 herein) or quality conformance inspection group A, B, C, D, or E (see 4.4 herein), the devices shall be programmed by the manufacturer prior to test. A minimum of 50 percent of the total number of logic modules shall be utilized or at least 25 percent of the total logic modules shall be utilized for any altered item drawing pattern. 3.2.3.2 Programmed devices. The truth table or test vectors for programmed devices shall be as specified by an attached altered item drawing. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-99527 A REVISION LEVEL SHEET 4 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change as defined in MIL-STD-973. 3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 42 (see MIL-PRF-38535, appendix A). 3.11 Processing options. Since the device is capable of being programmed by either the manufacturer or the user to result in a wide variety of configurations, two processing options are provided for selection in the contract. 3.11.1 Unprogrammed device delivered to the user. All testing shall be verified through group A testing as defined in 3.2.3.1 and table IIA. It is recommended that users perform subgroups 7 and 9 after programming to verify the specific program configuration. 3.11.2 Manufacturer-programmed device delivered to the user. All testing requirements and quality assurance provisions herein, including the requirements of the altered item drawing, shall be satisfied by the manufacturer prior to delivery. 4. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Delete the sequence specified as initial (pre-burn-in) electrical parameters through interim (post-burn-in) electrical parameters of method 5004 and substitute lines 1 through 6 of table IIA herein. b. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. For device class M the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015. (1) Dynamic burn-in for device classes M (method 1015 of MIL-STD-883, test condition D; for circuit, see 4.2.1b herein). c. Interim and final electrical test parameters shall be as specified in table IIA herein. 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of MILSTD-883. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-99527 A REVISION LEVEL SHEET 5 b. Interim and final electrical test parameters shall be as specified in table IIA herein. c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF-38535, appendix B. 4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF38535 including groups A, B, C, D, and E inspections and as specified herein except where option 2 of MIL-PRF-38535 permits alternate in-line control testing. Quality conformance inspection for device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4.1 Group A inspection. a. Tests shall be as specified in table IIA herein. b. Subgroups 5 and 6 of table I of method 5005 of MIL-STD-883 shall be omitted. c. Subgroup 4 (CIN and COUT measurements) shall be measured only for initial qualification and after any process or design changes which may affect input or output capacitance. Capacitance shall be measured between the designated terminal and GND at a frequency of 1 MHz. Sample size is five devices with no failures on a minimum of ten worst case pins from each device. d. O/V (latch-up) tests shall be measured only for initial qualification and after any design or process changes which may affect the performance of the device. For device class M procedures and circuits shall be maintained under document revision level control by the manufacturer and shall be made available to the preparing activity or acquiring activity upon request. For device classes Q and V, the procedures and circuits shall be under the control of the device manufacturer's technical review board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the preparing activity or acquiring activity upon request. Testing shall be on all pins, on 5 devices with zero failures. Latch-up test shall be considered destructive. Information contained in JEDEC standard number 17 may be used for reference. e. Programmed device (see 3.2.3.2) - For device class M, subgroups 7, 8A, and 8B tests shall consist of verifying the functionality of the device. For device classes Q and V, subgroups 7 and 8 shall include verifying the functionality of the device. These tests shall have been fault graded in accordance with MIL-STD-883, test method 5012 (see 1.6 herein). f. Unprogrammed devices shall be tested for programmability and dc and ac performance compliance to the requirements of group A, subgroups 1 and 7. (1) A sample shall be selected from each wafer lot to satisfy programmability requirements. Eight devices shall be submitted to programming (see 3.2.3.1). If any device fails to program, the lot shall be rejected. At the manufacturer's option, the sample may be increased to 18 total devices with no more than two total device failures allowable. (2) These eight devices shall also be submitted to the requirements of the specified tests of group A, subgroups 1 and 7. If any device fails, the lot shall be rejected. At the manufacturer's option, the sample may be increased to 18 total devices with no more than two total device failures allowable. (3a) Eight devices from the programmability sample shall be submitted to the requirements of group A, subgroups 9 for binning circuit delay only. If any device fails, the lot shall be rejected. At the manufacturer's option, the sample may be increased to 18 total devices with no more than two total device failures allowable. (3b) If the binning circuit is tested on 100 percent of the products, then the above requirement (3A) is met. 4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein. 4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883: a. Test condition D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005. b. TA = +125°C, minimum. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-99527 A REVISION LEVEL SHEET 6 c. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB, in accordance with MIL-PRF38535, and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of MIL-STD-883. 4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein. 4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). a. End-point electrical parameters shall be as specified in table IIA herein. b. For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device classes must meet the postirradiation end-point electrical parameter limits as defined in table I at TA = +25°C ±5°C, after exposure, to the subgroups specified in table IIA herein. c. When specified in the purchase order or contract, a copy of the RHA delta limits shall be supplied. 4.5 Delta measurements for device class V. Delta measurements, as specified in table IIA, shall be made and recorded before and after the required burn-in screens and steady-state life tests to determine delta compliance. The electrical parameters to be measured, with associated delta limits are listed in table IIB. The device manufacturer may, at his option, either perform delta measurements or within 24 hours after burn-in perform final electrical parameter tests, subgroups 1, 7, and 9. 4.6 Programming procedures. The programming procedures shall be as specified by the device manufacturer and shall be made available upon request. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor prepared specification or drawing. 6.1.2 Substitutability. Device class Q devices will replace device class M devices. 6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished in accordance with MIL-STD-973 using DD Form 1692, Engineering Change Proposal. 6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus when a system application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0525. 6.4 Comments. Comments on this drawing should be directed to DSCC-VA , Columbus, Ohio 43216-5000, or telephone (614) 692-0674. 6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-99527 A REVISION LEVEL SHEET 7 TABLE I. Electrical performance characteristics. Test Symbol Group A Subgroups Conditions 1/ 4.5 V < VCC < 5.5 V o o -55 C < TC < +125 C unless otherwise specified Device type Min High Level output voltage VOH Test one output at a time, VCC = 4.5 V, IOH = -4.0 mA 1, 2, 3 All Low level output voltage VOL Test one output at a time, VCC = 4.5 V, IOL = 6.0 mA 1, 2, 3 All Low level input voltage VIL 1, 2, 3 All High level input voltage VIH 1, 2, 3 All Standby supply current IDD Outputs unloaded, VCC = 5.5 V, VIN = VCC or GND 1, 2, 3 All Input leakage current IIL VCC = 5.5 V, VIN = VCC or GND 1, 2, 3 All Output leakage current IOZ VCC = 5.5 V, VO = VCC or GND 1, 2, 3 All I/O terminal capacitance CI/O See 4.4.1c, f= 1.0 Mhz, VOUT = 0 V 4 All Functional tests FT 2/ See 4.4.1e, VO = 0 V, VCC = 4.5 V 7, 8A, 8B All Binning circuit delay tPBLH, tPBHL See figure 3, VIL = 0 V, VIH = 3.0 V, VCC = 4.5 V, VOUT = 1.5 V 3/ 9, 10, 11 Unit Limits Max 3.7 V 0.4 V -0.3 0.8 V 2.0 VCC +0.3 V 25 mA -10 10 µA -10 10 µA 20 pF 01 227 ns 02 192 1/ All tests shall be performed under the worst case condition unless otherwise specified 2/ Devices are functionally tested using a serial scan test method. Data is shifted into the SDI pin and the DCLK pin is used as a clock. The data is used to drive the inputs of the internal logic and I/O modules, allowing a complete functional test to be performed. The outputs of the module can be read by shifting out the output response or by monitoring the PRA, PRB, or SDO pins. These tests form a part of the manufacturer’s test tape and shall be maintained and available at the approved source(s) of supply upon request by preparing or acquiring activity. 3/ Binning circuit delay is defined as the input-to-output delay of a special path called the "binning circuit". The binning circuit consists of one input buffer plus 16 combinatorial logic modules plus one output buffer. The logic modules are distributed along the left side of the device. These modules are configured as non-inverting buffers and are connected through programmed antifuses with typical capacitive loading. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-99527 A REVISION LEVEL SHEET 8 Case outline X A A1 b c D1/ E1 D2/ E2 e F1 F4 L1 L2 L3 H Weight Min. 2.78 2.43 0.18 0.11 35.64 22.98 22.61 74.60 69.87 55.80 65.77 Norm. 3.17 2.79 0.20 0.15 36.00 31.5 BSC 0.50 BSC 23.11 22.86 75.00 70.00 56.30 65.90 20gm Typ. Max. 3.56 3.15 0.22 0.17 36.36 23.23 23.11 75.40 70.13 56.80 66.03 Note: All dimensions are in millimeters. Figure 1. Case outlines. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-99527 A REVISION LEVEL SHEET 9 Case outline Y Min. Norm. Max. A 2.79 3.18 3.57 A1 2.44 2.80 3.16 b 0.18 0.20 0.22 c 0.08 0.13 0.18 D1 28.96 29.21 29.46 D2 25.5 BSC e 0.50 BSC F1 22.98 23.11 23.23 F4 22.61 22.86 23.11 L1 74.60 75.00 75.40 L2 69.87 70.00 70.13 L3 55.80 56.30 56.80 H 65.77 65.90 66.03 Weight 18.5gm Typ. Note: All dimensions are in millimeters. FIGURE 1. Case outline – Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-99527 A REVISION LEVEL SHEET 10 Case outline X Device Types All Terminal Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 Terminal Symbol NC GND I/O I/O I/O I/O I/O I/O I/O GND I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O VCC I/O I/O VSV,VCC VCC GND VPP,VCC VKS,GND TCK, I/O I/O GND I/O I/O I/O I/O I/O I/O I/O Device Types Terminal Number 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 All Terminal Symbol I/O I/O I/O I/O GND I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O VCC GND GND NC NC NC I/O TDO,SDO, I/O I/O WD, I/O WD, I/O I/O VCC I/O I/O I/O WD, I/O GND WD, I/O I/O QCLKB,I/O I/O I/O I/O I/O I/O I/O Device Types All Terminal number 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 Terminal Symbol WD, I/O WD, I/O I/O I/O I/O I/O I/O I/O VCC VCC GND GND I/O I/O I/O I/O I/O I/O WD, I/O WD, I/O I/O I/O WD, I/O WD, I/O I/O QCLKA,I/O I/O GND I/O I/O I/O I/O VCC I/O WD, I/O WD, I/O I/O I/O TDI, I/O TMS, I/O GND NC NC FIGURE 2. Terminal connections. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-99527 A REVISION LEVEL SHEET 11 Case Outline X Device All Device Types Terminal Number 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 All Device Types Terminal Symbol Terminal Number NC GND I/O I/O I/O I/O I/O I/O I/O GND I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O VCC I/O I/O VSV,VCC VCC GND I/O I/O I/O I/O GND I/O I/O I/O I/O VCC I/O I/O 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 All Types Terminal Symbol Terminal number Terminal Symbol I/O I/O I/O I/O I/O I/O I/O GND I/O I/O I/O I/O I/O I/O I/O MODE VCC GND NC NC NC I/O DCLK,I/O I/O I/O I/O WD, I/O WD, I/O VCC I/O I/O I/O I/O GND I/O I/O QCLKC,I/O I/O WD, I/O WD, I/O I/O I/O 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 WD, I/O WD, I/O I/O PRB,I/O I/O CLKB, I/O I/O GND GND VCC VCC I/O CLKA,I/O I/O PRA,I/O I/O I/O WD, I/O WD, I/O I/O I/O I/O I/O I/O I/O QCLKD,I/O I/O WD, I/O GND WD, I/O I/O I/O I/O VCC I/O WD, I/O WD, I/O I/O SDI, I/O I/O GND NC FIGURE 2. Terminal connections - Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-99527 A REVISION LEVEL SHEET 12 Case Outline Y Device Types Terminal Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 All Terminal Symbol GND VCC MODE I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O VCC I/O I/O I/O I/O GND I/O I/O I/O I/O GND VCC VSV, VCC I/O I/O VCC I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O GND Device Types Terminal Number 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 All Terminal Symbol GND TMS, I/O TDI, I/O I/O I/O (WD) I/O (WD) I/O VCC I/O I/O I/O I/O QCLKA, I/O I/O (WD) I/O (WD) I/O I/O I/O (WD) I/O (WD) I/O I/O I/O I/O I/O I/O GND VCC VCC I/O I/O I/O I/O I/O (WD) I/O (WD) I/O I/O I/O I/O QCLKB, I/O I/O I/O (WD) I/O (WD) I/O I/O I/O VCC I/O I/O (WD) I/O (WD) I/O TDO, SDO, I/O I/O Device Types Terminal Number 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 All Terminal Symbol GND VCC I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O GND I/O TCK, I/O VKS, GND VPP, VCC GND VCC VSV, VCC I/O I/O VCC I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O GND I/O I/O I/O I/O I/O I/O Device Types Terminal Number 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 All Terminal Symbol GND I/O SDI, I/O I/O I/O (WD) I/O (WD) I/O VCC I/O I/O I/O I/O (WD) I/O (WD) I/O QCLKD, I/O I/O I/O I/O I/O I/O (WD) I/O (WD) PRA, I/O I/O CLKA, I/O I/O VCC VCC GND I/O CLKB, I/O I/O PRB, I/O I/O I/O (WD) I/O (WD) I/O I/O I/O (WD) I/O (WD) QCLKC, I/O I/O I/O I/O I/O I/O VCC I/O (WD) I/O (WD) I/O I/O DCLK, I/O I/O FIGURE 2. Terminal connections - Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-99527 A REVISION LEVEL SHEET 13 FIGURE 3. Switching test circuit and waveforms. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-99527 A REVISION LEVEL SHEET 14 TABLE IIA. Electrical test requirements. 1/ 2/ 3/ 4/ 5/ 6/ 7/ Line no. Test requirements Subgroups (in accordance with MIL-STD-883, TM 5005, table I) Subgroups (in accordance with MIL-PRF-38535, table III) Device class M 1 Interim electrical parameters (see 4.2) 2 Static burn-in (method 1015) 3 Same as line 1 4 Dynamic burn-in (method 1015) 5 Same as line 1 6 Final electrical parameters (see 4.2) 7 Group A test requirements (see 4.4) 8 Device class Q Device class V 1, 7, 9 Not required Not required Required 1*, 7* ) Required Required Required 1*, 7* ) 1*, 2, 3, 7*, 8A,8B,9,10,11 1*, 2, 3, 7*, 8A,8B, 9, 10, 11 1*, 2, 3, 7*, 8A,8B, 9, 10, 11 1, 2, 3, 4**, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 4**, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 4**, 7, 8A, 8B, 9, 10, 11 Group C end-point electrical parameters (see 4.4) 2, 3, 7, 8A, 8B 2, 3, 7, 8A, 8B 1, 2, 3, 7, 8A, 8B, 9, 10, 11 ) 9 Group D end-point electrical parameters (see 4.4) 2, 3, 8A, 8B 2, 3, 8A, 8B 2, 3, 8A, 8B 10 Group E end-point electrical parameters (see 4.4) 1, 7, 9 1, 7, 9 1, 7, 9 1/ 2/ 3/ 4/ 5/ 6/ 7/ Blank spaces indicate tests are not applicable. Any or all subgroups may be combined when using high-speed testers. Subgroups 7 and 8 functional tests shall verify the functionality for unprogrammed devices or that the altered item drawing pattern exists for programmed devices. * indicates PDA applies to subgroup 1 and 7. ** see 4.4.1c. ) indicates delta limit (see table IIB) shall be required where specified, and the delta values shall be computed with reference to the previous interim electrical parameters (see line 1). See 4.4.1d. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-99527 A REVISION LEVEL SHEET 15 TABLE IIB. Delta limits at +25°C. Parameter 1/ Device types All IDD ±10% of specified value of table IA IOZ ±10% of specified value of table IA tPBLH, tPBHL 1/ ±10 ns The above parameter shall be recorded before and after the required burn-in and life tests to determine the delta. 6.6 Sources of supply. 6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have agreed to this drawing. 6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103. The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DSCC-VA. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-99527 A REVISION LEVEL SHEET 16 Appendix A Appendix A forms a part of SMD 5962-99527 10. Scope 10.1 Scope. This appendix establishes minimum requirements for microcircuit die to be supplied under two high reliability class levels (class Q and M) and space application (class V). QML microcircuit die meeting the requirements of MIL-PRF-38535 and the manufacturers approved QML plan for use in monolithic microcircuits, multichip modules (MCMs), hybrids, electronic modules, or devices using chip and wire designs in accordance with MIL-PRF-38534 are specified herein. When available a choice of class levels are reflected in the PIN. 10.2 PIN. The PIN is as shown in the following example: 5962 99527 01 | | | | | | Federal RHA Device stock class designator type designator (10.2.1) (see 10.2.2) \_____________ _______________/ V Drawing number Q | | Device class (see 10.2.3) 9 | | Die Code (see 10.2.4) X | | Die details (see 10.2.5) 10.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 10.2.2 Device type(s). The device type(s) shall identify the circuit function as follows: Device type Generic number 01 Circuit function 32200DX Bin speed 20,000 gate, field programmable gate array 251 ns 10.2.3 Device class designator. The device class designator shall be a single letter identifying the product follows: Device class Q or V assurance level as Device requirements documentation Certification and qualification to MIL-PRF-38535 10.2.4 Die code. The die code designator shall be a number 9 for all devices supplied as die only with no case outline. 10.2.5 Die details. The die details designation shall be a unique which designates the die’s physical dimensions, bonding pad location(s) and related electrical function(s), interface materials, and other assembly related information, for each product and variant supplied to this appendix. 10.2.5.1 Die physical dimensions. Device type 01 Die size (X,Y) 503mils, 474mils Die thickness 19±1 mils Die Detail A Figure Number A-1 10.2.5.2 Die bonding pad locations and electrical functions. Device type 01 Die Detail A Figure Number A-1 10.2.5.3 Interface materials. Device type 01 Top metalization Ti-cap+Al/Cu/Si,9-12kΑ Backside metalization None (backgrind) Die Detail A Glassivation Ox/Nitride Die Detail A Figure Number A-1 10.2.5.4 Assembly related information. Device type 01 Figure Number A-1 10.2.5.4 Wafer fab locations Device type 01 Source Chartered Semiconductor, Singapore STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 Die Detail A SIZE Figure Number A-1 5962-99527 A REVISION LEVEL SHEET 17 10.3 Absolute maximum ratings. See paragraph 1.3 within the body of this drawing for details. 10.4 Recommended operating conditions. See paragraph 1.4 within the body of this drawing for details. 20. APPLICABLE DOCUMENTS. See paragraph 2.1, 2.2 and 2.3 within the body of this drawing for details. 30. REQUIREMENTS. 30.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF389535 and as specified herein or as modified in the device manufacturer’s Quality Management (QM) plan. The Modification in the QM plan shall not effect the form, fit or function as described herein. 30.2 Design, construction and physical dimensions. The design, construction and physical dimensions shall be as specified in MIL-PRF-38535 and the manufacturer’s QM plan, for device classes Q and V and herein. 30.2.1 Die physical dimensions. The die physical dimensions shall be specified in 10.2.5.1 and on figures A-1. 30.2.2 Die bonding pad locations and electrical functions. The die bonding pad locations and electrical functions shall be as specified in 10.2.5.2 and on figures A-1. 30.2.3 Interface materials. The interface materials for the die shall be as specified in 10.2.5.3 and on figures A. 30.2.4 Assembly related information. The assembly related information shall be as specified in 10.2.5.4 and figures A-1. 30.3 Electrical performance characteristics and post-irradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics are as specified in table 1 of the body of this document. 30.4 Electrical test requirements. The electrical test requirements shall include functional and parametric testing sufficient to make the packaged die capable of meeting the electrical performance requirements in table 1. 30.5 Marking. As a minimum, each unique lot of die, loaded in single or multiple stack of carriers, for shipment to a customer, shall be identified with the wafer lot number, the certification mark, the manufacturer’s identification and the PIN listed in 10.2 herein. The certification mark shall be “QML” or “Q” as required by MIL-PRF-38535 and “M” for device class M in according to MIL-PRF-38535, appendix A. 30.6 Certification of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML38535 listed manufacturer in order to supply to the requirements of this drawing (see 60.4 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this appendix shall affirm that the manufacturer’s product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and the requirements herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 30.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provided with each lot of microcircuit die delivered to this drawing. 30.8 Processing options. Since the device is capable of being programmed by either the manufacturer or the user to result in a wide variety of configurations; two processing options are provided for selection in the contract, using an altered item drawing. 30.9 Unprogrammed die delivered to the user. All testing shall be verified through wafer probe test as defined in 40.2. 30.10 Manufacturer-programmed die delivered to the user. The programming integrity test shall be performed during programming. It is recommended that users perform subgroups 7 and 9 after programming to verify the specific program configuration. 40. QUALITY ASSURANCE PROVISIONS 40.1 Sampling and inspection. For device classes Q and V, die sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer’s Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-99527 A REVISION LEVEL SHEET 18 40.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and as defined in the manufacturer’s QM plan. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. As a minimum it shall consist of: a) Wafer lot acceptance for Class V product using the criteria within MIL-STD-883 test method 5007. b) 100% wafer probe (see paragraph 30.4) c) 100% internal visual inspection to the applicable class M, Q or V criteria defined within MIL-STD-883 test method 2010 or the alternate procedures allowed within MIL-STD-883 test method 5004. 40.3 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF38535. Inspections to be performed including groups A, B, C, D and E inspections and as specified herein except where MIL-PRF38535 permits alternate in-line control testing. 40.3.1 Programmability. See 4.4.1.e for packaged die. 40.3.2 Group E inspection. Group E inspection is required only for parts intended to be identified as radiation assured (see 30.5 herein). RHA levels for device classes Q and V shall be as specified in MIL-PRF-38535. a) End point electrical testing of packaged die shall be as specified in table IIA. b) For device class M, the devices shall be subjected to radiation hardness assured testes as specified in MIL-PRF-38535, appendix A, for the RHA level being tested. For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535 for the RHA level being tested. All device classes must o o meet the post irradiation end-point electrical parameter limits as defined in table I at TA=+25 ±5 C, after exposure, to the subgroups specified in table IIA herein. 50. DIE CARRIER 50.1 Die carrier requirements. The requirements for the die carrier shall be accordance with the manufacturer’s QM plan or as specified in the purchase order by the acquiring activity. The die carrier shall provide adequate physical, mechanical and electrostatic protection. 60. NOTES 60.1 Intended use. Microcircuit die conforming to this drawing are intended for use in microcircuits built in accordance with MIL-PRF-38535 or MIL-PRF-38534 for government microcircuit application (original equipment), design applications and logistics purposes. 60.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractorprepared specification or drawing. 60.3 Substitutability. Device class Q devices will replace device class M devices. 60.4 Configuration control of SMD’s. All proposed changes to existing SMD’s will be coordinated with the users of record for the individual documents. This coordination will be accomplished in accordance with MIL-STD-973 using DD Form 1692, Engineering Change Proposal. 60.5 Record of users. Military and industrial users should inform Defense Supply Center Columbus when a system application requires configuration control and which SMD’s are applicable to that system. DSCC will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962) should contact DSCC-VA, telephone (614)-692-0525. 60.6 Comments. Comments on this appendix should be directed to DSCC-VA, Columbus, Ohio, 43216-5000 or telephone (614)-692-0674. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-99527 A REVISION LEVEL SHEET 19 Figure A-1. Bond Pad Functions and Locations STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-99527 A REVISION LEVEL SHEET 20 Bond Pad Functions and Locations Pad # Name Center-X Center-Y Pad # Name Center-X Center-Y 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 GND VCC MODE GND I/O I/O I/O I/O I/O I/O I/O GND I/O I/O VCC I/O I/O I/O I/O I/O I/O I/O VCC I/O I/O I/O I/O GND I/O I/O I/O I/O GND VCC VSV, VCC I/O I/O VCC I/O I/O I/O I/O -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 5540 5342 5142 4968 4795 4679 4551 4404 4256 4109 3962 3787 3612 3465 3290 3116 2968 2821 2674 2527 2380 2233 2027 1846 1723 1600 1477 1296 1115 992 869 747 354 176 -262 -385 -508 -689 -932 -1116 -1299 -1483 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 I/O I/O I/O I/O I/O I/O I/O I/O I/O VCC I/O I/O GND I/O I/O I/O I/O I/O I/O I/O GND VCC GND TMS, BININ, I/O TDI, BINOUT,I/O I/O I/O I/O(WD) I/O(WD) I/O VCC I/O I/O I/O I/O GND I/O QCLKA, I/O I/O I/O(WD) I/O(WD) I/O -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -6146 -5854 -5713 -5573 -5433 -5288 -5100 -4913 -4725 -4510 -4294 -4107 -3919 -3731 -3516 -3301 -3113 -2926 -2738 -2550 -2363 -1666 -1850 -2033 -2216 -2400 -2583 -2767 -2950 -3134 -3345 -3556 -3739 -3950 -4161 -4345 -4528 -4674 -4795 -4916 -5037 -5236 -5482 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 Note - All X-Y locations are in millimeters. Figure A-1. Bond Pad Functions and Locations STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-99527 A REVISION LEVEL SHEET 21 Bond Pad Functions and Locations Pad # Name Center-X Center-Y Pad # Name Center-X Center-Y 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 I/O I/O(WD) I/O(WD) I/O I/O I/O I/O I/O I/O GND GND VCC VCC I/O I/O I/O I/O I/O I/O I/O(WD) I/O(WD) I/O I/O I/O I/O I/O I/O QCLKB, I/O I/O I/O(WD) GND I/O(WD) I/O I/O I/O VCC I/O I/O(WD) I/O(WD) I/O TDO, SDO, I/O I/O -2175 -1987 -1800 -1612 -1424 -1237 -1049 -861 -674 -459 -181 80 304 464 652 840 1027 1215 1403 1591 1779 1966 2154 2342 2530 2717 2905 3093 3281 3468 3684 3899 4087 4275 4462 4678 4880 5020 5160 5301 5472 5612 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 -5811 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 GND GND GND VCC I/O I/O I/O I/O I/O I/O I/O I/O I/O VCC I/O I/O GND I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O GND I/O TCK, I/O VKS, GND VPP, VCC GND VCC VSV, VCC I/O I/O VCC I/O I/O I/O 5810 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 -5811 -5540 -5372 -5163 -4984 -4863 -4742 -4615 -4468 -4316 -4164 -4012 -3860 -3680 -3501 -3349 -3169 -2989 -2837 -2685 -2533 -2381 -2229 -2077 -1939 -1801 -1663 -1525 -1315 -1048 -896 -546 -171 179 386 566 718 870 1080 1290 1442 1594 Note - All X-Y locations are in millimeters. Figure A-1. Bond Pad Functions and Locations – continued STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-99527 A REVISION LEVEL SHEET 22 Bond Pad Functions and Locations Pad # 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 Name I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O VCC I/O I/O GND I/O I/O I/O I/O I/O I/O I/O GND GND VCC I/O SDI, I/O I/O I/O(WD) I/O(WD) I/O VCC I/O I/O I/O I/O(WD) GND I/O(WD) I/O QCLKD, I/O I/O I/O I/O 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 Center-X 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 6146 5874 5560 5358 5228 5098 4951 4775 4600 4397 4195 4019 3844 3669 3466 3263 3088 2913 2737 2562 2387 Center-Y 1746 1899 2051 2203 2355 2507 2659 2811 2963 3115 3295 3475 3627 3806 3986 4138 4290 4431 4563 4857 5280 5482 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 Pad# 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 Name I/O I/O I/O I/O I/O(WD) I/O(WD) I/O PRA, I/O I/O CLKA, I/O I/O VCC VCC GND GND I/O CLKB, I/O I/O PRB, I/O I/O I/O(WD) I/O(WD) I/O I/O I/O(WD) I/O(WD) I/O QCLKC, I/O I/O I/O GND I/O I/O I/O I/O VCC I/O(WD) I/O(WD) I/O I/O I/O DCLK, I/O I/O Center-X 2212 2037 1861 1686 1539 1393 1246 1099 940 793 646 406 90 -184 -599 -816 -1005 -1194 -1384 -1586 -1775 -1964 -2153 -2342 -2531 -2720 -2909 -3099 -3288 -3477 -3694 -3910 -4099 -4289 -4478 -4694 -4911 -5100 -5245 -5370 -5495 -5713 -5854 Center-Y 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 5811 Note - All X-Y locations are in millimeters. Figure A-1. Bond Pad Functions and Locations – continued STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-99527 A REVISION LEVEL SHEET 23 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 99 - 01 - 22 Approved sources of supply for SMD 5962-99527 are listed below for immediate acquisition only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DSCC-VA. This bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. Standard microcircuit drawing PIN 1/ Vendor CAGE number Vendor similar PIN 2/ 5962-9952701QXC 0J4Z0 A32200DX-CQ256B 5962-9952701QYC 0J4Z0 A32200DX-CQ208B 5962-9952702QXC 0J4Z0 A32200DX-1CQ256B 5962-9952702QYC 0J4Z0 A32200DX-1CQ208B 5962-9952701Q9A 0J4Z0 A32200DX-DIE 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. Vendor CAGE number 0J4Z0 Vendor name and address Actel Corporation 955 East Arques Ave. Sunnyvale, CA94086 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin.