19-1895; Rev 0; 1/01 Low-Power, Dual, 8-Bit, Voltage Output Serial DAC in 8-Pin SOT23 Features ♦ Tiny 8-Pin SOT23 Package (3mm ✕ 3mm) The device uses a 3-wire serial interface, which operates at clock rates up to 25MHz and is compatible with SPI™, QSPI™, and MICROWIRE™ interface standards. The serial input shift register is 16 bits long and consists of 8 bits of DAC input data and 8 bits for DAC selection and shutdown control. DAC registers can be loaded independently or in parallel at the positive edge of CS. ♦ +2.7V to +5.5V Single-Supply Operation The MAX5223’s ultra-low power consumption and tiny 8-pin SOT23 package make it ideal for portable and battery-powered applications. Supply current is a low 100µA and drops below 1µA in shutdown mode. In addition, the reference input is disconnected from the REF pin during shutdown, which reduces the system’s total power consumption. ♦ Low Power Consumption 100µA Operating Current <1µA Shutdown Current ♦ Dual Buffered Voltage Output ♦ Programmable Shutdown Mode ♦ 25MHz, 3-Wire Serial Interface ♦ SPI, QSPI, and MICROWIRE-Compatible Ordering Information PART MAX5223EKA-T TEMP. RANGE -40°C to +85°C PIN-PACKAGE 8 SOT23 Functional Diagram ________________________Applications Digital Gain and Offset Adjustment Programmable Current Source Programmable Voltage Source 0.22µF Power Amp Bias Control 8 DIN VCO Tuning 3 VDD 7 REF SCLK 4 TOP VIEW CS 1 8 DIN 7 REF VDD 3 6 OUTB SCLK 4 5 OUTA MAX5223 SOT23-8 CS 1 16-BIT SHIFT REGISTER CONTROL (8) DATA (8) Pin Configuration GND 2 0.1µF (OPTIONAL) DAC LATCH A OUTA VOUTA 5 DAC A DAC LATCH B OUTB VOUTB 6 DAC B MAX5223 2 GND SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp. ________________________________________________________________ Maxim Integrated Products 1 For price, delivery, and to place orders, please contact Maxim Distribution at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. MAX5223 General Description The MAX5223 contains two 8-bit, buffered, voltage output digital-to-analog converters (DAC A and DAC B) in a small 8-pin SOT23 package. DAC outputs can source and sink 1mA to within 100mV of ground and VDD. The MAX5223 operates with a single +2.7V to +5.5V supply. MAX5223 Low-Power, Dual, 8-Bit, Voltage Output Serial DAC in 8-Pin SOT23 ABSOLUTE MAXIMUM RATINGS VDD to GND ............................................................. -0.3V to +6V All Other Pins to GND (Note 1).................. -0.3V to (VDD + 0.3V) Continuous Power Dissipation (TA = +70°C) 8-Pin SOT23 (derate 8.7mW/°C above +70°C)............696mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VDD = +2.7V to +5.5V, REF = VDD, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS STATIC PERFORMANCE Resolution N 8 Bits Integral Nonlinearity INL ILOAD = 250µA (Note 2) ±0.3 ±1 LSB Differential Nonlinearity DNL Guaranteed monotonic, ILOAD = 250µA (Note 2) ±0.2 ±1 LSB Total Unadjusted Error TUE ±1 LSB Zero-Code Offset VZS 10 mV TCVZS 100 µV/°C Zero-Code Temperature Coefficient Power Supply Rejection Ratio PSRR 4.5V ≤ VDD ≤ 5.5V, VREF = 4.096V, ILOAD = 250µA 1 2.7V ≤ VDD ≤ 3.6V, VREF = 2.4V, ILOAD = 250µA 1 mV/V REFERENCE INPUT Reference Input Voltage Range GND Reference Input Capacitance Reference Input Resistance RREF (Note 3) 8 Reference Input Resistance (Shutdown Mode) VDD V 25 pF 16 kΩ 50 MΩ DAC OUTPUTS Output Voltage Range ILOAD = 0 0 Capacitive Load at OUT_ Output Resistance REF V 100 pF Ω 500 DIGITAL INPUTS Input High Voltage VIH Input Low Voltage VIL Input Current IIN VIN = 0 or VDD Input Capacitance CIN (Note 4) 2 0.7 x VDD V 0.3 x VDD 0.1 _______________________________________________________________________________________ V ±10 µA 10 pF Low-Power, Dual, 8-Bit, Voltage Output Serial DAC in 8-Pin SOT23 MAX5223 ELECTRICAL CHARACTERISTICS (continued) (VDD = +2.7V to +5.5V, REF = VDD, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DYNAMIC PERFORMANCE Voltage Output Slew Rate SR CL = 100pF Voltage Output Settling Time To ±1⁄2LSB, CL = 100pF Digital Feedthrough and Crosstalk All zeros to all ones 0.15 V/µs 50 µs 0.25 nV-s POWER SUPPLY Supply Voltage Range VDD Supply Current IDD Shutdown Supply Current 2.7 All inputs = 0 5.5 VDD = +5.5V 150 275 VDD = +3.6V 100 220 VDD = +5.5V 0.6 V µA µA TIMING CHARACTERISTICS (Figure 3, VDD = +2.7V to +5.5V, TA = TMIN to TMAX, unless otherwise noted.) (Note 4) PARAMETER SERIAL INTERFACE TIMING –—– CS Fall to SCLK Rise Setup Time –—– SCLK Rise to CS Rise Setup Time SYMBOL CONDITIONS MIN TYP MAX UNITS tCSS 50 ns tCSH 50 ns DIN to SCLK Rise Setup Time tDS 20 ns DIN to SCLK Rise Hold Time tDH 20 ns SCLK Pulse Width High tCH 20 ns SCLK Pulse Width Low –—– CS Pulse Width High tCL 20 ns tCSPWH 50 ns Note 1: The outputs may be shorted to VDD or GND if the package power dissipation is not exceeded. Typical short-circuit current to GND is 70mA. Note 2: Reduced digital code range (code 24 through code 232) is due to swing limitations of the output amplifiers. See Typical Operating Characteristics. Note 3: Reference input resistance is code-dependent. The lowest input resistance occurs at code 55hex. See the Reference Input section. Note 4: Guaranteed by design. Not production tested. _______________________________________________________________________________________ 3 __________________________________________Typical Operating Characteristics (VDD = +3V, TA = +25°C, unless otherwise noted.) OUTPUT VOLTAGE vs. OUTPUT SOURCE CURRENT (VDD = +5V) 2.0 1.5 1.0 4 3 2 600 500 400 300 200 100 1 0.5 0 0.01 0.1 1 10 0 0.0001 100 0.01 1 -100 0.0001 100 0.001 0.01 0.1 1 10 OUTPUT SOURCE CURRENT (mA) OUTPUT SOURCE CURRENT (mA) OUTPUT SINK CURRENT (mA) INTEGRAL NONLINEARITY vs. DIGITAL CODE DIFFERENTIAL NONLINEARITY vs. DIGITAL CODE POSITIVE SUPPLY CURRENT vs. SUPPLY VOLTAGE 0.15 0.08 0.06 0.10 0.16 0.14 0.12 0.04 0 -0.05 0.02 IDD (mA) DNL (LSB) 0.05 MAX5223 toc06 0.10 MAX5223 toc04 0.20 MAX5223 toc05 0 0.001 INL (LSB) 700 OUTPUT VOLTAGE (mV) 2.5 800 MAX5223 toc02 5 OUTPUT VOLTAGE (V) 3.0 OUTPUT VOLTAGE (V) 6 MAX5223 toc01 3.5 OUTPUT VOLTAGE vs. OUTPUT SINK CURRENT MAX5223 toc03 OUTPUT VOLTAGE vs. OUTPUT SOURCE CURRENT 0 -0.02 0.10 0.08 0.06 -0.04 -0.10 0.02 -0.08 0 -0.10 -2.20 50 100 150 200 250 0 300 50 100 150 200 250 2 300 3 4 5 CODE CODE VDD (V) POSITIVE SUPPLY CURRENT vs. TEMPERATURE SHUTDOWN SUPPLY CURRENT vs. SUPPLY VOLTAGE REFERENCE SMALL SIGNAL FREQUENCY RESPONSE 0.8 0.14 IDD (µA) 0.7 0.12 0.10 0.6 0.5 0.4 0.3 0.08 0.06 0.04 5 20 35 50 TEMPERATURE (°C) 65 80 0 -5 -10 -15 -20 -25 0.2 -30 0.1 -35 0 -40 -25 -10 5 RELATIVE OUTPUT (dB) 0.16 0.9 MAX5223 toc09 1.0 MAX5223 toc07 0.18 MAX5223 toc08 0 4 0.04 -0.06 -0.15 IDD (mA) MAX5223 Low-Power, Dual, 8-Bit, Voltage Output Serial DAC in 8-Pin SOT23 -40 2 3 4 SUPPLY VOLTAGE (V) 5 0.1 1 10 100 FREQUENCY (Hz) _______________________________________________________________________________________ 1k 10k Low-Power, Dual, 8-Bit, Voltage Output Serial DAC in 8-Pin SOT23 LARGE-SIGNAL OUTPUT STEP RESPONSE CLOCK FEEDTHROUGH MAX5223 toc10 MAX5223 toc11 CH1 SCLK, 5MHz 0 TO 3V 5V/div CH2 OUT_ 10mV/div AC-COUPLED CS 2V/div OUT_ 1V/div CS = HIGH, SCLK = 5MHz 10µs/div 50ns/div VREF = VDD = +3V RL = 10kΩ, CL = 100pF POWER-UP OUTPUT GLITCH POWER-UP OUTPUT GLITCH MAX5223 toc13 MAX5223 toc12 VDD 2V/div VDD 2V/div OUT_ 50mV/div OUT_ 20mV/div 100µs/div VDD = 0 TO 5V RISE TIME = FALL TIME = 10µs 2ms/div VDD = 0 TO 5V RISE TIME = FALL TIME = 1ms POSITIVE SETTLING TIME NEGATIVE SETTLING TIME MAX5223 toc15 MAX5223 toc14 4µs/div VDD = REF = +3V RL = 10kΩ, CL =100pF ALL DATA BITS OFF TO ALL DATA BITS ON CS 2V/div CS 2V/div OUT_ 1V/div OUT_ 1V/div 4µs/div VDD = REF = +3V RL = 10kΩ, CL =100pF ALL DATA BITS OFF TO ALL DATA BITS ON _______________________________________________________________________________________ 5 MAX5223 Typical Operating Characteristics (continued) (VDD = +3V, TA = +25°C, unless otherwise noted.) MAX5223 Low-Power, Dual, 8-Bit, Voltage Output Serial DAC in 8-Pin SOT23 Typical Operating Characteristics (continued) (VDD = +3V, TA = +25°C, unless otherwise noted.) OUTPUT VOLTAGE NOISE (DC TO 1MHz) MAX5223 toc16 OUTA 2mV/div AC-COUPLED CH1 VDD = +3V, REF = VDD, NO LOAD, DIGITAL CODE = FF 2ms/div ______________________________________________________________Pin Description 6 PIN NAME FUNCTION 1 –—– CS Chip Select. Active-Low. Enables data to be shifted into the 16-bit shift register. Programming commands –—– are executed at the rising edge of C S. 2 GND Ground 3 VDD Positive Power Supply (+2.7V to +5.5V). Bypass with 0.22µF to GND. 4 SCLK Serial Clock Input 5 OUTA DAC A Output Voltage (Buffered) 6 OUTB DAC B Output Voltage (Buffered) 7 REF Reference Input for DAC A and DAC B (Optional: Bypass with 0.1µF to GND) 8 DIN Serial Data Input of the 16-Bit Shift Register. Data is clocked into the register on the rising edge of SCLK. _______________________________________________________________________________________ Low-Power, Dual, 8-Bit, Voltage Output Serial DAC in 8-Pin SOT23 Analog Section The MAX5223 contains two 8-bit, voltage output DACs. The DACs are “inverted” R-2R ladder networks. They use complementary switches that convert 8-bit digital inputs into equivalent analog output voltages in proportion to the applied reference voltage. The MAX5223 has one reference input that is shared by DAC A and DAC B. The device includes output buffer amplifiers for both DACs and input logic for simple microprocessor (µP) and CMOS interfaces. The power supply range is from +5.5V down to +2.7V. Reference Input and DAC Output Range The voltage at REF sets the full-scale output of the DACs. The input impedance of the REF input is codedependent. The lowest value, approximately 8kΩ, occurs when the input code is 01010101 (55hex). The typical value of 50MΩ occurs when the input code is zero. In shutdown mode, the selected DAC output is set to zero, while the value stored in the DAC register remains unchanged. This removes the load from the reference input to save power. Bringing the MAX5223 out of shutdown mode restores the DAC output voltage. Since the input resistance at REF is code-dependent, the DAC’s reference source should have an output impedance of no more than 5Ω to meet accuracy specifications and to avoid crosstalk. The input capacitance at the REF R 2R R 2R 2R R 2R OUT 2R REF GND SHOWN FOR ALL ONES ON DAC Figure 1. DAC Simplified Circuit Diagram ®Rail-to-Rail pin is also code dependent and typically does not exceed 25pF. The reference voltage on REF can range anywhere from GND to VDD. See the Output Buffer Amplifier section for more information. Figure 1 is the DAC simplified circuit diagram. Output Buffer Amplifiers DAC A and DAC B voltage outputs are internally buffered. The buffer amplifiers have a Rail-to-Rail® (GND to VDD) output voltage range. Both DAC output amplifiers can source and sink up to 1mA of current. The amplifiers are unity-gain stable with a capacitive load of 100pF or smaller. The slew rate is typically 0.15V/µs. Shutdown Mode When programmed to shutdown mode, the outputs of DAC A and DAC B are passively pulled to GND with a series 5kΩ resistor. In shutdown mode, the REF input is high impedance (50MΩ typ) to conserve current drain from the system reference; therefore, the system reference does not have to be powered down. Coming out of shutdown, the DAC outputs return to the values kept in the registers. The recovery time is equivalent to the DAC settling time. Serial Interface –—– An active low chip select (CS) enables the shift register to receive data from the serial data input. Data is clocked into the shift register on every rising edge of the serial clock signal (SCLK). The clock frequency can be as high as 25MHz. Data is sent by the most significant bit (MSB) first and can be transmitted in one 16-bit –—– word. The write cycle can be segmented when C S is kept active (low) to allow, for example, two 8-bit wide transfers. After clocking all 16–—bits into the input shift register, the rising – edge of CS updates the DAC outputs and the shutdown status. DACs cannot be simultaneously updated to different digital values because of their single buffered structure. Serial Input Data Format and Control Codes Table 1 lists the serial input data format and Table 2 lists the programming commands. The 16-bit input word consists of an 8-bit control byte and an 8-bit data byte. The 8-bit control byte is not decoded internally. Every control bit performs one function. Data is clocked is a registered trademark of Nippon Motorola, Ltd. _______________________________________________________________________________________ 7 MAX5223 Detailed Description Table 1. Input Shift Register DATA BITS in starting with UB1 (uncommitted bit), followed by the remaining control bits and the data byte. The least significant bit (LSB) of the data byte (D0) is the last bit clocked into the shift register (Figure 2). Table 3 is an example of a 16-bit input word. It performs the following functions: • 80 hex (128 decimal) loaded into DAC registers A and B. • DAC A and DAC B are active. Table 4 shows code examples and how to calculate their corresponding outputs. CONTROL BITS MAX5223 Low-Power, Dual, 8-Bit, Voltage Output Serial DAC in 8-Pin SOT23 D0* DAC Data Bit 0 (LSB) D1 DAC Data Bit 1 D2 DAC Data Bit 2 D3 DAC Data Bit 3 D4 DAC Data Bit 4 D5 DAC Data Bit 5 D6 DAC Data Bit 6 D7 DAC Data Bit 7 (MSB) LA Load Reg DAC A, Active-High LB Load Reg DAC B, Active-High UB4 Uncommitted Bit 4 SA Shutdown, Active-High SB Shutdown, Active-High UB3 Uncommitted Bit 3 UB2 Uncommitted Bit 2 UB1** Uncommitted Bit 1 *Clocked in last **Clocked in first CS INSTRUCTION EXECUTED SCLK OPTIONAL DIN UB1 UB2 UB3 SB SA UB4 (CONTROL BYTE) LB LA D7 D6 D5 D4 D3 D2 D1 D0 (DATA BYTE) Figure 2. 3-Wire Serial-Interface Timing Diagram 8 _______________________________________________________________________________________ Low-Power, Dual, 8-Bit, Voltage Output Serial DAC in 8-Pin SOT23 MAX5223 Table 2. Serial-Interface Programming Commands CONTROL UB1 UB2 UB3 SB X X 1 X X 1 X X 1 X X 1 X X X X DATA SA UB4 LB LA D7 D6 MSB X X D5 D4 D3 D2 D1 D0 LSB X X X X X X FUNCTION * * * * * 0 0 0 0 0 0 0 1 0 8-Bit DAC Data Load Register to DAC B 0 0 1 8-Bit DAC Data Load Register to DAC A 1 * * * * * No Operation to DAC Registers 0 1 1 8-Bit DAC Data Load Both DAC Registers X 1 0 0 0 X 1 0 0 0 X X 1 1 0 0 X X 1 0 1 0 X X 1 1 1 0 * * * * * * * * * * Unassigned Command X X X X X X X X All DACs Active X X X X X X X X Unassigned Command X X X X X X X X Shutdown X X X X X X X X Shutdown X X X X X X X X Shutdown X = Don’t care. * = Not shown, for the sake of clarity. The functions of loading and shutting down the DACs and programming the logic can be combined in a single command. Table 3. Example of a 16-Bit Input Word LOADED IN FIRST LOADED IN LAST UB1 UB2 UB3 SB SA UB4 LB LA D7 D6 D5 D4 D3 D2 D1 D0 X X 1 0 0 0 1 1 1 0 0 0 0 0 0 0 Digital Inputs The digital inputs are compatible with CMOS logic. Supply current increases slightly when toggling the logic inputs through the transition zone between 0.3 ✕ VDD and 0.7 ✕ VDD. changes data at the falling edge of SCLK. This setting allows SPI to run at full clock speeds. If a serial port is not available on your µP, three bits of a parallel port can be used to emulate a serial port by bit manipulation. Minimize digital feedthrough at the voltage outputs by operating the serial clock only when necessary. Microprocessor Interfacing The MAX5223 serial interface is compatible with MICROWIRE, SPI, and QSPI. For SPI, clear the CPOL and CPHA bits (CPOL = 0 and CPHA = 0). CPOL = 0 sets the inactive clock state to zero, and CPHA = 0 _______________________________________________________________________________________ 9 MAX5223 Low-Power, Dual, 8-Bit, Voltage Output Serial DAC in 8-Pin SOT23 CS tCSPWH tCSS tCSH tCH SCLK tCL tDS tDH DIN Figure 3. Detailed Serial-Interface Timing Diagram Applications Information The MAX5223 is specified for single-supply operation with V DD ranging from +2.7V to +5.5V, covering all commonly used supply voltages in +3V and +5V systems. Table 4. Code Table DAC CONTENTS ANALOG OUTPUT D7 D6 D5 D4 D3 D2 D1 D0 Initialization 1 1 1 1 1 1 1 1 An internal POR circuit forces the outputs to zero scale and initializes all internal registers to zero. Perform an initial write operation to set the outputs to the desired voltage at power-up. 255 +REF × 256 1 0 0 0 0 0 0 1 129 +REF × 256 Power-Supply and Ground Management 1 0 0 0 0 0 0 0 REF 128 +REF × = + 256 2 0 1 1 1 1 1 1 1 127 +REF × 256 0 0 0 0 0 0 0 1 1 +REF × 256 0 0 0 0 0 0 0 0 0V GND should be connected to the highest quality ground available. Bypass VDD with a 0.1µF to 0.22µF capacitor to GND. The reference input can be used without bypassing. For optimum line- and load-transient response and noise performance, bypass the reference input with 0.1µF to 4.7µF to GND. Careful PC board layout minimizes crosstalk among DAC outputs, the reference, and digital inputs. Separate analog lines with ground traces between them. Make sure that high-frequency digital lines are not routed in parallel to analog lines. Chip Information TRANSISTOR COUNT: 1480 PROCESS TECHNOLOGY: BiCMOS 10 Note: 1LSB = REF × 2 −8 1 256 = REF × D where D = decimal 256 value of digital input ANALOG OUTPUT = REF × ______________________________________________________________________________________ Low-Power, Dual, 8-Bit, Voltage Output Serial DAC in 8-Pin SOT23 SOT23, 8L.EPS Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________11 © 2001 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. MAX5223 ________________________________________________________Package Information