19-0602; Rev 2; 1/07 KIT ATION EVALU E L B A IL AVA Graphics Video Sync Adder/Extractor The MAX9539/MAX9540 chipset provides a 3-wire (RGB) interface for 5-wire (RGBHV) video by adding and extracting the H, V, and composite sync from the graphics video signals. This chipset eliminates the problem of sync-to-video timing (skew errors) in a 5wire interface, while reducing the number of channels required to transport video signals. Features ♦ 3-Wire RBG to 5-Wire RBGHV Interface ♦ Supports VGA-to-UXGA Resolution ♦ Low Offset Voltage (±1mV) ♦ 180MHz Large-Signal Bandwidth The MAX9539 mixes the H and V sync signals and adds them to create a 3-wire interface from a 5-wire (RGBHV) input. The MAX9540 recovers the H and V sync signals to create a 5-wire (RGBHV) interface from the 3-wire input. The MAX9540 also provides a composite sync output. The chipset includes the MAX9539 sync adder and the MAX9540 sync extractor with 180MHz large-signal bandwidths to address display resolutions up to 1600 x 1200 at 85Hz for VGA-to-UXGA applications. Both devices feature a DC restore function, which virtually eliminates any changes in black level. The chipset uses a proprietary H and V sync addition/extraction scheme (true sync) to minimize skew errors. The MAX9539/MAX9540 are available in 28-pin TSSOP packages and are specified over the extended -40°C to +85°C temperature range. Applications Ordering Information MAX9539EUI+* PINPACKAGE 28 TSSOP PKG CODE U28-3 MAX9539EUI 28 TSSOP U28-3 Sync Adder PART DESCRIPTION Sync Adder MAX9540EUI+* 28 TSSOP U28-3 Sync Extractor MAX9540EUI 28 TSSOP U28-3 Sync Extractor Note: All devices are specified over the -40°C to +85°C operating temperature range. +Denotes lead-free package. *Future product—contact factory for availability. Pin Configurations appear at end of data sheet. Enterprise Class (Blade) Servers Laptop PCs Web Appliances Keyboard-Video-Mouse (KVM) Chipset Diagram H V H V R R R G G R G B B G B MAX9539 MAX9540 C B ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX9539/MAX9540 General Description MAX9539/MAX9540 Graphics Video Sync Adder/Extractor ABSOLUTE MAXIMUM RATINGS VCC to GND ..............................................................-0.3V to +6V VEE to GND...............................................................-6V to +0.3V IN_R, IN_G, IN_B, REST_R, REST_G, REST_B….....................................(VEE - 0.3V) to (VCC + 0.3V) OUT_R, OUT_G, OUT_B Short Circuit to GND (Note 1) .....................................................Continuous OUT_R, OUT_G, OUT_B Short Circuit to VCC .......................................................................................5s MAX9539: HSYNC, VSYNC, SP_H, SP_V ................ -0.3V to (VCC + 0.3V) MAX9540: HSYNC, CSYNC, VSYNC Short Circuit to GND .....Continuous HSYNC, CSYNC, VSYNC Short Circuit to VCC .................1min SP_C, SP_V, SP_H .................................-0.3V to (VCC + 0.3V) Continuous Power Dissipation (TA = +70°C) 28-Pin TSSOP (U28-3) Single-Layer Board (derate 13mW/°C above +70°C) ................................1039mW 28-Pin TSSOP (U28-3) Multilayer Board (derate 14.3mW/°C above +70°C) ...............................1143mW Operating Temperature .......................................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Note 1: Continuous power dissipation rating must also be observed. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. MAX9539 DC ELECTRICAL CHARACTERISTICS (VCC = +5V, VEE = -5V, GND = 0V, RL = 150Ω to GND, TA = -40°C to +85°C, unless otherwise specified. Typical values are at TA = +25°C.) (Notes 2 and 3) PARAMETER Supply Voltage Range Quiescent Supply Current Input Voltage Range DC-Restore Input Voltage Range DC-Restore Rejection Ratio Input Bias Current Input Resistance Output Sync Amplitude Output Offset Voltage Temperature Coefficient of Output Offset Voltage Voltage Gain Gain Matching SYMBOL CONDITIONS MIN 2 MAX Guaranteed by PSRR test 4.5 5.5 VEE Guaranteed by PSRR test -5.5 -4.5 ICC RL = ∞ 61 90 IEE RL = ∞ 55 75 VIN Inferred from voltage gain test ∆VIN_RESTORE DCRR (∆VOS / ∆VIN_RESTORE) Inferred from output DC-Restore Rejection Ratio test VIN_RESTORE = -0.3V to +0.3V -0.30 +0.30 V 28 50 ±2 400 VOS TCVOS (∆VOS / ∆TA) G ∆G PSRR ∆VOS / ∆(VCC - VEE) mA V IB H or V sync is active V 1 RIN VSYNC UNITS 0 ±30 µA kΩ -2.35 -2.05 V ±1 ±8 mV TA = -40oC to +85oC -24 VIN = 0 to +1V -2.65 dB ∆VIN_RESTORE_ = 0V, TA = +25oC (Note 4) +1.95 R to G to B Gain Linearity Power-Supply Rejection Ratio TYP VCC VCC, VEE = ±4.5V to ±5.5V 50 µV/°C +2 +2.05 V/V ±1 ±2 % 0.02 % 70 dB _______________________________________________________________________________________ Graphics Video Sync Adder/Extractor (VCC = +5V, VEE = -5V, GND = 0V, RL = 150Ω to GND, TA = -40°C to +85°C, unless otherwise specified. Typical values are at TA = +25°C.) (Notes 2 and 3) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 0.8 V HSYNC, VSYNC INPUTS High Input Voltage VIH Low Input Voltage VIL 2 V High Input Current IIH VI = 5V 10 Low Input Current IIL VI = 0V 2.5 60 µA µA SP_H, SP_V INPUTS High Input Voltage VIH Low Input Voltage VIL 2 High Input Current IIH VI = 5V Low Input Current IIL VI = 0V V 0.8 V 0.1 20 µA 1 20 µA REST_R, REST_B, REST_G INPUTS Hold-Mode Droop Current IDROOP ±2 nA MAX9539 AC ELECTRICAL CHARACTERISTICS (VCC = +5V, VEE = -5V, GND = 0V, RL = 150Ω to GND, TA = -40°C to +85°C, unless otherwise specified. Typical values are at TA = +25°C.) PARAMETER Large-Signal Bandwidth Slew Rate SYMBOL LSBW SR Channel-to-Channel Crosstalk XTALK CONDITIONS MIN TYP MAX UNITS VOUT = 2VP-P 180 MHz VOUT = 2VP-P 900 V/µs VOUT = 2VP-P at 10MHz -60 dB Settling Time tS VOUT = 2VP-P to 0.1% 15 ns Input Voltage-Noise Density en f = 100kHz 30 nV/√Hz Input Current-Noise Density in f = 100kHz 12 pA/√Hz Sync Timing Delay tD H sync only (Note 5) -20 ns ∆(tD) H sync only (Note 5) 1 ns Channel-to-Channel Sync Timing Skew Sync Edge Jitter 200 psP-P Line Droop tJITTER f = 50kHz 0.01 % Field Tilt f = 60Hz 0.04 % Sync Frequency Range fH H sync 15 to 150 kHz fV V sync 40 to 100 Hz _______________________________________________________________________________________ 3 MAX9539/MAX9540 MAX9539 DC ELECTRICAL CHARACTERISTICS (continued) MAX9539/MAX9540 Graphics Video Sync Adder/Extractor MAX9540 DC ELECTRICAL CHARACTERISTICS (VCC = +5V, VEE = -5V, GND = 0V, RL = 150Ω to GND, TA = -40°C to +85°C, unless otherwise specified. Typical values are at TA = +25°C.) (Notes 2 and 3) PARAMETER SYMBOL Supply Voltage Range Quiescent Supply Current Input Voltage Range DC-Restore Input Voltage Range DC-Restore Rejection Ratio MIN Guaranteed by PSRR test 4.5 5.5 Guaranteed by PSRR test -5.5 -4.5 ICC RL = ∞ 61 90 IEE RL = ∞ 54 75 VIN Inferred from voltage gain test ∆VIN_RESTORE) Inferred from DC-Restore Rejection Ratio test VIN_RESTORE = -0.3V to +0.3V Output Offset Voltage VOS TCVOS (∆VOS /∆TA) Temperature Coefficient of Output Offset Voltage Voltage Gain G ∆G Gain Matching PSRR ∆VOS / ∆(VCC - VEE) mA V -0.30 +0.30 V 28 50 ±2 dB ±30 µA 400 kΩ H or V sync is active: VIN < -1V ±1 ±16 mV ∆VIN_RESTORE_ = 0V, TA = +25oC (Note 4) ±1 ±8 mV TA = -40oC to +85oC −24 VIN = 0 to +1V +1.95 R to G to B Gain Linearity Power-Supply Rejection Ratio V 1 RIN VBLACK UNITS 0 IB Output Black Level MAX VEE DCRR (∆VOS / Input Resistance TYP VCC ∆VIN_RESTORE Input Bias Current CONDITIONS VCC, VEE = ±4.5V to ±5.5V 50 µV/°C +2 +2.05 ±1 ±2 V/V % 0.02 % 70 dB SP_H, SP_V, SP_C INPUTS High Input Voltage VIH Low Input Voltage VIL 2 V High Input Current IIH VI = 5V 0.01 20 µA Low Input Current IIL VI = 0V 1 20 µA 0.8 V REST_R, REST_G, REST_B INPUTS Hold-Mode Droop Current IDROOP ±2 nA HSYNC, VSYNC, CSYNC OUTPUTS High Voltage Level VOH IOH (source) = +8mA Low Voltage Level VOL IOL (sink) = -8mA 4 2.4 _______________________________________________________________________________________ V 0.5 V Graphics Video Sync Adder/Extractor (VCC = +5V, VEE = -5V, GND = 0V, RL = 150Ω to GND, TA = -40°C to +85°C, unless otherwise specified. Typical values are at TA = +25°C.) PARAMETER SYMBOL Large-Signal Bandwidth MIN TYP MAX UNITS LSBW VOUT = 2VP-P 180 MHz SR VOUT = 2VP-P 900 V/µs VOUT = 2VP-P at 10MHz -60 dB Slew Rate Channel-to-Channel Crosstalk CONDITIONS XTALK Settling Time tS VOUT = 2VP-P to 0.1% 15 ns Input Voltage-Noise Density en f = 100kHz 30 nV/√Hz Input Current-Noise Density in f = 100kHz 12 pA/√Hz Sync Timing Delay tD H sync only (Note 5) -10 ns Sync Timing Skew ∆(tD) H sync only (Note 5) 1 ns 200 psP-P % Sync Edge Jitter tJITTER Line Droop f = 50kHz 0.01 Field Tilt f = 60Hz 0.04 % Sync Frequency Range Note 2: Note 3: Note 4: Note 5: fH H sync 15 to 150 kHz fV V sync 40 to 100 Hz All devices are 100% production tested at TA = +25°C. Specifications over temperature limits are guaranteed by design. DC restore is not active. HSYNC and VSYNC are not applied. REST_R, REST_G, and REST_B are grounded. DC restore is active. REST_R, REST_G, and REST_B are bypassed with 1nF to ground. The sync timing error is measured as follows: The input signals are measured from the falling edge of H sync/V sync to the start of active video, called t1. The output signal is then measured from the falling edge of H sync/V sync to the start of active video, called t2. All measurements are at the 50% points as shown in Figure 1. Typical Operating Characteristics (TA = +25°C, VCC = +5V, VEE = -5V, GND = 0V, RL = 150Ω to GND, unless otherwise noted.) 1 -1 GAIN (dB) GAIN (dB) 0 -2 0.2 0.1 0 0 -1 -0.1 GAIN (dB) 1 IN_ = 1VP-P AV = +2V/V 2 0.3 MAX9539 toc02 IN_ = 1VP-P AV = +2V/V 2 3 MAX9539 toc01 3 LARGE-SIGNAL GAIN FLATNESS vs. FREQUENCY (MAX9539) LARGE-SIGNAL FREQUENCY RESPONSE (MAX9540) -2 -0.2 -3 -0.3 -4 -4 -0.4 -5 -5 -0.5 -6 -6 -0.6 -7 -7 -0.7 -3 1 10 100 FREQUENCY (MHz) 1000 1 10 100 FREQUENCY (MHz) 1000 MAX9539 toc03 LARGE-SIGNAL FREQUENCY RESPONSE (MAX9539) 1 10 100 1000 FREQUENCY (MHz) _______________________________________________________________________________________ 5 MAX9539/MAX9540 MAX9540 AC ELECTRICAL CHARACTERISTICS Typical Operating Characteristics (continued) (TA = +25°C, VCC = +5V, VEE = -5V, GND = 0V, RL = 150Ω to GND, unless otherwise noted.) LARGE-SIGNAL GAIN FLATNESS vs. FREQUENCY (MAX9540) -10 -10 -20 -20 GAIN (dB) -0.1 -0.2 -0.3 PSRR- -30 GAIN (dB) 0 MAX9539 toc06 0.1 0 MAX9539 toc05 0 MAX9539 toc03 IN_ = 1VP-P AV = +2V/ V 0.2 POWER-SUPPLY REJECTION RATIO vs. FREQUENCY (MAX9540) POWER-SUPPLY REJECTION RATIO vs. FREQUENCY (MAX9539) 0.3 GAIN (dB) -40 PSRR-30 -40 PSRR+ PSRR+ -0.4 -50 -50 -60 -60 -0.5 -0.6 -70 -70 -0.7 1 10 0.1 1000 100 1 10 0.1 1000 100 1 64 62 SUPPLY CURRENT (mA) ICC 60 58 56 IEE 52 MAX9539 toc08 64 54 100 SUPPLY CURRENT vs. TEMPERATURE (MAX9540) MAX9539 toc07 SUPPLY CURRENT vs. TEMPERATURE (MAX9539) 62 10 FREQUENCY (MHz) FREQUENCY (MHz) FREQUENCY (MHz) SUPPLY CURRENT (mA) MAX9539/MAX9540 Graphics Video Sync Adder/Extractor ICC 60 58 56 54 IEE 52 50 50 -50 -25 0 25 50 75 100 TEMPERATURE (°C) -50 -25 0 25 50 75 100 TEMPERATURE (°C) OUTPUT vs. INPUT (MAX9540) OUTPUT vs. INPUT (MAX9539) MAX9539 toc09 MAX9539 toc10 IN_R 1V/div IN_R 1V/div HSYNC 5V/div OUT_R 1V/div OUT_R 2V/div HSYNC 5V/div 2µs/div 6 2µs/div _______________________________________________________________________________________ 1000 Graphics Video Sync Adder/Extractor PIN NAME 1 IN_R Red Video Input 2, 7, 12 GND Ground 3 REST_R 4, 9, 10, 14, 15, 20, 21, 22, 25 N.C. No Connection. Not internally connected. 5 I.C. Internally Connected. For best performance, connect this pin to GND. 6 IN_G 8 REST_G 11 IN_B 13 REST_B 16 VSYNC 17 SP_V 18 OUT_B 19 VEE 23 OUT_G 24 VCC 26 HSYNC 27 SP_H 28 OUT_R FUNCTION Red DC Restore. Connect a 1nF capacitor from REST_R to GND. Green Video Input Green DC Restore. Connect a 1nF capacitor from REST_G to GND. Blue Video Input Blue DC Restore. Connect a 1nF capacitor from REST_B to GND. Vertical Sync Input Vertical Sync Polarity Input Blue Output with Vertical Sync Negative Power-Supply Input. Bypass with a 0.1µF capacitor to GND. Green Output with Composite Sync. Positive Power-Supply Input. Bypass with a 0.1µF capacitor to GND. Horizontal Sync Input Horizontal Sync Polarity Input Red Output with Horizontal Sync _______________________________________________________________________________________ 7 MAX9539/MAX9540 MAX9539 Pin Description Graphics Video Sync Adder/Extractor MAX9539/MAX9540 MAX9540 Pin Description PIN NAME FUNCTION 1 IN_R Red Video Input with Horizontal Sync 2, 7, 12 GND Ground 3 REST_R 4, 9, 10, 14, 15, 20, 25 N.C. No Connection. Not internally connected. 5 I.C. Internally Connected. For best performance, connect this pin to GND. 6 IN_G 8 REST_G 11 IN_B 13 REST_B 16 VSYNC 17 SP_V 18 OUT_B 19 VEE 21 CSYNC Red DC Restore. Connect a 1nF capacitor from REST_R to GND. Green Video Input with Composite Sync Green DC Restore. Connect a 1nF capacitor from REST_G to GND. Blue Video Input with Vertical Sync Blue DC Restore. Connect a 1nF capacitor from REST_B to GND. Vertical Sync Output Vertical Sync Polarity Input Blue Video Output Negative Power-Supply Input. Bypass with a 0.1µF capacitor to GND. 22 SP_C 23 OUT_G 24 VCC 26 HSYNC 27 SP_H 28 OUT_R Composite Sync Output Composite Sync Polarity Input Green Video Output Positive Power-Supply Input. Bypass with a 0.1µF capacitor to GND. Horizontal Sync Output Horizontal Sync Polarity Input Red Video Output Detailed Description The MAX9539/MAX9540 chipset provides a 3-wire (RGB) interface for 5-wire (RGBHV) video by adding and extracting the H, V, and composite sync from the graphics video signals. This chipset eliminates the problem of sync-to-video timing (skew errors) in a 5wire interface, while reducing the number of channels required when transporting video signals. The MAX9539 mixes the H and V sync signals and adds them to create a 3-wire interface from a 5-wire (RGBHV) input. The MAX9540 recovers the H and V sync signals to create a 5-wire (RGBHV) interface from the 3-wire input. The MAX9540 also provides a composite sync output. The chipset includes the MAX9539 sync adder and the MAX9540 sync extractor with 180MHz large-signal bandwidths to address display resolutions up to 1600 x 1200 at 85Hz for VGA-to-UXGA applications. Both devices feature a DC-restore function, which virtually eliminates any changes in black level. The chipset uses a proprietary H and V sync addition/extraction scheme (true sync) to minimize skew errors. 8 MAX9539 Sync Adder The MAX9539 mixes the H and V sync signals and adds them to create a 3-wire interface from a 5-wire (RGBHV) input. Sync signals are added to the input video signals. Horizontal sync is added to red video, vertical sync is added to blue video, and composite sync is added to green video. Composite sync is the XOR function between H sync and V sync and is internally generated by the MAX9539. The sync level of the video outputs is -2.4V. The DC-restore function removes any DC offset (∆V IN_RESTORE) in the RGB video inputs and sets the output black level to 0V at the back porch of the H sync. Therefore, the output black level is set to 0V at the beginning of every line. Figure 2 illustrates the functionality of the MAX9539. In this example, the sync signals are of positive polarity. MAX9540 Sync Extractor The MAX9540 recovers the H and V sync signals to create a 5-wire (RGBHV) interface from the 3-wire input. The output video signals are obtained by removing the sync pulses of the input video. The sync outputs correspond to the sync pulses of the input video: horizontal sync is _______________________________________________________________________________________ Graphics Video Sync Adder/Extractor DC Restore The MAX9539/MAX9540 DC-restore function removes the input signal DC level and restores 0V for the black level of the output video signal. 1nF restore capacitors are needed for the sample-and-hold circuitry at REST_R, REST_G, and REST_B. A value less than 0.5nF can cause AC instability in the sample-and-hold circuitry. A value higher than 2nF increases the settling time of the sample-and-hold circuitry, shifting the output black level from 0V. MAX9539/MAX9540 obtained from the red input, vertical sync is obtained from the blue input, and composite sync is obtained from the green input. Like the MAX9539, the DC-restore function removes any DC offset in the RGB video inputs and sets the output black levels to 0V. This happens at the back porch (trailing edge) of the sync pulse. Figure 3 illustrates the functionality of the MAX9540. In this example, the sync signals are of positive polarity. SYNC TIMING DELAY (tD) = t1 - t2 t1 VIDEO SYNC t2 VIDEO WITH SYNC Sync Polarity Sync polarity refers to the idle state and pulse amplitude of the sync pulse. A sync pulse that idles low and pulses high is referred to as a positive sync pulse. A sync pulse that idles high and pulses low is referred to as a negative sync pulse as seen in Figure 4. To accommodate positive and negative sync input signals, the MAX9539/MAX9540 have vertical and horizontal sync polarity inputs (SP_V and SP_H). Drive SP_V or SP_H high for positive sync polarity. Drive SP_V or SP_H low for negative sync polarity. The MAX9540 also has a composite polarity input (SP_C). Drive SP_C high for positive sync polarity or drive SP_C low for negative sync polarity (Table 1). Layout and Power-Supply Bypassing The MAX9539/MAX9540 have an extremely high bandwidth and require careful board layout. For best performance use constant-impedance microstrip or stripline techniques. To realize the full AC performance of these high-speed amplifiers, pay careful attention to power-supply bypassing and board layout. The PC board should have at least two layers: a signal and power layer on one side, and a large, low-impedance ground plane on the other side. The ground plane should be as free of voids as possible. With multilayer boards, locate the ground plane on a layer that incorporates no signal or power traces. Observe the following guidelines when designing the board regardless of whether or not a constant-impedance board is used. 1) Do not use wire-wrap boards or breadboards. Figure 1. Sync Timing Delay (tD) = t1 - t2 Table 1. Sync Polarity Table INPUT LOGIC VALUE SP_V SP_H SP_C (MAX9540) 1 Positive sync Positive sync Positive sync 0 Negative sync Negative sync Negative sync 2) Do not use IC sockets; they increase parasitic capacitance and inductance. 3) Keep lines as short and as straight as possible. Do not make 90° turns; round all corners. 4) Observe high-frequency bypassing techniques to maintain the amplifier’s accuracy and stability. 5) Use surface-mount components. They generally have shorter bodies and lower parasitic reactance, yielding better high-frequency performance than through-hole components. _______________________________________________________________________________________ 9 MAX9539/MAX9540 Graphics Video Sync Adder/Extractor VIDEO INPUT (IN_) 0.7V 0V HOR. SYNC (HSYNC) 5V 0V VER. SYNC (VSYNC) 5V 0V RED OUTPUT (OUT_R) 1.4V 0V -2.4V BLUE OUTPUT (OUT_B) 1.4V 0V -2.4V GREEN OUTPUT (OUT_G) 1.4V 0V -2.4V Figure 2. MAX9539 Input and Output Functionality VIDEO WITH SYNC (IN_) POSITIVE SYNC 0.7V +5V -2.4V VIDEO OUTPUT (OUT_R/B/G) 0V 1.4V SYNC OUTPUT (_SYNC) NEGATIVE SYNC 0V +5V 0V 0V 5V Figure 3. MAX9540 Input and Output Functionality Figure 4. Sync Pulse Polarity The bypass capacitors should include a 0.1µF ceramic surface-mount capacitor between each supply pin and the ground plane, located as close to the package as possible. Optionally, place a 10µF tantalum capacitor at the power-supply pins’ points of entry to the PC board to ensure the integrity of incoming supplies. The power-supply trace should lead directly from the tanta- lum capacitor to the VCC and VEE pins. To minimize parasitic inductance, keep PC traces short and use surface-mount components. Use surface-mount resistors for input termination and output back termination. Place the termination resistors as close to the IC as possible. 10 ______________________________________________________________________________________ Graphics Video Sync Adder/Extractor +5V * OPTIONAL BULK CAPACITANCE 10µF* 0.1µF VCC 24 MAX9539 IN_R 1 x2 28 OUT_R 23 OUT_G 18 OUT_B DC RESTORE REST_R 3 IN_G 6 1nF x2 DC RESTORE REST_G 8 1nF IN_B 11 x2 DC RESTORE REST_B 13 VSYNC 16 HSYNC 26 1nF H/V SYNC LOGIC 19 17 27 SP_V SP_H 2, 5, 7, 12 GND VEE 10µF* 0.1µF -5V ______________________________________________________________________________________ 11 MAX9539/MAX9540 Functional Diagrams Graphics Video Sync Adder/Extractor MAX9539/MAX9540 Functional Diagrams (continued) * OPTIONAL BULK CAPACITANCE +5V 10µF* 0.1µF VCC 24 MAX9540 IN_R 1 28 OUT_R x2 DC RESTORE REST_R 3 1nF IN_G 6 23 OUT_G x2 DC RESTORE REST_G 8 1nF IN_B 11 x2 18 OUT_B 16 VSYNC 21 CSYNC HSYNC DC RESTORE 1nF REST_B 13 SP_V 17 SP_C 22 SP_H H/V/C SYNC LOGIC 27 2, 5, 7, 12 26 19 GND VEE 10µF* 0.1µF -5V 12 ______________________________________________________________________________________ Graphics Video Sync Adder/Extractor BACKPLANE BLADE 1 H R V 75Ω 75Ω R MAX9539 G G B B 75Ω PRIOR BLADE MAX4027 +700mV 75Ω 75Ω 0V -1.2V BLADE 2 MAX4027 75Ω H V 75Ω R MAX9540 75Ω G B 75Ω MANAGEMENT MODULE ______________________________________________________________________________________ 13 MAX9539/MAX9540 Typical Application Diagram Graphics Video Sync Adder/Extractor MAX9539/MAX9540 Pin Configurations TOP VIEW TOP VIEW IN_R 1 28 OUT_R GND 2 27 SP_H REST_R 3 N.C. 4 26 HSYNC MAX9539 I.C. 5 25 N.C. 24 VCC IN_R 1 28 OUT_R GND 2 27 SP_H REST_R 3 N.C. 4 26 HSYNC MAX9540 I.C. 5 25 N.C. 24 VCC IN_G 6 23 OUT_G IN_G 6 23 OUT_G GND 7 22 N.C. GND 7 22 SP_C REST_G 8 21 N.C. REST_G 8 N.C. 9 20 N.C. N.C. 9 20 N.C. N.C. 10 19 VEE N.C. 10 19 VEE IN_B 11 18 OUT_B IN_B 11 18 OUT_B GND 12 17 SP_V GND 12 17 SP_V REST_B 13 16 VSYNC N.C. 14 15 N.C. 21 CSYNC REST_B 13 16 VSYNC N.C. 14 15 N.C. TSSOP TSSOP Chip Information PROCESS: Bipolar 14 ______________________________________________________________________________________ Graphics Video Sync Adder/Extractor TSSOP4.40mm.EPS PACKAGE OUTLINE, TSSOP 4.40mm BODY 21-0066 I 1 1 Revision History Pages changed at Rev 2: 1, 2, 4, 15 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15 © 2007 Maxim Integrated Products Boblet is a registered trademark of Maxim Integrated Products, Inc. MAX9539/MAX9540 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)