MAXIM MAX9568

19-4103; Rev 1; 12/08
KIT
ATION
EVALU
E
L
B
A
IL
AVA
Component Analog TV Sync Separator
Features
The MAX9568 video sync separator extracts sync timing
information from standard-definition (SDTV), extendeddefinition (EDTV), and high-definition (HDTV) component
video signals. This device is designed for reliable operation in the presence of copy protection schemes such as
MACROVISION®.
The MAX9568 is a stand-alone device and requires no
external components for timing or biasing. High-impedance video inputs prevent loading of the input signal
and eliminate the need for buffering.
♦ Stand-Alone Operation—No Timing Element
Required
♦ Covers All Major Standards: SDTV, EDTV, and HDTV
♦ Identification of Input Standard
♦ Loss of Video Signal Detection
♦ Coast and Clamp Pulse Outputs
♦ High-Impedance Bridging Video Input
♦ No Distortion to Video Signal
♦ Low Quiescent Current (< 10mA)
♦ 2.7V to 5.5V Single Supply
The MAX9568 is available in a 16-pin QSOP package.
The device is specified over the -40°C to +85°C temperature range.
Ordering Information
Applications
Video Digitizers
Instrumentation
PDP Television
PART
LCD Panels
Frame Grabbers
Video Recorders
MAX9568EEE+T
PIN-PACKAGE
TOP MARK
16 QSOP
—
Note: All devices are specified over the -40°C to +85°C operating temperature range.
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
MACROVISION is a registered trademark of Macrovision Corp.
Functional Diagram
VCC
0.1μF
INPUT
BUFFER
CVIDIN
SYNC SLICER
OUTPUT
PULSE
GENERATOR
300kΩ
0.35 VCC
VTHRESH
VIDEO STANDARD
DECODE
MAX9568
CSYNCOUT
HSYNCOUT
CLAMP
VSYNCOUT
ODD/EVEN
LOS
COAST
FR
HL
SDTV
HDTV
GND
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1
MAX9568
General Description
MAX9568
Component Analog TV Sync Separator
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (VCC to GND) .................................-0.3V to +6V
All Other Pins to GND ................................-0.3V to (VCC + 0.3V)
Continuous Power Dissipation (TA = +70°C)
16-Pin QSOP (derate 8.3mW/°C above +70°C) ...........667mW
Operating Temperature Range ..........................-40°C to +85°C
Junction Temperature .....................................................+150°C
Storage Temperature Range ............................-65°C to +150°C
Lead Temperature (soldering, 10s) ................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +5V, VGND = 0V, TA = TMIN to TMAX. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
5.5
V
13.5
mA
DC ELECTRICAL CHARACTERISTICS
Supply Voltage Range
VCC
Inferred from horizontal pulse delay
Supply Current
ICC
With 720p video standard input
Input-Voltage Range (Note 2)
Slice Level
Input Resistance
VIN
2.7
8.5
Peak-to-peak video amplitude
0.5
2.0
Absolute range
0.2
VCC
- 0.2
VSLICE_BI
Bilevel syncs
60
95
130
VSLICE_TRI
Trilevel syncs
110
145
180
RIN
Input DC Bias Voltage
300
0.31 x
VCC
VB
V
mV
kΩ
0.39 x
VCC
V
DIGITAL LOGIC OUTPUTS
Output-Voltage High
VOH
IOUT = 1.6mA
Output-Voltage Low
VOL
IOUT = 1.6mA
VCC = 5V
4.6
VCC = 2.7V
2.1
V
VCC = 5V
0.4
VCC = 2.7V
0.5
V
AC ELECTRICAL CHARACTERISTICS
Input Capacitance
Jitter
Output Logic Rise and Fall Times
2
CIP
tJITTER
tR, tF
HSYNCOUT output jitter with respect to
sync input for 720p video signal
CL = 15pF
8
pF
500
ps
5
ns
_______________________________________________________________________________________
Component Analog TV Sync Separator
(VCC = +5V, VGND = 0V, TA = TMIN to TMAX. Typical values are at TA = +25°C) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
525i (Figures 1a and 2a)
Horizontal Pulse Delay
tHP
20
ns
Horizontal Pulse Width
tHPW
4.8
µs
Clamp Pulse Delay
tCP
570
ns
Clamp Pulse Width
tCPW
3.7
µs
Composite Sync Output Leading
Edge Delay
tLE
15
ns
Composite Sync Output Trailing
Edge Delay
tTE
15
ns
Vertical Pulse Delay
tVP
20
ns
Vertical Pulse Width
tVPW
190/122
ns
20
ns
µs
Odd/even field
625i (Figures 1b and 2a)
Horizontal Pulse Delay
tHP
Horizontal Pulse Width
tHPW
4.8
Clamp Pulse Delay
tCP
570
ns
Clamp Pulse Width
tCPW
3.7
µs
Composite Sync Output Leading
Edge Delay
tLE
15
ns
Composite Sync Output Trailing
Edge Delay
tTE
15
ns
Vertical Pulse Delay
tVP
20
ns
Vertical Pulse Width
tVPW
160/192
ns
Horizontal Pulse Delay
tHP
20
ns
Horizontal Pulse Width
µs
525p/480p (Figures 1c and 2a)
tHPW
2.4
Clamp Pulse Delay
tCP
290
ns
Clamp Pulse Width
tCPW
1.6
µs
Composite Sync Output Leading
Edge Delay
tLE
15
ns
Composite Sync Output Trailing
Edge Delay
tTE
15
ns
Vertical Pulse Delay
tVP
20
ns
Vertical Pulse Width
tVPW
190
ns
625p/576p (Figures 1d and 2a)
Horizontal Pulse Delay
tHP
20
ns
Horizontal Pulse Width
tHPW
2.4
µs
tCP
290
ns
Clamp Pulse Delay
_______________________________________________________________________________________
3
MAX9568
TIMING CHARACTERISTICS
MAX9568
Component Analog TV Sync Separator
TIMING CHARACTERISTICS (continued)
(VCC = +5V, VGND = 0V, TA = TMIN to TMAX. Typical values are at TA = +25°C) (Note 1)
PARAMETER
Clamp Pulse Width
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
tCPW
1.6
µs
Composite Sync Output Leading
Edge Delay
tLE
15
ns
Composite Sync Output Trailing
Edge Delay
tTE
15
ns
Vertical Pulse Delay
tVP
20
ns
Vertical Pulse Width
tVPW
192
ns
720p (Figures 1e and 2b)
Horizontal Pulse Delay
tHP
20
ns
Horizontal Pulse Width
tHPW
540
µs
Clamp Pulse Delay
tCP
1.0
ns
Clamp Pulse Width
tCPW
1.25
µs
Composite Sync Output Leading
Edge Delay
tLE
15
ns
Composite Sync Output Trailing
Edge Delay
tTE
15
ns
Vertical Pulse Delay
tVP
25
ns
Vertical Pulse Width
tVPW
110
ns
1080i (Figures 1f and 2b)
Horizontal Pulse Delay
tHP
20
ns
Horizontal Pulse Width
tHPW
585
µs
Clamp Pulse Delay
tCP
1.1
ns
Clamp Pulse Width
tCPW
1.2
µs
Composite Sync Output Leading
Edge Delay
tLE
15
ns
Composite Sync Output Trailing
Edge Delay
tTE
15
ns
Vertical Pulse Delay
tVP
25
ns
Vertical Pulse Width
tVPW
160/192
ns
Note 1: All devices are production tested at TA = +25°C. Specifications over temperature are guaranteed by design.
Note 2: Input voltage range is guaranteed by the horizontal pulse delay.
4
_______________________________________________________________________________________
COAST
ODD/EVEN
VERTICAL PULSE
CLAMP PULSE
HORIZONTAL PULSE
COMPOSITE
SYNC OUTPUT
VIDEO/COMPOSITE
SYNC INPUT
COAST
ODD/EVEN
VERTICAL PULSE
CLAMP PULSE
HORIZONTAL PULSE
COMPOSITE
SYNC OUTPUT
VIDEO/COMPOSITE
SYNC INPUT
256
EVEN FIELD
519
257
520
258
521
259
522
260
523
261
524
262
525
263
1
264
2
265
3
266
4
267
5
525i
268
6
269
7
270
8
271
9
272
10
273
11
274...
12...
282
19
283
20
284
21...
285...
22...
Timing Diagrams
Figure1a. Standard Interlaced 525i (NTSC) Component Video
_______________________________________________________________________________________
5
MAX9568
ODD FIELD
Component Analog TV Sync Separator
6
COAST
ODD/EVEN
VERTICAL PULSE
CLAMP PULSE
HORIZONTAL PULSE
COMPOSITE
SYNC OUTPUT
VIDEO/COMPOSITE
SYNC INPUT
COAST
ODD/EVEN
VERTICAL PULSE
CLAMP PULSE
HORIZONTAL PULSE
COMPOSITE
SYNC OUTPUT
VIDEO/COMPOSITE
SYNC INPUT
303
FIELD 1
616
FIELD 2
304
617
305
618
306
619
307
620
308
261
309
622
310
623
311
624
312
625
313
1
314
2
625i
315
3
316
4
317
5
318
6
319
7
320...
8
330
18
331
19
332...
20...
336
23
337...
24...
MAX9568
Component Analog TV Sync Separator
Timing Diagrams (continued)
Figure1b. Standard Interlaced 625i (PAL) Component Video
_______________________________________________________________________________________
Component Analog TV Sync Separator
VIDEO/COMPOSITE
SYNC INPUT
522
523
524
525
1
2...
5
6
7
8
9
10
11
12
13
14
15...
6
7
8
9...
20
21
22...
42
43
44...
522
COMPOSITE
SYNC OUTPUT
HORIZONTAL PULSE
CLAMP PULSE
VERTICAL PULSE
COAST
525p (480p)
Figure1c. Extended Standard Progressive 525p (480p) Component Video
VIDEO/COMPOSITE
SYNC INPUT
616
617
618...
619
620...
623
624
625
1
2
3
4
5
18
19
20...
44
45
46...
616
COMPOSITE
SYNC OUTPUT
HORIZONTAL PULSE
CLAMP PULSE
VERTICAL PULSE
COAST
625p (576p)
Figure1d. Extended Standard Progressive 625p (576p) Component Video
VIDEO/COMPOSITE
SYNC INPUT
742
743
744
745
746
747
748
749
750
1
2
3
4
5
6
7
8...
20
21
22...
25
26
27...
742
COMPOSITE
SYNC OUTPUT
HORIZONTAL PULSE
CLAMP PULSE
VERTICAL PULSE
COAST
720p
Figure1e. High-Definition Progressive 720p Composite Video
_______________________________________________________________________________________
7
MAX9568
Timing Diagrams (continued)
8
COAST
ODD/EVEN
VERTICAL PULSE
CLAMP PULSE
HORIZONTAL PULSE
COMPOSITE
SYNC OUTPUT
VIDEO/COMPOSITE
SYNC INPUT
COAST
ODD/EVEN
VERTICAL PULSE
CLAMP PULSE
HORIZONTAL PULSE
COMPOSITE
SYNC OUTPUT
VIDEO/COMPOSITE
SYNC INPUT
554
EVEN FIELD
1117
ODD FIELD
555
1118
556
1119
557
1120
558
1121
559
1122
560
1123
561
1124
562
1125
563
1
264
2
566
4
1080i 60Hz
565
3
567
5
568
6
569
7
570
8
571...
9...
581
18
582
19
583
20
584
21
585...
22...
1117
554
MAX9568
Component Analog TV Sync Separator
Timing Diagrams (continued)
Figure1f. High-Definition Progressive 1080i Composite Video
_______________________________________________________________________________________
Component Analog TV Sync Separator
VIDEO/COMPOSITE
SYNC INPUT
VSLICE_BI
VIDEO/COMPOSITE
SYNC INPUT
VSLICE_TRI
tLE
COMPOSITE
SYNC OUTPUT
tTE
tLE
COMPOSITE
SYNC OUTPUT
tTE
tHP
HORIZONTAL
PULSE
tHPW
tHP
HORIZONTAL
PULSE
tCP
CLAMP PULSE
tHPW
tCPW
tCP
CLAMP PULSE
Figure2a. 525/625i 525/625p (480p/576p) Horizontal Timing
tCPW
Figure2b. 720p/1080i Horizontal Timing
Typical Operating Characteristics
(VCC = +5V, VGND = 0V, TA = +25°C, unless otherwise noted.)
8
7
NO INPUT
6
VCC = +5.0V
8
7
6
5
5
4
4
VCC = +2.7V
MAX9568 toc03
9
50
45
HORIZONTAL PULSE DELAY (ns)
VIDEO INPUT: 720p
VIDEO INPUT: 720p
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
10
MAX9568 toc01
10
9
HORIZONTAL PULSE DELAY
vs. TEMPERATURE
SUPPLY CURRENT
vs. TEMPERATURE
MAX9568 toc02
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
40
525i
35
30
720p
25
20
15
10
5
2.5
3.0
3.5
4.0
SUPPLY VOLTAGE (V)
4.5
5.0
0
-40
-15
10
35
TEMPERATURE (°C)
60
85
-40
-15
10
35
60
85
TEMPERATURE (°C)
_______________________________________________________________________________________
9
MAX9568
Timing Diagrams (continued)
Typical Operating Characteristics (continued)
(VCC = +5V, VGND = 0V, TA = +25°C, unless otherwise noted.)
4
3
2
720p
1.2
0.8
0.6
720p
0.2
0
10
35
60
85
1.5
720p
1.0
-15
10
35
60
85
-40
-15
10
HORIZONTAL PULSE JITTER
(720p)
20ns/div
20ns/div
MAX9568 toc07
35
TEMPERATURE (°C)
TEMPERATURE (°C)
HORIZONTAL PULSE JITTER
(576p)
1ns/div
MAX9568 toc06
2.0
0
-40
TEMPERATURE (°C)
2.5
MAX9568 toc08
-15
525i
3.0
0.5
0
-40
10
525i
1.0
0.4
3.5
CLAMP PULSE WIDTH (μs)
525i
1
1.4
CLAMP PULSE DELAY (ns)
5
4.0
MAX9568 toc05
1.6
MAX9568 toc04
6
CLAMP PULSE WIDTH
vs. TEMPERATURE
CLAMP PULSE DELAY
vs. TEMPERATURE
HORIZONTAL PULSE WIDTH
vs. TEMPERATURE
HORIZONTAL PULSE WIDTH (μs)
MAX9568
Component Analog TV Sync Separator
1ns/div
______________________________________________________________________________________
60
85
Component Analog TV Sync Separator
PIN
NAME
1
CSYNCOUT
FUNCTION
2
CVIDIN
3
VSYNCOUT
4
COAST
5, 8
GND
6
FR
Frame Rate Output. FRAME high indicates 60Hz and low indicates 50Hz. See Table 1.
7
HL
Standard Output 3. HL high indicates 625i, 625p (576p), and 1080i standards. HL low indicates
525i, 525p (480p), and 720p standards. See Table 1.
9
N.C.
No Connection. Not internally connected.
10
SDTV
Standard Output 1. SDTV high indicates standard-definition television. SDTV low indicates
extended definition or high-definition television. See Table 1.
11
HDTV
Standard Output 2. HDTV high indicates high-definition television. HDTV low indicates standarddefinition or extended definition television. See Table 1.
12
CLAMP
13
LOS
Composite Sync Output. Active low.
Component Video Input
Vertical Timing Pulse Output. Active low.
Coast Output. Active low.
Ground
Clamp Pulse Output. Active low during the back porch portion of component video.
Loss-of-Sync Output. Indicates the presence of a video input signal. Active low.
14
ODD/EVEN
Odd and Even Line Field Output. Indicates odd or even field for interlaced video standards.
ODD/EVEN is logic-high for even fields and logic-low for odd fields.
15
HSYNCOUT
Horizontal Timing Pulse Output. Active low.
16
VCC
Positive Supply. Bypass VCC to GND with a 0.1µF capacitor.
Table 1. Video Standard Output Decoding
TV STANDARD
CLASSIFICATION
525i
SDTV
OUTPUT PINS
FR
SDTV*
HDTV*
HL
High
High
Low
Low
High
625i
SDTV
Low
High
Low
525p/480p
EDTV
High
Low
Low
Low
625p/576p
EDTV
Low
Low
Low
High
720p
HDTV
High
Low
High
Low
1080i/60
HDTV
High
Low
High
High
1080i/50
HDTV
Low
Low
High
High
______________________________________________________________________________________
11
MAX9568
Pin Description
MAX9568
Component Analog TV Sync Separator
Detailed Description
The MAX9568 sync separator extracts sync timing
information from SDTV, EDTV, and HDTV component
video signals. The MAX9568 is a stand-alone device,
and requires no external components to set timing or
bias voltage. The MAX9568 has high input impedance,
eliminating the need for a low-impedance video source
at the input.
The MAX9568 provides composite sync, vertical sync,
and horizontal sync outputs. The MAX9568 provides
automatic SDTV, EDTV, and HDTV detection logic outputs to indicate the type of TV standard being
processed. The MAX9568 provides a back-porch clamp
output signal.
The MAX9568 provides a loss-of-sync output to indicate a loss-of-video input signal. The MAX9568 provides an output to indicate odd and even fields. The
MAX9568 provides a vertical interval coast output
which allows control of a PLL oscillator when coasting
through the vertical interval.
Component Video Input (CVIDIN)
CVIDIN provides a high input impedance to the analog
video source. This eliminates the requirement for a lowimpedance video source. Following the input buffer is
the sync slicer block. This block establishes a DC level
for the incoming video signal. The sync information is
stripped by using a comparator with threshold or slice
level that automatically adjusts to the incoming signal.
When the incoming signal has bilevel syncs, the slice is
made 95mV above the sync tip. When the incoming
signal has trilevel syncs, the slice is made 145mV
above the sync tip. The device’s wide dynamic range,
0.2V to VCC - 0.2V, allows the video signal from 0.5VP-P
to 2VP-P to be processed and operate in the linear
range. The mentioned threshold levels are independent
of the signal amplitude.
CVIDIN is biased to 0.35 x VCC through a 300kΩ resistor. Use a 0.1µF capacitor to AC-couple at the input if
the input signal is not within the input-voltage range, as
shown Figure 3.
INPUT-VOLTAGE RANGE MATRIX
VCC - 0.2V
2.7V < VCC < 5.5V
0.5V (-6dB)
2V (+6dB)
1V (0dB)
2V (+6dB)
0.2V
0.5V (-6dB)
Figure 3. Input-Voltage Range Matrix
12
______________________________________________________________________________________
Component Analog TV Sync Separator
Coast
The MAX9568 provides a vertical interval coast output
which allows the PLL oscillator to coast through the vertical interval. This output pulses low during vertical
blanking interval.
Vertical Sync Output (VSYNCOUT)
VSYNCOUT produces a pulse signal that defines the
beginning of a new field in interlaced systems or frame
in progressive systems. This output pulses low whenever the vertical sync pulse interval is detected. See
Figure 4 for vertical sync output timing diagrams.
Horizontal Sync Output (HSYNCOUT)
HSYNCOUT produces a pulse signal that defines the
beginning of the horizontal line. This output pulses low
whenever a horizontal sync pulse is detected. For interlace standards, the horizontal pulse output rate remains
constant. See Figures 2a and 2b for horizontal sync
output timing diagrams.
Standard- and High-Definition TV
Detection (SDTV, HDTV, HL)
SDTV, HDTV, and HL produce logic outputs that indicate the standard of the component video signal at the
input. SDTV output high indicates standard-definition
television while SDTV output low indicates extended
definition or high-definition television.
HDTV output high indicates high-definition television
while HDTV output low indicates standard-definition or
extended definition television.
HL output high indicates 625i, 625p (576p), and 1080i
standards while HL output low indicates 525i, 525p
(480p), and 720p standards. See Table 1.
Odd and Even Field Detection (ODD/EVEN)
ODD/EVEN produces a square wave that identifies the
present field of an interlaced video source. ODD/EVEN
output low indicates odd field while ODD/EVEN output
high indicates even field. This square wave changes
coincidentally with the beginning of the vertical pulse.
Applications Information
Chroma Filter
If the input signal is standard-definition composite
video, a simple lowpass filter is recommended in front
of the input to attenuate the chroma signal, or any highfrequency noise below the black level. As shown in
Figure 5, when the input is standard-definition video,
SDTV is logic-high and Q1 is turned on. When Q1 is on,
R1 and C2 form a 600kHz lowpass filter to attenuate
high-frequency noise and improve the performance of
the MAX9568. When the input is high-definition video or
extended definition video, SDTV is logic-low and Q1 is
turned off, disabling the RC input filter.
BILEVEL SYNC PULSES
CVIDIN
VSYNCOUT
tVP
TRILEVEL SYNC PULSES
CVIDIN
VSYNCOUT
Loss-of-Sync Output (LOS)
LOS produces logic output that indicates the presence
of a video input signal. LOS output high indicates that
there is a sync or video signal at the input while LOS
low indicates the presence of a component video signal at CVIDIN.
tVP
Figure 4. Vertical Sync Output Timing Diagrams
R1
1kΩ
Clamp Pulse Output (CLAMP)
CLAMP produces a pulse signal that is generally used
to drive a black-level clamp circuit which restores the
DC component to a video signal. This output pulses low
during black-level (back porch) of each video line. See
Figures 2a and 2b for clamp pulse output timing diagrams.
VIN
C1
0.1μF
MAX9568
CVDIN
SDTV
C2
270pF
Q1
MMBT3904
R2
10kΩ
Figure 5. Chroma Filter
______________________________________________________________________________________
13
MAX9568
Composite Sync Output (CSYNCOUT)
CSYNCOUT reproduces the component video input
waveform with the active video removed. This output
contains all the information below the component video
black level. CSYNCOUT is pulled high whenever sync
is not detected at the component video input. See
Figures 2a and 2b for composite sync output timing
diagrams.
MAX9568
Component Analog TV Sync Separator
Chip Information
Pin Configuration
PROCESS: BiCMOS
TOP VIEW
CSYNCOUT
1
16
VCC
CVIDIN
2
15
HSYNCOUT
VSYNCOUT
3
14
ODD/EVEN
13
LOS
MAX9568
COAST
4
GND
5
12
CLAMP
FR
6
11
HDTV
HL
7
10
SDTV
GND
8
9
N.C.
QSOP
14
______________________________________________________________________________________
Component Analog TV Sync Separator
PACKAGE CODE
DOCUMENT NO.
16 QSOP
E16-1
21-0055
QSOP.EPS
PACKAGE TYPE
______________________________________________________________________________________
15
MAX9568
Package Information
For the latest package outline information, go to www.maxim-ic.com/packages.
MAX9568
Component Analog TV Sync Separator
Revision History
REVISION
NUMBER
REVISION
DATE
DESCRIPTION
0
5/08
Initial release
1
12/08
Removed MAX9566, MAX9567, and MAX9569 parts
PAGES
CHANGED
—
1–15
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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is a registered trademark of Maxim Integrated Products, Inc.