19-3053; Rev 0; 10/03 KIT ATION EVALU LE B A IL A AV 3.5- and 4.5-Digit, Single-Chip ADCs with LCD Drivers Features ♦ High Resolution MAX1495: 4.5 Digits (±19,999 Count) MAX1493: 4.5 Digits (±19,999 Count) MAX1491: 3.5 Digits (±1999 Count) The MAX1491/MAX1493/MAX1495 do not require external-precision integrating or auto-zero capacitors, crystal oscillators, charge pumps or other circuitry required with dual slope ADCs (commonly used in panel meter circuits). These devices also feature on-chip buffers for the differential signal and reference inputs, allowing direct interface with high-impedance signal sources. In addition, the MAX1491/MAX1493/MAX1495 use continuous internal offset calibration, and offer >100dB rejection of 50Hz and 60Hz line noise. The MAX1493/ MAX1495 perform enhanced offset calibration at power-up. The MAX1495 also performs enhanced calibration on demand. Other features include data hold and peak hold, and a user programmable low-battery monitor. ♦ Selectable Voltage Reference: Internal 2.048V or External ♦ Operate from a Single 2.7V or 5.25V Supply ♦ Selectable Input Range of ±200mV or ±2V ♦ Internal High-Accuracy Oscillator Needs No External Components ♦ Automatic Offset Calibration ♦ Low Power: Maximum 980µA Operating Current ♦ Small 32-Pin 7mm ✕ 7mm TQFP Package (4.5 Digits), 28-Pin SSOP Package (3.5 Digits), and 28Pin DIP Package (3.5 Digits) ♦ Triplexed LCD Driver ♦ Evaluation Kit Available (Order MAX1494EVKIT) RESOLUTION (DIGITS) MAX1491CAI* 0°C to +70°C 28 SSOP MAX1491CNI 0°C to +70°C 28 DIP 3.5 MAX1493CCJ 0°C to +70°C 32 TQFP 4.5 MAX1495CCJ* 0°C to +70°C 32 TQFP 4.5 *Future product—contact factory for availability. 3.5 VNEG DPON BP1 BP2 BP3 26 25 AVDD 1 24 SEG13 AIN+ 2 23 SEG12 AIN- 3 22 SEG11 21 SEG10 REF- 4 REF+ 5 LOWBATT 6 19 SEG8 RANGE 7 18 SEG7 DPSET1 8 17 SEG6 MAX1493 MAX1495 20 SEG9 9 10 11 12 13 14 15 16 SEG5 PINPACKAGE 27 SEG4 PART TEMP RANGE 28 SEG3 Ordering Information 29 SEG2 Digital Multimeters 30 SEG1 Digital Voltmeters 31 HOLD Hand-Held Meters 32 PEAK Digital Panel Meters INTREF Applications DVDD TOP VIEW GND Pin Configurations DPSET2 The MAX1493/MAX1495 come in a 32-pin 7mm ✕ 7mm TQFP package, and the MAX1491 comes in 28-pin SSOP and 28-pin DIP packages. All devices in this family operate over the 0°C to +70°C commercial temperature range. ♦ Sigma-Delta ADC Architecture No Integrating Capacitors Required No Autozeroing Capacitors Required >100dB of Simultaneous 50Hz and 60Hz Rejection TQFP Pin Configurations continued at end of data sheet. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX1491/MAX1493/MAX1495 General Description The MAX1491/MAX1493/MAX1495 low-power, 3.5- and 4.5-digit, analog-to-digital converters (ADCs) with integrated liquid crystal display (LCD) drivers operate from a single 2.7V to 5.25V power supply. They include an internal reference, a high-accuracy on-chip oscillator, and a triplexed LCD driver. An internal charge pump generates the negative supply needed to power the integrated input buffer for single supply operation. The ADC is configurable for either a ±2V or ±200mV input range and it outputs its conversion results to an LCD. The MAX1491 is a 3.5-digit (±1,999 count) device, and the MAX1493/ MAX1495 are 4.5-digit (±19,999 count) devices. MAX1491/MAX1493/MAX1495 3.5- and 4.5-Digit, Single-Chip ADCs with LCD Drivers ABSOLUTE MAXIMUM RATINGS AVDD to GND............................................................-0.3V to +6V DVDD to GND ...........................................................-0.3V to +6V AIN+, AIN- to GND...............................VNEG to + (AVDD + 0.3V) REF+, REF- to GND..............................VNEG to + (AVDD + 0.3V) LOWBATT to GND ...................................-0.3V to (AVDD + 0.3V) INTREF, RANGE, DPSET1, DPSET2, PEAK, HOLD to GND ......................................-0.3V to (DVDD + 0.3V) DPON to GND..........................................-0.3V to (DVDD + 0.3V) VNEG to GND ...........................................-2.6V to (AVDD + 0.3V) Maximum Current into Any Pin ...........................................50mA Continuous Power Dissipation (TA = +70°C) 32-Pin TQFP (derate 20.7mW/°C above +70°C).....1652.9mW 28-Pin SSOP (derate 9.5mW/°C above +70°C) ...........762mW 28-Pin DIP (derate 14.3mW/°C above +70°C) ........1142.9mW Operating Temperature Range...............................0°C to +70°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-60°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (AVDD = DVDD = +2.7V to +5.25V, GND = 0, VREF+ - VREF- = 2.048V (external reference), CNEG= 0.1µF. All specifications are TMIN to TMAX, unless otherwise noted. Typical values are at +25°C, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DC ACCURACY MAX1493/MAX1495 Noise-Free Resolution Integral Nonlinearity (Note 1) MAX1491 INL -19,999 +19,999 -1999 +1999 2.000V range ±1 200mV range ±1 Count Count Range Change Accuracy (VAIN+ - VAIN- = 0.100V) on 200mV range / (VAIN+ - VAIN- = 0.100V) on 2.0V range 10:1 Ratio Rollover Error VAIN+ - VAIN- = full scale, VAIN- - VAIN+ = full scale ±1.0 Count Output Noise Offset Error (Zero Input Reading) 10 Offset VIN = 0 (Note 2) Gain Error (Note 3) Offset Drift (Zero Reading Drift) VIN = 0 µVP-P -0 +0 Reading -0.5 +0.5 %FSR Gain Drift 0.1 µV/°C ±1 ppm/°C 5 Hz INPUT CONVERSION RATE Conversion Rate ANALOG INPUTS (AIN+, AIN-) (bypass to GND with 0.1µF or greater capacitors) Differential (Note 4) AIN Input Voltage Range RANGE = GND RANGE = DVDD Absolute GND referenced Normal Mode 50Hz and 60Hz Rejection (Simultaneously) -2.0 +2.0 -0.2 +0.2 -2.2V +2.2V V 50Hz and 60Hz ±2% 100 dB Common-Mode 50Hz and 60Hz Rejection (Simultaneously) CMR For 50Hz ±2% and 60Hz ±2%, RSOURCE < 10kΩ 150 dB Common-Mode Rejection CMR At DC 100 dB TA = +25°C 10 nA 10 pF Input Leakage Current Input Capacitance Dynamic Input Current 2 (Note 5) -20 _______________________________________________________________________________________ +20 nA 3.5- and 4.5-Digit, Single-Chip ADCs with LCD Drivers (AVDD = DVDD = +2.7V to +5.25V, GND = 0, VREF+ - VREF- = 2.048V (external reference), CNEG= 0.1µF. All specifications are TMIN to TMAX, unless otherwise noted. Typical values are at +25°C, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS LOW-BATTERY VOLTAGE MONITOR (LOWBATT) LOWBATT Trip Threshold 2.048 V LOWBATT Leakage Current 10 pA Hysteresis 20 mV INTERNAL REFERENCE (REF- = GND, INTREF = DVDD, bypass REF+ to GND with 4.7µF capacitors) REF Output Voltage VREF REF Output Short-Circuit Current REF Output Temperature Coefficient TCVREF Load Regulation AVDD = 5V, TA = +25°C 2.007 2.089 V TA = +25°C 1 mA AVDD = 5V 40 ppm/°C ISOURCE = 0µA to 300µA, ISINK = 0µA to 30µA, TA = +25°C (Note 6) 6 mV/µA 50 µV/V Line Regulation Noise Voltage 2.048 0.1Hz to 10Hz 25 10Hz to 10kHz 400 µVp-p EXTERNAL REFERENCE (INTREF = GND, bypass REF+ and REF- to GND with 0.1µF or greater capacitors) Differential (VREF+ - VREF-) REF Input Voltage Absolute GND referenced Normal-Mode 50Hz and 60Hz Rejection (Simultaneously) 2.048 -2.2 +2.2 V 50Hz and 60Hz ±2% 100 dB Common-Mode 50Hz and 60Hz Rejection (Simultaneously) CMR For 50Hz ±2% and 60Hz ±2%, RSOURCE < 10kΩ 150 dB Common-Mode Rejection CMR At DC 100 dB TA = +25°C 10 nA Input Leakage Current Input Capacitance 10 Dynamic Input Current (Note 5) -20 pF +20 nA -2.3 V +10 µA 0.3 x DVDD V CHARGE PUMP Output Voltage VNEG -2.6 -2.42 DIGITAL INPUTS (INTREF, RANGE, PEAK, HOLD, DPSET1, DPSET2, DPON) Input Current IIN Input Low Voltage VINL Input High Voltage VINH Input Hysteresis VHYS VIN = 0 or DVDD -10 0.7 x DVDD DVDD = 3.0V V 200 mV _______________________________________________________________________________________ 3 MAX1491/MAX1493/MAX1495 ELECTRICAL CHARACTERISTICS (continued) MAX1491/MAX1493/MAX1495 3.5- and 4.5-Digit, Single-Chip ADCs with LCD Drivers ELECTRICAL CHARACTERISTICS (continued) (AVDD = DVDD = +2.7V to +5.25V, GND = 0, VREF+ - VREF- = 2.048V (external reference), CNEG= 0.1µF. All specifications are TMIN to TMAX, unless otherwise noted. Typical values are at +25°C, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS V POWER SUPPLY AVDD Voltage AVDD 2.70 5.25 DVDD Voltage DVDD 2.70 5.25 Power-Supply Rejection AVDD PSRRA (Note 7) 80 Power-Supply Rejection DVDD PSRRD (Note 7) 100 AVDD Current IAVDD (Note 8) 660 DVDD = 5V 320 DVDD = 3.3V 180 DVDD Current IDVDD V dB dB µA µA LCD DRIVER RMS Segment-On Voltage 1.92 x DVDD V RMS Segment-Off Voltage 1/3x DVDD V Display Multiplex Rate 107 Hz LCD Data-Update Rate 2.5 Hz Note 1: Integral nonlinearity is the derivation of the analog values at any code from its theoretical value after nulling the gain error and offset error. Note 2: Offset calibrated. Note 3: Offset nulled. Note 4: The input voltage range for the analog inputs is given with respect to the voltage on the negative input of the differential pair. Note 5: For the range of VAIN+ or VAIN- = -2.2V to +2.2V and VREF+ or VREF- = -2.2V to +2.2V. Note 6: External load must be constant during conversion for specified accuracy. Guaranteed specification of 2mV/mA is a result of production test limitations. Note 7: Measured at DC by changing the power-supply voltage from 2.7V to 5.25V and measuring its effect on the conversion error. PSRR at 50Hz and 60Hz exceeds 120dB with filter notches of 10, 20, 30, 40, 50, or 60 Hz. Note 8: Analog power-supply currents are measured with all digital inputs at either GND or DVDD. Digital power-supply currents measured with all digital inputs at either GND or DVDD. 4 _______________________________________________________________________________________ 3.5- and 4.5-Digit, Single-Chip ADCs with LCD Drivers 0 -0.5 0 -0.5 -10,000 0 10,000 MAX1491/3/5 toc03 10 0 -10,000 0 10,000 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 20,000 NOISE (COUNTS) SUPPLY CURRENT vs. SUPPLY VOLTAGE MAX1493/MAX1495 GAIN ERROR vs. SUPPLY VOLTAGE MAX1493/MAX1495 GAIN ERROR vs. TEMPERATURE 300 DIGITAL SUPPLY 0.04 0.02 0 -0.02 -0.04 -0.06 100 -0.08 0 -0.10 3.25 3.75 4.25 SUPPLY VOLTAGE (V) 4.75 5.25 0 MAX1491/3/5 toc06 0.06 -0.01 GAIN ERROR (% FULL SCALE) 400 0.08 MAX1491/3/5 toc05 MAX1491/3/5 toc04 ANALOG SUPPLY 2.75 15 DISPLAY COUNT 600 200 20 DISPLAY COUNT 700 500 NOISE DISTRIBUTION 25 5 -1.0 -20,000 20,000 GAIN ERROR (% FULL SCALE) -1.0 -20,000 SUPPLY CURRENT (µA) MAX1491/3/5 toc02 0.5 INL (COUNTS) 0.5 INL (COUNTS) 1.0 MAX1491/3/5 toc01 1.0 MAX1493/MAX1495 (±2V INPUT RANGE) INL vs. DISPLAY COUNT PERCENTAGE OF UNITS (%) MAX1493/MAX1495 (±200mV INPUT RANGE) INL vs. DISPLAY COUNT -0.02 -0.03 -0.04 -0.05 -0.06 -0.07 -0.08 -0.09 -0.10 2.75 3.25 3.75 4.25 SUPPLY VOLTAGE (V) 4.75 5.25 0 10 20 30 40 50 60 70 TEMPERATURE (°C) _______________________________________________________________________________________ 5 MAX1491/MAX1493/MAX1495 Typical Operating Characteristics (AVDD = DVDD = 5V, GND = 0, REF+ = 2.048V, REF- = GND, RANGE = DVDD, TA = +25°C.) Typical Operating Characteristics (continued) (AVDD = DVDD = 5V, GND = 0, REF+ = 2.048V, REF- = GND, RANGE = DVDD, TA = +25°C.) 2.050 2.049 2.048 2.047 2.046 2.048 2.047 2.046 MAX1491/3/5 toc09 2.049 700 600 SUPPLY CURRENT (µA) REFERENCE VOLTAGE (V) 2.051 MAX1491/3/5 toc08 2.053 2.052 2.050 REFERENCE VOLTAGE (V) MAX1491/3/5 toc07 2.054 SUPPLY CURRENT vs. TEMPERATURE INTERNAL REFERENCE VOLTAGE vs. ANALOG SUPPLY VOLTAGE INTERNAL REFERENCE VOLTAGE vs. TEMPERATURE 2.045 ANALOG SUPPLY 500 400 300 DIGITAL SUPPLY 200 100 2.045 0 2.044 2.044 10 20 30 40 50 60 2.75 70 3.25 3.75 4.25 4.75 0 5.25 10 20 30 40 50 60 TEMPERATURE (°C) SUPPLY VOLTAGE (V) TEMPERATURE (°C) CHARGE-PUMP OUTPUT VOLTAGE vs. ANALOG SUPPLY VOLTAGE VNEG STARTUP SCOPE SHOT OFFSET ERROR vs. COMMON-MODE VOLTAGE VDD 2V/div -2.44 1V/div VNEG -2.46 70 MAX1491/3/5 toc12 -2.42 0.20 0.15 OFFSET ERROR (COUNTS) MAX1491/3/5 toc10 -2.40 MAX1491/3/5 toc11 0 VNEG VOLTAGE (V) MAX1491/MAX1493/MAX1495 3.5- and 4.5-Digit, Single-Chip ADCs with LCD Drivers 0.10 0.05 0 -0.05 -0.10 -2.48 -0.15 CNEG = 0.1µF -0.20 -2.50 2.75 3.25 3.75 4.25 SUPPLY VOLTAGE (V) 6 4.75 5.25 20ms/div -2.0 -1.5 -1.0 -0.5 0 0.5 1.0 COMMON-MODE VOLTAGE (V) _______________________________________________________________________________________ 1.5 2.0 3.5- and 4.5-Digit, Single-Chip ADCs with LCD Drivers PIN MAX1493 MAX1495 NAME MAX1491 FUNCTION 1 30 INTREF 2 31 DVDD 3 32 GND Ground Internal Reference Logic Input. Connect to GND to select external reference mode. Connect to DVDD to select the internal reference mode. Digital Power Input. Connect DVDD to a 2.7V to 5.25V power supply. Bypass DVDD to GND with a 0.1µF and a 4.7µF capacitor. 4 1 AVDD Analog Power Input. Connect AVDD to a 2.7V to 5.25V power supply. Bypass AVDD to GND with a 0.1µF and a 4.7µF capacitor. 5 2 AIN+ Positive Analog Input. Positive side of fully differential analog input. Bypass AIN+ to GND with a 0.1µF or greater capacitor. 6 3 AIN- Negative Analog Input. Negative side of fully differential analog input. Bypass AIN- to GND with a 0.1µF or greater capacitor. 7 4 REF- Negative Reference Input. For internal reference operation, connect REF- to GND. For external reference operation, bypass REF- to GND with a 0.1µF capacitor and set VREF- from -2.2V to +2.2V, provided VREF+ > VREF-. 8 5 REF+ Positive Reference Input. For internal reference operation, connect a 4.7µF capacitor from REF+ to GND. For external reference operation, bypass REF+ to GND with a 0.1µF capacitor and set VREF+ from -2.2V to +2.2V, provided VREF+ > VREF-. 9 6 10 7 RANGE Range Logic Input. RANGE controls the fully differential analog input range. Connect to GND for the ±2V input range. Connect to DVDD for the ±200mV input range. 11 8 DPSET1 Decimal Point Logic Input 1. Controls the decimal point of the LCD. See the Decimal Point Control section. 12 9 DPSET2 Decimal Point Logic Input 2. Controls the decimal point of the LCD. See the Decimal Point Control section. 13 10 PEAK Peak Logic Input. Connect to DVDD to display the highest ADC value on the LCD. Connect to GND to disable the peak function. LOWBATT Low Battery Input. When VLOWBATT < 2.048V (typ), the LOWBATT symbol on the LCD turns on. 14 11 HOLD Hold Logic Input. Connect to DVDD to hold the current ADC value on the LCD. Connect to GND to update the LCD at a rate of 2.5Hz and disable the hold function. For the MAX1495, placing the device into hold mode initiates an enhanced offset calibration. Assert HOLD high for a minimum of 2s to ensure the completion of enhanced offset calibration. 15 12 SEG1 LCD Segment 1 Driver 16 13 SEG2 LCD Segment 2 Driver 17 14 SEG3 LCD Segment 3 Driver 18 15 SEG4 LCD Segment 4 Driver 19 16 SEG5 LCD Segment 5 Driver 20 17 SEG6 LCD Segment 6 Driver _______________________________________________________________________________________ 7 MAX1491/MAX1493/MAX1495 Pin Description 3.5- and 4.5-Digit, Single-Chip ADCs with LCD Drivers MAX1491/MAX1493/MAX1495 Pin Description (continued) PIN MAX1493 MAX1495 NAME MAX1491 21 18 SEG7 LCD Segment 7 Driver 22 19 SEG8 LCD Segment 8 Driver 23 20 SEG9 LCD Segment 9 Driver 24 21 SEG10 LCD Segment 10 Driver 25 25 BP3 LCD Backplane 3 Driver 26 26 BP2 LCD Backplane 2 Driver 27 27 BP1 28 29 VNEG — 22 SEG11 LCD Segment 11 Driver — 23 SEG12 LCD Segment 12 Driver — 24 SEG13 LCD Segment 13 Driver — 28 DPON Decimal Point Enable Input. Controls the decimal point of the LCD. See the Decimal Point Control section. Connect to DVDD to enable the decimal point. DVDD AVDD FUNCTION LCD Backplane 1 Driver -2.5V Charge-Pump Voltage Output. Connect a 0.1µF capacitor from VNEG to GND. DPON HOLD MAX1493 MAX1495 DPSET1 DPSET2 RANGE PEAK INTREF CONTROL +2.5V SEG1 BINARY-TO-BCD CONVERTERS AND LCD DRIVERS AIN+ ADC AIN- SEG13 BP1 BP2 BP3 INPUT BUFFERS REF+ OSCILLATOR/ CLOCK REF- -2.5V +2.5V -2.5V 2.048V BANDGAP REFERENCE GND A = 1.22 TO CONTROL CHARGE PUMP VNEG LOWBATT Figure 1. MAX1493/MAX1495 Functional Diagram 8 _______________________________________________________________________________________ 3.5- and 4.5-Digit, Single-Chip ADCs with LCD Drivers The MAX1491/MAX1493/MAX1495 low-power, highly integrated ADCs with LCD drivers convert a ±2V differential input voltage (one count is equal to 100µV for the MAX1493/MAX1495 and 1mV for the MAX1491) with a sigma-delta ADC and output the result to an LCD. An additional ±200mV input range (one count is equal to 10µV for the MAX1493/MAX1495 and 100µV for the MAX1491) is available to measure small signals with increased resolution. Digital Filtering The MAX1491/MAX1493/MAX1495 contain an on-chip digital lowpass filter that processes the data stream from the modulator using a SINC4 (sinx/x)4 response. The SINC4 filter has a settling time of four output data periods (4 x 200ms). The MAX1491/MAX1493/MAX1495 have 25% overrange capability built into the modulator and digital filter: f sin Nπ fm 1 H(f) = N f sin π fm These devices operate from a single 2.7V to 5.25V power supply and offer 3.5-digit (MAX1491) or 4.5-digit (MAX1493/MAX1495) conversion results. An internal 2.048V reference, internal charge pump and a high-accuracy on-chip oscillator eliminate external components. These devices also feature on-chip buffers for the differential input signal and external reference inputs, allowing direct interface with high-impedance signal sources. In addition, they use continuous internal offset calibration, and offer >100dB of 50Hz and 60Hz line noise rejection. Other features include data hold and peak hold, and a low-battery monitor. The MAX1495 also performs enhanced offset calibration on demand. Analog Input Protection Internal protection diodes limit the analog input range from V NEG to (AV DD + 0.3V). If the analog input exceeds this range, limit the input current to 10mA. Internal Analog Input/ Reference Buffers The MAX1491/MAX1493/MAX1495 analog input/reference buffers allow the use of high-impedance signal sources. The input buffers’ common-mode input range allows the analog inputs and reference to range from -2.2V to +2.2V. ( ) ( ) 1- z -N 1 H(z) = -1 N 1- z 4 Filter Characteristics Figure 2 shows the filter frequency response. The SINC4 characteristic -3dB cutoff frequency is 0.228 times the first notch frequency (5Hz). The oversampling ratio (OSR) for the MAX1491 is 128 and the OSR for the MAX1493/MAX1495 is 1024. The output data rate for the digital filter corresponds with the positioning of the first notch of the filter’s frequency response. The notches of the SINC4 filter are repeated at multiples of the first notch frequency. The SINC 4 filter provides an attenuation of better than 100dB at these notches. For example, 50Hz is equal to 10 times the first notch frequency and 60Hz is equal to 12 times the first notch frequency. 0 Modulator -40 GAIN (dB) The MAX1491/MAX1493/MAX1495 perform analog-todigital conversions using a single-bit, 3rd-order, sigmadelta modulator. The sigma-delta modulation converts the input signal into a digital pulse train whose average duty cycle represents the digitized signal information. The modulator quantizes the input signal at a much higher sample rate than the bandwidth of the input. The MAX1491/MAX1493/MAX1495 modulator provides 3rd-order frequency shaping of the quantization noise resulting from the single-bit quantizer. The modulator is fully differential for maximum signal-to-noise ratio and minimum susceptibility to power-supply noise. A singlebit data stream is then presented to the digital filter for processing, to remove the frequency-shaped quantization noise. 4 -80 -120 -160 -200 0 10 20 30 40 50 60 FREQUENCY (Hz) Figure 2. Frequency Response of the SINC4 Filter (Notch at 60Hz) _______________________________________________________________________________________ 9 MAX1491/MAX1493/MAX1495 Detailed Description MAX1491/MAX1493/MAX1495 3.5- and 4.5-Digit, Single-Chip ADCs with LCD Drivers Internal Clock The MAX1491/MAX1493/MAX1495 contain an internal oscillator. Using the internal oscillator saves board space by removing the need for an external clock source. The oscillator is optimized to give 50Hz and 60Hz power supply and common-mode rejection. Y X The MAX1491/MAX1493/MAX1495 contain an internal charge pump to provide the negative supply voltage for the internal analog input/reference buffers. The bipolar input range of the analog input/reference buffers allows the devices to accept negative inputs with high source impedances. For the charge pump to operate correctly, connect a 0.1µF capacitor from VNEG to GND. LCD Driver Triplexing An internal resistor string of three equal-value resistors (52kΩ, 1% matching) is used to generate the display drive voltages. One end of the string is connected to DVDD and the other end is connected to GND. Note that VLCD (VLCD = DVDD - GND) should be three times the threshold voltage for the liquid-crystal material used. The connection diagram for a typical 7-segment display font with two annunciators is illustrated in Figure 3 and Figure 8. The MAX1491/MAX1493/MAX1495 numeric display drivers (4.5 digits, 3.5 digits) use this configuration to drive a triplexed LCD with three backplanes and 13 segment driver lines (10 for 3.5 digits). Figures 4 and 5 show the assignment of the 4.5-digit display segments and Figures 6 and 7 show the assignment of the 3.5digit display segments. Table 1. List of LCD Manufacturers MANUFACTURER DCI, Inc. WEBSITE www.dciincorporated.com LXD, Inc. www.lxdinc.com Varitronix International Limited www.varitronix.com The following site has more links to custom LCD manufacturers: www.earthlcd.com/mfr.htm 10 a a Charge Pump The MAX1491/MAX1493/MAX1495 contain the necessary backplane and segment driver outputs to drive 3.5-digit (MAX1491) and 4.5-digit (MAX1493/MAX1495) LCDs. The LCD update rate is 2.5Hz. Figures 4–7 show the connection schemes for a standard LCD. The MAX1491/MAX1493/MAX1495 automatically display the results of the ADC. Z f b f BP1 b g g e c e BP2 d d DP c ANNUNCIATOR BP3 DP ANNUNCIATOR Figure 3. Connection Diagrams for Typical Seven-Segment Displays The voltage waveforms of the backplane lines and y segment line (Figure 3) have been chosen as an example. This line intersects with BP1 to form the a segment, with BP2 to form the g segment, and with BP3 to form the d segment. Eight different ON/OFF combinations of the a, g, and d segments and their corresponding waveforms of the y segment line are illustrated in Figures 9 and 10. The schematic diagram in Figure 8 shows that each intersection acts as a capacitance from segment line to common line. Figure 11 illustrates the voltage across the g segment. The RMS voltage across the segment determines the degree of polarization for the liquid-crystal material and thus the contrast of the segment. The RMS OFF voltage is always VLCD / 3, whereas the RMS ON voltage is always 1.92VLCD / 3. This is illustrated in Figure 11. The ratio of RMS ON to OFF voltage is fixed at 1.92 for a triplexed LCD. Figure 12 illustrates contrast vs. applied RMS voltage with a VLCD of 3.1V. The RMS ON voltage is 2.1V and the RMS OFF voltage is 1.1V. The OFF segment has a contrast of less than 5%, while the ON segments have greater than 85% contrast. If ghosting is present on the LCD, the RMS OFF voltage is too high. Choose an LCD with a higher RMS OFF voltage or decrease DVDD. ______________________________________________________________________________________ 3.5- and 4.5-Digit, Single-Chip ADCs with LCD Drivers PEAK MAX1491/MAX1493/MAX1495 HOLD LOW BATT BP1 BP2 BP3 Figure 4. Backplane Connection for the MAX1493/MAX1495 (4.5 Digits) SEG13: PEAK, HOLD, N.C. HOLD LOW BATT PEAK SEG12: F4, E4, DP4 SEG11: A4, G4, D4 SEG2: A1, G1, D1 ANNUNCIATOR SEG1: B1, C1, ANNUNCIATOR SEG3: F1, E1, DP1 SEG10: B4, C4, BC5 SEG4: B2, C2, LOWBATT SEG9: F3, E3, DP3 SEG5: A2, G2, D2 SEG6: F2, E2, DP2 SEG8: A3, G3, D3 SEG7: B3, C3, MINUS Figure 5. Segment Connection for the MAX1493/MAX1495 (4.5 Digits) ______________________________________________________________________________________ 11 MAX1491/MAX1493/MAX1495 3.5- and 4.5-Digit, Single-Chip ADCs with LCD Drivers HOLD PEAK LOW BATT BP1 BP2 BP3 Figure 6. Backplane Connection for the MAX1491 (3.5 Digits) SEG10: PEAK, HOLD, BC4 HOLD PEAK LOW BATT SEG2: A1, G1, D1 ANNUNCIATOR SEG1: B1, C1, ANNUNCIATOR SEG3: F1, E1, DP1 SEG4: B2, C2, LOWBATT SEG9: F3, E3, DP3 SEG5: A2, G2, D2 SEG8: A3, G3, D3 SEG6: F2, E2, DP2 SEG7: B3, C3, MINUS Figure 7. Segment Connection for the MAX1491 (3.5 Digits) X BP1 BP2 BP3 Y Z f a b e g c DP d DP Figure 8. Schematic of Display Digit 12 ______________________________________________________________________________________ 3.5- and 4.5-Digit, Single-Chip ADCs with LCD Drivers φ2 φ3 φ1' φ2' MAX1491/MAX1493/MAX1495 φ1 φ3' V+ VH BP1 VLCD VL VV+ VH BP2 VL VV+ VH BP3 VL VV+ VH ALL OFF VL VV+ VH a ON g, d OFF VL VV+ VH g ON a, d OFF VL VV+ VH d ON a, g OFF VL VFREQUENCY = 107Hz φ1, φ2, φ3 - - BP HIGH WITH RESPECT TO SEGMENT (BP+ TIME) φ1', φ2', φ3' - - BP LOW WITH RESPECT TO SEGMENT (BP- TIME) BP1 ACTIVE DURING φ1 AND φ1' BP2 ACTIVE DURING φ2 AND φ2' BP3 ACTIVE DURING φ3 AND φ3' V+ = DVDD, VH = 2/3 DVDD VL = 1/3 VLCD, V- = GND VLCD = DVDD - GND Figure 9. LCD Voltage Waveform—Combinations 1–4 (BP1/2/3, SEGa/d/g) ______________________________________________________________________________________ 13 MAX1491/MAX1493/MAX1495 3.5- and 4.5-Digit, Single-Chip ADCs with LCD Drivers φ1 φ2 φ3 φ1' φ2' φ3' V+ VH BP1 VLCD VL VV+ VH BP2 VL VV+ VH BP3 VL VV+ VH ALL OFF VL VV+ VH a, d ON g OFF VL VV+ VH a, g ON d OFF VL VV+ VH g, d ON a OFF VL V- FREQUENCY = 107Hz φ1, φ2, φ3 - - BP HIGH WITH RESPECT TO SEGMENT (BP+ TIME) φ1', φ2', φ3' - - BP LOW WITH RESPECT TO SEGMENT (BP- TIME) BP1 ACTIVE DURING φ1 AND φ1' BP2 ACTIVE DURING φ2 AND φ2' BP3 ACTIVE DURING φ3 AND φ3' V+ = DVDD, VH = 2/3 DVDD VL = 1/3 VLCD, V- = GND VLCD = DVDD - GND Figure 10. LCD Voltage Waveform—Combinations 5–8 (BP1/2/3, SEGa/d/g) 14 ______________________________________________________________________________________ 3.5- and 4.5-Digit, Single-Chip ADCs with LCD Drivers φ2 φ3 φ1' φ2' MAX1491/MAX1493/MAX1495 φ1 φ3' VLCD ALL OFF 0 VRMS = VLCD / 3 (OFF) -VLCD VLCD a ON g, d OFF 0 VRMS = VLCD / 3 (OFF) -VLCD VLCD a, g ON d OFF 0 VRMS = 1.92VLCD / 3 (ON) -VLCD VLCD ALL ON 0 VRMS = 1.92VLCD / 3 (ON) -VLCD VG = VY - VBP2 (DIFFERENCE BETWEEN SEGMENT LINE Y AND BP2 VOLTAGE) VOLTAGE CONTRAST RATIO = VRMS ON / VRMSOFF = 1.922 φ1, φ2, φ3 - - BP HIGH WITH RESPECT TO SEGMENT (BP+ TIME) φ1', φ2', φ3' - - BP LOW WITH RESPECT TO SEGMENT (BP- TIME) BP1 ACTIVE DURING φ1 AND φ1' BP2 ACTIVE DURING φ2 AND φ2' BP3 ACTIVE DURING φ3 AND φ3' Figure 11. Voltage Waveforms on the g Segment ______________________________________________________________________________________ 15 MAX1491/MAX1493/MAX1495 3.5- and 4.5-Digit, Single-Chip ADCs with LCD Drivers 100 90 Ø = -10°C 80 Ø = +10°C CONTRAST (%) 70 Ø = -30°C 60 Ø = 0°C 50 40 30 VOFF = 1.1VRMS 20 VON = 2.1VRMS 10 TA = +25°C 0 0 1 2 3 4 5 APPLIED VOLTAGE (VRMS) Ø+ Ø- Figure 12. Contrast vs. Applied RMS Voltage 16 ______________________________________________________________________________________ 3.5- and 4.5-Digit, Single-Chip ADCs with LCD Drivers with a 0.1µF or greater capacitor to GND in external reference mode. Figure 13 shows the MAX1493/MAX1495 operating with an external differential reference. In this mode, REF- is connected to the top of the strain gauge and REF+ is connected to the midpoint of the resistor-divider on the supply. Reference Applications Information The MAX1491/MAX1493/MAX1495 reference sets the full-scale range of the ADC transfer function. With a nominal 2.048V reference, the ADC full-scale range is ±2V with RANGE equal to GND. With RANGE equal to DVDD, the full-scale range is ±200mV. A decreased reference voltage decreases full-scale range (see the Transfer Functions section). The MAX1491/MAX1493/MAX1495 accept either an external reference or an internal reference. The INTREF input selects the reference mode. For internal reference operation, connect INTREF to DV DD , connect REF- to GND, and bypass REF+ to GND with a 4.7µF capacitor. The internal reference provides a nominal 2.048V source between REF+ and GND. The internal reference temperature coefficient is typically 40ppm/°C. Connect INTREF to GND to use the external reference. The external reference inputs, REF+ and REF-, are fully differential. For a valid external reference input, VREF+ must be greater than VREF-. Bypass REF+ and REF- Power-On At power-on, the digital filter and modulator circuits reset. The MAX1493/MAX1495 allow 6s for the reference to stabilize before performing enhanced offset calibration. During these 6s, the MAX1493/MAX1495 display 1.2V to 1.5V when a stable reference is detected. If a valid reference is not found, the MAX1493/ MAX1495 time out after 6s and begin enhanced offset calibration. Enhanced offset calibration typically lasts 2s. The MAX1493/MAX1495 begin converting after enhanced offset calibration. Offset Calibration The MAX1491/MAX1493/MAX1495 offer on-chip offset calibration. The MAX1491/MAX1493/MAX1495 calibrate offset during every conversion cycle. The MAX1495 offers enhanced offset calibration on demand. Connect HOLD to DVDD for 2s to perform enhanced offset calibration. Table 2. Decimal-Point Control Table (MAX1493/MAX1495) DPON DPSET1 DPSET2 DISPLAY OUTPUT ZERO INPUT READING 0 0 0 18888 0 0 0 1 18888 0 0 1 0 18888 0 0 1 1 18888 0 1 0 0 1 8 8 8.8 0.0 1 0 1 1 8 8.8 8 0.00 1 1 0 1 8.8 8 8 0.000 1 1 1 1.8 8 8 8 0.0000 Table 3. Decimal-Point Control Table (MAX1491) DPSET1 DPSET2 DISPLAY OUTPUT ZERO INPUT READING 0 0 1 8 8.8 0.0 0 1 1 8.8 8 0.00 1 0 1.8 8 8 0.000 1 1 1888 000 ______________________________________________________________________________________ 17 MAX1491/MAX1493/MAX1495 Decimal Point Control The MAX1491/MAX1493/MAX1495 allow for full decimal-point control and feature leading-zero suppression. Use DPON, DPSET1, and DPSET2 to set the value of the decimal point. Tables 2 and 3 show the truth tables of the DPON, DPSET1, and DPSET2 that determine which decimal point is used. MAX1491/MAX1493/MAX1495 3.5- and 4.5-Digit, Single-Chip ADCs with LCD Drivers Peak The MAX1491/MAX1493/MAX1495 feature peak detection circuitry. When activated (PEAK connected to DVDD), the devices display only the highest voltage measured to the LCD. First, the current ADC result is displayed. Then the new ADC conversion result is compared to this value. If the new value is larger than the previous peak value, the new value is displayed. If the new value is less than the previous peak value, the display remains unchanged. Connect PEAK to GND to clear the peak value and disable the peak function. The peak function is only valid for the -19,487 to +19,999 range for the MAX1493/ MAX1495 and -1217 to +1999 for the MAX1491. Hold ANALOG SUPPLY FERRITE BEAD 0.1µF AVDD DVDD REF+ 0.1µF RREF MAX1491 MAX1493 MAX1495 REF0.1µF The MAX1491/MAX1493/MAX1495 feature data HOLD circuitry. When activated (HOLD connected to DVDD), the devices hold the current reading on the LCD. ACTIVE GAUGE Low Battery DUMMY GAUGE The MAX1491/MAX1493/MAX1495 feature a low-battery detection input. When the voltage at LOWBATT drops below 2.048V (typ), the LOWBATT segment of the LCD turns on. 4.7µF 0.1µF 4.7µF VNEG 0.1µF R AIN+ 0.1µF AIN0.1µF R INTREF GND Strain Gauge Measurement Connect the differential inputs of the MAX1491/ MAX1493/MAX1495 to the bridge network of the strain gauge. In Figure 13, the analog supply voltage powers the bridge network and the MAX1491/MAX1493/ MAX1495 along with its reference voltage. The MAX1491/MAX1493/MAX1495 handle an analog input voltage range of ±200mV or ±2V full scale. The analog/reference inputs of the part allow the analog input range to have an absolute value anywhere between -2.2V and +2.2V. Figure 13. Strain-Gauge Application with the MAX1491/MAX1493/ MAX1495 R = 100Ω for ±2V RANGE 10Ω for ±200mV RANGE 4–20mA Measurement To measure 4–20mA signals, connect a shunt resistor across AIN+ and AIN- to create the ±2V or ±200mV input voltage (see Figure 14). Table 4. LCD Priority Table HOLD 18 AIN+ 0.1µF 4–20mA MAX1491 MAX1493 AIN- MAX1495 R 0.1µF PEAK DISPLAYS DVDD X Current value GND DVDD Peak value GND GND Latest ADC result ±1.8.8.8.8 Figure 14. 4–20mA Measurement ______________________________________________________________________________________ 3.5- and 4.5-Digit, Single-Chip ADCs with LCD Drivers V -V Counts = 1.024 × AIN+ AIN- × 20,000 VREF + - VREF- The transfer function for the MAX1493 with AIN+ - AIN< 0 and RANGE = GND is: V -V Counts = 1.024 × AIN+ AIN- × 20,000 + 1 VREF + - VREF The transfer function for the MAX1491 with AIN+ - AIN≥ 0 and RANGE = GND is: V -V Counts = 1.024 × AIN+ AIN- × 2000 VREF + - VREF- The transfer function for the MAX1491 with AIN+ - AIN< 0 and RANGE = GND is: V -V Counts = 1.024 × AIN+ AIN- × 2000 + 1 VREF + - VREF The transfer function for the MAX1493/MAX1495 with AIN+ - AIN- ≥ 0 and RANGE = DVDD is: V -V Counts = 1.024 × AIN+ AIN- × 20,000 × 10 VREF + - VREF- The transfer function for the MAX1493 with AIN+ - AIN< 0 and RANGE = DVDD is: V -V Counts = 1.024 × AIN+ AIN- × 20,000 × 10 + 1 V V REF + REF The transfer function for the MAX1491 with AIN+ - AIN≥ 0 and RANGE = DVDD is: V -V Counts = 1.024 × AIN+ AIN- × 2000 × 10 VREF + - VREF- The transfer function for the MAX1491 with AIN+ - AIN< 0 and RANGE = DVDD is: V -V Counts = 1.024 × AIN+ AIN- × 2000 × 10 + 1 VREF + - VREF LCD LCD 1---- 1---- 19,999 19,999 2 1 2 1 0 0 -0 -0 -1 -1 -2 -2 -19,999 -19,999 -1---- -1----2V -100µV 0 100µV +2V ANALOG INPUT VOLTAGE Figure 15. MAX1493/MAX1495 Transfer Function ±2V Range -200mV -10µV 0 10µV +200mV ANALOG INPUT VOLTAGE Figure 16. MAX1493/MAX1495 Transfer Function ±200mV Range ______________________________________________________________________________________ 19 MAX1491/MAX1493/MAX1495 Transfer Functions Figures 15–18 show the MAX1491/MAX1493s’ transfer functions. The transfer function for the MAX1493/ MAX1495 with AIN+ - AIN- ≥ 0 and RANGE = GND is: MAX1491/MAX1493/MAX1495 3.5- and 4.5-Digit, Single-Chip ADCs with LCD Drivers LCD LCD 1--- 1--- 1999 1999 2 1 2 1 0 0 -0 -0 -1 -1 -2 -2 -1999 -1999 -1--- -1---200mV -100µV 0 100µV +200mV ANALOG INPUT VOLTAGE Figure 17. MAX1491 Transfer Function ±200mV Range -2V -1mV 0 1mV Figure 18. MAX1491 Transfer Function ±2V Range Definitions Supplies, Layout, and Bypassing Power up AVDD and DVDD before applying an analog input and external reference voltage to the device. If this is not possible, limit the current into these inputs to 50mA. Isolate the digital supply from the analog supply with a low-value resistor (10Ω) or ferrite bead when the analog and digital supplies come from the same source. For best performance, ground the MAX1491/ MAX1493/MAX1495 to the analog ground plane of the circuit board. Avoid running digital lines under the device, because these may couple noise onto the die. Run the analog ground plane under the MAX1491/MAX1493/MAX1495 to minimize coupling of digital noise. Make the powersupply lines to the MAX1491/MAX1493/MAX1495 as wide as possible to provide low-impedance paths and reduce the effects of glitches on the power-supply line. Shield fast-switching signals, such as clocks, with digital ground to avoid radiating noise to other sections of the board. Avoid running clock signals near the analog inputs. Avoid crossover of digital and analog signals. Running traces that are on opposite sides of the board at right angles to each other reduces feedthrough effects. Good decoupling is important when using high-resolution ADCs. Decouple the supplies with 4.7µF and 0.1µF ceramic capacitors to GND. Place these components as close to the device as possible to achieve the best decoupling. INL Integral nonlinearity (INL) is the deviation of the values on an actual transfer function from a straight line. This straight line is either a best-straight-line fit or a line drawn between the end points of the transfer function, once offset and gain errors have been nullified. INL for the MAX1491/MAX1493/MAX1495 is measured using the end-point method. DNL Differential nonlinearity (DNL) is the difference between an actual step width and the ideal value of one count. A DNL error specification of less than one count guarantees no missing counts and a monotonic transfer function. Rollover Error Rollover error is defined as the absolute value difference between a near-positive full-scale reading and near-negative full-scale reading. Rollover error is tested by applying a full-scale positive voltage, swapping AIN+ and AIN-, and then adding the results. Zero Input Reading Ideally, with AIN+ connected to AIN-, the MAX1491/ MAX1493/MAX1495 display a zero. Zero input reading is the measured deviation from the ideal zero and the actual measured point. Refer to the MAX1494 evaluation kit manual for the recommended layout. The evaluation board package includes a fully assembled and tested evaluation board. 20 +2V ANALOG INPUT VOLTAGE ______________________________________________________________________________________ 3.5- and 4.5-Digit, Single-Chip ADCs with LCD Drivers Common-Mode Rejection Common-mode rejection is the ability of a device to reject a signal that is common to both input terminals. The common-mode signal can be either an AC or a DC signal or a combination of the two. CMR is often expressed in decibels. Normal-Mode 50Hz and 60Hz Rejection (Simultaneously) Normal mode rejection is a measure of how much output changes when 50Hz and 60Hz signals are injected into just one of the differential inputs. The MAX1491/ MAX1493/MAX1495 sigma-delta converter uses its internal digital filter to provide normal mode rejection to both 50Hz and 60Hz power-line frequencies simultaneously. Power-Supply Rejection Ratio Power-supply rejection ratio (PSRR) is the ratio of the input supply change (in volts) to the change in the converter output (in volts). It is measured typically in decibels. Enhanced Offset Calibration Enhanced offset calibration is a more accurate calibration method that is needed in the case of the ±200mV range and 4.5-digit resolution. The MAX1493/MAX1495 perform the enhanced offset calibration upon power-up. The MAX1495 also performs enhanced offset calibration on demand with the HOLD input. Typical Operating Circuit HOLD LOW BATTERY SEG1–SEG13 (SEG1–SEG10) AIN+ VIN PEAK BACKPLANE CONNECTIONS DVDD AIN0.1µF INTREF 0.1µF PEAK DVDD 4.7µF HOLD MAX1493 MAX1495 (MAX1491) 0.1µF DPON DPSET1 DPSET2 AVDD LOWBATT 4.7µF RHI LISO 2.7V TO 5.25V VNEG GND 0.1µF REF- RANGE REF+ 4.7µF 10µF RLOW ______________________________________________________________________________________ 21 MAX1491/MAX1493/MAX1495 Gain Error Gain error is the amount of deviation between the measured full-scale transition point and the ideal full-scale transition point. 3.5- and 4.5-Digit, Single-Chip ADCs with LCD Drivers MAX1491/MAX1493/MAX1495 Pin Configurations (continued) TOP VIEW INTREF 1 28 VNEG DVDD 2 27 BP1 GND 3 26 BP2 AVDD 4 25 BP3 AIN+ 5 AIN- 6 Chip Information TRANSISTOR COUNT: 79,435 PROCESS: BiCMOS 24 SEG10 MAX1491 23 SEG9 REF- 7 22 SEG8 REF+ 8 21 SEG7 LOWBATT 9 20 SEG6 RANGE 10 19 SEG5 DPSET1 11 18 SEG4 DPSET2 12 17 SEG3 PEAK 13 16 SEG2 HOLD 14 15 SEG1 SSOP OR DIP 22 ______________________________________________________________________________________ 3.5- and 4.5-Digit, Single-Chip ADCs with LCD Drivers 32L/48L,TQFP.EPS ______________________________________________________________________________________ 23 MAX1491/MAX1493/MAX1495 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) 2 SSOP.EPS MAX1491/MAX1493/MAX1495 3.5- and 4.5-Digit, Single-Chip ADCs with LCD Drivers 1 INCHES E H MILLIMETERS DIM MIN MAX MIN MAX A 0.068 0.078 1.73 1.99 A1 0.002 0.008 0.05 0.21 B 0.010 0.015 0.25 0.38 C 0.20 0.09 0.004 0.008 SEE VARIATIONS D E e 0.205 0.212 0.0256 BSC 5.20 MILLIMETERS INCHES D D D D D 5.38 MIN MAX MIN MAX 0.239 0.239 0.278 0.249 0.249 0.289 6.07 6.07 7.07 6.33 6.33 7.33 0.317 0.397 0.328 0.407 8.07 10.07 8.33 10.33 N 14L 16L 20L 24L 28L 0.65 BSC H 0.301 0.311 7.65 7.90 L 0.025 0∞ 0.037 8∞ 0.63 0∞ 0.95 8∞ N A C B e A1 L D NOTES: 1. D&E DO NOT INCLUDE MOLD FLASH. 2. MOLD FLASH OR PROTRUSIONS NOT TO EXCEED .15 MM (.006"). 3. CONTROLLING DIMENSION: MILLIMETERS. 4. MEETS JEDEC MO150. 5. LEADS TO BE COPLANAR WITHIN 0.10 MM. PROPRIETARY INFORMATION TITLE: PACKAGE OUTLINE, SSOP, 5.3 MM APPROVAL DOCUMENT CONTROL NO. 21-0056 24 ______________________________________________________________________________________ REV. C 1 1 3.5- and 4.5-Digit, Single-Chip ADCs with LCD Drivers PDIPN.EPS Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 25 © 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. MAX1491/MAX1493/MAX1495 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)