RT9188 Preliminary Dual, Ultra-Low Quiescent, 100mA CMOS LDO Regulator General Description Features The RT9188 series are an efficient, precise dualchannel CMOS LDO regulator optimized for ultralow-quiescent applications. Both regulator outputs are capable of sourcing 100mA of output current. The RT9188’s performance is optimized for batterypowered systems to deliver extremely low dropout voltage and ultra-low quiescent current. Regulator ground current increases only slightly in dropout, further prolonging the battery life. The RT9188 also works with low-ESR ceramic capacitors, reducing the amount of board space necessary for power applications, critical in hand-held wireless devices. Key features include current limit, thermal shutdown, faster transient response, ultra-low quiescent current (typically 8µA), low dropout voltage, high output accuracy, current limiting protection, and high ripple rejection ratio. Available in the 5-lead SOT-25 package, the RT9188 also offers a range of 1.2V to 5V with 0.1V per step. Ultra-Low Quiescent Current (Typically 8µA) Low Dropout: 450mV at 100mA Wide Operating Voltage Ranges: 2V~6V Faster Transient Response Tight Load and Line Regulation Current Limiting Protection Thermal Shutdown Protection Only 1µF Output Capacitor Required for Stability High Power Supply Rejection Ratio Custom Voltages Available Applications Cellular Phones and Pages Battery-Powered Equipment Laptop, Palmtops, Notebook Computers Hand-Held Instruments PCMCIA Card Wireless LAN Card/Keyboard/Mouse Pin Configurations Part Number Ordering Information Pin Configurations TOP VIEW RT9188CB (Plastic SOT-25) RT9188Package Type B : SOT-25 5 1 Operating Temperature Range C: Commercial Standard Output Voltage 1 K : 3.0V 2 1. 2. 3. 4. VOUT1 VDD NC VOUT2 5. GND 3 Output Voltage 2 8 : 1.8V Other voltage versions please contact RichTek for detail. Marking Information For marking information, contact our sales representative directly or through a RichTek distributor located in your area, otherwise visit our website for detail. DS9188-00 November 2002 4 Typical Application Circuit V IN VDD CIN 1µ F VOUT1 RT9188 VOUT2 GND V OUT1 COUT1 1µ F V OUT2 COUT2 1µ F www.richtek.com 1 RT9188 Preliminary Pin Description Pin Name Pin Function VDD Supply Input VOUT1 Channel 1 Output Voltage VOUT2 Channel 2 Output Voltage GND Common Ground NC No Internal Connection Function Block Diagram VDD Thermal Protector2 Thermal Protector1 _ _ VOUT2 Current Limit1 + + Current Limit2 VOUT1 V ref 2 V ref 1 GND www.richtek.com 2 DS9188-00 November 2002 RT9188 Preliminary Absolute Maximum Ratings (Note 1) Supply Input Voltage Power Dissipation, PD @ TA = 25° C SOT-25 Package Thermal Resistance SOT-25, θJA Junction Temperature Lead Temperature (Soldering, 10 sec.) Storage Temperature Range ESD Susceptibility (Note 2) HBM MM 7V 0.25W 250°C/W 150°C 260°C −65°C to 150°C 2kV 200V Recommended Operating Conditions (Note 3) Supply Input Voltage Junction Temperature Range 2V to 6V −40°C to 125°C Electrical Characteristics (VDD = 5V, CIN = 1µF, COUT = 1µF, TA = 25°C, for each LDO unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Units Output Voltage Accuracy ∆VOUT IOUT = 1mA −2 -- +2 % Current Limit ILIM RLOAD = 1Ω 150 450 -- mA Quiescent Current (both LDOs) (Note 6) IQ IOUT = 0mA -- 8 14 µA Dropout Voltage (Note 4) VDROP IOUT = 50mA, VDD ≥ 3.6V -- 200 300 IOUT = 100mA, VDD ≥ 3.6V -- 380 600 Line Regulation ∆VLINE VDD = (VOUT (MAX) + 0.3V) to 6V, IOUT = 1mA −0.2 -- +0.2 %/V Load Regulation (Note 5) ∆VLOAD IOUT = 1mA to 100mA -- 0.01 0.04 %/mA Output Noise Voltage eNO BW = 100Hz to 50kHz COUT = 10µF -- 250 -- µVrms Power Supply Rejection Rate PSRR f = 1kHz, COUT = 1µF -- −30 -- dB Thermal Shutdown Protection TSD 125 -- -- °C DS9188-00 November 2002 mV www.richtek.com 3 RT9188 Preliminary Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution recommended. The human body model is a 100pF capacitor discharged through a 1.5KΩ resistor into each pin. Note 3. The device is not guaranteed to function outside its operating conditions. Note 4. Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its nominal value measured at 1V differential. Note 5. Regulation is measured at constant junction temperature by using a 20mS current pulse. Devices are tested for load regulation in the load range from 1mA to 100mA. Note 6. Quiescent, or ground current, is the difference between input and output currents. It is defined by IQ = IIN – IOUT under no load condition (IOUT = 0mA). The total current drawn from the supply is the sum of the load current plus the ground pin current. www.richtek.com 4 DS9188-00 November 2002 RT9188 Preliminary Typical Operating Characteristics Short Circuit Current Dropout Voltage (VDD – VOUT) 0.8 500 TJ=25°C 0.7 Dropout Voltage (V) 0.5 0.4 400 Short Circuit Current (mA) TJ=125°C 0.6 TJ=25°C 0.3 0.2 TJ=125° 300 200 100 0.1 VOUT = 3.0V 0 0 20 40 60 80 0 0 100 1 Temperature Stability 3.6 Quiescent Current (uA) VO1 2.8 2.4 2 VO2 4 5 8 6 4 2 0 1.6 -35 -15 5 25 45 65 85 105 -35 125 -15 5 Temperature ((°C) ) 50mA -30 10mA -40 -60 1K 10K Frequency (Hz) DS9188-00 November 2002 105 125 100K 1M 50mA -40 -60 100 85 -30 -50 10 65 CIN = 1µF C OUT = 1µF Electrolytic Capacitor -10 VDD = 5V VOUT = 3.0V -20 TA = 25°C -50 -70 45 PSRR 0 PSRR (dB) CIN = 1µF C OUT = 1µF Electrolytic Capacitor -10 VDD = 5V VOUT = 1.8V -20 TA = 25°C 25 Temperature ((°C) ) PSRR 0 PSRR (dB) 3 Quisecent Current vs. Temperature 10 3.2 Output Voltage (V) 2 Input/Output Differential (V) ILOAD (mA) -70 10 10mA 100 1K 10K 100K 1M Frequency (Hz) www.richtek.com 5 RT9188 Preliminary Line Transient Response COUT = 1µF Electrolytic IOUT = 50mA VOUT = 1.8V 200 TA = 25°C 100 TT 02> ≈ ≈ ≈ 6 5 T 1> 4 0 1 2 3 4 5 6 7 8 9 5 T 1> 4 3 10 0 1 2 3 4 5 6 7 8 9 10 Time (mS) Load Transient Response Load Transient Response 100 CIN = 1µF Ceramic VDD= 5V TA = 25 °C 50 COUT = 1µF Ceramic V OUT = 1.8V Output Voltage Deviation (mV) Output Voltage Deviation (mV) TT 02 > Input Voltage Deviation (V) Input Voltage Deviation (V) 100 Time (mS) 0 -50 ≈ 100 50 200 100 10 -100 Time (500µS/Div) CIN = 1µF Ceramic VDD= 5V TA = 25 °C COUT = 1µF Ceramic VOUT = 3.0V 0 -50 ≈ ≈ Load Current (mA) Load Current (mA) COUT = 1µF Electrolytic IOUT = 50mA VOUT = 3.0V 200 TA = 25°C ≈ 6 3 300 Output Voltage Deviation (mV) Output Voltage Deviation (mV) Line Transient Response 300 ≈ 200 100 10 -100 Time (500µS/Div) Current Limit vs. Input Voltage 500 TJ=25°C Current Limit (mA) 400 TJ=125°C 300 200 100 0 1 www.richtek.com 6 2 3 4 Input Voltage (V) 5 6 DS9188-00 November 2002 Preliminary Application Information Like any low-dropout regulator, the RT9188 requires input and output decoupling capacitors. The device is specifically designed for portable applications requiring minimum board space and smallest components. These capacitors must be correctly selected for good performance (see Capacitor Characteristics Section). Please note that linear regulators with a low dropout voltage have high internal loop gains which require care in guarding against oscillation caused by insufficient decoupling capacitance. INPUT CAPACITOR An input capacitance of ≅1µF is required between the device input pin and ground directly (the amount of the capacitance may be increased without limit). The input capacitor MUST be located less than 1 cm from the device to assure input stability (see PCB Layout Section). A lower ESR capacitor allows the use of less capacitance, while higher ESR type (like aluminum electrolytic) require more capacitance. Capacitor types (aluminum, ceramic and tantalum) can be mixed in parallel, but the total equivalent input capacitance/ESR must be defined as above to stable operation. There are no requirements for the ESR on the input capacitor, but tolerance and temperature coefficient must be considered when selecting the capacitor to ensure the capacitance will be ≅1µF over the entire operating temperature range. OUTPUT CAPACITOR The RT9188 is designed specifically to work with very small ceramic output capacitors. The recommended minimum capacitance (temperature characteristics X7R or X5R) in 1µF to 4.7µF range with 10mΩ to 50mΩ range ceramic capacitor between LDO output and GND for transient stability, but it may be increased without limit. Higher capacitance values help to improve transient. DS9188-00 November 2002 RT9188 The output capacitor’s ESR is critical because it forms a zero to provide phase lead which is required for loop stability. NO LOAD STABILITY The device will remain stable and in regulation with no external load. This is specially important in CMOS RAM keep-alive applications. INPUT-OUTPUT (DROPOUT) VOLTAGE A regulator’s minimum input-to-output voltage differential (dropout voltage) determines the lowest usable supply voltage. In battery-powered systems, this determines the useful end-of-life battery voltage. Because the device uses a PMOS, its dropout voltage is a function of drain-to-source on-resistance, RDS(ON), multiplied by the load current: VDROUPOUT = VDD – VOUT = RDS(ON) × IOUT CURRENT LIMIT The RT9188 monitors and controls the PMOS’ gate voltage, limiting the output current to 450mA (typ). The output can be shorted to ground for an indefinite period of time without damaging the part. SHORT-CIRCUIT PROTECTION The device is short circuit protected and in the event of a peak over-current condition, the short-circuit control loop will rapidly drive the output PMOS pass element off. Once the power pass element shuts down, the control loop will rapidly cycle the output on and off until the average power dissipation causes the thermal shutdown circuit to respond to servo the on/off cycling to a lower frequency. Please refer to the section on thermal information for power dissipation calculations. CAPACITOR CHARACTERISTICS It is important to note that capacitance tolerance and variation with temperature must be taken into consideration when selecting a capacitor so that the minimum required amount of capacitance is provided over the full operating temperature range. In general, a good tantalum capacitor will show very little capacitance variation with temperature, but a ceramic may not be as good (depending on dielectric type). www.richtek.com 7 RT9188 Preliminary Aluminum electrolytics also typically have large temperature variation of capacitance value. Equally important to consider is a capacitor’s ESR change with temperature: this is not an issue with ceramics, as their ESR is extremely low. However, it is very important in Tantalum and aluminum electrolytic capacitors. Both show increasing ESR at colder temperatures, but the increase in aluminum electrolytic capacitors is so severe they may not be feasible for some applications. Ceramic: For values of capacitance in the 10µF to 100µF range, ceramics are usually larger and more costly than tantalums but give superior AC performance for by-passing high frequency noise because of very low ESR (typically less than 10mΩ). However, some dielectric types do not have good capacitance characteristics as a function of voltage and temperature. Z5U and Y5V dielectric ceramics have capacitance that drops severely with applied voltage. A typical Z5U or Y5V capacitor can lose 60% of its rated capacitance with half of the rated voltage applied to it. The Z5U and Y5V also exhibit a severe temperature effect, losing more than 50% of nominal capacitance at high and low limits of the temperature range. X7R and X5R dielectric ceramic capacitors are strongly recommended if ceramics are used, as they typically maintain a capacitance range within ±20% of nominal over full operating ratings of temperature and voltage. Of course, they are typically larger and more costly than Z5U/Y5U types for a given voltage and capacitance. Tantalum: Solid tantalum capacitors are recommended for use on the output because their typical ESR is very close to the ideal value required for loop compensation. They also work well as input capacitors if selected to meet the ESR requirements previously listed. www.richtek.com 8 Tantalums also have good temperature stability: a good quality tantalum will typically show a capacitance value that varies less than 10~15% across the full temperature range of 125°C to −40°C. ESR will vary only about 2X going from the high to low temperature limits. The increasing ESR at lower temperatures can cause oscillations when marginal quality capacitors are used (if the ESR of the capacitor is near the upper limit of the stability range at room temperature). Aluminum: This capacitor type offers the most capacitance for the money. The disadvantages are that they are larger in physical size, not widely available in surface mount, and have poor AC performance (especially at higher frequencies) due to higher ESR and ESL. Compared by size, the ESR of an aluminum electrolytic is higher than either Tantalum or ceramic, and it also varies greatly with temperature. A typical aluminum electrolytic can exhibit an ESR increase of as much as 50X when going from 25°C down to −40°C. It should also be noted that many aluminum electrolytics only specify impedance at a frequency of 120Hz, which indicates they have poor high frequency performance. Only aluminum electrolytics that have an impedance specified at a higher frequency (between 20kHz and 100kHz) should be used for the device. Derating must be applied to the manufacturer’s ESR specification, since it is typically only valid at room temperature. Any applications using aluminum electrolytics should be thoroughly tested at the lowest ambient operating temperature where ESR is maximum. DS9188-00 November 2002 RT9188 Preliminary THERMAL CONSIDERATIONS The RT9188 is a dual channel CMOS regulator designed to provide two output voltage from one package. Each output pin the RT9188 can deliver a current of up to 100mA over the full operating junction temperature range. However, the maximum output current must be derated at higher ambient temperature to ensure the junction temperature does not exceed 125°C. With all possible conditions, the junction temperature must be within the range specified under operating conditions. Each regulator contributes power dissipation to the overall power dissipation of the package. Power dissipation can be calculated based on the output current and the voltage drop across each regulator. PD = (VDD –VOUT1) IOUT1 + (VDD – VOUT2) IOUT2 + VIN IGND Each output is rated for 100mA of output current, but the application may limit the amount of output current based on the total power dissipation and the ambient temperature. The final operating junction temperature for any set of conditions can be estimated by the following thermal equation: The regulator ground pin should be connected to the external circuit ground so that the regulator and its capacitors have a “single point ground”. It should be noted that stability problems have been seen in applications where “vias” to an internal ground plane were used at the ground points of the device and the input and output capacitors. This was caused by varying ground potentials at these nodes resulting from current flowing through the ground plane. Using a single point ground technique for the regulator and it’s capacitors fixed the problem. Since high current flows through the traces going into VIN and coming from VOUT, Kelvin connect the capacitor leads to these pins so there is no voltage drop in series with the input and output capacitors. Optimum performance can only be achieved when the device is mounted on a PC board according to the diagram below: VOUT2 PD (MAX) = ( TJ (MAX) − TA ) / θJA Where TJ (MAX) is the maximum junction temperature of the die (125°C) and TA is the maximum ambient temperature. The junction to ambient thermal resistance (θJA) for SOT-25 package at recommended minimum footprint is 250°C/W (θJA is layout dependent). Visit our website in which “Recommended Footprints for Soldering Surface Mount Packages” for detail. PCB LAYOUT Good board layout practices must be used or instability can be induced because of ground loops and voltage drops. The input and output capacitors MUST be directly connected to the input, output, and ground pins of the device using traces which have no other currents flowing through them. GND VOUT1 VDD SOT-25 Board Layout The best way to do this is to layout CIN and COUT near the device with short traces to the VDD, VOUT, and ground pins. DS9188-00 November 2002 www.richtek.com 9 RT9188 Preliminary Package Information D C B b H A e Symbol L A1 Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.889 1.295 0.035 0.051 A1 0.000 0.152 0.000 0.006 B 1.397 1.803 0.055 0.071 b 0.356 0.559 0.014 0.022 C 2.591 2.997 0.102 0.118 D 2.692 3.099 0.106 0.122 e 0.838 1.041 0.033 0.041 H 0.102 0.254 0.004 0.010 L 0.356 0.610 0.014 0.024 SOT- 25 Surface Mount Package www.richtek.com 10 DS9188-00 November 2002 Preliminary DS9188-00 November 2002 RT9188 www.richtek.com 11 RT9188 RICHTEK TECHNOLOGY CORP. RICHTEK TECHNOLOGY CORP. Headquarter Taipei Office (Marketing) 5F, No. 20, Taiyuen Street, Chupei City 8F-1, No. 137, Lane 235, Paochiao Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Tel: (8862)89191466 Fax: (8862)89191465 Email: [email protected] www.richtek.com 12 DS9188-00 November 2002