8422 COMLINK™ SERIES CY2LL8422 High Drive Dual 2-Channel LVDS Repeater/Mux Features Description • ANSI TIA/EIA-644-1995 Compliant • Designed for Data rates to 650 MBps = (325 MHz) • Dual 2x2 — Low Voltage Differential Signaling with output voltages of ±350 mV into 100-ohm load version (Std) • Single 3.3V supply • Accepts ±35 mV differential inputs • Output drivers are high impedance when disabled or when VDD <1.5V • 28-pin SSOP/TSSOP packages • Industrial version available The Cypress CY2LL8422 are differential line drivers and receivers that utilize Low Voltage Signaling or LVDS, to achieve signaling rates of 650 MBps. The receiver outputs can be switched to either or both drivers through the multiplexer control signals S2/S3. This provides flexibility in application for either a splitter or router configuration with a single device. The Cypress CY2LL8422 are configured as dual 2-channel repeaters/Muxes. The LVDS standard provides a minimum differential output voltage of 247 mV into a 100-ohm load and receipt of as little as 100 mV signals with up to 1V of DC offset between transmitter and receiver. A doubly terminated Bus LVDS line enables multipoint configurations. Designed for both point-to-point based-band multipoint data transmission over controlled impedance lines. Block Diagram Pin Configuration 1DE 4 2 1 2A 6 7 2B 27 26 23 24 1B 1A S0 1DE S1 2A 2B 3A 3B S2 3DE S3 4A 4B 1Y 1Z 2Y 2Z 25 3 2DE 5 S0S1 3DE 11 3A 3B 8 9 20 19 4A 13 14 17 16 4B 3Y 3Z 1 2 3 4 5 6 7 8 9 10 11 12 13 14 CY2LL8422 1A 1B 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VDD 1Y 1Z 2DE 2Z 2Y GND VDD 3Y 3Z 4DE 4Y 4Z GND 4Y 4Z 28pin TSSOP/SSOP 18 10 4DE 12 S2 S3 Cypress Semiconductor Corporation Document #: 38-07411 Rev. ** • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 Revised July 3, 2002 CY2LL8422 Pin Description Pin Number Pin Name 15, 22 GND 2, 1 1A, 1B 3 S0 4 1DE 5 S1 6, 7 2A, 2B 21, 28 VDD 8, 9 3A, 3B 10 S2 Description Ground Differential Input Channel 1 Function Select Channel 1&2 Data Enable Channel 1 Function Select Channel 1& 2 Differential Input Channel 2 Power Supply Differential Input Channel 3 Function Select Channel 3 & 4 11 3DE 12 S3 Data Enable Channel 3 13, 14 4A, 4B Differential Input Channel 4 17, 16 4Y, 4Z Differential Output Channel 4 Function Select Channel 3 & 4 18 4DE 20, 19 3Y, 3Z Differential Output Channel 3 Data Enable Channel 4 23, 24 2Y, 2Z Differential Output Channel 2 25 2DE 27, 26 1Y, 1Z Data Enable Channel 2 Differential Output Channel 1 Table 1. Mux Function Table Input S0 Output S1 Function 1Y/1Z 2Y/2Z 0 0 1A/1B 1A/1B Splitter A 1 0 2A/2B 2A/2B Splitter B 0 1 1A/1B 2A/2B Pass Thru Router 1 1 2A/2B 1A/1B Cross Point Router S2 S3 3Y/3Z 4Y/4Z 0 0 3A/3B 3A/3B 1 0 4A/4B 4A/4B Splitter B 0 1 3A/3B 4A/4B Pass Thru Router 1 1 4A/4B 3A/3B Cross Point Router Document #: 38-07411 Rev. ** Splitter A Page 2 of 12 CY2LL8422 Table 2. Absolute Maximum Rating Over Operating Free-Air Temperature[1] Supply Voltage Range, VDD(1) –0.5V to 4V Voltage Range (DE,S0,S1) –0.5V to 6.0V Input Voltage Range, VIN (A or B) –0.5V to VDD + 0.5V ESD (All pins) Class 3, A: 2KV, B:500V Storage Temperature Range –65°C to 150°C Table 3. Recommended Operating Conditions Parameter Description VDD Supply Voltage VIH High Level Input Voltage (S0,S1,1DE,2DE) (S2,S3,3DE,4DE) VIL Low Level Input Voltage (S0,S1,1DE,2DE) (S2,S3,3DE,4DE) VID Magnitude of Differential Input Voltage VIC Common Mode Input Voltage TA Operating Free Air Temperature Industrial Min. Typ. Max. Unit 3 3.3 3.6 V 2 0.8 0.1 0.6 VID/2 2.4 – (VID/2) –40 85 0 70 Commercial °C Table 4. Receiver Electrical Characteristics Over Recommended Operating Conditions Parameter Description Condition Min. VITH+ Positive-going Differential Input Voltage Threshold VCM = 1.2V VITH- Negative-going Differential Input Voltage Threshold VCM = 1.2V –100 II Input Current (A Inputs) [Fail Safe] VI = 0V –0.5 II Input Current (B Inputs) [Fail Safe] VI = 0.8V II (Off) Power Off Current (A or B Inputs) VDD = 0V Typ. Max. Unit 100 mV mV VI = 2.4V 0.5 VI = 2.4V 0.1 –10 µA –10 µA 10 µA 10 µA 10 µA Note: 1. Stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. This is intended to be a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Document #: 38-07411 Rev. ** Page 3 of 12 CY2LL8422 Table 5. Receiver Electrical Characteristics Over Recommended Operating Conditions Parameter Description VOD Differential Output Voltage Swing ~VOD Change in differential Output Voltage Swing between Logic States VOC(SS) Steady State Common-mode output voltage ~VOC(SS) Change in Steady State Common-mode output between Logic States VOC(PP) Peak to Peak Common-mode output voltage ICC Supply Current Condition RL = 100 ohm See Figure 6 See Figure 6 Min. Typ. Max. 247 340 454 mV –50 50 mV 1.125 1.375 V 50 mV 150 mV –50 No load RL = 100 ohm Unit 3 20 @3.3V, FIN = 75 MHz 28 mA 50 mA 24 mA Both Channels Disabled 16 IIH High-Level Input Current s0,s1,S2, S3, 1de,2de,3DE, 4DE VIH = 5V 15 µA IIL Low-Level Input Current s0,s1,S2, S3, 1de,2de,3DE, 4DE VIL = 0.8V 5 µA IOS Short Circuit Current IOZ High Impedance Output Current VOD = 600 mV 0.1 VO= 0V or VDD 0.1 1 IO(off) Power-Off Output Current VDD = 0V, VO = 3.6V 0.1 10 Cin Input Capacitance 1A, 1B, 2A, 2B, 3A, 3B, 4A, 4B 3 pF Control Input Capacitance s0,s1,S2, S3, 1de,2de,3DE, 4DE 6 pF VOY or V0Z = 0V 20 VOD = 0V Document #: 38-07411 Rev. ** mA 20 1 µA µA Page 4 of 12 CY2LL8422 Table 6. Differential Receiver to Driver Switching Characteristics Over Recommended Operating Conditions[2] Parameter Description TPLH Differential Propagation delay, low to high TPHL Differential Propagation delay, high to low Tsk(p) Pulse Skew (TPHL-TPLH) Tr Transition Low to High Tf Transition High to Low TPHZ Propagation delay, high level to high impedance output Condition CL = 10 pF (see Figure 8) (see Figure 8) Min. Typ.[3] Max. Unit 4 6 ns 4 6 ns 0.2 ns 800 1500 ps 800 1500 ps 4 10 ns TPLZ Propagation delay, low level to high impedance output 4.3 10 ns TPZH Propagation delay, high impedance to high level output 3 10 ns TPZL Propagation delay, high impedance to low level output 2 10 ns TPHL_skR1_Dx Channel to Channel skew-receiver 1 to Any mux related drivers 95 ps TPLH_skR1_Dx Channel to Channel skew-receiver 1 to Any mux related drivers 95 ps TPPHL_skR2_Dx Channel to Channel skew-receiver 2 to Any mux related drivers 95 ps TPLH_skR2_Dx Channel to Channel skew-receiver 2 to Any mux related drivers 95 ps TPHL_skR3_Dx Channel to Channel skew-receiver 3 to Any mux related drivers 95 ps TPLH_skR3_Dx Channel to Channel skew-receiver 3 to Any mux related drivers 95 ps TPHL_skR4_Dx Channel to Channel skew-receiver 4 to Any mux related drivers 95 ps TPLH_skR4_Dx Channel to Channel skew-receiver 4 to Any mux related drivers 95 ps Note: 2. These parameters are measured over supply voltage and temperature ranges recommended for the device. 3. All typical values are measured at 25°C with a 3.3V supply. Document #: 38-07411 Rev. ** Page 5 of 12 CY2LL8422 Router Options Splitter Options Router Options S0/S1 1A/1B 2A/2B 1Y/1Z Cross Point Router 1A/1B 2Y/2Z 2A/2B 1A/1B 2A/2B 1Y/1Z S2/S3 3A/3B 3Y/3Z Cross Point Router 3A/3B 4A/4B 4Y42Z 4A/4B 3A/3B 3Y/3Z Pass Thru Router 4Y/4Z Splitter A 1Y/1Z Pass Thru Router 2Y/2Z 2Y/2Z 1Y/1Z 1A/1B Splitter B 2A/2B 4A/4B 2Y/2Z S0/S1 Splitter Options S2/S3 S0/S1 S0/S1 3Y/3Z Splitter A 4Y/4Z 3Y/3Z 3A/3B Splitter B 4A/4B S2/S3 4Y/4Z S2/S3 Figure 1. 2-Channel Cross Point Switch/Mux Dynamic Idd VID=0.4V, VIC=1.2V, S0, S1=00 25°C CY2LL8422 Dynamic Idd VID=0.4V, VIC=1.2V, S0,S1=01 25°C CY2LL8422 50.00 45.00 36.00 34.00 32.00 3.0V 3.3V 30.00 3.6V 28.00 26.00 24.00 idd (mA) 3.0V 3.3V 3.6V 35.00 30.00 25.00 22.00 20.00 50 35 0 32 5 30 0 27 5 25 0 22 5 20 0 17 5 15 0 12 5 75 10 0 50 20.00 Fin (Mhz) Fin (MHz) Dynamic Idd VID=0.4V, VIC=1.2V, S0,S1=00;S2,S3=00 25°C CY2LL8422 Dynamic Idd VID=0.4V, VIC=1.2V, S0,S1=01;S2,S3=01 25°C CY2LL8422 70.00 70.00 60.00 60.00 3.0V 3.3V 3.6V 50.00 40.00 30.00 Idd (mA) idd (mA) 40.00 75 10 0 12 5 15 0 17 5 20 0 22 5 25 0 27 5 30 0 32 5 35 0 idd(mA) 40.00 38.00 3.0V 3.3V 3.6V 50.00 40.00 30.00 20.00 20.00 50 75 100 125 150 175 200 225 250 275 300 325 350 50 75 100 125 150 175 200 225 250 275 300 325 350 Fin (Mhz) Fin (MHz) Figure 2. Dynamic IDD Diagrams Document #: 38-07411 Rev. ** Page 6 of 12 CY2LL8422 TPHL 7.500 7.000 0.100 6.500 0.200 6.000 0.300 5.500 0.400 5.000 0.500 4.500 0.600 4.000 0 0.5 1 1.5 2 2.5 VIC Figure 3. TPHL vs. VIC 6.500 0.100 6.000 TPLH 0.200 5.500 0.300 5.000 0.400 0.500 4.500 0.600 4.000 0 0.5 1 1.5 2 2.5 VIC Figure 4. TPLH vs. VIC 400 0.100 TPLH-TPHL (Ps) 200 0.200 0 -200 0 0.5 1 1.5 2 2.5 0.300 0.400 -400 0.500 -600 0.600 -800 -1000 -1200 VIC Figure 5. TPLH- TPHL vs. VIC Document #: 38-07411 Rev. ** Page 7 of 12 CY2LL8422 A A Pulse Generator P ulse G enerator Y R B D B R D RL Z Y Z RL & RC DE 10 p F 1 0 pF DE CL =10pF 10 pF V IA 1.4 V 0 V D iffe r e n tia l 1 .2 V C M 1.0 V V IB 100% 80% VI(A) 1.4V VI(B) 1.0V 0.0V 1.4 V V 0Y 0 V D i f f e r e n ti a l 1 .2 V C M V 0Z 1.0 V TPHL TPLH 20% 0% 80% 0 V D i f fe r e n t i a l 20% V 0Y - V 0Z tF A Generator B Figure 8. Differential Receiver to Driver Propagation Delay and Driver Transition Time[4,8,9] Y R D tF tR Figure 6. Test Circuit & Voltage Definitions for the Differential Output Signal[4,5,6] Pulse tR A RL Z Y 1.0 V or 1.2V B R D 1.2V 1.2V Z DE DE CL = 10pF 10 pF CL =10 pF 2.0V VI(A) 1.4V VI(B) 1.0V 1.4V DE 0.8V TPZH 1.4V 1.25V TPHZ V0Y or V0Z V0Y or V0Z Voc (pp) 1.2V TPZL 1.2V TPLZ 1.15V 1.0V VDD Voc (ss) Figure 7. Test Circuit & Voltage Definitions for the Driver Common-Mode Output Voltage[4,5,6,7] Figure 9. Test Circuit & Voltage Definitions for the Driver Common-Mode Output Voltage[4,8] Notes: 4. All input pulses are supplied by a frequency generator with the following characteristics: tR & tF ≤ 1nS; Pulse rep rate = 50 Mpps; Pulse width = 10±0.2 ns. 5. RL = 100 Ohm. 6. CL includes instrumentation and fixture capacitance within 6 mm of the DUT. 7. VOC measurement requires equipment with a 3-dB bandwidth of at least 300 MHz. 8. RL = 100 Ohm ±1%. 9. Point to Point: RL = 100 Ohm ±1% CL 3 pF. Document #: 38-07411 Rev. ** Page 8 of 12 CY2LL8422 Application Engineering CY2LL8422 Z O =50 RL=100 ohm Pulse 4 Generator CL = 10pF 2 locations 3 Current (ma) Z O =50 2 Vol - Io 1 0 -1 Figure 10. Termination Scheme for 100-Ohm External Termination 0 1 2 3 4 Voltage Figure 13. VOL vs. IOL ZO=50 100 ohm R e c e iv e r c h ip w ith 1 0 0 O h m o n c h ip te rm in a tio n Table 7. Technical Notes on STD Drive (LL842, A & D) vs. High Drive (LL843, B & C)[10] ZO=50 A CL CL Figure 11. Termination Scheme for 100-Ohm Self Termination Interface Chip Typical Characteristics (@VDD=3.3V/TA = 25°C) B C D Unit VOX 1.2 1.2 1.2 1.2 V DC Offset 1.0 1.0 1.0 1.0 V VOD Min 0.25 0.5 0.25 0.125 V VOD Max 0.45 0.9 0.45 0.225 V T/Rise 1.4 1.4 0.6 0.6 ns T/Fall 1.4 1.4 0.6 0.6 ns Note: 10. See Figure 14. CY2LL8422 Standard Drive Current drive of 1i Current (ma) 5 0 Voh - Ioh -5 +/i A 100 ohm Hi Drive Current drive of 2i +/2i B 100 ohm -10 -15 0 1 2 3 Voltage 4 +/i D 50 ohm 25 ohm +/2i C 50 ohm 25 ohm Figure 12. VOH vs. IOH Figure 14. Document #: 38-07411 Rev. ** Page 9 of 12 CY2LL8422 Ordering Information Part Number Package Type Product Flow CY2LL8422ZI 28-pin TSSOP Industrial, –40° to 85°C CY2LL8422ZIT 28-pin TSSOP -Tape and Reel Industrial, –40° to 85°C CY2LL8422ZC 28-pin TSSOP Commercial, 0°C to 70°C CY2LL8422ZCT 28-pin TSSOP -Tape and Reel Commercial, 0°C to 70°C CY2LL8422OI 28-pin SSOP Industrial, –40°to 85°C CY2LL8422OIT 28-pin SSOP -Tape and Reel Industrial, –40°Cto 85°C CY2LL8422OC 28-pin SSOP Commercial, 0°C to 70°C CY2LL8422OCT 28-pin SSOP -Tape and Reel Commercial, 0°C to 70°C Package Diagrams 28-Lead (5.3 mm) Shrunk Small Outline Package O28 51-85079-*C Document #: 38-07411 Rev. ** Page 10 of 12 CY2LL8422 Package Diagrams (continued) 28-Lead Thin Small Outline Package Type 1 (8x13.4 mm) Z28 51-85071-*G ComLink is a trademark of Cypress Semiconductor Corp. All product and company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-07411 Rev. ** Page 11 of 12 © Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.. CY2LL8422 Document Title: CY2LL8422 High Drive Dual 2-Channel LVDS Repeater/Mux Document #: 38-07411 REV. ECN NO. Issue Date Orig. of Change ** 116743 07/05/02 HWT Document #: 38-07411 Rev. ** Description of Change New Data Sheet Page 12 of 12