19-1951; Rev 0; 1/01 SOT23 Power-Supply Sequencers The MAX6819/MAX6820 include an internal voltage reference/comparator with externally adjustable thresholds to monitor the primary power supply. When the primary supply is below the desired threshold, an external secondary supply MOSFET switch is disabled. When the primary supply exceeds the threshold, an internal charge pump is activated and the external MOSFET switch is enabled to connect the secondary supply to the load. The charge pump fully enhances the N-channel MOSFET switch to provide a very low RDSON voltage drop. The devices can be connected to support various supply sequencing priorities such as VI/O before VCORE or VCORE before VI/O. The MAX6819 features a logic-driven EN input to enable/disable the external MOSFET drive and includes an internally fixed 200ms enable timeout period (V PRIMARY GOOD to V SECONDARY ENABLE ). The MAX6820 allows the enable timeout period to be adjusted with a single external capacitor. Both devices are specified over the automotive temperature range (-40°C to +125°C) and are available in space-saving 6-pin SOT23 packages. Features ♦ Adjustable Primary Supply Voltage Monitor (Monitors Down to 0.62V) ♦ Internal Charge Pump to Enhance External Secondary Supply N-Channel MOSFET Switch ♦ Delay from Primary Supply Good to Secondary Supply Enabled Factory Fixed 200ms (MAX6819) Capacitor Adjustable (MAX6820) ♦ Logic Driven ENABLE Input (MAX6819) ♦ Immune to Short Voltage Transients ♦ Few External Components ♦ -40°C to +125°C Operating Temperature Range ♦ Small 6-Pin SOT23 Package Ordering Information PART PINPACKAGE TEMP. RANGE TOP MARK MAX6819UT-T -40°C to +125°C 6 SOT23-6 AARF MAX6820UT-T* -40°C to +125°C 6 SOT23-6 AARG *Future product–contact factory for availablitly. Products must be ordered in 2,500 piece increments. Typical Operating Circuits PRIMARY SUPPLY (3.3V) SECONDARY SUPPLY (1.8V) VCC2 GATE DUAL-SUPPLY BOARD OR µP MAX6819 Applications VCC1 GND SETV EN ON Dual-Voltage Microprocessors OFF Multivoltage Systems Digital Signal Processors Power PC™ Series Processors Pin Configurations TOP VIEW Pin Configurations and Typical Operating Circuits continued at end of data sheet. VCC1 1 GND 2 Power PC is a trademark of IBM corp. MAX6819 SETV 3 6 VCC2 5 GATE 4 EN SOT23-6 ________________________________________________________________ Maxim Integrated Products 1 For price, delivery, and to place orders, please contact Maxim Distribution at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. MAX6819/MAX6820 General Description The MAX6819/MAX6820 are power-supply sequencers for dual-voltage microprocessors (µPs) and multivoltage systems. These devices monitor a primary supply voltage and enable/disable an external N-channel MOSFET switch for a secondary supply voltage. The MAX6819/MAX6820 control local component voltage sequencing when system power-on/power-off characteristics cannot be guaranteed (supplies come from a multivoltage system bus, silver box, or must be sequenced in different modes for components on the same board). These small power-supply sequencers improve system reliability. MAX6819/MAX6820 SOT23 Power-Supply Sequencers ABSOLUTE MAXIMUM RATINGS Referenced to GND VCC1, VCC2, EN .....................................................-0.3V to +6.0V SETV, SETD..................-0.3V to the higher of (VCC1 + 0.3V) and (VCC2 + 0.3V) GATE ...................................................................-0.3V to +12.0V Input Current/Output Current (all pins) ...............................20mA Continuous Power Dissipation (TA = +70°C) 6-Pin SOT23 (derate 8.7mW/°C above +70°C)............696mW Operating Temperature Range .........................-40°C to +125°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering 10s) ..................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC1 or VCC2 > +2.125V to +5.5V, TA = -40°C to +125°C, unless otherwise specified. Typical values are at TA = +25°C.) (Note 1) PARAMETER Operating Voltage Range VCC1, VCC2 Supply Current SYMBOL VCC1, VCC2 ICC VCC1, VCC2 Disable Mode Current VCC1, VCC2 Slew Rate Undervoltage Lockout (UVLO) SETV Threshold CONDITIONS (Note 2) TYP 0.9 VCC1 = VCC2 = +3.3V 60 VCC1 = VCC2 = +3.3V, EN = GND 20 (Note 3) VUVLO VTH MIN VSETV rising, enables GATE V 0.602 0.634 V 100 nA 280 ms 600 1.273 nA V SETV to GATE Delay tDELAY VSETV > VTH, VEN ≥ 2V (MAX6819) 140 200 SETD Ramp Current (MAX6820) ISETD VCC1 or V CC2 > +2.125V 400 SETD Voltage (MAX6820) VSETD VCC1 or VCC2 > +2.125V 1.210 500 1.242 VSETD falling CGATE = 1500pF, VCC2 = +3.3V, VGATE = +0.5V GATE Voltage EN Input Voltage VGATE VIL VIH 0.5 1.5 mV 10 4.5 With respect to VCC2 (Note 2) RGATE > 5MΩ to VCC2 4.0 5.5 ms µs 30 6.0 V 6.0 0.4 2.0 Note 1: 100% production tested at TA = +25°C. Specifications over temperature limit are guaranteed by design. Note 2: Either VCC1 or VCC2 must be > 2.125V. The other supply can go to 0. Note 3: Guaranteed by design, not production tested. 2 % -62 With respect to VCC2 (Note 2) RGATE > 50MΩ to VCC2 VCC1 or VCC2 > +2.125V to + 5.5V µA 0.618 -1 CGATE = 1500pF, VCC2 = +3.3V, VGATE = +7.8V µA V/s 10 tON 120 2.125 (Note 3) tOFF V 2.0 VSETV falling, disables GATE GATE Turn-Off Time 5.5 6 SETV Threshold Hysteresis GATE Turn-On Time UNITS 1.875 SETV Input Current SETD Threshold Hysteresis (MAX6820) MAX _______________________________________________________________________________________ V SOT23 Power-Supply Sequencers GATE TURN-ON TIME tDELAY vs. TEMPERATURE MAX6819 toc02 MAX6819 toc01 250 240 230 tDELAY (ms) 220 210 200 190 VGATE 5V/div 180 170 160 CLOAD = 1500pF (MAX6819) 150 -40 -20 0 20 40 60 80 100 120 1ms/div TEMPERATURE (°C) GATE TURN-OFF TIME VCC2 vs. VGATE MAX6819 toc03 MAX6819 toc04 12 10 8 VGATE (V) VSETV 500mV/div VGATE 5V/div VCC1 = +3.3V VSETV = 1V 6 4 2 CLOAD = 1500pF 0 20µs/div 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 VCC2 (V) VCC2 vs. VGATE VCC2 vs. VGATE 10 10 8 8 6 VCC1 = 0 VSETV = 1V VGATE (V) VGATE (V) MAX6819 toc06 12 MAX6819 toc05 12 4 4 2 2 0 VCC1 = +3.3V VSETV = VCC2 6 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 VCC2 (V) 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 VCC2 (V) _______________________________________________________________________________________ 3 MAX6819/MAX6820 Typical Operating Characteristics (TA = +25°C, unless otherwise noted.) Typical Operating Characteristics (continued) (TA = +25°C, unless otherwise noted.) SUPPLY CURRENT vs. TEMPERATURE VSETV vs. TEMPERATURE 0.63 0.62 0.61 108 106 ICC1 104 VEN = 2V VSETV = 2V VCC2 = +3.3V VCC1 = +5V 100 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 ICC2 vs. VCC2 ICC2 vs. VCC2 120 100 120 MAX6819 toc10 TEMPERATURE (°C) MAX6819 toc09 TEMPERATURE (°C) 140 140 120 100 ICC2 (µA) 100 80 80 60 60 VCC1 = 0 VEN = 2V VSETV = 2V 40 20 VCC1 = 3.3V VEN = 2V VSETV = 2V 40 20 0 0 0 1 2 3 VCC2 (V) 4 110 102 0.59 MAX6819 toc08 ICC2 0.60 -40 -20 VEN = 2V VSETV = 2V VCC1 = +3.3V VCC2 = +5V 112 SUPPLY CURRENT (µA) 0.64 VSETV (V) 114 MAX6819 toc07 0.65 ICC2 (µA) AMAX6819/MAX6820 SOT23 Power-Supply Sequencers 4 5 6 0 1 2 3 4 5 VCC2 (V) _______________________________________________________________________________________ 6 SOT23 Power-Supply Sequencers PIN FUNCTION NAME MAX6819 MAX6820 1 1 VCC1 Supply Voltage 1. Either VCC1 or VCC2 must be greater than the UVLO to enable external MOSFET drive. 2 2 GND Ground 3 3 SETV Sequence Threshold Set. Connect to an external resistor-divider network to set the VCC1 threshold that enables GATE turn-on. The internal reference is 0.618V. 4 — EN Active-High Enable. GATE drive is enabled tDELAY after EN is driven high. GATE drive is immediately disabled when EN is driven low. Connect to the higher of VCC1 and VCC2 if not used. — 4 SETD GATE Delay Set Input. Connect an external capacitor from SETD to GND to adjust the delay from SETV > VTH to GATE turn-on. tDELAY (s) = 2.484e6 x CSET (F). 5 5 GATE GATE Drive Output. GATE drives an external N-channel MOSFET to connect VCC2 to the load. GATE drive enables tDELAY after SETV exceeds VTH and ENABLE is driven high. GATE drive is immediately disabled when SETV drops below VTH or ENABLE is driven low. When enabled, an internal charge pump drives GATE to VCC2 + 5.5V to fully enhance the external N-channel MOSFET. 6 6 VCC2 Supply Voltage 2. Either VCC1 or VCC2 must be greater than the UVLO to enable external MOSFET drive. Detailed Description Many dual-supply processors or multivoltage boards require one power supply to rise to the proper operating voltage before another supply is applied. Improper sequencing can lead to chip latchup, incorrect device initiation, or long-term reliability degradation. If the various supply voltages are not locally generated (coming from a main system bus, an externally purchased silver box, or a nonsequenced power management chip), power-on and power-off sequencing can be difficult to control or predict. Supply loading can affect turnon/turn-off times from board to board. The MAX6819/MAX6820 provide proper local voltage sequencing in multisupply systems. The sequencers use an external N-channel MOSFET to switch the secondary supply to the load only when the primary supply is above a desired operating voltage threshold. The Nchannel MOSFET operates in a default off mode when the primary supply is below the desired threshold or if neither supply exceeds the sequencer’s UVLO level. When the primary supply voltage is above the set threshold, the external MOSFET is driven on. An internal charge pump fully enhances the external MOSFET by providing a gate-to-source voltage (VGS) of +5.5V (typ). The charge pump fully enhances the MOSFET to yield a low drain-to-source impedance (RDS(ON)) for VCC1 VCC2 VCC2 OUT GATE UVLO SEQUENCE DELAY/ LOGIC SETV GATE DRIVE CHARGE PUMP 0.62V GND ( ) FOR MAX6820 ONLY EN (SETD) Figure 1. Functional Diagram reduced switch voltage drop. The MOSFET is never driven on unless the sequencer can provide a minimum VGS enhancement, ensuring that the switch MOSFET never operates in its higher impedance linear range. Either supply may act as the primary source, regardless of the voltage level, provided that VCC1 or VCC2 is greater than 2.125V (Figure 1 and Figure 2). _______________________________________________________________________________________ 5 MAX6819/MAX6820 Pin Description MAX6819/MAX6820 SOT23 Power-Supply Sequencers Applications Information Adjusting tDELAY The MAX6820 features a capacitor adjustable sequence delay. The adjustable delay provides power sequencing for a wide range of devices with different power-supply delay requirements. Connect a capacitor (CSET) between SETD and GND to adjust the delay time (Figure 2). Calculate the sequence delay time as follows: tDELAY (s) = 2.484e6 x CSET Setting Threshold Voltage VTH The threshold voltage is the minimum VCC1 voltage at which VCC2 turn-on is acceptable. To monitor voltages higher than the threshold voltage, connect external resistors as a voltage-divider to SETV, and calculate VTH as follows: R1 = R2 (VTH / VTRIP - 1) Where VTH is the desired threshold voltage and VTRIP = 0.618V (Figure 2). Since SETV input current is 10nA (typ), high value resistors can be used. Gate Drive Characteristics The MAX6819/MAX6820 internal charge pump drives the N-channel MOSFET with a gate-to-source voltage (V GS ) of 5.5V, ensuring low MOSFET on-resistance RDS(ON). The charge pump drives the high-impedance capacitive load of a MOSFET gate input. Loading the GATE output resistively adds load current and reduces gate drive capability. The internal charge pump does not require external capacitors. The external pass MOSFET is disabled, and charge pump circuitry is turned off when neither VCC1 nor VCC2 are above the 1.875V UVLO or EN is low. Logic Driven Supply Sequencing The MAX6819 offers a logic-compatible enable input (EN) that allows digital devices to control sequencing. When the TTL/CMOS-compatible EN input is logic low, the GATE output is low. When the EN input is logic high (and SETV is above the monitor threshold), the GATE output is enabled after an internally fixed 200ms delay. For a logic controlled sequencer when voltage monitoring is not desired, connect SETV to VCC1 or VCC2 > 0.62V. Sequencing Three or More Supplies VCC1 R1 MAX6820 SETV R2 SETD CSET Figure 2. tDELAY (MAX6820 ONLY) and VTH Adjust Selecting the Pass MOSFET The external pass MOSFET is connected in series with the sequenced power-supply source. Since the load current and the MOSFET drain-to-source impedance (RDS) determine the voltage drop, the on characteristics of the MOSFET affect the load supply accuracy. The MAX6819/MAX6820 fully enhance the external MOSFET out of its linear range to ensure the lowest drain-tosource on impedance. For highest supply accuracy/ lowest voltage drop, select a MOSFET with an appropriate drain-to-source on impedance for a gate-to-source bias of 4.5V to 6.0V. 6 Cascade multiple MAX6819/MAX6820 to sequence more than two supplies. Daisy-chaining devices allows one sequencer to monitor the passed voltage of an upstream sequencer through the SETV comparator inputs. EN allows any sequencer to be shut down independent of the SETV levels. Figure 4 shows an example of a three-supply system in which the first supply must come up before the second supply and the third supply must yield for both supplies. Negative-Going Voltage Transient Immunity The MAX6819/MAX6820 power-supply voltage sequencers are relatively immune to short-duration (pulse width), negative-going voltage transients (Figure 4.) However, the amplitude of the transient is inversely proportional to its pulse width. Chip Information TRANSISTOR COUNT: 638 PROCESS: BiCMOS _______________________________________________________________________________________ SOT23 Power-Supply Sequencers MAX6819/MAX6820 VEN/VSETV 50% O tON VCC2 + 5.5V 90% GATE 10% O tOFF tDELAY 10% Figure 3. Timing Diagram 5(V) PRIMARY VOLTAGE SUPPLY 3.3(V) SECONDARY VOLTAGE SUPPLY 1.8(V) THIRD VOLTAGE SUPPLY VCC2 GATE VCC2 MAX6819 MAX6820 GND VCC1 R1 GATE MAX6819 MAX6820 GND VCC1 MULTISUPPLY BOARD OR µP R3 SETV R2 SETD/EN SETV SETD/EN R4 Figure 4. Sequencing Three Power Supplies VSETV 2V/div VGATE 5V/div 0 10µs/div Figure 5. Transient Immunity _______________________________________________________________________________________ 7 Typical Operating Circuits (continued) PRIMARY SUPPLY (1.8V) Pin Configurations (continued) VCC1 1 6 VCC2 5 GATE 4 SETD DC/DC SECONDARY SUPPLY (3.3V) GND 2 VCC2 MAX6820 GATE MAX6820 VCC1 GND SETV SETD DUAL-SUPPLY BOARD OR µP SETV 3 SOT23-6 R1 R2 Package Information 6LSOT.EPS MAX6819/MAX6820 SOT23 Power-Supply Sequencers Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 8 _____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2001 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.