AN617 Fixed Point Routines Author: Frank J. Testa FJT Consulting FIXED POINT ARITHMETIC Unsigned fixed point binary numbers, A, can be represented in the form INTRODUCTION This application note presents an implementation of the following fixed point math routines for the PICmicro microcontroller families: • Multiplication • Division Routines for the PICmicro microcontroller families are provided in a variety of fixed point formats, including both unsigned and signed two’s complement arithmetic. nÐ1 A = ∑ a( k) ⋅ 2 k=0 nÐ1 kÐr = 2 Ðr ∑ a ( k ) ⋅ 2, k k=0 where n is the number of bits, a(k) is the kth bit with a(0) = LSb, and r indicates the location of the radix point. For example, in the case where A is an integer, r = 0 and when A is a fraction less than one, r = n. The value of r only affects the interpretation of the numbers in a fixed point calculation, with the actual binary representation of the numbers independent of the value of r. Factoring out of the above sum, it simply locates the radix point of the representation and is analogous to an exponent in a floating point system. Using the notation Qi.j to denote a fixed point binary number with i bits to the left of the radix point and j to the right, the above n-bit format is in Qn-r.r. With care, fixed point calculations can be performed on operands in different Q formats. Although the radix point must be aligned for addition or subtraction, multiplication provides an illustrative example of the simple interpretive nature of r. Consider the unsigned product of a Q20.4 number with a Q8.8. After calling the appropriate unsigned 24x16 bit multiply for these fixed point arguments, the 40-bit fixed point result is in Q28.12, where the arguments of the Q notation are summed respectively. Similar arguments can be made for two’s complement arithmetic, where the negative representation of a positive number is obtained by reversing the value of each bit and incrementing the result by one. Producing a unique representation of zero, and covering the range -2n-1 to 2n-1 - 1, this is more easily applied in addition and subtraction operations and is therefore the most commonly used method of representing positive and negative numbers in fixed point arithmetic. The above analysis in Q notation can be employed to build dedicated fixed point algorithms, leading to improved performance over floating point methods in cases where the size of the arguments required for the range and precision of the calculations is not large enough to destroy gains made by fixed point methods. 1996 Microchip Technology Inc. DS00617B-page 1 AN617 FIXED POINT FORMATS reduced by one bit to accommodate the case of operations on signed numbers, with arguments known to be nonnegative, thereby, resulting in some performance improvement. The fixed point library routines supports 8-,16-, 24- and 32-bit formats in the combinations shown in Table 1. These general format combinations are implemented in both signed and unsigned versions. Additional unsigned routines are implemented with arguments TABLE 1: FIXED POINT LIBRARY ROUTINE SUMMARY TABLE Division Library Names Format Multiplication Library Names Format FXD0808S, FXD0808U, FXD0807U, FXD0707U 8/8 FXM0808S, FXM0808U, FXM0807U 8x8 FXD1608S, FXD1608U, FXD1607U, FXD1507U 16/8 FXM1608S, FXM1608U, FXM1607U, FXM1507U 16x8 FXD1616S, FXD1616U, FXD1515U 16/16 FXM1616S, FXM1616U, FXM1515U 16x16 FXD2416S, FXD2416U, FXD2315U 24/16 FXM2416S, FXM2416U, FXM2315U 24x16 FXD2424S, FXD2424U, FXD2323U 24/24 FXM2424S, FXM2424U, FXM2323U 24x24 FXD3216S, FXD3216U, FXD3115U 32/16 FXM3216S, FXM3216U, FXM3115U 32x16 FXD3224S, FXD3224U, FXD3123U 32/24 FXM3224S, FXM3224U, FXM3123U 32x24 FXD3232S, FXD3232U, FXD3131U 32/32 FXM3232S, FXM3232U, FXM3131U 32x32 PIC16C5X/PIC16CXXX Routines PIC17CXXX Functions FXD0808S, FXD0808U, FXD0807U, FXD0707U 8/8 FXM0808S, FXM0808U 8x8 FXD1608S, FXD1608U, FXD1607U, FXD1507U 16/8 FXM1608S, FXM1608U 16x8 FXD1616S, FXD1616U, FXD1615U, FXD1515U 16/16 FXM1616S, FXM1616U 16x16 FXD2416S, FXD2416U, FXD2415U, FXD2315U 24/16 FXM2416S, FXM2416U 24x16 FXD2424S, FXD2424U, FXD2423U, FXD2323U 24/24 FXM2424S, FXM2424U 24x24 FXD3216S, FXD3216U, FXD3215U, FXD3115U 32/16 FXM3216S, FXM3216U 32x16 FXD3224S, FXD3224U, FXD3223U, FXD3123U 32/24 FXM3224S, FXM3224U 32x24 FXD3232S, FXD3232U, FXD3231U, FXD3131U 32/32 FXM3232S, FXM3232U 32x32 Note: U - unsigned math operation, S - signed math operation DS00617B-page 2 1996 Microchip Technology Inc. AN617 DATA RAM REQUIREMENTS Table 2 shows the contiguous data RAM locations that are used by the library. TABLE 2: AARGB7 AARGB6 AARGB5 AARGB4 AARGB3 AARGB2 AARGB1 AARGB0 AEXP SIGN FPFLAGS BARGB3 BARGB2 BARGB1 BARGB0 BEXP TEMPB3 TEMPB2 TEMPB1 TEMPB0 DATA RAM REQUIREMENTS = = = = REMB3 REMB2 REMB1 REMB0 remainder MSB AARG MSB AARG exponent sign exception flags and option bits BARG MSB BARG exponent temporary storage These definitions are identical with those used by the IEEE 754 compliant floating point library[5], AN575. USAGE Multiplication assumes the multiplicand in AARG, multiplier in BARG, and produces the result in AARG. Division assumes a dividend in AARG, divisor in BARG, and quotient in AARG with remainder in REM. EXAMPLE 1: ADD ADDITION/SUBTRACTION Because of the generally trivial nature of addition and subtraction, the call and return overhead outweighs the need for explicit routines and so they are not included in the library. However, the PIC16C5X/PIC16CXXX families do not have an add with carry or subtract with borrow instruction, leading to subtleties regarding production of a correct carry-out in a multiple byte add or subtract. In the case of a two byte add or subtract, the most elegant solution to these difficulties, requiring 6 cycles, appears to be given by the following code in Example 1. 1996 Microchip Technology Inc. SUB TWO BYTE ADDITION/SUBTRACTION ROUTINES MOVF ADDWF AARGB1,W BARGB1 MOVF BTFSC INCFSZ ADDWF AARGB0,W _C AARGB0,W BARGB0 MOVF SUBWF AARGB1,W BARGB1 MOVF BTFSS INCFSZ SUBWF AARGB0,W _C AARGB0,W BARGB0 The four instructions after the initial add/subtract, can be easily concatenated for operations involving more than two bytes. Because addition and subtraction are required in standard algorithms for multiplication and division, these issues permeate the implementation of both fixed and floating point algorithms for the PIC16C5X/PIC16CXXX families. DS00617B-page 3 AN617 MULTIPLICATION The existing library of fixed point math routines for the PICmicro families of microcontrollers contains multiplication routines in the following format combinations: ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ 8x8 16x8 16x16 24x16 24x24 32x16 32x24 32x32 The fixed point multiply routine FXMxxyy, takes an xx-bit multiplicand in AARG, a yy-bit multiplier in BARG and returns the (xx+yy)-bit product in AARG. For the PIC17 family, both unsigned and signed algorithms use extended precision application of the 8x8 hardware multiply currently available. The essence of an extended precision interpretation is to view each argument as a concatenation of bytes of different orders of magnitude and evaluate the product by evaluating all 8x8 terms in the algebraic expansion. For example, the 24x16 multiply yields a 40-bit product and contains 6 individual 8x8 terms in its expansion. (AARGB0⋅216+AARGB1⋅28+AARGB2⋅20) ⋅ (BARGB0⋅28+BARGB1⋅20) = AARGB0⋅BARGB0⋅224 + (AARGB0⋅BARGB1+AARGB1⋅BARGB0)⋅216 + (AARGB1⋅BARGB1+AARGB2⋅BARGB0)⋅28 + AARGB2⋅BARGB1⋅20 The signed fixed point multiply routines require proper handling of the fact that the 8x8 hardware multiply is unsigned. It can be proven (see Appendix C) that the product of signed numbers in two’s complement representation can be obtained by computing their product as if they were unsigned and for each negative argument, subtract the opposite argument from the most significant bits of the product. In most cases, the optimal algorithm is to simply apply this at the end of the corresponding unsigned method to achieve the signed product. The implementation for the PIC16CXXX family uses a standard sequential add-shift algorithm, negating both factors if BARG < 0, to produce the positive multiplier required by the method. Analogous to simple longhand binary multiplication, the multiplier bits are sequentially tested, with one indicating an add-shift and zero simply a shift. The shift is required to align the partial product for the next possible add[1]. Two examples are shown in Example 2. EXAMPLE 2: MULTIPLICATION EXAMPLES FXM2416S(0xC11682,0x608B) = FXM2416S(-4123006,24715) = 0xE84647F896 = -101900093290 FXM1616U(0x0458,0x822C) = FXM1616U(1112,33324) = 0x02356F20 = 37056288 This is completely analogous to arithmetic in base 28 = 256, where the respective digit products must be aligned according to their orders of magnitude before summation. It is important to note that no carryout beyond the sum of the lengths of the arguments can occur[1]. This fact is helpful in constructing algorithms for cases with a large number of terms. For example, the 32x16 case containing 8 individual 8x8 terms, can be viewed as a 24x16 product between the 3 least significant bytes of AARG with BARG, producing no carryout, followed by augmentation with the remaining two terms. This philosophy has been applied in optimizing the unsigned algorithms, using the shorter products as building blocks for the larger ones. DS00617B-page 4 1996 Microchip Technology Inc. AN617 Table 3 shows PIC17CXXX Fixed Point multiplication performance data. The listed routines can be found in Appendix F. TABLE 3: PIC17CXXX FIXED POINT MULTIPLY PERFORMANCE DATA Routine Max Cycles Min Cycles Average Cycles Program Memory Data Memory FXM0808S 14 14 14 10 3 FXM0808U 9 9 9 5 3 FXM1608S 24 21 23 20 4 FXM1608U 15 15 15 11 4 FXM1616S 42 34 38 38 8 FXM1616U 29 29 29 25 7 FXM2416S 59 49 54 55 10 FXM2416U 43 43 43 39 8 FXM2424S 84 72 78 80 12 FXM2424U 68 68 68 64 12 FXM3216S 76 64 70 72 12 FXM3216U 57 57 57 53 9 FXM3224S 111 97 104 107 15 FXM3224U 93 93 93 89 15 FXM3232S 148 132 140 144 18 FXM3232U 128 128 128 124 18 1996 Microchip Technology Inc. DS00617B-page 5 AN617 Table 4 shows the PIC16C5X/PIC16CXXX Fixed Point Multiply performance data. The listed routines can be found in Appendix D. TABLE 4: PIC16C5X/PIC16CXXX FIXED POINT MULTIPLY PERFORMANCE DATA Routine Max Cycles Min Cycles Average Cycles Program Memory Data Memory FXM0808S FXM0808U 91 9 85 33 5 76 57 74 21 4 FXM0707U 70 51 67 23 4 FXM1608S 110 11 85 44 7 FXM1608U 129 61 105 31 7 FXM1507U 86 27 64 35 7 FXM1616S 284 11 235 74 9 FXM1616U 259 110 214 58 9 FXM1515U 247 105 205 63 9 FXM2416S 353 132 281 92 12 FXM2416U 328 113 260 70 12 FXM2315U 321 108 248 76 12 FXM2424S 533 241 432 126 13 FXM2424U 497 258 401 98 13 FXM2323U 481 230 390 107 13 FXM3216S 440 48 327 98 9 FXM3216U 415 116 304 84 9 FXM3115U 395 111 291 91 9 FXM3224S 656 253 502 152 15 FXM3224U 620 201 470 151 15 FXM3123U 587 255 457 129 15 FXM3232S 841 411 686 189 17 FXM3232U 794 443 645 168 17 FXM3131U 787 392 631 168 17 DS00617B-page 6 1996 Microchip Technology Inc. AN617 DIVISION The fixed point divide routine FXPDxxyy, takes an xx-bit dividend in AARG, a yy-bit divisor in BARG and returns the xx-bit quotient in AARG and yy-bit remainder in REM. Unlike multiplication, division is not deterministic, requiring a trial-and-error sequential shift and subtract process. Binary division is less complicated than decimal division because the possible quotient digits are only zero or one. If the divisor is less than the partial remainder, the corresponding quotient bit is set to one followed by a shift and subtract. Otherwise, the divisor is greater than the partial remainder, the quotient bit is set to zero and only a shift is performed. The intermediate partial remainder may be restored at each stage as in restoring division, or corrected at the end as in nonrestoring division. Implementation dependent trade-offs between worst case versus average performance affect the choice between these two approaches, and therefore, macros for each method are provided. Note: A test for divide by zero exception is not performed and must be explicitly provided by the user. The results of the division process for AARG/BARG, satisfy the relation AARG = BARG ⋅ QUOTIENT + REMAINDER, where the remainder has the same sign as the quotient, and represents the fraction of the result in units of the denominator BARG. Some simple examples are given in Example 3. EXAMPLE 3: DIVISION EXAMPLES FXD1608S(0xC116,0x60) = 0xFF59, 0xB6 FXD1616U(0x9543,0x4AA1) = 0x0002, 0x0001 1996 Microchip Technology Inc. DS00617B-page 7 AN617 Table 5 shows the PIC17CXXX Fixed Point Divide performance data. The listed routines can be found in Appendix G TABLE 5: PIC17CXXX FIXED POINT DIVIDE PERFORMANCE DATA Routine Max Cycles Min Cycles Average Cycles Program Memory Data Memory FXD0808S 91 85 89 77 4 FXD0808U 78 74 77 74 3 FXD0807U 69 69 69 65 3 FXD0707U 64 64 64 60 3 FXD1608S 162 44 156 146 5 FXD1608U 196 170 183 195 4 FXD1607U 133 133 133 129 4 FXD1507U 128 128 128 124 4 FXD1616S 219 200 211 241 7 FXD1616U 247 227 244 243 6 FXD1615U 188 182 184 216 6 FXD1515U 182 177 179 218 6 FXD2416S 315 291 305 353 8 FXD2416U 352 342 347 453 8 FXD2415U 283 272 277 339 8 FXD2315U 275 266 270 330 8 FXD2424S 387 361 377 482 10 FXD2424U 422 415 419 577 10 FXD2423U 352 344 347 460 9 FXD2323U 344 337 341 448 9 FXD3216S 415 382 400 476 9 FXD3216U 468 459 463 608 9 FXD3215U 375 363 369 451 8 FXD3115U 368 357 362 442 8 FXD3224S 514 477 496 639 11 FXD3224U 566 553 560 769 11 FXD3223U 476 459 465 612 10 FXD3123U 466 451 457 600 10 FXD3232S 610 572 593 800 13 FXD3232U 665 650 655 930 13 FXD3231U 567 555 560 773 12 FXD3131U 558 547 552 758 12 DS00617B-page 8 1996 Microchip Technology Inc. AN617 Table 6 shows the PIC16C5X/PIC16CXXX Fixed Point Divide performance data. The listed routines can be found in Appendix E. TABLE 6: PIC16C5X/PIC16CXXX FIXED POINT DIVIDE PERFORMANCE DATA Routine Max Cycles Min Cycles Average Cycles Program Memory Data Memory FXD0808S 131 36 109 41 5 FXD0808U 103 95 102 15 4 FXD0807U 91 91 91 21 4 FXD0707U 83 83 83 44 4 FXD1608S 181 49 159 67 6 FXD1608U 297 237 269 41 7 FXD1607U 177 177 177 41 5 FXD1507U 169 169 169 44 5 FXD1616S 334 302 315 74 8 FXD1616U 376 316 371 27 7 FXD1515U 292 277 280 45 7 FXD2416S 447 408 427 140 8 FXD2416U 524 504 510 172 8 FXD2315U 402 382 388 120 7 FXD2424S 570 528 549 253 12 FXD2424U 641 624 630 226 13 FXD2323U 520 502 508 211 12 FXD3216S 584 67 561 201 10 FXD3216U 694 671 680 243 9 FXD3115U 534 509 518 160 9 FXD3224S 747 695 722 280 11 FXD3224U 853 830 838 299 11 FXD3123U 692 668 676 232 10 FXD3232S 909 855 885 357 13 FXD3232U 1012 990 998 364 13 FXD3131U 851 828 836 304 13 REFERENCES 1. 2. 3. 4. 5. Cavanagh, J.J.F., “Digital Computer Arithmetic,” McGraw-Hill,1984. Hwang, K., “Computer Arithmetic,” John Wiley & Sons, 1979. Scott, N.R., “Computer Number Systems & Arithmetic,” Prentice Hall, 1985. Knuth, D.E., “The Art of Computer Programming, Volume 2,” Addison-Wesley, 1981. F.J.Testa, “IEEE 754 Compliant Floating Point Routines,” AN575, Embedded Control Handbook, Microchip Technology Inc., 1995. 1996 Microchip Technology Inc. DS00617B-page 9 AN617 APPENDIX A: ALGORITHMS A.2 Several algorithms for decimal to binary conversion are given below. The integer and fractional conversion algorithms are useful in both native assembly as well as high level languages. Given a fraction F, where d(k) are the bit values of its n bit binary representation with d(1) = MSB, A.1 Fractional conversion algorithm[3]: n F = Integer conversion algorithm[3]: ∑ d( k) ⋅ 2 Ðk k=1 Given an integer I, where d(k) are the bit values of its n- bit binary representation with d(0) = LSB, F(k) = F nÐ1 I = ∑ d( k) ⋅ 2 k=0 k k=0 while k <= n d(k) = F(k)⋅ 2 F(k+1) = fractional part of F(k) ⋅ 2 k=0 I(k) = I k = k + 1 endw while I(k) = ! 0 d(k) = remainder of I(k)/2 I(k+1) = I(k)/2 k = k + 1 endw where denotes the greatest integer function (or ceiling function). DS00617B-page 10 1996 Microchip Technology Inc. AN617 APPENDIX B: FLOWCHARTS FIGURE B-1: MULTIPLICATION FLOWCHART FOR PIC16CXX FXMxxU FXMxxS i=0 clear high order partial product i=0 clear high order partial product multiplier bit i = 1? Yes multiplier < 0? No No add multiplicand to high order partial product multiplier bit i = 1? right shift partial product i=i+1 No Yes negate multiplier and multiplicand save sign of result Yes add multiplicand to high order partial product Yes i < n? right shift partial product with sign extension i=i+1 No Return and indicate no error Yes i < n - 1? No Return and indicate no error 1996 Microchip Technology Inc. DS00617B-page 11 AN617 FIGURE B-2: MULTIPLICATION FLOWCHART FOR PIC17CXXX FXMxxU FXMxxS Compute, add aligned byte products of AARG * BARG Compute, add aligned byte products of AARG * BARG Return and indicate no error AARG < 0? No Yes subtract BARG from most significant bytes of product Yes BARG < 0? No subtract AARG from most significant bytes of product Return and indicate no error DS00617B-page 12 1996 Microchip Technology Inc. AN617 FIGURE B-3: DIVISION FLOWCHART FXDxxU FXDxxS A i=0 clear remainder partial quotient = dividend compute sign of quotient left shift (remainder, quotient) subtract divisor from partial remainder Yes No divisor < 0? i < n? No Yes negate divisor Return and indicate no error Yes result > 0? left shift (remainder, quotient) No dividend < 0? subtract division from partial remainder partial quotient LSb = 1 Yes No negate dividend restore partial quotient, LSb = 0 Yes result > 0? No restore partial quotient, LSb = 0 restore partial quotient, LSb = 0 i=0 clear remainder partial quotient = dividend Yes i < n - 1? A No Return and indicate no error 1996 Microchip Technology Inc. DS00617B-page 13 AN617 APPENDIX C: Consider arguments to a two’s complement multiply expressed in the form A = Ð am Ð 1 2 + Au , where Au ≡ m n B = Ð bn Ð 1 2 + Bu mÐ1 ∑ nÐ1 ai 2 i Bu ≡ , i=0 with being the unsigned product of the two’s complement representations and the correction term c given by i i=0 ⋅B = p′ ≡ A u ⋅ B u p = A Then ∑ bi 2 p′ + c c ≡ am Ð 1 bn Ð 1 2 m+n m n Ð am Ð 1 Bu 2 + bn Ð 1 Au 2 } Case 1: am Ð 1 = bn Ð 1 = 1 For this case with both arguments negative we obtain where m n Ð Bu 2 + Au 2 } nÐ1 n 2 ≤ Bu < 2 and 2 yielding the bounds 2 ≤ Bu 2 + Au 2 < 2 m n Bu 2 + Au 2 The bounded quantity can then be expressed in the form Tu < 2 m+n c = 2 mÐ1 m+n ≤ Au < 2 m+n m m m n Bu 2 + Au 2 ≡ 2 n m+n where is the result of truncating the above bounded quantity to m+n bits. This gives the final value for the correction term in the form c = ÐT u where the 2 term has been cancelled by the carry during the evaluation of Bu 2 + Au 2 leading to the result p = p′ + c = p′ Ð Tu m+n+1 + Tu . , m+n m n Case 2: am Ð 1 The case with one or both arguments positive gives the simpler result DS00617B-page 14 = 0 m n c = Ð a m Ð 1 Bu 2 + bn Ð 1 Au 2 } where and therefore a carry out is not possible. ⋅ bn Ð 1 c <2 m+n 1996 Microchip Technology Inc. AN617 Please check the Microchip BBS for the latest version of the source code. For BBS access information, see Section 6, Microchip Bulletin Board Service information, page 6-3. APPENDIX D: MULTIPLY ROUTINES FOR THE PIC16C5X/PIC16CXXX Table of Contents for Appendix D D.1 32x32 PIC16C5X/PIC16CXXX Fixed Point Multiply Routines ........................................................................ 15 D.2 32x24 PIC16C5X/PIC16CXXX Fixed Point Multiply Routines ........................................................................ 37 D.3 32x16 PIC16C5X/PIC16CXXX Fixed Point Multiply Routines ........................................................................ 55 D.4 24x24 PIC16C5X/PIC16CXXX Fixed Point Multiply Routines ........................................................................ 69 D.5 24x16 PIC16C5X/PIC16CXXX Fixed Point Multiply Routines ........................................................................ 85 D.6 16x16 PIC16C5X/PIC16CXXX Fixed Point Multiply Routines ........................................................................ 97 D.7 16x8 PIC16C5X/PIC16CXXX Fixed Point Multiply Routines ........................................................................ 108 D.8 8x8 PIC16C5X/PIC16CXXX Fixed Point Multiply Routines .......................................................................... 116 D.1 32x32 PIC16C5X/PIC16CXXX Fixed Point Multiply Routines ; RCS Header $Id: fxm22.a16 2.3 1996/10/16 14:23:23 F.J.Testa Exp $ ; $Revision: 2.3 $ ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 32x32 PIC16 FIXED POINT MULTIPLY ROUTINES Input: fixed point arguments in AARG and BARG Output: product AARGxBARG in AARG All timings are worst case cycle counts It is useful to note that the additional unsigned routines requiring a non-power of two argument can be called in a signed multiply application where it is known that the respective argument is nonnegative, thereby offering some improvement in performance. Routine Clocks Function FXM3232S 889 32x32 -> 64 bit signed fixed point multiply FXM3232U 856 32x32 -> 64 bit unsigned fixed point multiply FXM3131U 836 31x31 -> 62 bit unsigned fixed point multiply The above timings are based on the looped macros. If space permits, approximately 128-168 clocks can be saved by using the unrolled macros. ;********************************************************************************************** ;********************************************************************************************** ; 32x32 Bit Multiplication Macros SMUL3232L macro ; Max Timing: 2+13+6*26+25+2+7*27+26+2+7*28+27+2+6*29+28+9 = 851 clks ; Min Timing: 2+7*6+5+1+7*6+5+1+7*6+5+2+6*6+5+6 = 192 clks ; PM: 31+25+2+26+2+27+2+28+9 = 152 MOVLW MOVWF 0x8 LOOPCOUNT RRF BTFSC BARGB3, F _C DM: 17 LOOPSM3232A 1997 Microchip Technology Inc. DS00617B-page 15 AN617 GOTO DECFSZ GOTO ALSM3232NA LOOPCOUNT, F LOOPSM3232A MOVWF LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB2, F _C BLSM3232NA LOOPCOUNT, F LOOPSM3232B MOVWF LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB1, F _C CLSM3232NA LOOPCOUNT, F LOOPSM3232C MOVLW MOVWF 0x7 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB0, F _C DLSM3232NA LOOPCOUNT, F LOOPSM3232D CLRF CLRF CLRF CLRF RETLW AARGB0 AARGB1 AARGB2 AARGB3 0x00 RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB3, F _C ALSM3232NA TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RLF RRF RRF RRF RRF RRF DECFSZ GOTO SIGN,W AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F LOOPCOUNT, F ALOOPSM3232 LOOPSM3232B LOOPSM3232C LOOPSM3232D ALOOPSM3232 ALSM3232NA DS00617B-page 16 1997 Microchip Technology Inc. AN617 MOVLW MOVWF 0x8 LOOPCOUNT RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB2, F _C BLSM3232NA TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RLF RRF RRF RRF RRF RRF RRF DECFSZ GOTO SIGN,W AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F LOOPCOUNT, F BLOOPSM3232 MOVLW MOVWF 0x8 LOOPCOUNT RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB1, F _C CLSM3232NA TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RLF RRF RRF RRF RRF RRF RRF RRF DECFSZ GOTO SIGN,W AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F AARGB6, F LOOPCOUNT, F CLOOPSM3232 MOVLW 0x7 BLOOPSM3232 BLSM3232NA CLOOPSM3232 CLSM3232NA 1997 Microchip Technology Inc. DS00617B-page 17 AN617 MOVWF LOOPCOUNT RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB0, F _C DLSM3232NA TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RLF RRF RRF RRF RRF RRF RRF RRF RRF DECFSZ GOTO SIGN,W AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F AARGB6, F AARGB7, F LOOPCOUNT, F DLOOPSM3232 RLF RRF RRF RRF RRF RRF RRF RRF RRF SIGN,W AARGB0, AARGB1, AARGB2, AARGB3, AARGB4, AARGB5, AARGB6, AARGB7, DLOOPSM3232 DLSM3232NA F F F F F F F F endm UMUL3232L macro ; Max Timing: 2+15+6*25+24+2+7*26+25+2+7*27+26+2+7*28+27 = 842 clks ; Min Timing: 2+7*6+5+1+7*6+5+1+7*6+5+1+7*6+5+6 = 197 clks ; PM: 38+24+2+25+2+26+2+27+9 = 155 MOVLW MOVWF 0x08 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB3, F _C ALUM3232NAP LOOPCOUNT, F LOOPUM3232A MOVWF LOOPCOUNT DM: 17 LOOPUM3232A DS00617B-page 18 1997 Microchip Technology Inc. AN617 LOOPUM3232B RRF BTFSC GOTO DECFSZ GOTO BARGB2, F _C BLUM3232NAP LOOPCOUNT, F LOOPUM3232B MOVWF LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB1, F _C CLUM3232NAP LOOPCOUNT, F LOOPUM3232C MOVWF LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB0, F _C DLUM3232NAP LOOPCOUNT, F LOOPUM3232D CLRF CLRF CLRF CLRF RETLW AARGB0 AARGB1 AARGB2 AARGB3 0x00 ALUM3232NAP BCF GOTO _C ALUM3232NA BLUM3232NAP BCF GOTO _C BLUM3232NA CLUM3232NAP BCF GOTO _C CLUM3232NA DLUM3232NAP BCF GOTO _C DLUM3232NA RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB3, F _C ALUM3232NA TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF AARGB0, F AARGB1, F AARGB2, F LOOPUM3232C LOOPUM3232D ALOOPUM3232 ALUM3232NA 1997 Microchip Technology Inc. DS00617B-page 19 AN617 RRF RRF DECFSZ GOTO AARGB3, F AARGB4, F LOOPCOUNT, F ALOOPUM3232 MOVLW MOVWF 0x08 LOOPCOUNT RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB2, F _C BLUM3232NA TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF RRF RRF RRF DECFSZ GOTO AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F LOOPCOUNT, F BLOOPUM3232 MOVLW MOVWF 0x08 LOOPCOUNT RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB1, F _C CLUM3232NA TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF RRF RRF RRF AARGB0, AARGB1, AARGB2, AARGB3, AARGB4, AARGB5, BLOOPUM3232 BLUM3232NA CLOOPUM3232 CLUM3232NA DS00617B-page 20 F F F F F F 1997 Microchip Technology Inc. AN617 RRF DECFSZ GOTO AARGB6, F LOOPCOUNT, F CLOOPUM3232 MOVLW MOVWF 0x08 LOOPCOUNT RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB0, F _C DLUM3232NA TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF RRF RRF RRF RRF RRF DECFSZ GOTO AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F AARGB6, F AARGB7, F LOOPCOUNT, F DLOOPUM3232 DLOOPUM3232 DLUM3232NA endm UMUL3131L macro ; Max Timing: 2+15+6*25+24+2+7*26+25+2+7*27+26+2+6*28+27+8 = 822 clks ; Min Timing: 2+7*6+5+1+7*6+5+1+7*6+5+2+6*6+5+6 = 192 clks ; PM: 39+24+2+25+2+26+2+27+8 = 155 MOVLW MOVWF 0x8 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB3, F _C ALUM3131NAP LOOPCOUNT, F LOOPUM3131A MOVWF LOOPCOUNT RRF BTFSC GOTO BARGB2, F _C BLUM3131NAP DM: 17 LOOPUM3131A LOOPUM3131B 1997 Microchip Technology Inc. DS00617B-page 21 AN617 DECFSZ GOTO LOOPCOUNT, F LOOPUM3131B MOVWF LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB1, F _C CLUM3131NAP LOOPCOUNT, F LOOPUM3131C MOVLW MOVWF 0x7 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB0, F _C DLUM3131NAP LOOPCOUNT, F LOOPUM3131D CLRF CLRF CLRF CLRF RETLW AARGB0 AARGB1 AARGB2 AARGB3 0x00 ALUM3131NAP BCF GOTO _C ALUM3131NA BLUM3131NAP BCF GOTO _C BLUM3131NA CLUM3131NAP BCF GOTO _C CLUM3131NA DLUM3131NAP BCF GOTO _C DLUM3131NA RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB3, F _C ALUM3131NA TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF RRF RRF DECFSZ AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F LOOPCOUNT, F LOOPUM3131C LOOPUM3131D ALOOPUM3131 ALUM3131NA DS00617B-page 22 1997 Microchip Technology Inc. AN617 GOTO ALOOPUM3131 MOVLW MOVWF 0x08 LOOPCOUNT RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB2, F _C BLUM3131NA TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF RRF RRF RRF DECFSZ GOTO AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F LOOPCOUNT, F BLOOPUM3131 MOVLW MOVWF 0x08 LOOPCOUNT RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB1, F _C CLUM3131NA TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF RRF RRF RRF RRF DECFSZ GOTO AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F AARGB6, F LOOPCOUNT, F CLOOPUM3131 BLOOPUM3131 BLUM3131NA CLOOPUM3131 CLUM3131NA 1997 Microchip Technology Inc. DS00617B-page 23 AN617 MOVLW MOVWF 0x07 LOOPCOUNT RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB0, F _C DLUM3131NA TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF RRF RRF RRF RRF RRF DECFSZ GOTO AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F AARGB6, F AARGB7, F LOOPCOUNT, F DLOOPUM3131 RRF RRF RRF RRF RRF RRF RRF RRF AARGB0, AARGB1, AARGB2, AARGB3, AARGB4, AARGB5, AARGB6, AARGB7, DLOOPUM3131 DLUM3131NA F F F F F F F F endm SMUL3232 macro ; Max Timing: 9+7*22+8*23+8*24+7*25+9 = 723 clks ; Min Timing: 62+6 = 68 clks ; PM: 68+6+7*22+8*23+8*24+7*25+9 = 788 DM: 16 variable i = 0 while i < 8 BTFSC GOTO BARGB3,i SM3232NA#v(i) variable i = i + 1 DS00617B-page 24 1997 Microchip Technology Inc. AN617 endw variable i = 8 while i < 16 BTFSC GOTO BARGB2,i-8 SM3232NA#v(i) variable i = i + 1 endw variable i = 16 while i < 24 BTFSC GOTO BARGB1,i-16 SM3232NA#v(i) variable i = i + 1 endw variable i = 24 while i < 31 BTFSC GOTO BARGB0,i-24 SM3232NA#v(i) variable i = i + 1 endw SM3232NA0 CLRF CLRF CLRF CLRF RETURN AARGB0 AARGB1 AARGB2 AARGB3 RLF RRF RRF RRF RRF RRF SIGN,W AARGB0, AARGB1, AARGB2, AARGB3, AARGB4, ; if we get here, BARG = 0 F F F F F variable i = 1 while SM3232A#v(i) i < 8 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC 1997 Microchip Technology Inc. BARGB3,i SM3232NA#v(i) TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C DS00617B-page 25 AN617 SM3232NA#v(i) INCFSZ ADDWF RLF RRF RRF RRF RRF RRF TEMPB0,W AARGB0, F SIGN,W AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F variable i = i + 1 endw variable i = 8 while SM3232A#v(i) SM3232NA#v(i) i < 16 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RLF RRF RRF RRF RRF RRF RRF BARGB2,i-8 SM3232NA#v(i) TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F SIGN,W AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F variable i = i + 1 endw variable i = 16 while SM3232A#v(i) SM3232NA#v(i) DS00617B-page 26 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RLF i < 24 BARGB1,i-16 SM3232NA#v(i) TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F SIGN,W 1997 Microchip Technology Inc. AN617 RRF RRF RRF RRF RRF RRF RRF AARGB0, AARGB1, AARGB2, AARGB3, AARGB4, AARGB5, AARGB6, F F F F F F F variable i = i + 1 endw variable i = 24 while SM3232A#v(i) SM3232NA#v(i) i < 31 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RLF RRF RRF RRF RRF RRF RRF RRF RRF BARGB0,i-24 SM3232NA#v(i) TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F SIGN,W AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F AARGB6, F AARGB7, F variable i = i + 1 endw RLF RRF RRF RRF RRF RRF RRF RRF RRF SIGN,W AARGB0, AARGB1, AARGB2, AARGB3, AARGB4, AARGB5, AARGB6, AARGB7, F F F F F F F F endm UMUL3232 macro ; Max Timing: 9+8*21+8*22+8*23+8*24 = 729 clks ; Min Timing: 63+6 = 69 clks ; PM: 69+6+8*21+8*22+8*23+8*24 = 795 1997 Microchip Technology Inc. DM: 16 DS00617B-page 27 AN617 variable i = 0 BCF _C ; clear carry for first right shift while i < 8 BTFSC GOTO BARGB3,i UM3232NA#v(i) variable i = i + 1 endw variable i = 8 while i < 16 BTFSC GOTO BARGB2,i-8 UM3232NA#v(i) variable i = i + 1 endw variable i = 16 while i < 24 BTFSC GOTO BARGB1,i-16 UM3232NA#v(i) variable i = i + 1 endw variable i = 24 while i < 32 BTFSC GOTO BARGB0,i-24 UM3232NA#v(i) variable i = i + 1 endw UM3232NA0 CLRF CLRF CLRF CLRF RETURN AARGB0 AARGB1 AARGB2 AARGB3 RRF RRF RRF RRF RRF AARGB0, AARGB1, AARGB2, AARGB3, AARGB4, ; if we get here, BARG = 0 F F F F F variable i = 1 while BTFSS GOTO DS00617B-page 28 i < 8 BARGB3,i UM3232NA#v(i) 1997 Microchip Technology Inc. AN617 UM3232A#v(i) UM3232NA#v(i) MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF RRF RRF TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F variable i = i + 1 endw variable i = 8 while UM3232A#v(i) UM3232NA#v(i) i < 16 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF RRF RRF RRF BARGB2,i-8 UM3232NA#v(i) TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F variable i = i + 1 endw variable i = 16 while UM3232A#v(i) i < 24 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ 1997 Microchip Technology Inc. BARGB1,i-16 UM3232NA#v(i) TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W DS00617B-page 29 AN617 UM3232NA#v(i) ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF RRF RRF RRF RRF AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F AARGB6, F variable i = i + 1 endw variable i = 24 while UM3232A#v(i) UM3232NA#v(i) BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF RRF RRF RRF RRF RRF i < 32 BARGB0,i-24 UM3232NA#v(i) TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F AARGB6, F AARGB7, F variable i = i + 1 endw endm UMUL3131 macro ; Max Timing: 9+7*21+8*22+8*23+7*24+9 = 693 clks ; Min Timing: 62+6 = 68 clks ; PM: 68+6+7*22+8*23+8*24+7*25+9 = 788 DS00617B-page 30 DM: 16 1997 Microchip Technology Inc. AN617 variable i = 0 BCF _C ; clear carry for first right shift while i < 8 BTFSC GOTO BARGB3,i UM3131NA#v(i) variable i = i + 1 endw variable i = 8 while i < 16 BTFSC GOTO BARGB2,i-8 UM3131NA#v(i) variable i = i + 1 endw variable i = 16 while i < 24 BTFSC GOTO BARGB1,i-16 UM3131NA#v(i) variable i = i + 1 endw variable i = 24 while i < 31 BTFSC GOTO BARGB0,i-24 UM3131NA#v(i) variable i = i + 1 endw UM3131NA0 CLRF CLRF CLRF CLRF RETURN AARGB0 AARGB1 AARGB2 AARGB3 RRF RRF RRF RRF RRF AARGB0, AARGB1, AARGB2, AARGB3, AARGB4, ; if we get here, BARG = 0 F F F F F variable i = 1 while i < 8 BTFSS 1997 Microchip Technology Inc. BARGB3,i DS00617B-page 31 AN617 UM3131A#v(i) UM3131NA#v(i) GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF RRF RRF UM3131NA#v(i) TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F variable i = i + 1 endw variable i = 8 while UM3131A#v(i) UM3131NA#v(i) i < 16 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF RRF RRF RRF BARGB2,i-8 UM3131NA#v(i) TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F variable i = i + 1 endw variable i = 16 while UM3131A#v(i) DS00617B-page 32 BTFSS GOTO MOVF ADDWF MOVF BTFSC i < 24 BARGB1,i-16 UM3131NA#v(i) TEMPB3,W AARGB3, F TEMPB2,W _C 1997 Microchip Technology Inc. AN617 UM3131NA#v(i) INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF RRF RRF RRF RRF TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F AARGB6, F variable i = i + 1 endw variable i = 24 while UM3131A#v(i) UM3131NA#v(i) i < 31 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF RRF RRF RRF RRF RRF BARGB0,i-24 UM3131NA#v(i) TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F AARGB6, F AARGB7, F variable i = i + 1 endw RRF RRF RRF RRF RRF RRF RRF RRF AARGB0, AARGB1, AARGB2, AARGB3, AARGB4, AARGB5, AARGB6, AARGB7, F F F F F F F F endm 1997 Microchip Technology Inc. DS00617B-page 33 AN617 ;********************************************************************************************** ;********************************************************************************************** ; 32x32 Bit Signed Fixed Point Multiply 32x32 -> 64 ; ; Input: 32 bit signed fixed point multiplicand in AARGB0 32 bit signed fixed point multiplier in BARGB0 ; Use: CALL ; Output: 64 bit signed fixed point product in AARGB0 ; Result: AARG ; ; Max Timing: 15+851+2 = 868 clks 36+851+2 = 889 clks ; Min Timing: 15+192 = 207 clks ; PM: 36+152+1 = 189 FXM3232S DS00617B-page 34 FXM3232S <-- AARG x BARG B > 0 B < 0 DM: 17 CLRF CLRF CLRF CLRF CLRF MOVF IORWF IORWF IORWF BTFSC RETLW AARGB4 AARGB5 AARGB6 AARGB7 SIGN AARGB0,W AARGB1,W AARGB2,W AARGB3,W _Z 0x00 ; clear partial product MOVF XORWF MOVWF BTFSC COMF AARGB0,W BARGB0,W TEMPB0 TEMPB0,MSB SIGN,F BTFSS GOTO BARGB0,MSB M3232SOK COMF COMF COMF COMF INCF BTFSC INCF BTFSC INCF BTFSC INCF BARGB3, BARGB2, BARGB1, BARGB0, BARGB3, _Z BARGB2, _Z BARGB1, _Z BARGB0, F F F F F COMF COMF COMF COMF INCF BTFSC INCF BTFSC INCF BTFSC INCF AARGB3, AARGB2, AARGB1, AARGB0, AARGB3, _Z AARGB2, _Z AARGB1, _Z AARGB0, F F F F F F F F F F F 1997 Microchip Technology Inc. AN617 M3232SOK BTFSC GOTO BARGB0,MSB M3232SX MOVF MOVWF MOVF MOVWF MOVF MOVWF MOVF MOVWF AARGB0,W TEMPB0 AARGB1,W TEMPB1 AARGB2,W TEMPB2 AARGB3,W TEMPB3 SMUL3232L M3232SX RETLW 0x00 CLRF CLRF CLRF CLRF RLF RRF RRF RRF RRF AARGB4 AARGB5 AARGB6 AARGB7 SIGN,W AARGB0,F AARGB1,F AARGB2,F AARGB3,F RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; 32x32 Bit Unsigned Fixed Point Multiply 32x32 -> 64 ; ; Input: 32 bit unsigned fixed point multiplicand in AARGB0 32 bit unsigned fixed point multiplier in BARGB0 ; Use: CALL ; Output: 64 bit unsigned fixed point product in AARGB0 ; Result: AARG ; Max Timing: 12+842+2 = 856 clks ; Min Timing: 12+197 = 209 clks ; PM: 12+155+1 = 168 FXM3232U <-- AARG x BARG DM: 17 FXM3232U CLRF CLRF CLRF CLRF MOVF MOVWF MOVF MOVWF MOVF MOVWF MOVF MOVWF AARGB4 AARGB5 AARGB7 AARGB6 AARGB0,W TEMPB0 AARGB1,W TEMPB1 AARGB2,W TEMPB2 AARGB3,W TEMPB3 ; clear partial product UMUL3232L RETLW 1997 Microchip Technology Inc. 0x00 DS00617B-page 35 AN617 ;********************************************************************************************** ;********************************************************************************************** ; 31x31 Bit Unsigned Fixed Point Divide 31x31 -> 62 ; ; Input: 31 bit unsigned fixed point multiplicand in AARGB0 31 bit unsigned fixed point multiplier in BARGB0 ; Use: CALL ; Output: 62 bit unsigned fixed point product in AARGB0 ; Result: AARG ; Max Timing: 12+822+2 = 836 clks ; Min Timing: 12+192 = 204 clks ; PM: 12+155+1 = 168 FXM3131U <-- AARG x BARG DM: 17 FXM3131U CLRF CLRF CLRF CLRF MOVF MOVWF MOVF MOVWF MOVF MOVWF MOVF MOVWF AARGB4 AARGB5 AARGB7 AARGB6 AARGB0,W TEMPB0 AARGB1,W TEMPB1 AARGB2,W TEMPB2 AARGB3,W TEMPB3 ; clear partial product UMUL3131L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** DS00617B-page 36 1997 Microchip Technology Inc. AN617 D.2 32x24 PIC16C5X/PIC16CXXX Fixed Point Multiply Routines ; RCS Header $Id: fxm24.a16 2.4 1996/10/16 14:23:23 F.J.Testa Exp $ ; $Revision: 2.4 $ ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 32x24 PIC16 FIXED POINT MULTIPLY ROUTINES Input: fixed point arguments in AARG and BARG Output: product AARGxBARG in AARG All timings are worst case cycle counts It is useful to note that the additional unsigned routines requiring a non-power of two argument can be called in a signed multiply application where it is known that the respective argument is nonnegative, thereby offering some improvement in performance. Routine Clocks Function FXM3224S 652 32x24 -> 56 bit signed fixed point multiply FXM3224U 630 32x24 -> 56 bit unsigned fixed point multiply FXM3123U 610 31x23 -> 54 bit unsigned fixed point multiply The above timings are based on the looped macros. If space permits, approximately 80-97 clocks can be saved by using the unrolled macros. ;********************************************************************************************** ;********************************************************************************************** ; 32x24 Bit Multiplication Macros SMUL3224L macro ; Max Timing: 2+13+6*26+25+2+7*27+26+2+6*28+27+8 = 618 clks ; Min Timing: 2+7*6+5+1+7*6+5+2+6*6+5+6 = 146 clks ; PM: 25+25+2+26+2+27+8 = 115 MOVLW MOVWF 0x8 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB2,F _C ALSM3224NA LOOPCOUNT,F LOOPSM3224A MOVWF LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB1,F _C BLSM3224NA LOOPCOUNT,F LOOPSM3224B MOVLW MOVWF 0x7 LOOPCOUNT DM: 15 LOOPSM3224A LOOPSM3224B 1997 Microchip Technology Inc. DS00617B-page 37 AN617 LOOPSM3224C RRF BTFSC GOTO DECFSZ GOTO BARGB0,F _C CLSM3224NA LOOPCOUNT,F LOOPSM3224C CLRF CLRF CLRF CLRF RETLW AARGB0 AARGB1 AARGB2 AARGB3 0x00 RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB2,F _C ALSM3224NA TEMPB3,W AARGB3,F TEMPB2,W _C TEMPB2,W AARGB2,F TEMPB1,W _C TEMPB1,W AARGB1,F TEMPB0,W _C TEMPB0,W AARGB0,F RLF RRF RRF RRF RRF RRF DECFSZ GOTO SIGN,W AARGB0,F AARGB1,F AARGB2,F AARGB3,F AARGB4,F LOOPCOUNT,F ALOOPSM3224 MOVLW MOVWF 0x8 LOOPCOUNT RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB1,F _C BLSM3224NA TEMPB3,W AARGB3,F TEMPB2,W _C TEMPB2,W AARGB2,F TEMPB1,W _C TEMPB1,W AARGB1,F TEMPB0,W _C TEMPB0,W AARGB0,F RLF RRF RRF SIGN,W AARGB0,F AARGB1,F ALOOPSM3224 ALSM3224NA BLOOPSM3224 BLSM3224NA DS00617B-page 38 1997 Microchip Technology Inc. AN617 RRF RRF RRF RRF DECFSZ GOTO AARGB2,F AARGB3,F AARGB4,F AARGB5,F LOOPCOUNT,F BLOOPSM3224 MOVLW MOVWF 0x7 LOOPCOUNT RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB0,F _C CLSM3224NA TEMPB3,W AARGB3,F TEMPB2,W _C TEMPB2,W AARGB2,F TEMPB1,W _C TEMPB1,W AARGB1,F TEMPB0,W _C TEMPB0,W AARGB0,F RLF RRF RRF RRF RRF RRF RRF RRF DECFSZ GOTO SIGN,W AARGB0,F AARGB1,F AARGB2,F AARGB3,F AARGB4,F AARGB5,F AARGB6,F LOOPCOUNT,F CLOOPSM3224 RLF RRF RRF RRF RRF RRF RRF RRF SIGN,W AARGB0,F AARGB1,F AARGB2,F AARGB3,F AARGB4,F AARGB5,F AARGB6,F CLOOPSM3224 CLSM3224NA endm UMUL3224L macro ; Max Timing: 2+15+6*25+24+2+7*26+25+2+7*27+26 = 617 clks ; Min Timing: 2+7*6+5+1+7*6+5+1+7*6+5+6 = 151 clks ; PM: 31+24+2+25+2+26+2+27 = 139 MOVLW MOVWF 0x08 LOOPCOUNT RRF BTFSC GOTO BARGB2,F _C ALUM3224NAP DM: 15 LOOPUM3224A 1997 Microchip Technology Inc. DS00617B-page 39 AN617 DECFSZ GOTO LOOPCOUNT,F LOOPUM3224A MOVWF LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB1,F _C BLUM3224NAP LOOPCOUNT,F LOOPUM3224B MOVWF LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB0,F _C CLUM3224NAP LOOPCOUNT,F LOOPUM3224C CLRF CLRF CLRF CLRF RETLW AARGB0 AARGB1 AARGB2 AARGB3 0x00 ALUM3224NAP BCF GOTO _C ALUM3224NA BLUM3224NAP BCF GOTO _C BLUM3224NA CLUM3224NAP BCF GOTO _C CLUM3224NA RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB2,F _C ALUM3224NA TEMPB3,W AARGB3,F TEMPB2,W _C TEMPB2,W AARGB2,F TEMPB1,W _C TEMPB1,W AARGB1,F TEMPB0,W _C TEMPB0,W AARGB0,F RRF RRF RRF RRF RRF DECFSZ GOTO AARGB0,F AARGB1,F AARGB2,F AARGB3,F AARGB4,F LOOPCOUNT,F ALOOPUM3224 MOVLW MOVWF 0x08 LOOPCOUNT LOOPUM3224B LOOPUM3224C ALOOPUM3224 ALUM3224NA DS00617B-page 40 1997 Microchip Technology Inc. AN617 BLOOPUM3224 RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB1,F _C BLUM3224NA TEMPB3,W AARGB3,F TEMPB2,W _C TEMPB2,W AARGB2,F TEMPB1,W _C TEMPB1,W AARGB1,F TEMPB0,W _C TEMPB0,W AARGB0,F RRF RRF RRF RRF RRF RRF DECFSZ GOTO AARGB0,F AARGB1,F AARGB2,F AARGB3,F AARGB4,F AARGB5,F LOOPCOUNT,F BLOOPUM3224 MOVLW MOVWF 0x08 LOOPCOUNT RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB0,F _C CLUM3224NA TEMPB3,W AARGB3,F TEMPB2,W _C TEMPB2,W AARGB2,F TEMPB1,W _C TEMPB1,W AARGB1,F TEMPB0,W _C TEMPB0,W AARGB0,F RRF RRF RRF RRF RRF RRF RRF DECFSZ GOTO AARGB0,F AARGB1,F AARGB2,F AARGB3,F AARGB4,F AARGB5,F AARGB6,F LOOPCOUNT,F CLOOPUM3224 BLUM3224NA CLOOPUM3224 CLUM3224NA endm 1997 Microchip Technology Inc. DS00617B-page 41 AN617 UMUL3123L macro ; Max Timing: 2+15+6*25+24+2+7*26+25+2+6*27+26+7 = 597 clks ; Min Timing: 2+7*6+5+1+7*6+5+2+6*6+5+6 = 146 clks ; PM: 31+24+2+25+2+26+7 = 117 MOVLW MOVWF 0x8 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB2,F _C ALUM3123NAP LOOPCOUNT,F LOOPUM3123A MOVWF LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB1,F _C BLUM3123NAP LOOPCOUNT,F LOOPUM3123B MOVLW MOVWF 0x7 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB0,F _C CLUM3123NAP LOOPCOUNT,F LOOPUM3123C CLRF CLRF CLRF CLRF RETLW AARGB0 AARGB1 AARGB2 AARGB3 0x00 ALUM3123NAP BCF GOTO _C ALUM3123NA BLUM3123NAP BCF GOTO _C BLUM3123NA CLUM3123NAP BCF GOTO _C CLUM3123NA RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ BARGB2,F _C ALUM3123NA TEMPB3,W AARGB3,F TEMPB2,W _C TEMPB2,W AARGB2,F TEMPB1,W _C TEMPB1,W DM: 15 LOOPUM3123A LOOPUM3123B LOOPUM3123C ALOOPUM3123 DS00617B-page 42 1997 Microchip Technology Inc. AN617 ADDWF MOVF BTFSC INCFSZ ADDWF AARGB1,F TEMPB0,W _C TEMPB0,W AARGB0,F RRF RRF RRF RRF RRF DECFSZ GOTO AARGB0,F AARGB1,F AARGB2,F AARGB3,F AARGB4,F LOOPCOUNT,F ALOOPUM3123 MOVLW MOVWF 0x08 LOOPCOUNT RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB1,F _C BLUM3123NA TEMPB3,W AARGB3,F TEMPB2,W _C TEMPB2,W AARGB2,F TEMPB1,W _C TEMPB1,W AARGB1,F TEMPB0,W _C TEMPB0,W AARGB0,F RRF RRF RRF RRF RRF RRF DECFSZ GOTO AARGB0,F AARGB1,F AARGB2,F AARGB3,F AARGB4,F AARGB5,F LOOPCOUNT,F BLOOPUM3123 MOVLW MOVWF 0x07 LOOPCOUNT RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC BARGB0,F _C CLUM3123NA TEMPB3,W AARGB3,F TEMPB2,W _C TEMPB2,W AARGB2,F TEMPB1,W _C TEMPB1,W AARGB1,F TEMPB0,W _C ALUM3123NA BLOOPUM3123 BLUM3123NA CLOOPUM3123 1997 Microchip Technology Inc. DS00617B-page 43 AN617 INCFSZ ADDWF TEMPB0,W AARGB0,F RRF RRF RRF RRF RRF RRF RRF DECFSZ GOTO AARGB0,F AARGB1,F AARGB2,F AARGB3,F AARGB4,F AARGB5,F AARGB6,F LOOPCOUNT,F CLOOPUM3123 RRF RRF RRF RRF RRF RRF RRF AARGB0,F AARGB1,F AARGB2,F AARGB3,F AARGB4,F AARGB5,F AARGB6,F CLUM3123NA endm SMUL3224 macro ; Max Timing: 9+7*22+8*23+7*24+8 = 523 clks ; Min Timing: 40+6 = 46 clks ; PM: 46+6+7*22+8*23+7*24+8 = 566 DM: 14 variable i = 0 while i < 8 BTFSC GOTO BARGB2,i SM3224NA#v(i) variable i = i + 1 endw variable i = 8 while i < 16 BTFSC GOTO BARGB1,i-8 SM3224NA#v(i) variable i = i + 1 endw variable i = 16 while i < 23 BTFSC GOTO BARGB0,i-16 SM3224NA#v(i) variable i = i + 1 DS00617B-page 44 1997 Microchip Technology Inc. AN617 endw SM3224NA0 CLRF CLRF CLRF CLRF RETURN AARGB0 AARGB1 AARGB2 AARGB3 RLF RRF RRF RRF RRF RRF SIGN,W AARGB0,F AARGB1,F AARGB2,F AARGB3,F AARGB4,F ; if we get here, BARG = 0 variable i = 1 while SM3224A#v(i) SM3224NA#v(i) i < 8 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RLF RRF RRF RRF RRF RRF BARGB2,i SM3224NA#v(i) TEMPB3,W AARGB3,F TEMPB2,W _C TEMPB2,W AARGB2,F TEMPB1,W _C TEMPB1,W AARGB1,F TEMPB0,W _C TEMPB0,W AARGB0,F SIGN,W AARGB0,F AARGB1,F AARGB2,F AARGB3,F AARGB4,F variable i = i + 1 endw variable i = 8 while SM3224A#v(i) i < 16 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF 1997 Microchip Technology Inc. BARGB1,i-8 SM3224NA#v(i) TEMPB3,W AARGB3,F TEMPB2,W _C TEMPB2,W AARGB2,F TEMPB1,W _C TEMPB1,W AARGB1,F TEMPB0,W _C TEMPB0,W AARGB0,F DS00617B-page 45 AN617 SM3224NA#v(i) RLF RRF RRF RRF RRF RRF RRF SIGN,W AARGB0,F AARGB1,F AARGB2,F AARGB3,F AARGB4,F AARGB5,F variable i = i + 1 endw variable i = 16 while SM3224A#v(i) SM3224NA#v(i) BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RLF RRF RRF RRF RRF RRF RRF RRF i < 23 BARGB0,i-16 SM3224NA#v(i) TEMPB3,W AARGB3,F TEMPB2,W _C TEMPB2,W AARGB2,F TEMPB1,W _C TEMPB1,W AARGB1,F TEMPB0,W _C TEMPB0,W AARGB0,F SIGN,W AARGB0,F AARGB1,F AARGB2,F AARGB3,F AARGB4,F AARGB5,F AARGB6,F variable i = i + 1 endw RLF RRF RRF RRF RRF RRF RRF RRF SIGN,W AARGB0,F AARGB1,F AARGB2,F AARGB3,F AARGB4,F AARGB5,F AARGB6,F endm UMUL3224 macro ; Max Timing: 9+8*21+8*22+8*23 = 537 clks ; Min Timing: 41+6 = 47 clks ; PM: 47+6+8*21+8*22+8*23 = 581 DS00617B-page 46 DM: 14 1997 Microchip Technology Inc. AN617 variable i = 0 BCF _C ; clear carry for first right shift while i < 8 BTFSC GOTO BARGB2,i UM3224NA#v(i) variable i = i + 1 endw variable i = 8 while i < 16 BTFSC GOTO BARGB1,i-8 UM3224NA#v(i) variable i = i + 1 endw variable i = 16 while i < 24 BTFSC GOTO BARGB0,i-16 UM3224NA#v(i) variable i = i + 1 endw UM3224NA0 CLRF CLRF CLRF CLRF RETURN AARGB0 AARGB1 AARGB2 AARGB3 RRF RRF RRF RRF RRF AARGB0,F AARGB1,F AARGB2,F AARGB3,F AARGB4,F ; if we get here, BARG = 0 variable i = 1 while UM3224A#v(i) i < 8 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ 1997 Microchip Technology Inc. BARGB2,i UM3224NA#v(i) TEMPB3,W AARGB3,F TEMPB2,W _C TEMPB2,W AARGB2,F TEMPB1,W _C TEMPB1,W AARGB1,F TEMPB0,W _C TEMPB0,W DS00617B-page 47 AN617 UM3224NA#v(i) ADDWF RRF RRF RRF RRF RRF AARGB0,F AARGB0,F AARGB1,F AARGB2,F AARGB3,F AARGB4,F variable i = i + 1 endw variable i = 8 while UM3224A#v(i) UM3224NA#v(i) i < 16 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF RRF RRF RRF BARGB1,i-8 UM3224NA#v(i) TEMPB3,W AARGB3,F TEMPB2,W _C TEMPB2,W AARGB2,F TEMPB1,W _C TEMPB1,W AARGB1,F TEMPB0,W _C TEMPB0,W AARGB0,F AARGB0,F AARGB1,F AARGB2,F AARGB3,F AARGB4,F AARGB5,F variable i = i + 1 endw variable i = 16 while UM3224A#v(i) UM3224NA#v(i) DS00617B-page 48 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF RRF i < 24 BARGB0,i-16 UM3224NA#v(i) TEMPB3,W AARGB3,F TEMPB2,W _C TEMPB2,W AARGB2,F TEMPB1,W _C TEMPB1,W AARGB1,F TEMPB0,W _C TEMPB0,W AARGB0,F AARGB0,F AARGB1,F AARGB2,F AARGB3,F 1997 Microchip Technology Inc. AN617 RRF RRF RRF AARGB4,F AARGB5,F AARGB6,F variable i = i + 1 endw endm UMUL3123 macro ; Max Timing: 9+7*21+8*22+7*23+7 = 500 clks ; Min Timing: 41+6 = 47 clks ; PM: 47+5+7*22+8*23+7*24+7 = 565 DM: 14 variable i = 0 BCF _C ; clear carry for first right shift while i < 8 BTFSC GOTO BARGB2,i UM3123NA#v(i) variable i = i + 1 endw variable i = 8 while i < 16 BTFSC GOTO BARGB1,i-8 UM3123NA#v(i) variable i = i + 1 endw variable i = 16 while i < 23 BTFSC GOTO BARGB0,i-16 UM3123NA#v(i) variable i = i + 1 endw UM3123NA0 CLRF CLRF CLRF CLRF RETURN AARGB0 AARGB1 AARGB2 AARGB3 RRF RRF RRF RRF RRF AARGB0,F AARGB1,F AARGB2,F AARGB3,F AARGB4,F 1997 Microchip Technology Inc. ; if we get here, BARG = 0 DS00617B-page 49 AN617 variable i = 1 while UM3123A#v(i) UM3123NA#v(i) i < 8 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF RRF RRF BARGB2,i UM3123NA#v(i) TEMPB3,W AARGB3,F TEMPB2,W _C TEMPB2,W AARGB2,F TEMPB1,W _C TEMPB1,W AARGB1,F TEMPB0,W _C TEMPB0,W AARGB0,F AARGB0,F AARGB1,F AARGB2,F AARGB3,F AARGB4,F variable i = i + 1 endw variable i = 8 while UM3123A#v(i) UM3123NA#v(i) i < 16 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF RRF RRF RRF BARGB1,i-8 UM3123NA#v(i) TEMPB3,W AARGB3,F TEMPB2,W _C TEMPB2,W AARGB2,F TEMPB1,W _C TEMPB1,W AARGB1,F TEMPB0,W _C TEMPB0,W AARGB0,F AARGB0,F AARGB1,F AARGB2,F AARGB3,F AARGB4,F AARGB5,F variable i = i + 1 endw variable i = 16 while DS00617B-page 50 i < 23 1997 Microchip Technology Inc. AN617 UM3123A#v(i) UM3123NA#v(i) BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF RRF RRF RRF RRF BARGB0,i-16 UM3123NA#v(i) TEMPB3,W AARGB3,F TEMPB2,W _C TEMPB2,W AARGB2,F TEMPB1,W _C TEMPB1,W AARGB1,F TEMPB0,W _C TEMPB0,W AARGB0,F AARGB0,F AARGB1,F AARGB2,F AARGB3,F AARGB4,F AARGB5,F AARGB6,F variable i = i + 1 endw RRF RRF RRF RRF RRF RRF RRF AARGB0,F AARGB1,F AARGB2,F AARGB3,F AARGB4,F AARGB5,F AARGB6,F endm ;********************************************************************************************** ;********************************************************************************************** ; 32x24 Bit Signed Fixed Point Multiply 32x24 -> 56 ; ; Input: ; ; 32 bit signed fixed point multiplicand in AARGB0, AARGB1, AARGB2, AARGB3 24 bit signed fixed point multiplier in BARGB0, BARGB1, BARGB2 ; Use: ; Output: 56 bit signed fixed point product in AARGB0 ; Result: AARG ; ; Max Timing: 14+618+2 = 634 clks 32+618+2 = 652 clks ; Min Timing: 14+146 = 160 clks ; PM: 36+115+1 = 152 FXM3224S CALL FXM3224S <-- CLRF CLRF CLRF CLRF 1997 Microchip Technology Inc. AARG x BARG B > 0 B < 0 DM: 15 AARGB4 AARGB5 AARGB6 SIGN ; clear partial product DS00617B-page 51 AN617 M3224SOK MOVF IORWF IORWF IORWF BTFSC RETLW AARGB0,W AARGB1,W AARGB2,W AARGB3,W _Z 0x00 MOVF XORWF MOVWF BTFSC COMF AARGB0,W BARGB0,W TEMPB0 TEMPB0,MSB SIGN,F BTFSS GOTO BARGB0,MSB M3224SOK COMF COMF COMF INCF BTFSC INCF BTFSC INCF BARGB2, BARGB1, BARGB0, BARGB2, _Z BARGB1, _Z BARGB0, F F F F COMF COMF COMF COMF INCF BTFSC INCF BTFSC INCF BTFSC INCF AARGB3, AARGB2, AARGB1, AARGB0, AARGB3, _Z AARGB2, _Z AARGB1, _Z AARGB0, F F F F F BTFSC GOTO BARGB0,MSB M3224SX MOVF MOVWF MOVF MOVWF MOVF MOVWF MOVF MOVWF AARGB0,W TEMPB0 AARGB1,W TEMPB1 AARGB2,W TEMPB2 AARGB3,W TEMPB3 F F F F F SMUL3224L M3224SX RETLW 0x00 CLRF CLRF CLRF RLF RRF RRF RRF RRF RRF AARGB4 AARGB5 AARGB6 SIGN,W AARGB0,F AARGB1,F AARGB2,F AARGB3,F AARGB4,F RETLW 0x00 ;********************************************************************************************** DS00617B-page 52 1997 Microchip Technology Inc. AN617 ;********************************************************************************************** ; 32x24 Bit Unsigned Fixed Point Multiply 32x24 -> 56 ; ; Input: ; ; 32 bit unsigned fixed point multiplicand in AARGB0, AARGB1, AARGB2, AARGB3 24 bit unsigned fixed point multiplier in BARGB0, BARGB1, BARGB2 ; Use: CALL FXM3224U ; Output: 56 bit unsigned fixed point product in AARGB0 ; Result: AARG ; Max Timing: 11+617+2 = 630 clks ; Min Timing: 11+151 = 162 clks ; PM: 11+139+1 = 151 <-- AARG x BARG DM: 15 FXM3224U CLRF CLRF CLRF MOVF MOVWF MOVF MOVWF MOVF MOVWF MOVF MOVWF AARGB4 AARGB5 AARGB6 AARGB0,W TEMPB0 AARGB1,W TEMPB1 AARGB2,W TEMPB2 AARGB3,W TEMPB3 ; clear partial product UMUL3224L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; 31x23 Bit Unsigned Fixed Point Divide 31x23 -> 54 ; ; Input: ; ; 31 bit unsigned fixed point multiplicand in AARGB0, AARGB1, AARGB2, AARGB3 23 bit unsigned fixed point multiplier in BARGB0, BARGB1, BARGB2 ; Use: CALL FXM3123U ; Output: 54 bit unsigned fixed point product in AARGB0 ; Result: AARG ; Max Timing: 11+597+2 = 610 clks ; Min Timing: 11+146 = 157 clks ; PM: 11+117+1 = 129 <-- AARG x BARG DM: 15 FXM3123U CLRF CLRF CLRF 1997 Microchip Technology Inc. AARGB4 AARGB5 AARGB6 ; clear partial product DS00617B-page 53 AN617 MOVF MOVWF MOVF MOVWF MOVF MOVWF MOVF MOVWF AARGB0,W TEMPB0 AARGB1,W TEMPB1 AARGB2,W TEMPB2 AARGB3,W TEMPB3 UMUL3123L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** DS00617B-page 54 1997 Microchip Technology Inc. AN617 D.3 32x16 PIC16C5X/PIC16CXXX Fixed Point Multiply Routines ; RCS Header $Id: fxm26.a16 2.3 1996/10/16 14:23:23 F.J.Testa Exp $ ; $Revision: 2.3 $ ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 32x16 PIC16 FIXED POINT MULTIPLY ROUTINES Input: fixed point arguments in AARG and BARG Output: product AARGxBARG in AARG All timings are worst case cycle counts It is useful to note that the additional unsigned routines requiring a non-power of two argument can be called in a signed multiply application where it is known that the respective argument is nonnegative, thereby offering some improvement in performance. Routine Clocks Function FXM3216S 423 32x16 -> 48 bit signed fixed point multiply FXM3216U 412 32x16 -> 48 bit unsigned fixed point multiply FXM3115U 392 31x15 -> 46 bit unsigned fixed point multiply The above timings are based on the looped macros. If space permits, approximately 65-88 clocks can be saved by using the unrolled macros. ;********************************************************************************************** ;********************************************************************************************** ; 32x16 Bit Multiplication Macros SMUL3216L macro ; Max Timing: 2+13+6*26+25+2+6*27+26+7 = 393 clks ; Min Timing: 2+7*6+5+2+6*6+5+6 = 98 clks ; PM: 19+60 = 79 DM: 11 MOVLW MOVWF 0x8 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB1, F _C ALSM3216NA LOOPCOUNT, F LOOPSM3216A MOVLW MOVWF 0x7 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB0, F _C BLSM3216NA LOOPCOUNT, F LOOPSM3216B CLRF CLRF AARGB0 AARGB1 LOOPSM3216A LOOPSM3216B 1997 Microchip Technology Inc. DS00617B-page 55 AN617 CLRF CLRF RETLW AARGB2 AARGB3 0x00 RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB1, F _C ALSM3216NA TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RLF RRF RRF RRF RRF RRF DECFSZ GOTO SIGN,W AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F LOOPCOUNT, F ALOOPSM3216 MOVLW MOVWF 0x7 LOOPCOUNT RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB0, F _C BLSM3216NA TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RLF RRF RRF RRF RRF RRF RRF DECFSZ GOTO SIGN,W AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F LOOPCOUNT, F BLOOPSM3216 RLF RRF TEMPB0,W AARGB0, F ALOOPSM3216 ALSM3216NA BLOOPSM3216 BLSM3216NA DS00617B-page 56 1997 Microchip Technology Inc. AN617 RRF RRF RRF RRF RRF AARGB1, AARGB2, AARGB3, AARGB4, AARGB5, F F F F F endm UMUL3216L macro ; Max Timing: 2+15+6*25+24+2+7*26+25 = 400 clks ; Min Timing: 2+7*6+5+1+7*6+5+6 = 103 clks ; PM: 73 DM: 11 MOVLW MOVWF 0x08 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB1, F _C ALUM3216NAP LOOPCOUNT, F LOOPUM3216A MOVWF LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB0, F _C BLUM3216NAP LOOPCOUNT, F LOOPUM3216B CLRF CLRF CLRF CLRF RETLW AARGB0 AARGB1 AARGB2 AARGB3 0x00 BCF GOTO _C BLUM3216NA BCF GOTO _C ALUM3216NA RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ BARGB1, F _C ALUM3216NA TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W LOOPUM3216A LOOPUM3216B BLUM3216NAP ALUM3216NAP ALOOPUM3216 1997 Microchip Technology Inc. DS00617B-page 57 AN617 ADDWF AARGB0, F RRF RRF RRF RRF RRF DECFSZ GOTO AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F LOOPCOUNT, F ALOOPUM3216 MOVLW MOVWF 0x08 LOOPCOUNT RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB0, F _C BLUM3216NA TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF RRF RRF RRF DECFSZ GOTO AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F LOOPCOUNT, F BLOOPUM3216 ALUM3216NA BLOOPUM3216 BLUM3216NA endm UMUL3115L macro ; Max Timing: 2+15+6*25+24+2+6*26+25+6 = 380 clks ; Min Timing: 2+7*6+5+2+6*6+5+6 = 96 clks ; PM: 80 DM: 11 MOVLW MOVWF 0x8 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB1, F _C ALUM3115NAP LOOPCOUNT, F LOOPUM3115A MOVLW 0x7 LOOPUM3115A DS00617B-page 58 1997 Microchip Technology Inc. AN617 MOVWF LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB0, F _C BLUM3115NAP LOOPCOUNT, F LOOPUM3115B CLRF CLRF CLRF CLRF RETLW AARGB0 AARGB1 AARGB2 AARGB3 0x00 BCF GOTO _C BLUM3115NA BCF GOTO _C ALUM3115NA RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB1, F _C ALUM3115NA TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF RRF RRF DECFSZ GOTO AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F LOOPCOUNT, F ALOOPUM3115 MOVLW MOVWF 0x07 LOOPCOUNT RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC BARGB0, F _C BLUM3115NA TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C LOOPUM3115B BLUM3115NAP ALUM3115NAP ALOOPUM3115 ALUM3115NA BLOOPUM3115 1997 Microchip Technology Inc. DS00617B-page 59 AN617 INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF RRF RRF RRF DECFSZ GOTO AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F LOOPCOUNT, F BLOOPUM3115 RRF RRF RRF RRF RRF RRF AARGB0, AARGB1, AARGB2, AARGB3, AARGB4, AARGB5, BLUM3115NA F F F F F F endm SMUL3216 macro ; Max Timing: 5+8+7*20+7*21+5 = 305 clks ; Min Timing: 5+24+21+7 = 57 clks ; PM: 5+24+21+6+5+7*20+7*21+5 = 353 DM: 10 variable i = 0 BTFSC COMF MOVF MOVWF RLF SIGN,MSB AARGB4, F AARGB4,W AARGB5 SIGN,W while i < 8 BTFSC GOTO BCF BARGB1,i SM3216NA#v(i) AARGB4,7-i variable i = i + 1 endw variable i = 8 while i < 15 BTFSC GOTO BCF BARGB0,i-8 SM3216NA#v(i) AARGB5,15-i variable i = i + 1 endw DS00617B-page 60 1997 Microchip Technology Inc. AN617 CLRF CLRF CLRF CLRF CLRF RETURN AARGB0 AARGB1 AARGB2 AARGB3 AARGB5 RRF RRF RRF RRF RRF AARGB0, AARGB1, AARGB2, AARGB3, AARGB4, ; if we get here, BARG = 0 SM3216NA0 F F F F F variable i = 1 while SM3216A#v(i) i < 8 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB1,i SM3216NA#v(i) TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF RRF RRF AARGB0, AARGB1, AARGB2, AARGB3, AARGB4, SM3216NA#v(i) F F F F F variable i = i + 1 endw variable i = 8 while SM3216A#v(i) i < 15 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF 1997 Microchip Technology Inc. BARGB0,i-8 SM3216NA#v(i) TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F DS00617B-page 61 AN617 SM3216NA#v(i) RRF RRF RRF RRF RRF RRF AARGB0, AARGB1, AARGB2, AARGB3, AARGB4, AARGB5, F F F F F F variable i = i + 1 endw RRF RRF RRF RRF RRF RRF AARGB0, AARGB1, AARGB2, AARGB3, AARGB4, AARGB5, F F F F F F endm UMUL3216 macro ; Max Timing: 1+8+7*21+8*22 = 332 clks ; Min Timing: 1+2*8+2*8+6 = 39 clks ; PM: 1+2*8+2*8+6+7*21+8*22 = 362 DM: 10 variable i = 0 BCF _ C ; clear carry for first right shift while i < 8 BTFSC GOTO BARGB1,i UM3216NA#v(i) variable i = i + 1 endw variable i = 8 while i < 16 BTFSC GOTO BARGB0,i-8 UM3216NA#v(i) variable i = i + 1 endw UM3216NA0 DS00617B-page 62 CLRF CLRF CLRF CLRF RETURN AARGB0 AARGB1 AARGB2 AARGB3 RRF RRF RRF RRF RRF AARGB0, AARGB1, AARGB2, AARGB3, AARGB4, ; if we get here, BARG = 0 F F F F F 1997 Microchip Technology Inc. AN617 variable i = 1 while UM3216A#v(i) UM3216NA#v(i) i < 8 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF RRF RRF BARGB1,i UM3216NA#v(i) TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F variable i = i + 1 endw variable i = 8 while UM3216A#v(i) UM3216NA#v(i) i < 16 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF RRF RRF RRF BARGB0,i-8 UM3216NA#v(i) TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F variable i = i + 1 endw endm 1997 Microchip Technology Inc. DS00617B-page 63 AN617 UMUL3115 macro ; Max Timing: 9+7*21+7*22+6 = 316 clks ; Min Timing: 1+30+6 = 37 clks ; PM: 1+30+10+7*21+7*22+6 = 348 DM: 10 variable i = 0 BCF _C ; clear carry for first right shift while i < 8 BTFSC GOTO BARGB1,i UM3115NA#v(i) variable i = i + 1 endw variable i = 8 while i < 15 BTFSC GOTO BARGB0,i-8 UM3115NA#v(i) variable i = i + 1 endw UM3115NA0 CLRF CLRF CLRF CLRF RETURN AARGB0 AARGB1 AARGB2 AARGB3 RRF RRF RRF RRF RRF AARGB0, AARGB1, AARGB2, AARGB3, AARGB4, ; if we get here, BARG = 0 F F F F F variable i = 1 while UM3115A#v(i) UM3115NA#v(i) DS00617B-page 64 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RRF i < 8 BARGB1,i UM3115NA#v(i) TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F 1997 Microchip Technology Inc. AN617 RRF RRF RRF RRF AARGB1, AARGB2, AARGB3, AARGB4, F F F F variable i = i + 1 endw variable i = 8 while UM3115A#v(i) UM3115NA#v(i) i < 15 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF RRF RRF RRF BARGB0,i-8 UM3115NA#v(i) TEMPB3,W AARGB3, F TEMPB2,W _C TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F variable i = i + 1 endw RRF RRF RRF RRF RRF RRF AARGB0, AARGB1, AARGB2, AARGB3, AARGB4, AARGB5, F F F F F F endm ;********************************************************************************************** ;********************************************************************************************** ; 32x16 Bit Signed Fixed Point Multiply 32x16 -> 32 ; ; Input: 16 bit signed fixed point multiplicand in AARGB0 16 bit signed fixed point multiplier in BARGB0 ; Use: CALL ; Output: 32 bit signed fixed point product in AARGB0 ; Result: AARG ; ; Max Timing: FXM3216S <-- AARG x BARG 13+393+2 = 408 clks 28+393+2 = 423 clks 1997 Microchip Technology Inc. B > 0 B < 0 DS00617B-page 65 AN617 ; Min Timing: ; PM: 18+79+1 = 98 FXM3216S M3216SOK 13+98 = 111 clks DM: 9 CLRF CLRF CLRF MOVF IORWF IORWF IORWF BTFSC RETLW AARGB4 AARGB5 SIGN AARGB0,W AARGB1,W AARGB2,W AARGB3,W _Z 0x00 ; clear partial product MOVF XORWF MOVWF BTFSC COMF AARGB0,W BARGB0,W TEMPB0 TEMPB0,MSB SIGN,F BTFSS GOTO BARGB0,MSB M3216SOK COMF COMF INCF BTFSC INCF BARGB1, BARGB0, BARGB1, _Z BARGB0, F F F COMF COMF COMF COMF INCF BTFSC INCF BTFSC INCF BTFSC INCF AARGB3, AARGB2, AARGB1, AARGB0, AARGB3, _Z AARGB2, _Z AARGB1, _Z AARGB0, F F F F F BTFSC GOTO BARGB0,MSB M3216SX MOVF MOVWF MOVF MOVWF MOVF MOVWF MOVF MOVWF AARGB0,W TEMPB0 AARGB1,W TEMPB1 AARGB2,W TEMPB2 AARGB3,W TEMPB3 F F F F SMUL3216L M3216SX DS00617B-page 66 RETLW 0x00 CLRF CLRF RLF RRF RRF RRF RRF AARGB4 AARGB5 SIGN,W AARGB0,F AARGB1,F AARGB2,F AARGB3,F 1997 Microchip Technology Inc. AN617 RRF AARGB4,F RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; 32x16 Bit Unsigned Fixed Point Multiply 32x16 -> 32 ; ; Input: 16 bit unsigned fixed point multiplicand in AARGB0 16 bit unsigned fixed point multiplier in BARGB0 ; Use: CALL ; Output: 32 bit unsigned fixed point product in AARGB0 ; Result: AARG ; Max Timing: 10+400+2 = 412 clks ; Min Timing: 10+104 = 114 clks ; PM: 10+73+1 = 84 FXM3216U <-- AARG x BARG DM: 9 FXM3216U CLRF CLRF MOVF MOVWF MOVF MOVWF MOVF MOVWF MOVF MOVWF AARGB4 AARGB5 AARGB0,W TEMPB0 AARGB1,W TEMPB1 AARGB2,W TEMPB2 AARGB3,W TEMPB3 ; clear partial product UMUL3216L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; 31x15 Bit Unsigned Fixed Point Divide 31x15 -> 30 ; ; Input: 15 bit unsigned fixed point multiplicand in AARGB0 15 bit unsigned fixed point multiplier in BARGB0 ; Use: CALL ; Output: 30 bit unsigned fixed point product in AARGB0 ; Result: AARG ; Max Timing: 10+380+2 = 392 clks ; Min Timing: 10+96 = 106 clks ; PM: 10+80+1 = 91 FXM3115U <-- AARG x BARG DM: 9 FXM3115U CLRF CLRF MOVF MOVWF MOVF 1997 Microchip Technology Inc. AARGB4 AARGB5 AARGB0,W TEMPB0 AARGB1,W ; clear partial product DS00617B-page 67 AN617 MOVWF MOVF MOVWF MOVF MOVWF TEMPB1 AARGB2,W TEMPB2 AARGB3,W TEMPB3 UMUL3115L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** DS00617B-page 68 1997 Microchip Technology Inc. AN617 D.4 24x24 PIC16C5X/PIC16CXXX Fixed Point Multiply Routines ; RCS Header $Id: fxm44.a16 2.3 1996/10/16 14:23:23 F.J.Testa Exp $ ; $Revision: 2.3 $ ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 24x24 PIC16 FIXED POINT MULTIPLY ROUTINES Input: fixed point arguments in AARG and BARG Output: product AARGxBARG in AARG All timings are worst case cycle counts It is useful to note that the additional unsigned routines requiring a non-power of two argument can be called in a signed multiply application where it is known that the respective argument is nonnegative, thereby offering some improvement in performance. Routine Clocks Function FXM2424S 535 24x24 -> 48 bit signed fixed point multiply FXM2424U 512 24x24 -> 48 bit unsigned fixed point multiply FXM2323U 497 23x23 -> 46 bit unsigned fixed point multiply The above timings are based on the looped macros. If space permits, approximately 61-95 clocks can be saved by using the unrolled macros. ;********************************************************************************************** ;********************************************************************************************** ; 24x24 Bit Multiplication Macros SMUL2424L macro ; Max Timing: 2+12+6*21+20+2+7*22+21+2+6*23+22+7 = 506 clks ; Min Timing: 2+7*6+5+1+7*6+5+2+6*6+5+5 = 145 clks ; PM: 24+20+2+21+2+22+7 = 98 MOVLW MOVWF 0x8 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB2, F _C ALSM2424NA LOOPCOUNT, F LOOPSM2424A MOVWF LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB1, F _C BLSM2424NA LOOPCOUNT, F LOOPSM2424B MOVLW MOVWF 0x7 LOOPCOUNT DM: 13 LOOPSM2424A LOOPSM2424B 1997 Microchip Technology Inc. DS00617B-page 69 AN617 LOOPSM2424C RRF BTFSC GOTO DECFSZ GOTO BARGB0, F _C CLSM2424NA LOOPCOUNT, F LOOPSM2424C CLRF CLRF CLRF RETLW AARGB0 AARGB1 AARGB2 0x00 RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB2, F _C ALSM2424NA TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RLF RRF RRF RRF RRF DECFSZ GOTO SIGN,W AARGB0, F AARGB1, F AARGB2, F AARGB3, F LOOPCOUNT, F ALOOPSM2424 MOVLW MOVWF 0x8 LOOPCOUNT RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB1, F _C BLSM2424NA TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RLF RRF RRF RRF RRF RRF DECFSZ GOTO SIGN,W AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F LOOPCOUNT, F BLOOPSM2424 MOVLW MOVWF 0x7 LOOPCOUNT ALOOPSM2424 ALSM2424NA BLOOPSM2424 BLSM2424NA DS00617B-page 70 1997 Microchip Technology Inc. AN617 CLOOPSM2424 CLSM2424NA RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB0, F _C CLSM2424NA TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RLF RRF RRF RRF RRF RRF RRF DECFSZ GOTO SIGN,W AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F LOOPCOUNT, F CLOOPSM2424 RLF RRF RRF RRF RRF RRF RRF SIGN,W AARGB0, AARGB1, AARGB2, AARGB3, AARGB4, AARGB5, F F F F F F endm UMUL2424L macro ; Max Timing: 2+14+6*20+19+2+7*21+20+2+7*22+21 = 501 clks ; Min Timing: 2+7*6+5+1+7*6+5+1+7*6+5+5 = 150 clks ; PM: 23+20+2+21+2+22 = 88 DM: 13 MOVLW MOVWF 0x08 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB2, F _C ALUM2424NAP LOOPCOUNT, F LOOPUM2424A MOVWF LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB1, F _C BLUM2424NAP LOOPCOUNT, F LOOPUM2424B MOVWF LOOPCOUNT LOOPUM2424A LOOPUM2424B LOOPUM2424C 1997 Microchip Technology Inc. DS00617B-page 71 AN617 RRF BTFSC GOTO DECFSZ GOTO BARGB0, F _C CLUM2424NAP LOOPCOUNT, F LOOPUM2424C CLRF CLRF CLRF RETLW AARGB0 AARGB1 AARGB2 0x00 BCF GOTO _C CLUM2424NA BCF GOTO _C BLUM2424NA BCF GOTO _C ALUM2424NA RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB2, F _C ALUM2424NA TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF RRF DECFSZ GOTO AARGB0, F AARGB1, F AARGB2, F AARGB3, F LOOPCOUNT, F ALOOPUM2424 MOVLW MOVWF 0x08 LOOPCOUNT RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB1, F _C BLUM2424NA TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF AARGB0, F CLUM2424NAP BLUM2424NAP ALUM2424NAP ALOOPUM2424 ALUM2424NA BLOOPUM2424 BLUM2424NA DS00617B-page 72 1997 Microchip Technology Inc. AN617 RRF RRF RRF RRF DECFSZ GOTO AARGB1, F AARGB2, F AARGB3, F AARGB4, F LOOPCOUNT, F BLOOPUM2424 MOVLW MOVWF 0x08 LOOPCOUNT RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB0, F _C CLUM2424NA TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF RRF RRF RRF DECFSZ GOTO AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F LOOPCOUNT, F CLOOPUM2424 CLOOPUM2424 CLUM2424NA endm UMUL2323L macro ; Max Timing: 2+15+6*20+19+2+7*21+20+2+6*22+21+6 = 486 clks ; Min Timing: 2+7*6+5+1+7*6+5+2+6*6+5+5 = 145 clks ; PM: 24+20+2+21+2+22+6 = 97 MOVLW MOVWF 0x8 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB2, F _C ALUM2323NAP LOOPCOUNT, F LOOPUM2323A MOVWF LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB1, F _C BLUM2323NAP LOOPCOUNT, F LOOPUM2323B DM: 13 LOOPUM2323A LOOPUM2323B 1997 Microchip Technology Inc. DS00617B-page 73 AN617 MOVLW MOVWF 0x7 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB0, F _C CLUM2323NAP LOOPCOUNT, F LOOPUM2323C CLRF CLRF CLRF RETLW AARGB0 AARGB1 AARGB2 0x00 BCF GOTO _C CLUM2323NA BCF GOTO _C BLUM2323NA BCF GOTO _C ALUM2323NA RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB2, F _C ALUM2323NA TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF RRF DECFSZ GOTO AARGB0, F AARGB1, F AARGB2, F AARGB3, F LOOPCOUNT, F ALOOPUM2323 MOVLW MOVWF 0x08 LOOPCOUNT RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC BARGB1, F _C BLUM2323NA TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C LOOPUM2323C CLUM2323NAP BLUM2323NAP ALUM2323NAP ALOOPUM2323 ALUM2323NA BLOOPUM2323 DS00617B-page 74 1997 Microchip Technology Inc. AN617 INCFSZ ADDWF TEMPB0,W AARGB0, F RRF RRF RRF RRF RRF DECFSZ GOTO AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F LOOPCOUNT, F BLOOPUM2323 MOVLW MOVWF 0x07 LOOPCOUNT RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB0, F _C CLUM2323NA TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF RRF RRF RRF DECFSZ GOTO AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F LOOPCOUNT, F CLOOPUM2323 RRF RRF RRF RRF RRF RRF AARGB0, AARGB1, AARGB2, AARGB3, AARGB4, AARGB5, BLUM2323NA CLOOPUM2323 CLUM2323NA F F F F F F endm SMUL2424 macro ; Max Timing: 8+7*17+8*18+7*19+7 = 411 clks ; Min Timing: 46+5 = 51 clks ; PM: 51+4+7*17+8*18+7*19+7 = 466 DM: 12 variable i = 0 while i < 8 BTFSC GOTO 1997 Microchip Technology Inc. BARGB2,i SM2424NA#v(i) DS00617B-page 75 AN617 variable i = i + 1 endw variable i = 8 while i < 16 BTFSC GOTO BARGB1,i-8 SM2424NA#v(i) variable i = i + 1 endw variable i = 16 while i < 23 BTFSC GOTO BARGB0,i-16 SM2424NA#v(i) variable i = i + 1 endw SM2424NA0 CLRF CLRF CLRF RETURN AARGB0 AARGB1 AARGB2 RLF RRF RRF RRF RRF SIGN,W AARGB0, AARGB1, AARGB2, AARGB3, ; if we get here, BARG = 0 F F F F variable i = 1 while SM2424A#v(i) SM2424NA#v(i) i < 8 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RLF RRF RRF RRF RRF BARGB2,i SM2424NA#v(i) TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F SIGN,W, F AARGB0, F AARGB1, F AARGB2, F AARGB3, F variable i = i + 1 endw variable i = 8 DS00617B-page 76 1997 Microchip Technology Inc. AN617 while SM2424A#v(i) SM2424NA#v(i) i < 16 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RLF RRF RRF RRF RRF RRF BARGB1,i-8 SM2424NA#v(i) TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F SIGN,W AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F variable i = i + 1 endw variable i = 16 while SM2424A#v(i) SM2424NA#v(i) i < 23 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RLF RRF RRF RRF RRF RRF RRF BARGB0,i-16 SM2424NA#v(i) TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F TEMPB0,W AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F variable i = i + 1 endw RLF RRF RRF RRF RRF RRF RRF TEMPB0,W AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F endm UMUL2424 macro 1997 Microchip Technology Inc. DS00617B-page 77 AN617 ; Max Timing: 8+8*17+8*18+8*19 = 440 clks ; Min Timing: 49+5 = 54 clks ; PM: 54+4+8*17+8*18+8*19 = 490 DM: 12 variable i = 0 BCF _C ; clear carry for first right shift while i < 8 BTFSC GOTO BARGB2,i UM2424NA#v(i) variable i = i + 1 endw variable i = 8 while i < 16 BTFSC GOTO BARGB1,i-8 UM2424NA#v(i) variable i = i + 1 endw variable i = 16 while i < 24 BTFSC GOTO BARGB0,i-16 UM2424NA#v(i) variable i = i + 1 endw UM2424NA0 CLRF CLRF CLRF RETURN AARGB0 AARGB1 AARGB2 RRF RRF RRF RRF AARGB0, AARGB1, AARGB2, AARGB3, ; if we get here, BARG = 0 F F F F variable i = 1 while UM2424A#v(i) DS00617B-page 78 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC i < 8 BARGB2,i UM2424NA#v(i) TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C 1997 Microchip Technology Inc. AN617 UM2424NA#v(i) INCFSZ ADDWF RRF RRF RRF RRF TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F AARGB3, F variable i = i + 1 endw variable i = 8 while UM2424A#v(i) UM2424NA#v(i) i < 16 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF RRF RRF BARGB1,i-8 UM2424NA#v(i) TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F variable i = i + 1 endw variable i = 16 while UM2424A#v(i) UM2424NA#v(i) i < 24 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF RRF RRF RRF BARGB0,i-16 UM2424NA#v(i) TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F variable i = i + 1 endw endm 1997 Microchip Technology Inc. DS00617B-page 79 AN617 UMUL2323 macro ; Max Timing: 8+7*17+8*18+7*19+7 = 411 clks ; Min Timing: 46+5 = 51 clks ; PM: 51+4+7*17+8*18+7*19+7 = 466 DM: 12 variable i = 0 BCF _C ; clear carry for first right shift while i < 8 BTFSC GOTO BARGB2,i UM2323NA#v(i) variable i = i + 1 endw variable i = 8 while i < 16 BTFSC GOTO BARGB1,i-8 UM2323NA#v(i) variable i = i + 1 endw variable i = 16 while i < 23 BTFSC GOTO BARGB0,i-16 UM2323NA#v(i) variable i = i + 1 endw UM2323NA0 CLRF CLRF CLRF CLRF RETURN AARGB0 AARGB1 AARGB2 AARGB3 RRF RRF RRF RRF AARGB0, AARGB1, AARGB2, AARGB3, ; if we get here, BARG = 0 F F F F variable i = 1 while UM2323A#v(i) DS00617B-page 80 BTFSS GOTO MOVF ADDWF MOVF BTFSC i < 8 BARGB2,i UM2323NA#v(i) TEMPB2,W AARGB2, F TEMPB1,W _C 1997 Microchip Technology Inc. AN617 UM2323NA#v(i) INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF RRF TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F AARGB3, F variable i = i + 1 endw variable i = 8 while UM2323A#v(i) UM2323NA#v(i) i < 16 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF RRF RRF BARGB1,i-8 UM2323NA#v(i) TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F variable i = i + 1 endw variable i = 16 while UM2323A#v(i) UM2323NA#v(i) i < 23 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF RRF RRF RRF BARGB0,i-16 UM2323NA#v(i) TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F AARGB5, F variable i = i + 1 1997 Microchip Technology Inc. DS00617B-page 81 AN617 endw RRF RRF RRF RRF RRF RRF AARGB0, AARGB1, AARGB2, AARGB3, AARGB4, AARGB5, F F F F F F endm ;********************************************************************************************** ;********************************************************************************************** ; 24x24 Bit Signed Fixed Point Multiply 24x24 -> 48 ; ; Input: 24 bit signed fixed point multiplicand in AARGB0 24 bit signed fixed point multiplier in BARGB0 ; Use: CALL ; Output: 48 bit signed fixed point product in AARGB0 ; Result: AARG ; ; Max Timing: 12+506+2 = 520 clks 27+506+2 = 535 clks ; Min Timing: 12+145 = 157 clks ; PM: 27+98+1 = 126 FXM2424S DS00617B-page 82 FXM2424S <-- AARG x BARG B > 0 B < 0 DM: 13 CLRF CLRF CLRF CLRF MOVF IORWF IORWF BTFSC RETLW AARGB3 AARGB4 AARGB5 SIGN AARGB0,W AARGB1,W AARGB2,W _Z 0x00 ; clear partial product MOVF XORWF MOVWF BTFSC COMF AARGB0,W BARGB0,W TEMPB0 TEMPB0,MSB SIGN,F BTFSS GOTO BARGB0,MSB M2424SOK COMF COMF COMF INCF BTFSC INCF BTFSC INCF BARGB2, BARGB1, BARGB0, BARGB2, _Z BARGB1, _Z BARGB0, F F F F COMF COMF COMF INCF BTFSC INCF AARGB2, AARGB1, AARGB0, AARGB2, _Z AARGB1, F F F F F F F 1997 Microchip Technology Inc. AN617 M2424SOK BTFSC INCF _Z AARGB0, F BTFSC GOTO BARGB0,MSB M2424SX MOVF MOVWF MOVF MOVWF MOVF MOVWF AARGB0,W TEMPB0 AARGB1,W TEMPB1 AARGB2,W TEMPB2 SMUL2424L M2424SX RETLW 0x00 CLRF CLRF CLRF RLF RRF RRF RRF RRF AARGB3 AARGB4 AARGB5 SIGN,W AARGB0,F AARGB1,F AARGB2,F AARGB3,F RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; 24x24 Bit Unsigned Fixed Point Multiply 24x24 -> 48 ; ; Input: 24 bit unsigned fixed point multiplicand in AARGB0 24 bit unsigned fixed point multiplier in BARGB0 ; Use: CALL ; Output: 48 bit unsigned fixed point product in AARGB0 ; Result: AARG ; Max Timing: 9+501+2 = 512 clks ; Min Timing: 9+150 = 159 clks ; PM: 9+88+1 = 98 FXM2424U <-- AARG x BARG DM: 13 FXM2424U CLRF CLRF CLRF MOVF MOVWF MOVF MOVWF MOVF MOVWF AARGB3 AARGB4 AARGB5 AARGB0,W TEMPB0 AARGB1,W TEMPB1 AARGB2,W TEMPB2 ; clear partial product UMUL2424L RETLW 0x00 ;********************************************************************************************** 1997 Microchip Technology Inc. DS00617B-page 83 AN617 ;********************************************************************************************** ; 23x23 Bit Unsigned Fixed Point Divide 23x23 -> 46 ; ; Input: 23 bit unsigned fixed point multiplicand in AARGB0 23 bit unsigned fixed point multiplier in BARGB0 ; Use: CALL ; Output: 46 bit unsigned fixed point product in AARGB0 ; Result: AARG ; Max Timing: 9+486+2 = 497 clks ; Min Timing: 9+145 = 154 clks ; PM: 9+97+1 = 107 FXM2323U <-- AARG x BARG DM: 13 FXM2323U CLRF CLRF CLRF MOVF MOVWF MOVF MOVWF MOVF MOVWF AARGB3 AARGB4 AARGB5 AARGB0,W TEMPB0 AARGB1,W TEMPB1 AARGB2,W TEMPB2 ; clear partial product UMUL2323L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** DS00617B-page 84 1997 Microchip Technology Inc. AN617 D.5 24x16 PIC16C5X/PIC16CXXX Fixed Point Multiply Routines ; RCS Header $Id: fxm46.a16 2.3 1996/10/16 14:23:23 F.J.Testa Exp $ ; $Revision: 2.3 $ ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 24x16 PIC16 FIXED POINT MULTIPLY ROUTINES Input: fixed point arguments in AARG and BARG Output: product AARGxBARG in AARG All timings are worst case cycle counts It is useful to note that the additional unsigned routines requiring a non-power of two argument can be called in a signed multiply application where it is known that the respective argument is nonnegative, thereby offering some improvement in performance. Routine Clocks Function FXM2416S 346 24x16 -> 40 bit signed fixed point multiply FXM2416U 334 24x16 -> 40 bit unsigned fixed point multiply FXM2315U 319 23x15 -> 38 bit unsigned fixed point multiply The above timings are based on the looped macros. If space permits, approximately 36-62 clocks can be saved by using the unrolled macros. ;********************************************************************************************** ;********************************************************************************************** ; 24x16 Bit Multiplication Macros SMUL2416L macro ; Max Timing: 2+12+6*21+20+2+6*22+21+6 = 321 clks ; Min Timing: 2+7*6+5+2+6*6+5+5 = 97 clks ; PM: 19+20+2+21+6 = 68 DM: 12 MOVLW MOVWF 0x8 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB1, F _C ALSM2416NA LOOPCOUNT, F LOOPSM2416A MOVLW MOVWF 0x7 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB0, F _C BLSM2416NA LOOPCOUNT, F LOOPSM2416B CLRF CLRF AARGB0 AARGB1 LOOPSM2416A LOOPSM2416B 1997 Microchip Technology Inc. DS00617B-page 85 AN617 CLRF RETLW AARGB2 0x00 RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB1, F _C ALSM2416NA TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RLF RRF RRF RRF RRF DECFSZ GOTO SIGN,W AARGB0, F AARGB1, F AARGB2, F AARGB3, F LOOPCOUNT, F ALOOPSM2416 MOVLW MOVWF 0x7 LOOPCOUNT RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB0, F _C BLSM2416NA TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RLF RRF RRF RRF RRF RRF DECFSZ GOTO SIGN,W AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F LOOPCOUNT, F BLOOPSM2416 RLF RRF RRF RRF RRF RRF SIGN,W AARGB0, AARGB1, AARGB2, AARGB3, AARGB4, ALOOPSM2416 ALSM2416NA BLOOPSM2416 BLSM2416NA F F F F F endm UMUL2416L ; macro Max Timing: DS00617B-page 86 2+14+6*20+19+2+7*21+20 = 324 clks 1997 Microchip Technology Inc. AN617 ; Min Timing: 2+7*6+5+1+7*6+5+5 = 102 clks ; PM: 18+20+2+21 = 61 DM: 12 MOVLW MOVWF 0x08 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB1, F _C ALUM2416NAP LOOPCOUNT, F LOOPUM2416A MOVWF LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB0, F _C BLUM2416NAP LOOPCOUNT, F LOOPUM2416B CLRF CLRF CLRF RETLW AARGB0 AARGB1 AARGB2 0x00 BCF GOTO _C BLUM2416NA BCF GOTO _C ALUM2416NA RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB1, F _C ALUM2416NA TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF RRF DECFSZ GOTO AARGB0, F AARGB1, F AARGB2, F AARGB3, F LOOPCOUNT, F ALOOPUM2416 MOVLW MOVWF 0x08 LOOPCOUNT RRF BARGB0, F LOOPUM2416A LOOPUM2416B BLUM2416NAP ALUM2416NAP ALOOPUM2416 ALUM2416NA BLOOPUM2416 1997 Microchip Technology Inc. DS00617B-page 87 AN617 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF _C BLUM2416NA TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF RRF RRF DECFSZ GOTO AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F LOOPCOUNT, F BLOOPUM2416 BLUM2416NA endm UMUL2315L macro ; Max Timing: 2+15+6*20+19+2+6*21+20+5 = 309 clks ; Min Timing: 2+7*6+5+1+6*6+5+5 = 96 clks ; PM: 19+20+2+21+5 = 67 DM: 12 MOVLW MOVWF 0x8 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB1, F _C ALUM2315NAP LOOPCOUNT, F LOOPUM2315A MOVLW MOVWF 0x7 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB0, F _C BLUM2315NAP LOOPCOUNT, F LOOPUM2315B CLRF CLRF CLRF RETLW AARGB0 AARGB1 AARGB2 0x00 BCF GOTO _C BLUM2315NA BCF _C LOOPUM2315A LOOPUM2315B BLUM2315NAP ALUM2315NAP DS00617B-page 88 1997 Microchip Technology Inc. AN617 GOTO ALUM2315NA RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB1, F _C ALUM2315NA TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF RRF DECFSZ GOTO AARGB0, F AARGB1, F AARGB2, F AARGB3, F LOOPCOUNT, F ALOOPUM2315 MOVLW MOVWF 0x07 LOOPCOUNT RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB0, F _C BLUM2315NA TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF RRF RRF DECFSZ GOTO AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F LOOPCOUNT, F BLOOPUM2315 RRF RRF RRF RRF RRF AARGB0, AARGB1, AARGB2, AARGB3, AARGB4, ALOOPUM2315 ALUM2315NA BLOOPUM2315 BLUM2315NA F F F F F endm SMUL2416 ; macro Max Timing: 8+7*17+7*18+6 = 259 clks 1997 Microchip Technology Inc. DS00617B-page 89 AN617 ; Min Timing: 30+5 = 35 clks ; PM: 30+4+7*17+7*18+6 = 285 DM: 11 variable i = 0 while i < 8 BTFSC GOTO BARGB1,i SM2416NA#v(i) variable i = i + 1 endw variable i = 8 while i < 15 BTFSC GOTO BARGB0,i-8 SM2416NA#v(i) variable i = i + 1 endw SM2416NA0 CLRF CLRF CLRF RETURN AARGB0 AARGB1 AARGB2 RLF RRF RRF RRF RRF SIGN,W AARGB0, AARGB1, AARGB2, AARGB3, ; if we get here, BARG = 0 F F F F variable i = 1 while SM2416A#v(i) SM2416NA#v(i) i < 8 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RLF RRF RRF RRF RRF BARGB1,i SM2416NA#v(i) TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F SIGN,W AARGB0, F AARGB1, F AARGB2, F AARGB3, F variable i = i + 1 endw variable i = 8 DS00617B-page 90 1997 Microchip Technology Inc. AN617 while SM2416A#v(i) SM2416NA#v(i) i < 15 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RLF RRF RRF RRF RRF RRF BARGB0,i-8 SM2416NA#v(i) TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F SIGN,W AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F variable i = i + 1 endw RLF RRF RRF RRF RRF RRF SIGN,W AARGB0, AARGB1, AARGB2, AARGB3, AARGB4, F F F F F endm UMUL2416 macro ; Max Timing: 8+8*17+8*18 = 288 clks ; Min Timing: 33+5 = 38 clks ; PM: 37+4+8*17+8*18 = 321 DM: 11 variable i = 0 BCF _C ; clear carry for first right shift while i < 8 BTFSC GOTO BARGB1,i UM2416NA#v(i) variable i = i + 1 endw variable i = 8 while i < 16 BTFSC GOTO BARGB0,i-8 UM2416NA#v(i) variable i = i + 1 1997 Microchip Technology Inc. DS00617B-page 91 AN617 endw UM2416NA0 CLRF CLRF CLRF RETURN AARGB0 AARGB1 AARGB2 RRF RRF RRF RRF AARGB0, AARGB1, AARGB2, AARGB3, ; if we get here, BARG = 0 F F F F variable i = 1 while UM2416A#v(i) UM2416NA#v(i) i < 8 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF RRF BARGB1,i UM2416NA#v(i) TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F AARGB3, F variable i = i + 1 endw variable i = 8 while UM2416A#v(i) UM2416NA#v(i) BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF RRF RRF i < 16 BARGB0,i-8 UM2416NA#v(i) TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F variable i = i + 1 endw endm DS00617B-page 92 1997 Microchip Technology Inc. AN617 UMUL2315 macro ; Max Timing: 8+7*17+7*18+6 = 259 clks ; Min Timing: 31+5 = 36 clks ; PM: 35+4+7*17+7*18+6 = 290 DM: 11 variable i = 0 BCF _C ; clear carry for first right shift while i < 8 BTFSC GOTO BARGB1,i UM2315NA#v(i) variable i = i + 1 endw variable i = 8 while i < 15 BTFSC GOTO BARGB0,i-8 UM2315NA#v(i) variable i = i + 1 endw UM2315NA0 CLRF CLRF CLRF RETURN AARGB0 AARGB1 AARGB2 RRF RRF RRF RRF AARGB0, AARGB1, AARGB2, AARGB3, ; if we get here, BARG = 0 F F F F variable i = 1 while UM2315A#v(i) UM2315NA#v(i) i < 8 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF RRF BARGB1,i UM2315NA#v(i) TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F AARGB3, F variable i = i + 1 1997 Microchip Technology Inc. DS00617B-page 93 AN617 endw variable i = 8 while UM2315A#v(i) UM2315NA#v(i) i < 15 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF RRF RRF BARGB0,i-8 UM2315NA#v(i) TEMPB2,W AARGB2, F TEMPB1,W _C TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F AARGB3, F AARGB4, F variable i = i + 1 endw RRF RRF RRF RRF RRF AARGB0, AARGB1, AARGB2, AARGB3, AARGB4, F F F F F endm ;********************************************************************************************** ;********************************************************************************************** ; 24x16 Bit Signed Fixed Point Multiply 24x16 -> 40 ; ; Input: 24 bit signed fixed point multiplicand in AARGB0 16 bit signed fixed point multiplier in BARGB0 ; Use: CALL ; Output: 40 bit signed fixed point product in AARGB0 ; Result: AARG ; ; Max Timing: 11+321+2 = 334 clks 23+321+2 = 346 clks ; Min Timing: 11+97 = 108 clks ; PM: 23+68+1 = 92 FXM2416S DS00617B-page 94 CLRF CLRF CLRF MOVF IORWF IORWF BTFSC RETLW FXM2416S <-- AARG x BARG B > 0 B < 0 DM: 12 AARGB3 AARGB4 SIGN AARGB0,W AARGB1,W AARGB2,W _Z 0x00 ; clear partial product 1997 Microchip Technology Inc. AN617 M2416SOK MOVF XORWF MOVWF BTFSC COMF AARGB0,W BARGB0,W TEMPB0 TEMPB0,MSB SIGN,F BTFSS GOTO BARGB0,MSB M2416SOK COMF COMF INCF BTFSC INCF BARGB1, BARGB0, BARGB1, _Z BARGB0, F F F COMF COMF COMF INCF BTFSC INCF BTFSC INCF AARGB2, AARGB1, AARGB0, AARGB2, _Z AARGB1, _Z AARGB0, F F F F BTFSC GOTO BARGB0,MSB M2416SX MOVF MOVWF MOVF MOVWF MOVF MOVWF AARGB0,W TEMPB0 AARGB1,W TEMPB1 AARGB2,W TEMPB2 F F F SMUL2416L M2416SX RETLW 0x00 CLRF CLRF RLF RRF RRF RRF RRF AARGB3 AARGB4 SIGN,W AARGB0,F AARGB1,F AARGB2,F AARGB3,F RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; 24x16 Bit Unsigned Fixed Point Multiply 24x16 -> 40 ; ; Input: 24 bit unsigned fixed point multiplicand in AARGB0 16 bit unsigned fixed point multiplier in BARGB0 ; Use: CALL ; Output: 40 bit unsigned fixed point product in AARGB0 ; Result: AARG ; Max Timing: 8+324+2 = 334 clks ; Min Timing: 8+102 = 110 clks FXM2416U <-- 1997 Microchip Technology Inc. AARG x BARG DS00617B-page 95 AN617 ; PM: 8+61+1 = 70 DM: 12 FXM2416U CLRF CLRF MOVF MOVWF MOVF MOVWF MOVF MOVWF AARGB3 AARGB4 AARGB0,W TEMPB0 AARGB1,W TEMPB1 AARGB2,W TEMPB2 ; clear partial product UMUL2416L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; 23x15 Bit Unsigned Fixed Point Divide 23x15 -> 38 ; ; Input: 23 bit unsigned fixed point multiplicand in AARGB0 15 bit unsigned fixed point multiplier in BARGB0 ; Use: CALL ; Output: 38 bit unsigned fixed point product in AARGB0 ; Result: AARG ; Max Timing: 8+309+2 = 319 clks ; Min Timing: 8+96 = 104 clks ; PM: 8+67+1 = 76 FXM2315U <-- AARG x BARG DM: 12 FXM2315U CLRF CLRF MOVF MOVWF MOVF MOVWF MOVF MOVWF AARGB3 AARGB4 AARGB0,W TEMPB0 AARGB1,W TEMPB1 AARGB2,W TEMPB2 ; clear partial product UMUL2315L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** DS00617B-page 96 1997 Microchip Technology Inc. AN617 D.6 16x16 PIC16C5X/PIC16CXXX Fixed Point Multiply Routines ; RCS Header $Id: fxm66.a16 2.3 1996/10/16 14:23:23 F.J.Testa Exp $ ; $Revision: 2.3 $ ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 16x16 PIC16 FIXED POINT MULTIPLY ROUTINES Input: fixed point arguments in AARG and BARG Output: product AARGxBARG in AARG All timings are worst case cycle counts It is useful to note that the additional unsigned routines requiring a non-power of two argument can be called in a signed multiply application where it is known that the respective argument is nonnegative, thereby offering some improvement in performance. Routine Clocks Function FXM1616S 269 16x16 -> 32 bit signed fixed point multiply FXM1616U 256 16x16 -> 32 bit unsigned fixed point multiply FXM1515U 244 15x15 -> 30 bit unsigned fixed point multiply The above timings are based on the looped macros. If space permits, approximately 64-73 clocks can be saved by using the unrolled macros. ;********************************************************************************************** ;********************************************************************************************** ; 16x16 Bit Multiplication Macros SMUL1616L macro ; Max Timing: 2+11+6*16+15+2+6*17+16+5 = 249 clks ; Min Timing: 2+7*6+5+2+6*6+5+4 = 96 clks ; PM: 55 DM: 9 MOVLW MOVWF 0x8 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB1, F _C ALSM1616NA LOOPCOUNT, F LOOPSM1616A MOVLW MOVWF 0x7 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB0, F _C BLSM1616NA LOOPCOUNT, F LOOPSM1616B CLRF CLRF AARGB0 AARGB1 LOOPSM1616A LOOPSM1616B 1997 Microchip Technology Inc. DS00617B-page 97 AN617 RETLW 0x00 RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF BARGB1, F _C ALSM1616NA TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RLF RRF RRF RRF DECFSZ GOTO SIGN,W AARGB0, F AARGB1, F AARGB2, F LOOPCOUNT, F ALOOPSM1616 MOVLW MOVWF 0x7 LOOPCOUNT RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF BARGB0, F _C BLSM1616NA TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RLF RRF RRF RRF RRF DECFSZ GOTO SIGN,W AARGB0, F AARGB1, F AARGB2, F AARGB3, F LOOPCOUNT, F BLOOPSM1616 RLF RRF RRF RRF RRF SIGN,W AARGB0, AARGB1, AARGB2, AARGB3, ALOOPSM1616 ALSM1616NA BLOOPSM1616 BLSM1616NA F F F F endm UMUL1616L macro ; Max Timing: 2+13+6*15+14+2+7*16+15 = 248 clks ; Min Timing: 2+7*6+5+1+7*6+5+4 = 101 clks ; PM: 51 DM: 9 MOVLW MOVWF 0x08 LOOPCOUNT RRF BTFSC GOTO DECFSZ BARGB1, F _C ALUM1616NAP LOOPCOUNT, F LOOPUM1616A DS00617B-page 98 1997 Microchip Technology Inc. AN617 GOTO LOOPUM1616A MOVWF LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB0, F _C BLUM1616NAP LOOPCOUNT, F LOOPUM1616B CLRF CLRF RETLW AARGB0 AARGB1 0x00 BCF GOTO _C BLUM1616NA BCF GOTO _C ALUM1616NA RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF BARGB1, F _C ALUM1616NA TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF DECFSZ GOTO AARGB0, F AARGB1, F AARGB2, F LOOPCOUNT, F ALOOPUM1616 MOVLW MOVWF 0x08 LOOPCOUNT RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF BARGB0, F _C BLUM1616NA TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF RRF DECFSZ GOTO AARGB0, F AARGB1, F AARGB2, F AARGB3, F LOOPCOUNT, F BLOOPUM1616 LOOPUM1616B BLUM1616NAP ALUM1616NAP ALOOPUM1616 ALUM1616NA BLOOPUM1616 BLUM1616NA endm 1997 Microchip Technology Inc. DS00617B-page 99 AN617 UMUL1515L macro ; Max Timing: 2+13+6*15+14+2+6*16+15+4 = 236 clks ; Min Timing: 2+7*6+5+2+6*6+5+4 = 97 clks ; PM: 56 DM: 9 MOVLW MOVWF 0x8 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB1, F _C ALUM1515NAP LOOPCOUNT, F LOOPUM1515A MOVLW MOVWF 0x7 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB0, F _C BLUM1515NAP LOOPCOUNT, F LOOPUM1515B CLRF CLRF RETLW AARGB0 AARGB1 0x00 BCF GOTO _C BLUM1515NA BCF GOTO _C ALUM1515NA RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF BARGB1, F _C ALUM1515NA TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF DECFSZ GOTO AARGB0, F AARGB1, F AARGB2, F LOOPCOUNT, F ALOOPUM1515 MOVLW MOVWF 0x07 LOOPCOUNT RRF BTFSS GOTO BARGB0, F _C BLUM1515NA LOOPUM1515A LOOPUM1515B BLUM1515NAP ALUM1515NAP ALOOPUM1515 ALUM1515NA BLOOPUM1515 DS00617B-page 100 1997 Microchip Technology Inc. AN617 MOVF ADDWF MOVF BTFSC INCFSZ ADDWF TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF RRF DECFSZ GOTO AARGB0, F AARGB1, F AARGB2, F AARGB3, F LOOPCOUNT, F BLOOPUM1515 RRF RRF RRF RRF AARGB0, AARGB1, AARGB2, AARGB3, BLUM1515NA F F F F endm SMUL1616 macro ; Max Timing: 5+6+7*11+7*12+4 = 176 clks ; Min Timing: 5+24+21+5 = 55 clks ; PM: 5+3*8+3*7+6+7*11+7*12+4 = 221 DM: 8 variable i = 0 BTFSC COMF MOVF MOVWF RLF SIGN,MSB AARGB2, F AARGB2,W AARGB3 SIGN,W while i < 8 BTFSC GOTO BCF BARGB1,i SM1616NA#v(i) AARGB2,7-i variable i = i + 1 endw variable i = 8 while i < 15 BTFSC GOTO BCF BARGB0,i-8 SM1616NA#v(i) AARGB3,15-i variable i =i + 1 endw CLRF CLRF RETURN 1997 Microchip Technology Inc. AARGB0 AARGB1 ; if we get here, BARG = 0 DS00617B-page 101 AN617 SM1616NA0 RRF RRF RRF AARGB0, F AARGB1, F AARGB2, F variable i = 1 while SM1616A#v(i) i < 8 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF BARGB1,i SM1616NA#v(i) TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF AARGB0, F AARGB1, F AARGB2, F SM1616NA#v(i) variable i = i + 1 endw variable i = 8 while SM1616A#v(i) i < 15 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF BARGB0,i-8 SM1616NA#v(i) TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF RRF AARGB0, AARGB1, AARGB2, AARGB3, SM1616NA#v(i) F F F F variable i = i + 1 endw RRF RRF RRF RRF AARGB0, AARGB1, AARGB2, AARGB3, F F F F endm UMUL1616 macro ; Max Timing: 1+6+7*11+8*12 = 180 clks ; Min Timing: 1+2*8+2*8+4 = 37 clks ; PM: 1+2*8+2*8+4+7*11+8*12 = 210 DS00617B-page 102 DM: 8 1997 Microchip Technology Inc. AN617 variable i = 0 BCF _C ; clear carry for first right shift while i < 8 BTFSC GOTO BARGB1,i UM1616NA#v(i) variable i = i + 1 endw variable i = 8 while i < 16 BTFSC GOTO BARGB0,i-8 UM1616NA#v(i) variable i = i + 1 endw UM1616NA0 CLRF CLRF RETURN AARGB0 AARGB1 RRF RRF RRF AARGB0, F AARGB1, F AARGB2, F ; if we get here, BARG = 0 variable i = 1 while UM1616A#v(i) UM1616NA#v(i) i < 8 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF BARGB1,i UM1616NA#v(i) TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F variable i = i + 1 endw variable i = 8 while UM1616A#v(i) UM1616NA#v(i) i < 16 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF 1997 Microchip Technology Inc. BARGB0,i-8 UM1616NA#v(i) TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F DS00617B-page 103 AN617 RRF RRF AARGB2, F AARGB3, F variable i = i + 1 endw endm UMUL1515 macro ; Max Timing: 7+7*11+7*12+4 = 172 clks ; Min Timing: 1+16+14+4 = 35 clks ; PM: 1+2*8+2*7+6+7*11+7*12+4 = 202 DM: 8 variable i = 0 BCF _C ; clear carry for first right shift while i < 8 BTFSC GOTO BARGB1,i UM1515NA#v(i) variable i = i + 1 endw variable i = 8 while i < 15 BTFSC GOTO BARGB0,i-8 UM1515NA#v(i) variable i = i + 1 endw UM1515NA0 CLRF CLRF RETURN AARGB0 AARGB1 RRF RRF RRF AARGB0, F AARGB1, F AARGB2, F ; if we get here, BARG = 0 variable i = 1 while UM1515A#v(i) UM1515NA#v(i) DS00617B-page 104 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF i < 8 BARGB1,i UM1515NA#v(i) TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F 1997 Microchip Technology Inc. AN617 variable i = i + 1 endw variable i = 8 while UM1515A#v(i) UM1515NA#v(i) i < 15 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF RRF BARGB0,i-8 UM1515NA#v(i) TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F AARGB3, F variable i = i + 1 endw RRF RRF RRF RRF AARGB0, AARGB1, AARGB2, AARGB3, F F F F endm ;********************************************************************************************** ;********************************************************************************************** ; 16x16 Bit Signed Fixed Point Multiply 16x16 -> 32 ; ; Input: 16 bit signed fixed point multiplicand in AARGB0 16 bit signed fixed point multiplier in BARGB0 ; Use: CALL ; Output: 32 bit signed fixed point product in AARGB0 ; Result: AARG ; ; Max Timing: 9+249+2 = 260 clks 18+249+2 = 269 clks ; Min Timing: 9+96 = 105 clks ; PM: 18+55+1 = 74 FXM1616S FXM1616S <-- AARG x BARG DM: 9 CLRF CLRF CLRF MOVF IORWF BTFSC RETLW AARGB2 AARGB3 SIGN AARGB0,W AARGB1,W _Z 0x00 MOVF XORWF MOVWF BTFSC AARGB0,W BARGB0,W TEMPB0 TEMPB0,MSB 1997 Microchip Technology Inc. B > 0 B < 0 ; clear partial product DS00617B-page 105 AN617 M1616SOK COMF SIGN,F BTFSS GOTO BARGB0,MSB M1616SOK COMF COMF INCF BTFSC INCF BARGB1, BARGB0, BARGB1, _Z BARGB0, F F F COMF COMF INCF BTFSC INCF AARGB1, AARGB0, AARGB1, _Z AARGB0, F F F BTFSC GOTO BARGB0,MSB M1616SX MOVF MOVWF MOVF MOVWF AARGB0,W TEMPB0 AARGB1,W TEMPB1 F F SMUL1616L M1616SX RETLW 0x00 CLRF CLRF RLF RRF RRF RRF AARGB2 AARGB3 SIGN,W AARGB0,F AARGB1,F AARGB2,F RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; 16x16 Bit Unsigned Fixed Point Multiply 16x16 -> 32 ; ; Input: 16 bit unsigned fixed point multiplicand in AARGB0 16 bit unsigned fixed point multiplier in BARGB0 ; Use: CALL ; Output: 32 bit unsigned fixed point product in AARGB0 ; Result: AARG ; Max Timing: 6+248+2 = 256 clks ; Min Timing: 6+101 = 107 clks ; PM: 6+51+1 = 58 FXM1616U <-- AARG x BARG DM: 9 FXM1616U CLRF CLRF MOVF MOVWF MOVF MOVWF DS00617B-page 106 AARGB2 AARGB3 AARGB0,W TEMPB0 AARGB1,W TEMPB1 ; clear partial product 1997 Microchip Technology Inc. AN617 UMUL1616L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; 15x15 Bit Unsigned Fixed Point Divide 15x15 -> 30 ; ; Input: 15 bit unsigned fixed point multiplicand in AARGB0 15 bit unsigned fixed point multiplier in BARGB0 ; Use: CALL ; Output: 30 bit unsigned fixed point product in AARGB0 ; Result: AARG ; Max Timing: 6+236+2 = 244 clks ; Min Timing: 6+97 = 103 clks ; PM: 6+56+1 = 63 FXM1515U <-- AARG x BARG DM: 9 FXM1515U CLRF CLRF MOVF MOVWF MOVF MOVWF AARGB2 AARGB3 AARGB0,W TEMPB0 AARGB1,W TEMPB1 ; clear partial product UMUL1515L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** 1997 Microchip Technology Inc. DS00617B-page 107 AN617 D.7 16x8 PIC16C5X/PIC16CXXX Fixed Point Multiply Routines ; RCS Header $Id: fxm68.a16 2.3 1996/10/16 14:23:23 F.J.Testa Exp $ ; $Revision: 2.3 $ ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 16x8 PIC16 FIXED POINT MULTIPLY ROUTINES Input: fixed point arguments in AARG and BARG Output: product AARGxBARG in AARG All timings are worst case cycle counts It is useful to note that the additional unsigned routines requiring a non-power of two argument can be called in a signed multiply application where it is known that the respective argument is nonnegative, thereby offering some improvement in performance. Routine Clocks Function FXM1608S 128 16x08 -> 24 bit signed fixed point multiply FXM1608U 126 16x08 -> 24 bit unsigned fixed point multiply FXM1507U 114 15x07 -> 22 bit unsigned fixed point multiply The above timings are based on the looped macros. If space permits, approximately 24-35 clocks can be saved by using the unrolled macros. ;********************************************************************************************** ;********************************************************************************************** ; 16x08 Bit Multiplication Macros SMUL1608L macro ; Max Timing: 2+11+5*16+15+4 = 112 clks ; Min Timing: 2+6*6+5+4 = 47 clks ; PM: 29 DM: 7 MOVLW MOVWF 0x07 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB0, F _C LSM1608NA LOOPCOUNT, F LOOPSM1608A CLRF CLRF RETLW AARGB0 AARGB1 0x00 RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC BARGB0, F _C LSM1608NA TEMPB1,W AARGB1, F TEMPB0,W _C LOOPSM1608A LOOPSM1608 DS00617B-page 108 1997 Microchip Technology Inc. AN617 LSM1608NA INCFSZ ADDWF TEMPB0,W AARGB0, F RLF RRF RRF RRF DECFSZ GOTO SIGN,W AARGB0, F AARGB1, F AARGB2, F LOOPCOUNT, F LOOPSM1608 RLF RRF RRF RRF SIGN,W AARGB0, F AARGB1, F AARGB2, F endm UMUL1608L macro ; Max Timing: 2+13+6*15+14 = 119 clks ; Min Timing: 2+7*6+5+4 = 54 clks ; PM: 26 DM: 7 MOVLW MOVWF 0x08 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB0, F _C LUM1608NAP LOOPCOUNT, F LOOPUM1608A CLRF CLRF RETLW AARGB0 AARGB1 0x00 BCF GOTO _C LUM1608NA RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF DECFSZ GOTO BARGB0, F _C LUM1608NA TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F LOOPCOUNT, F LOOPUM1608 LOOPUM1608A LUM1608NAP LOOPUM1608 LUM1608NA endm UMUL1507L ; macro Max Timing: 2+13+5*15+14+3 = 107 clks 1997 Microchip Technology Inc. DS00617B-page 109 AN617 ; Min Timing: ; PM: 29 2+6*6+5+4 = 47 clks DM: 7 MOVLW MOVWF 0x07 LOOPCOUNT RRF BTFSC GOTO DECFSZ GOTO BARGB0, F _C LUM1507NAP LOOPCOUNT, F LOOPUM1507A CLRF CLRF RETLW AARGB0 AARGB1 0x00 BCF GOTO _C LUM1507NA RRF BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF DECFSZ GOTO BARGB0, F _C LUM1507NA TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F LOOPCOUNT, F LOOPUM1507 RRF RRF RRF AARGB0, F AARGB1, F AARGB2, F LOOPUM1507A LUM1507NAP LOOPUM1507 LUM1507NA endm SMUL1608 macro ; Max Timing: 3+6+6*11+3 = 78 clks ; Min Timing: 3+21+5 = 29 clks ; PM: 3+3*7+7+6*11+3 = 100 DM: 6 variable i =0 BTFSC COMF RLF SIGN,MSB AARGB2, F SIGN,W while i < 7 BTFSC GOTO BCF DS00617B-page 110 BARGB0,i SM1608NA#v(i) AARGB2,7-i 1997 Microchip Technology Inc. AN617 variable i = i + 1 endw CLRF CLRF CLRF RETURN AARGB0 AARGB1 AARGB2 ; if we get here, BARG = 0 RRF RRF RRF AARGB0, F AARGB1, F AARGB2, F SM1608NA0 variable i = 1 while SM1608A#v(i) i < 7 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF BARGB0,i SM1608NA#v(i) TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F RRF RRF RRF AARGB0, F AARGB1, F AARGB2, F SM1608NA#v(i) variable i = i + 1 endw RRF RRF RRF AARGB0, F AARGB1, F AARGB2, F endm UMUL1608 macro ; Max Timing: 1+6+7*11 = 84 clks ; Min Timing: 1+2*8+4 = 21 clks ; PM: 1+2*8+4+6*7 = 63 DM: 4 variable i = 0 BCF _C ; clear carry for first right shift while i < 8 BTFSC GOTO BARGB0,i UM1608NA#v(i) variable i = i + 1 endw CLRF CLRF 1997 Microchip Technology Inc. AARGB0 AARGB1 ; if we get here, BARG = 0 DS00617B-page 111 AN617 RETURN UM1608NA0 RRF RRF RRF AARGB0, F AARGB1, F AARGB2, F variable i = 1 while UM1608A#v(i) UM1608NA#v(i) i < 8 BTFSS GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF RRF RRF RRF BARGB0,i UM1608NA#v(i) TEMPB1,W AARGB1, F TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F variable i = i + 1 endw endm UMUL1507 macro ; Max Timing: 7+6*12+4 = 83 clks ; Min Timing: 14+3 = 17 clks ; PM: 2*7+7+6*12+4 = 97 DM: 6 variable i = 0 BCF _C ; clear carry for first right shift while i < 7 BTFSC GOTO BARGB0,i UM1507NA#v(i) variable i = i + 1 endw UM1507NA0 CLRF CLRF RETURN AARGB0 AARGB1 RRF RRF RRF AARGB0, F AARGB1, F AARGB2, F ; if we get here, BARG = 0 variable i = 1 while UM1507A#v(i) DS00617B-page 112 BTFSS GOTO MOVF ADDWF i < 7 BARGB0,i UM1507NA#v(i) TEMPB1,W AARGB1, F 1997 Microchip Technology Inc. AN617 UM1507NA#v(i) MOVF BTFSC INCFSZ ADDWF RRF RRF RRF TEMPB0,W _C TEMPB0,W AARGB0, F AARGB0, F AARGB1, F AARGB2, F variable i = i + 1 endw RRF RRF RRF AARGB0, F AARGB1, F AARGB2, F endm ;********************************************************************************************** ;********************************************************************************************** ; 16x8 Bit Signed Fixed Point Multiply 16x8 -> 24 ; ; Input: 16 bit signed fixed point multiplicand in AARGB0 8 bit signed fixed point multiplier in BARGB0 ; Use: CALL ; Output: 24 bit signed fixed point product in AARGB0 ; Result: AARG ; ; Max Timing: 8+112+2 = 122 clks 14+112+2 = 128 clks ; Min Timing: 8+47 = 55 clks ; PM: 14+29+1 = 44 FXM1608S FXM1608S <-- AARG x BARG DM: 7 CLRF CLRF MOVF IORWF BTFSC RETLW AARGB2 SIGN AARGB0,W AARGB1,W _Z 0x00 MOVF XORWF MOVWF BTFSC COMF AARGB0,W BARGB0,W TEMPB0 TEMPB0,MSB SIGN,F BTFSS GOTO BARGB0,MSB M1608SOK COMF INCF BARGB0,F BARGB0,F COMF COMF INCF BTFSC INCF AARGB1, AARGB0, AARGB1, _Z AARGB0, BTFSC GOTO BARGB0,MSB M1608SX 1997 Microchip Technology Inc. B > 0 B < 0 ; clear partial product ; make multiplier BARG > 0 F F F F DS00617B-page 113 AN617 M1608SOK MOVF MOVWF MOVF MOVWF AARGB0,W TEMPB0 AARGB1,W TEMPB1 SMUL1608 M1608SX RETLW 0x00 CLRF RLF RRF RRF RRF AARGB2 SIGN,W AARGB0,F AARGB1,F AARGB2,F RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; 16x8 Bit Unsigned Fixed Point Multiply 16x8 -> 24 ; ; Input: 16 bit unsigned fixed point multiplicand in AARGB0 8 bit unsigned fixed point multiplier in BARGB0 ; Use: CALL ; Output: 24 bit unsigned fixed point product in AARGB0 ; Result: AARG ; Max Timing: 5+119+2 = 126 clks ; Min Timing: 5+54 = 59 clks ; PM: 5+26+1 = 31 FXM1608U FXM1608U <-- AARG x BARG DM: 7 CLRF MOVF MOVWF MOVF MOVWF AARGB2 AARGB0,W TEMPB0 AARGB1,W TEMPB1 ; clear partial product UMUL1608L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; 15x7 Bit Unsigned Fixed Point Divide 15x7 -> 22 ; ; Input: 15 bit unsigned fixed point multiplicand in AARGB0 7 bit unsigned fixed point multiplier in BARGB0 ; Use: CALL ; Output: 22 bit unsigned fixed point product in AARGB0 ; Result: AARG ; Max Timing: 5+107+2 = 114 clks ; Min Timing: 5+47 = 52 clks DS00617B-page 114 FXM0807U <-- AARG x BARG 1997 Microchip Technology Inc. AN617 ; FXM1507U PM: 5+29+1 = 35 CLRF MOVF MOVWF MOVF MOVWF DM: 7 AARGB2 AARGB0,W TEMPB0 AARGB1,W TEMPB1 ; clear partial product UMUL1507 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** 1997 Microchip Technology Inc. DS00617B-page 115 AN617 D.8 8x8 PIC16C5X/PIC16CXXX Fixed Point Multiply Routines ; RCS Header $Id: fxm88.a16 2.3 1996/10/16 14:23:23 F.J.Testa Exp $ ; $Revision: 2.3 $ ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 8x8 PIC16 FIXED POINT MULTIPLY ROUTINES Input: fixed point arguments in AARG and BARG Output: product AARGxBARG in AARG All timings are worst case cycle counts It is useful to note that the additional unsigned routines requiring a non-power of two argument can be called in a signed multiply application where it is known that the respective argument is nonnegative, thereby offering some improvement in performance. Routine Clocks Function FXM0808S 82 08x08 -> 16 bit signed fixed point multiply FXM0808U 73 08x08 -> 16 bit unsigned fixed point multiply FXM0707U 67 07x07 -> 14 bit unsigned fixed point multiply The above timings are based on the looped macros. If space permits, approximately 29-35 clocks can be saved by using the unrolled macros. ;********************************************************************************************** ;********************************************************************************************** ; 08x08 Bit Multiplication Macros SMUL0808L macro ; Max Timing: 3+10+5*9+8+3 = 69 clks ; Min Timing: 3+6*6+5+3 = 47 clks ; PM: 21 DM: 5 MOVLW MOVWF 0x07 LOOPCOUNT MOVF AARGB0,W RRF BTFSC GOTO DECFSZ GOTO BARGB0, F _C LSM0808NA LOOPCOUNT, F LOOPSM0808A CLRF RETLW AARGB0 0x00 RRF BTFSC ADDWF RLF RRF RRF DECFSZ BARGB0, F _C AARGB0, F SIGN, F AARGB0, F AARGB1, F LOOPCOUNT, F LOOPSM0808A LOOPSM0808 LSM0808NA DS00617B-page 116 1997 Microchip Technology Inc. AN617 GOTO LOOPSM0808 RLF RRF RRF SIGN, F AARGB0, F AARGB1, F endm UMUL0808L macro ; Max Timing: 3+12+6*8+7 = 70 clks ; Min Timing: 3+7*6+5+3 = 53 clks ; PM: 19 DM: 4 MOVLW MOVWF MOVF 0x08 LOOPCOUNT AARGB0,W RRF BTFSC GOTO DECFSZ GOTO BARGB0, F _C LUM0808NAP LOOPCOUNT, F LOOPUM0808A CLRF RETLW AARGB0 0x00 BCF GOTO _C LUM0808NA RRF BTFSC ADDWF RRF RRF DECFSZ GOTO BARGB0, F _C AARGB0, F AARGB0, F AARGB1, F LOOPCOUNT, F LOOPUM0808 LOOPUM0808A LUM0808NAP LOOPUM0808 LUM0808NA endm UMUL0707L macro ; Max Timing: 3+12+5*8+7+2 = 64 clks ; Min Timing: 3+6*6+5+3 = 47 clks ; PM: 21 DM: 4 MOVLW MOVWF MOVF 0x07 LOOPCOUNT AARGB0,W RRF BTFSC GOTO DECFSZ GOTO BARGB0, F _C LUM0707NAP LOOPCOUNT, F LOOPUM0707A LOOPUM0707A 1997 Microchip Technology Inc. DS00617B-page 117 AN617 CLRF RETLW AARGB0 0x00 BCF GOTO _C LUM0707NA RRF BTFSC ADDWF RRF RRF DECFSZ GOTO BARGB0, F _C AARGB0, F AARGB0, F AARGB1, F LOOPCOUNT, F LOOPUM0707 RRF RRF AARGB0, F AARGB1, F LUM0707NAP LOOPUM0707 LUM0707NA endm SMUL0808 macro ; Max Timing: 1+6+6*5+3 = 40 clks ; Min Timing: 1+14+3 = 18 clks ; PM: 1+2*7+5+6*5+3 = 53 DM: 5 variable i = 0 MOVF AARGB0,W while i < 7 BTFSC GOTO BARGB0,i SM0808NA#v(i) variable i = i + 1 endw SM0808NA0 CLRF RETURN AARGB0 RLF RRF RRF SIGN AARGB0 AARGB1 ; if we get here, BARG = 0 variable i = 1 while SM0808NA#v(i) BTFSC ADDWF RLF RRF RRF i < 7 BARGB0,i AARGB0 SIGN AARGB0 AARGB1 variable i = i + 1 endw DS00617B-page 118 1997 Microchip Technology Inc. AN617 RLF RRF RRF SIGN AARGB0 AARGB1 endm UMUL0808 macro ; Max Timing: 2+5+7*4 = 35 clks ; Min Timing: 2+16+3 = 21 clks ; PM: 2+2*8+4+7*4 = 50 DM: 3 variable i = 0 BCF MOVF _C AARGB0,W ; clear carry for first right shift while i < 8 BTFSC GOTO BARGB0,i UM0808NA#v(i) variable i = i + 1 endw UM0808NA0 CLRF RETURN AARGB0 RRF RRF AARGB0, F AARGB1, F ; if we get here, BARG = 0 variable i = 1 while UM0808NA#v(i) i < 8 BTFSC ADDWF RRF RRF BARGB0,i AARGB0, F AARGB0, F AARGB1, F variable i = i + 1 endw endm UMUL0707 macro ; Max Timing: 2+5+6*4+2 = 33 clks ; Min Timing: 2+14+3 = 19 clks ; PM: 2+2*7+4+6*4+2 = 46 DM: 3 variable i = 0 BCF MOVF _C AARGB0,W ; clear carry for first right shift while i < 7 1997 Microchip Technology Inc. DS00617B-page 119 AN617 BTFSC GOTO BARGB0,i UM0707NA#v(i) variable i = i + 1 endw UM0707NA0 CLRF RETURN AARGB0 ; if we get here, BARG = 0 RRF RRF AARGB0, F AARGB1, F variable i = 1 while UM0707NA#v(i) i < 7 BTFSC ADDWF RRF RRF BARGB0,i AARGB0, F AARGB0, F AARGB1, F variable i = i + 1 endw RRF RRF AARGB0, F AARGB1, F endm ;********************************************************************************************** ;********************************************************************************************** ; 8x8 Bit Signed Fixed Point Multiply 8x8 -> 16 ; ; Input: 8 bit signed fixed point multiplicand in AARGB0 8 bit signed fixed point multiplier in BARGB0 ; Use: CALL ; Output: 16 bit signed fixed point product in AARGB0 ; Result: AARG ; ; Max Timing: 12+69+2 = 83 clks 17+69+2 = 88 clks B > 0 B < 0 ; ; Min Timing: 12+47 = 59 clks 6 clks A = 0 ; PM: 17+21+1 = 39 FXM0808S DS00617B-page 120 FXM0808S <-- AARG x BARG DM: 5 CLRF CLRF MOVF BTFSC RETLW AARGB1 SIGN AARGB0,W _Z 0x00 XORWF MOVWF BTFSC COMF BARGB0,W TEMPB3 TEMPB3,MSB SIGN, F BTFSS BARGB0,MSB ; clear partial product 1997 Microchip Technology Inc. AN617 GOTO COMF INCF COMF INCF M0808SOK BARGB0, F BARGB0, F AARGB0, F AARGB0, F BTFSC GOTO BARGB0,MSB M0808SX ; make multiplier BARG > 0 M0808SOK SMUL0808L M0808SX RETLW 0x00 CLRF RLF RRF RRF AARGB1 SIGN, W AARGB0, F AARGB1, F RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; 8x8 Bit Unsigned Fixed Point Multiply 8x8 -> 16 ; ; Input: 8 bit unsigned fixed point multiplicand in AARGB0 8 bit unsigned fixed point multiplier in BARGB0 ; Use: CALL ; Output: 8 bit unsigned fixed point product in AARGB0 ; Result: AARG ; Max Timing: 1+70+2 = 73 clks ; Min Timing: 1+53 = 54 clks ; PM: 1+19+1 = 21 FXM0808U FXM0808U <-- AARG x BARG DM: 4 CLRF AARGB1 ; clear partial product UMUL0808L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; 7x7 Bit Unsigned Fixed Point Divide 7x7 -> 14 ; ; Input: 7 bit unsigned fixed point multiplicand in AARGB0 7 bit unsigned fixed point multiplier in BARGB0 ; Use: CALL ; Output: 14 bit unsigned fixed point product in AARGB0 ; Result: AARG ; Max Timing: 1+64+2 = 67 clks ; Min Timing: 1+47 = 48 clks FXM0707U <-- 1997 Microchip Technology Inc. AARG x BARG DS00617B-page 121 AN617 ; PM: 1+21+1 = 23 FXM0707U CLRF DM: 4 AARGB1 ; clear partial product UMUL0707L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** DS00617B-page 122 1997 Microchip Technology Inc. AN617 Please check the Microchip BBS for the latest version of the source code. For BBS access information, see Section 6, Microchip Bulletin Board Service information, page 6-3. APPENDIX E: PIC16C5X/PIC16CXX DIVIDE ROUTINES Table of Contents for Appendix E E.1 32/32 PIC16C5X/PIC16CXXX Fixed Point Divide Routines ......................................................................... 123 E.2 32/24 PIC16C5X/PIC16CXXX Fixed Point Divide Routines ......................................................................... 145 E.3 32/16 PIC16C5X/PIC16CXX Fixed Point Divide Routines ........................................................................... 163 E.4 24/24 PIC16C5X/PIC16CXXX Fixed Point Divide Routines ......................................................................... 178 E.5 24/16 PIC16C5X/PIC16CXXX Fixed Point Divide Routines ......................................................................... 193 E.6 16/16 PIC16C5X/PIC16CXXX Fixed Point Divide Routines ......................................................................... 205 E.7 16/8 PIC16C5X/PIC16CXXX Fixed Point Divide Routines ........................................................................... 216 E.8 8/8 PIC16C5X/PIC16CXXX Fixed Point Divide Routines ............................................................................. 228 E.1 32/32 PIC16C5X/PIC16CXXX Fixed Point Divide Routines ; RCS Header $Id: fxd22.a16 2.4 1997/02/27 03:03:17 F.J.Testa Exp $ ; $Revision: 2.4 $ ; 32/32 PIC16 FIXED POINT DIVIDE ROUTINES ; ; Input: fixed point arguments in AARG and BARG ; ; Output: quotient AARG/BARG followed by remainder in REM ; ; All timings are worst case cycle counts ; ; It is useful to note that the additional unsigned routines requiring a non-power of two ; argument can be called in a signed divide application where it is known that the ; respective argument is nonnegative, thereby offering some improvement in ; performance. ; ; Routine Clocks Function ; ; FXD3232S 929 32 bit/32 bit -> 32.32 signed fixed point divide ; ; FXD3232U 1031 32 bit/32 bit -> 32.32 unsigned fixed point divide ; ; FXD3131U 869 31 bit/31 bit -> 31.31 unsigned fixed point divide ; ;********************************************************************************************** ;********************************************************************************************** ; 32/32 Bit Division Macros SDIV3232L macro ; Max Timing: 17+6*27+26+26+6*27+26+26+6*27+26+26+6*27+26+16 = 863 clks ; Min Timing: 17+6*26+25+25+6*26+25+25+6*26+25+25+6*26+25+3 = 819 clks ; PM: 17+7*38+16 = 299 MOVF SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF MOVF 1997 Microchip Technology Inc. DM: 13 BARGB3,W REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W DS00617B-page 123 AN617 BTFSS INCFSZ SUBWF RLF _C BARGB0,W REMB0, F AARGB0, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB0,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,W AARGB0,LSB SADD22LA SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK22LA SADD22LA ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK22LA RLF AARGB0, F DECFSZ GOTO LOOPCOUNT, F LOOPS3232A RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,W AARGB0,LSB SADD22L8 SUBWF MOVF BTFSS INCFSZ SUBWF MOVF REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W LOOPS3232A DS00617B-page 124 1997 Microchip Technology Inc. AN617 BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK22L8 SADD22L8 ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK22L8 RLF AARGB1, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,W AARGB1,LSB SADD22LB SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK22LB ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F LOOPS3232B SADD22LB 1997 Microchip Technology Inc. DS00617B-page 125 AN617 SOK22LB RLF AARGB1, F DECFSZ GOTO LOOPCOUNT, F LOOPS3232B RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,W AARGB1,LSB SADD22L16 SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK22L16 SADD22L16 ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK22L16 RLF AARGB2, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,W AARGB2,LSB SADD22LC SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F LOOPS3232C DS00617B-page 126 1997 Microchip Technology Inc. AN617 MOVF BTFSS INCFSZ SUBWF GOTO BARGB0,W _C BARGB0,W REMB0, F SOK22LC SADD22LC ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK22LC RLF AARGB2, F DECFSZ GOTO LOOPCOUNT, F LOOPS3232C RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB3,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,W AARGB2,LSB SADD22L24 SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK22L24 SADD22L24 ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK22L24 RLF AARGB3, F MOVLW 7 1997 Microchip Technology Inc. DS00617B-page 127 AN617 LOOPS3232D SADD22LD SOK22LD MOVWF LOOPCOUNT RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB3,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,W AARGB3,LSB SADD22LD SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK22LD ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C INCFSZ ADDWF BARGB0,W REMB0, F RLF AARGB3, F DECFSZ GOTO LOOPCOUNT, F LOOPS3232D BTFSC GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF AARGB3,LSB SOK22L BARGB3,W REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK22L endm DS00617B-page 128 1997 Microchip Technology Inc. AN617 UDIV3232L macro ; Max Timing: 24+6*32+31+31+6*32+31+31+6*32+31+31+6*32+31+16 = 1025 clks ; Min Timing: 24+6*31+30+30+6*31+30+30+6*31+30+30+6*31+30+3 = 981 clks ; PM: 359 LOOPU3232A UADD22LA DM: 13 CLRF TEMP RLF RLF MOVF SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF AARGB0,W REMB3, F BARGB3,W REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F CLRW BTFSS MOVLW SUBWF RLF _C 1 TEMP, F AARGB0, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB0,W REMB3, F REMB2, F REMB1, F REMB0, F TEMP, F BARGB3,W AARGB0,LSB UADD22LA SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F ADDWF REMB3, F 1997 Microchip Technology Inc. _C 1 TEMP, F UOK22LA DS00617B-page 129 AN617 UOK22LA UADD22L8 DS00617B-page 130 MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F RLF AARGB0, F DECFSZ GOTO LOOPCOUNT, F LOOPU3232A RLF RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB3, F REMB2, F REMB1, F REMB0, F TEMP, F BARGB3,W AARGB0,LSB UADD22L8 SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F _C 1 TEMP, F _C 1 TEMP, F UOK22L8 _C 1997 Microchip Technology Inc. AN617 UOK22L8 LOOPU3232B UADD22LB UOK22LB MOVLW ADDWF 1 TEMP, F RLF AARGB1, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB3, F REMB2, F REMB1, F REMB0, F TEMP, F BARGB3,W AARGB1,LSB UADD22LB SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F RLF AARGB1, F DECFSZ GOTO LOOPCOUNT, F LOOPU3232B RLF RLF RLF RLF RLF RLF AARGB2,W REMB3, F REMB2, F REMB1, F REMB0, F TEMP, F 1997 Microchip Technology Inc. _C 1 TEMP, F UOK22LB _C 1 TEMP, F DS00617B-page 131 AN617 UADD22L16 UOK22L16 LOOPU3232C DS00617B-page 132 MOVF BTFSS GOTO BARGB3,W AARGB1,LSB UADD22L16 SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F RLF AARGB2, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB3, F REMB2, F REMB1, F REMB0, F TEMP, F BARGB3,W AARGB2,LSB UADD22LC SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF MOVF REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C 1 TEMP, F UOK22L16 _C 1 TEMP, F 1997 Microchip Technology Inc. AN617 UADD22LC UOK22LC UADD22L24 BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO _C BARGB0,W REMB0, F ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F RLF AARGB2, F DECFSZ GOTO LOOPCOUNT, F LOOPU3232C RLF RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB3,W REMB3, F REMB2, F REMB1, F REMB0, F TEMP, F BARGB3,W AARGB2,LSB UADD22L24 SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F ADDWF MOVF BTFSC INCFSZ ADDWF REMB3, F BARGB2,W _C BARGB2,W REMB2, F 1997 Microchip Technology Inc. _C 1 TEMP, F UOK22LC _C 1 TEMP, F _C 1 TEMP, F UOK22L24 DS00617B-page 133 AN617 UOK22L24 LOOPU3232D UADD22LD UOK22LD DS00617B-page 134 MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F RLF AARGB3, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB3,W REMB3, F REMB2, F REMB1, F REMB0, F TEMP, F BARGB3,W AARGB3,LSB UADD22LD SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F RLF AARGB3, F _C 1 TEMP, F _C 1 TEMP, F UOK22LD _C 1 TEMP, F 1997 Microchip Technology Inc. AN617 DECFSZ GOTO LOOPCOUNT, F LOOPU3232D BTFSC GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF AARGB3,LSB UOK22L BARGB3,W REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK22L endm UDIV3131L macro ; Max Timing: 17+6*27+26+26+6*27+26+26+6*27+26+26+6*27+26+16 = 863 clks ; Min Timing: 17+6*26+25+25+6*26+25+25+6*26+25+25+6*26+25+3 = 819 clks ; PM: 17+7*38+16 = 299 LOOPU3131A DM: 13 MOVF SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF RLF BARGB3,W REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F AARGB0, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB0,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,W AARGB0,LSB UADD11LA SUBWF MOVF BTFSS INCFSZ SUBWF REMB3, F BARGB2,W _C BARGB2,W REMB2, F 1997 Microchip Technology Inc. DS00617B-page 135 AN617 MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK11LA UADD11LA ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK11LA RLF AARGB0, F DECFSZ GOTO LOOPCOUNT, F LOOPU3131A RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,W AARGB0,LSB UADD11L8 SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK11L8 ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F UADD11L8 DS00617B-page 136 1997 Microchip Technology Inc. AN617 UOK11L8 RLF AARGB1, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,W AARGB1,LSB UADD11LB SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK11LB UADD11LB ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK11LB RLF AARGB1, F DECFSZ GOTO LOOPCOUNT, F LOOPU3131B RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,W AARGB1,LSB UADD11L16 SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W LOOPU3131B 1997 Microchip Technology Inc. DS00617B-page 137 AN617 SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK11L16 UADD11L16 ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK11L16 RLF AARGB2, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,W AARGB2,LSB UADD11LC SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK11LC UADD11LC ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK11LC RLF AARGB2, F LOOPU3131C DS00617B-page 138 1997 Microchip Technology Inc. AN617 DECFSZ GOTO LOOPCOUNT, F LOOPU3131C RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB3,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,W AARGB2,LSB UADD11L24 SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK11L24 UADD11L24 ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK11L24 RLF AARGB3, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB3,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,W AARGB3,LSB UADD11LD SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C LOOPU3131D 1997 Microchip Technology Inc. DS00617B-page 139 AN617 UADD11LD UOK11LD INCFSZ SUBWF GOTO BARGB0,W REMB0, F UOK11LD ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C INCFSZ ADDWF BARGB0,W REMB0, F RLF AARGB3, F DECFSZ GOTO LOOPCOUNT, F LOOPU3131D BTFSC GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF AARGB3,LSB UOK11L BARGB3,W REMB3, F BARGB2,W _C BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK11L endm ;********************************************************************************************** ;********************************************************************************************** ; 32/32 Bit Signed Fixed Point Divide 32/32 -> 32.32 ; ; Input: 32 bit fixed point dividend in AARGB0, AARGB1,AARGB2,AARGB3 32 bit fixed point divisor in BARGB0, BARGB1, BARGB2, BARGB3 ; Use: CALL ; ; Output: 32 bit fixed point quotient in AARGB0, AARGB1,AARGB2,AARGB3 32 bit fixed point remainder in REMB0, REMB1, REMB2, REMB3 ; Result: AARG, REM ; ; ; ; ; Max Timing: 28+863+5 38+863+28 38+863+28 48+863+5 = = = = ; Min Timing: 28+819+5 = 852 clks DS00617B-page 140 FXD3232S <-- AARG / BARG 896 clks 929 clks 929 clks 916 clks 12 clks A A A A A > > < < = 0, 0, 0, 0, 0 B B B B > < > < 0 0 0 0 A > 0, B > 0 1997 Microchip Technology Inc. AN617 ; ; ; ; 38+819+28 = 885 clks 38+819+28 = 885 clks 48+819+5 = 872 clks FXD3232S PM: 48+299+27+67 = 441 A > 0, B < 0 A < 0, B > 0 A < 0, B < 0 DM: 15 CLRF CLRF CLRF CLRF CLRF MOVF IORWF IORWF IORWF BTFSC RETLW SIGN REMB0 REMB1 REMB2 REMB3 AARGB0,W AARGB1,W AARGB2,W AARGB3,W _Z 0x00 MOVF XORWF MOVWF BTFSC COMF AARGB0,W BARGB0,W TEMP TEMP,MSB SIGN,F CLRF TEMPB3 ; clear exception flag BTFSS GOTO BARGB0,MSB CA3232S ; if MSB set, negate BARG COMF COMF COMF COMF INCF BTFSC INCF BTFSC INCF BTFSC INCF BARGB3, BARGB2, BARGB1, BARGB0, BARGB3, _Z BARGB2, _Z BARGB1, _Z BARGB0, BTFSS GOTO AARGB0,MSB C3232SX COMF COMF COMF COMF INCF BTFSC INCF BTFSC INCF BTFSC INCF AARGB3, AARGB2, AARGB1, AARGB0, AARGB3, _Z AARGB2, _Z AARGB1, _Z AARGB0, C3232SX MOVF IORWF MOVWF BTFSC GOTO AARGB0,W BARGB0,W TEMP TEMP,MSB C3232SX1 C3232S SDIV3232L CA3232S BTFSC GOTO 1997 Microchip Technology Inc. ; clear partial remainder F F F F F F F F ; if MSB set, negate AARG F F F F F F F F TEMPB3,LSB C3232SX4 ; test exception flag DS00617B-page 141 AN617 C3232SOK BTFSS RETLW SIGN,MSB 0x00 COMF COMF COMF COMF INCF BTFSC INCF BTFSC INCF BTFSC INCF AARGB3, AARGB2, AARGB1, AARGB0, AARGB3, _Z AARGB2, _Z AARGB1, _Z AARGB0, COMF COMF COMF COMF INCF BTFSC INCF BTFSC INCF BTFSC INCF REMB3, REMB2, REMB1, REMB0, REMB3, _Z REMB2, _Z REMB1, _Z REMB0, RETLW 0x00 BTFSS GOTO BTFSC GOTO MOVF MOVWF MOVF MOVWF MOVF MOVWF MOVF MOVWF CLRF CLRF CLRF CLRF GOTO CLRF CLRF CLRF CLRF INCF RETLW BARGB0,MSB C3232SX3 AARGB0,MSB C3232SX2 AARGB0,W REMB0 AARGB1,W REMB1 AARGB2,W REMB2 AARGB3,W REMB3 AARGB0 AARGB1 AARGB2 AARGB3 C3232SOK AARGB0 AARGB1 AARGB2 AARGB3 AARGB3,F 0x00 ; test BARG exception C3232SX3 COMF COMF COMF COMF INCF GOTO AARGB0,F AARGB1,F AARGB2,F AARGB3,F TEMPB3,F C3232S ; numerator = 0x7FFFFFFF + 1 C3232SX4 INCF BTFSC INCF BTFSC INCF REMB3,F _Z REMB2,F _Z REMB1,F ; increment remainder and test for ; overflow C3232SX1 C3232SX2 DS00617B-page 142 F F F F F F F F F F F F F F F F ; test AARG exception ; quotient = 0, remainder = AARG ; quotient = 1, remainder = 0 1997 Microchip Technology Inc. AN617 BTFSC INCF MOVF SUBWF BTFSS GOTO MOVF SUBWF BTFSS GOTO MOVF SUBWF BTFSS GOTO MOVF SUBWF BTFSS GOTO CLRF CLRF CLRF CLRF INCF BTFSC INCF BTFSC INCF BTFSC INCF BTFSS GOTO BSF RETLW _Z REMB0,F BARGB3,W REMB3,W _Z C3232SOK BARGB2,W REMB2,W _Z C3232SOK BARGB1,W REMB1,W _Z C3232SOK BARGB0,W REMB0,W _Z C3232SOK REMB0 REMB1 REMB2 REMB3 AARGB3,F _Z AARGB2,F _Z AARGB1,F _Z AARGB0,F AARGB0,MSB C3232SOK FPFLAGS,NAN 0xFF ; if remainder overflow, clear ; remainder, increment quotient and ; test for overflow exception ;********************************************************************************************** ;********************************************************************************************** ; 32/32 Bit Unsigned Fixed Point Divide 32/32 -> 32.32 ; ; Input: 32 bit unsigned fixed point dividend in AARGB0, AARGB1,AARGB2,AARGB3 32 bit unsigned fixed point divisor in BARGB0, BARGB1, BARGB2, BARGB3 ; Use: CALL ; ; Output: 32 bit unsigned fixed point quotient in AARGB0, AARGB1,AARGB2,AARGB3 32 bit unsigned fixed point remainder in REMB0, REMB1, REMB2, REMB3 ; Result: AARG, REM ; Max Timing: 4+1025+2 = 1031 clks ; Max Timing: 4+981+2 = 987 clks ; PM: 4+359+1 = 364 FXD3232U FXD3232U CLRF CLRF CLRF CLRF <-- AARG / BARG DM: 13 REMB0 REMB1 REMB2 REMB3 UDIV3232L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** 1997 Microchip Technology Inc. DS00617B-page 143 AN617 ; 31/31 Bit Unsigned Fixed Point Divide 31/31 -> 31.31 ; ; Input: 31 bit unsigned fixed point dividend in AARGB0, AARGB1,AARGB2,AARGB3 31 bit unsigned fixed point divisor in BARGB0, BARGB1, BARBB2, BARGB3 ; Use: CALL ; ; Output: 31 bit unsigned fixed point quotient in AARGB0, AARGB1,AARGB2,AARGB3 31 bit unsigned fixed point remainder in REMB0, REMB1, REMB2, REMB3 ; Result: AARG, REM ; Max Timing: 4+863+2 = 869 clks ; Min Timing: 4+819+2 = 825 clks ; PM: 4+299+1 = 304 FXD3131U FXD3131U CLRF CLRF CLRF CLRF <-- AARG / BARG DM: 13 REMB0 REMB1 REMB2 REMB3 UDIV3131L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** DS00617B-page 144 1997 Microchip Technology Inc. AN617 E.2 32/24 PIC16C5X/PIC16CXXX Fixed Point Divide Routines ; RCS Header $Id: fxd24.a16 2.3 1996/10/16 14:23:57 F.J.Testa Exp $ ; $Revision: 2.3 $ ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 32/24 PIC16 FIXED POINT DIVIDE ROUTINES Input: fixed point arguments in AARG and BARG Output: quotient AARG/BARG followed by remainder in REM All timings are worst case cycle counts It is useful to note that the additional unsigned routines requiring a non-power of two argument can be called in a signed divide application where it is known that the respective argument is nonnegative, thereby offering some improvement in performance. Routine Clocks Function FXD3224S 759 32 bit/24 bit -> 32.24 signed fixed point divide FXD3224U 867 32 bit/24 bit -> 32.24 unsigned fixed point divide FXD3123U 705 31 bit/23 bit -> 31.23 unsigned fixed point divide ;********************************************************************************************** ;********************************************************************************************** ; 32/24 Bit Division Macros SDIV3224L macro ; Max Timing: 13+6*22+21+21+6*22+21+21+6*22+21+21+6*22+21+12 = 700 clks ; Min Timing: 13+6*21+20+20+6*21+20+20+6*21+20+20+6*21+20+3 = 660 clks ; PM: 11+3*58+43 = 228 LOOPS3224A DM: 10 MOVF SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF RLF BARGB2,W REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F AARGB0,F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF MOVF BTFSS GOTO AARGB0,W REMB2,F REMB1,F REMB0,F BARGB2,W AARGB0,LSB SADD24LA SUBWF MOVF BTFSS REMB2,F BARGB1,W _C 1997 Microchip Technology Inc. DS00617B-page 145 AN617 INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F SOK24LA SADD24LA ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F SOK24LA RLF AARGB0,F DECFSZ GOTO LOOPCOUNT,F LOOPS3224A RLF RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB2,F REMB1,F REMB0,F BARGB2,W AARGB0,LSB SADD24L8 SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F SOK24L8 SADD24L8 ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F SOK24L8 RLF AARGB1,F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB2,F REMB1,F REMB0,F BARGB2,W AARGB1,LSB SADD24LB SUBWF REMB2,F LOOPS3224B DS00617B-page 146 1997 Microchip Technology Inc. AN617 MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F SOK24LB SADD24LB ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F SOK24LB RLF AARGB1,F DECFSZ GOTO LOOPCOUNT,F LOOPS3224B RLF RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB2,F REMB1,F REMB0,F BARGB2,W AARGB1,LSB SADD24L16 SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F SOK24L16 SADD24L16 ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F SOK24L16 RLF AARGB2,F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB2,F REMB1,F REMB0,F BARGB2,W AARGB2,LSB SADD24LC LOOPS3224C 1997 Microchip Technology Inc. DS00617B-page 147 AN617 SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F SOK24LC SADD24LC ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F SOK24LC RLF AARGB2,F DECFSZ GOTO LOOPCOUNT,F LOOPS3224C RLF RLF RLF RLF MOVF BTFSS GOTO AARGB3,W REMB2,F REMB1,F REMB0,F BARGB2,W AARGB2,LSB SADD24L24 SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F SOK24L24 SADD24L24 ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F SOK24L24 RLF AARGB3,F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF MOVF AARGB3,W REMB2,F REMB1,F REMB0,F BARGB2,W LOOPS3224D DS00617B-page 148 1997 Microchip Technology Inc. AN617 BTFSS GOTO AARGB3,LSB SADD24LD SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F SOK24LD SADD24LD ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F SOK24LD RLF AARGB3,F DECFSZ GOTO LOOPCOUNT,F LOOPS3224D BTFSC GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF AARGB3,LSB SOK24L BARGB2,W REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F SOK24L endm UDIV3224L macro ; Max Timing: 20+6*27+26+26+6*27+26+26+6*27+26+26+6*27+26+12 = 862 clks ; Min Timing: 20+6*26+25+25+6*26+25+25+6*26+25+25+6*26+25+3 = 822 clks ; PM: 18+3*75+40+12 = 295 DM: 11 CLRF TEMP RLF RLF MOVF SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ AARGB0,W REMB2,F BARGB2,W REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W 1997 Microchip Technology Inc. DS00617B-page 149 AN617 LOOPU3224A UADD24LA UOK24LA DS00617B-page 150 SUBWF REMB0,F CLRW BTFSS MOVLW SUBWF RLF _C 1 TEMP,F AARGB0,F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB0,W REMB2,F REMB1,F REMB0,F TEMP,F BARGB2,W AARGB0,LSB UADD24LA SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F RLF AARGB0,F DECFSZ GOTO LOOPCOUNT,F LOOPU3224A RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB2,F REMB1,F REMB0,F TEMP,F BARGB2,W AARGB0,LSB UADD24L8 SUBWF MOVF BTFSS REMB2,F BARGB1,W _C _C 1 TEMP,F UOK24LA _C 1 TEMP,F 1997 Microchip Technology Inc. AN617 UADD24L8 UOK24L8 LOOPU3224B UADD24LB INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F RLF AARGB1,F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB2,F REMB1,F REMB0,F TEMP,F BARGB2,W AARGB1,LSB UADD24LB SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F 1997 Microchip Technology Inc. _C 1 TEMP,F UOK24L8 _C 1 TEMP,F _C 1 TEMP,F UOK24LB _C DS00617B-page 151 AN617 UOK24LB UADD24L16 UOK24L16 LOOPU3224C DS00617B-page 152 MOVLW ADDWF 1 TEMP,F RLF AARGB1,F DECFSZ GOTO LOOPCOUNT,F LOOPU3224B RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB2,F REMB1,F REMB0,F TEMP,F BARGB2,W AARGB1,LSB UADD24L16 SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F RLF AARGB2,F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB2,F REMB1,F REMB0,F TEMP,F BARGB2,W AARGB2,LSB UADD24LC SUBWF MOVF BTFSS INCFSZ SUBWF MOVF REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C 1 TEMP,F UOK24L16 _C 1 TEMP,F 1997 Microchip Technology Inc. AN617 UADD24LC UOK24LC UADD24L24 BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO _C BARGB0,W REMB0,F ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F RLF AARGB2,F DECFSZ GOTO LOOPCOUNT,F LOOPU3224C RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB3,W REMB2,F REMB1,F REMB0,F TEMP,F BARGB2,W AARGB2,LSB UADD24L24 SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F 1997 Microchip Technology Inc. _C 1 TEMP,F UOK24LC _C 1 TEMP,F _C 1 TEMP,F UOK24L24 _C 1 TEMP,F DS00617B-page 153 AN617 UOK24L24 LOOPU3224D UADD24LD UOK24LD RLF AARGB3,F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB3,W REMB2,F REMB1,F REMB0,F TEMP,F BARGB2,W AARGB3,LSB UADD24LD SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F RLF AARGB3,F DECFSZ GOTO LOOPCOUNT,F LOOPU3224D BTFSC GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF AARGB3,LSB UOK24L BARGB2,W REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F _C 1 TEMP,F UOK24LD _C 1 TEMP,F UOK24L endm UDIV3123L DS00617B-page 154 macro 1997 Microchip Technology Inc. AN617 ; Max Timing: 13+6*22+21+21+6*22+21+21+6*22+21+21+6*22+21+12 = 700 clks ; Min Timing: 13+6*21+20+20+6*21+20+20+6*21+20+20+6*21+20+3 = 660 clks ; PM: 11+3*58+43 = 228 DM: 10 MOVF SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF RLF BARGB2,W REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F AARGB0,F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF MOVF BTFSS GOTO AARGB0,W REMB2,F REMB1,F REMB0,F BARGB2,W AARGB0,LSB UADD13LA SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F UOK13LA UADD13LA ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F UOK13LA RLF AARGB0,F DECFSZ GOTO LOOPCOUNT,F LOOPU3123A RLF RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB2,F REMB1,F REMB0,F BARGB2,W AARGB0,LSB UADD13L8 SUBWF MOVF REMB2,F BARGB1,W LOOPU3123A 1997 Microchip Technology Inc. DS00617B-page 155 AN617 BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F UOK13L8 UADD13L8 ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F UOK13L8 RLF AARGB1,F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB2,F REMB1,F REMB0,F BARGB2,W AARGB1,LSB UADD13LB SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F UOK13LB UADD13LB ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F UOK13LB RLF AARGB1,F DECFSZ GOTO LOOPCOUNT,F LOOPU3123B RLF RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB2,F REMB1,F REMB0,F BARGB2,W AARGB1,LSB UADD13L16 LOOPU3123B DS00617B-page 156 1997 Microchip Technology Inc. AN617 SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F UOK13L16 UADD13L16 ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F UOK13L16 RLF AARGB2,F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB2,F REMB1,F REMB0,F BARGB2,W AARGB2,LSB UADD13LC SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F UOK13LC UADD13LC ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F UOK13LC RLF AARGB2,F DECFSZ GOTO LOOPCOUNT,F LOOPU3123C RLF RLF RLF RLF MOVF BTFSS AARGB3,W REMB2,F REMB1,F REMB0,F BARGB2,W AARGB2,LSB LOOPU3123C 1997 Microchip Technology Inc. DS00617B-page 157 AN617 GOTO UADD13L24 SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F UOK13L24 UADD13L24 ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F UOK13L24 RLF AARGB3,F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF MOVF BTFSS GOTO AARGB3,W REMB2,F REMB1,F REMB0,F BARGB2,W AARGB3,LSB UADD13LD SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F UOK13LD UADD13LD ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB2,F BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F UOK13LD RLF AARGB3,F DECFSZ GOTO LOOPCOUNT,F LOOPU3123D BTFSC GOTO MOVF ADDWF AARGB3,LSB UOK13L BARGB2,W REMB2,F LOOPU3123D DS00617B-page 158 1997 Microchip Technology Inc. AN617 MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF BARGB1,W _C BARGB1,W REMB1,F BARGB0,W _C BARGB0,W REMB0,F UOK13L endm ;********************************************************************************************** ;********************************************************************************************** ; 32/24 Bit Signed Fixed Point Divide 32/24 -> 32.24 ; ; Input: 32 bit fixed point dividend in AARGB0, AARGB1,AARGB2,AARGB3 24 bit fixed point divisor in BARGB0, BARGB1, BARGB2 ; Use: CALL ; ; Output: 32 bit fixed point quotient in AARGB0, AARGB1,AARGB2,AARGB3 24 bit fixed point remainder in REMB0, REMB1, REMB2 ; Result: AARG, REM ; ; ; ; ; Max Timing: 27+700+5 34+700+25 34+700+25 44+700+5 = = = = 732 clks 759 clks 759 clks 749 clks 11 clks A A A A A > > < < = 0, 0, 0, 0, 0 B B B B > < > < 0 0 0 0 ; ; ; ; Min Timing: 27+660+5 34+660+25 34+660+25 44+660+5 = = = = 692 719 749 709 A A A A > > < < 0, 0, 0, 0, B B B B > < > < 0 0 0 0 ; PM: 44+228+24+62 = 358 FXD3224S FXD3224S <-- AARG / BARG clks clks clks clks DM: 13 CLRF CLRF CLRF CLRF MOVF IORWF IORWF IORWF BTFSC RETLW SIGN REMB0 REMB1 REMB2 AARGB0,W AARGB1,W AARGB2,W AARGB3,W _Z 0x00 MOVF XORWF MOVWF BTFSC COMF AARGB0,W BARGB0,W TEMP TEMP,MSB SIGN,F CLRF TEMPB3 ; clear exception flag BTFSS GOTO BARGB0,MSB CA3224S ; if MSB set, negate BARG COMF COMF COMF INCF BARGB2, BARGB1, BARGB0, BARGB2, 1997 Microchip Technology Inc. ; clear partial remainder F F F F DS00617B-page 159 AN617 BTFSC INCF BTFSC INCF _Z BARGB1, F _Z BARGB0, F BTFSS GOTO AARGB0,MSB C3224SX COMF COMF COMF COMF INCF BTFSC INCF BTFSC INCF BTFSC INCF AARGB3, AARGB2, AARGB1, AARGB0, AARGB3, _Z AARGB2, _Z AARGB1, _Z AARGB0, C3224SX MOVF IORWF MOVWF BTFSC GOTO AARGB0,W BARGB0,W TEMP TEMP,MSB C3224SX1 C3224S SDIV3224L CA3224S C3224SOK C3224SX1 DS00617B-page 160 ; if MSB set, negate AARG F F F F F F F F BTFSC GOTO TEMPB3,LSB C3224SX4 BTFSS RETLW SIGN,MSB 0x00 COMF COMF COMF COMF INCF BTFSC INCF BTFSC INCF BTFSC INCF AARGB3, AARGB2, AARGB1, AARGB0, AARGB3, _Z AARGB2, _Z AARGB1, _Z AARGB0, COMF COMF COMF INCF BTFSC INCF BTFSC INCF REMB2, REMB1, REMB0, REMB2, _Z REMB1, _Z REMB0, RETLW 0x00 BTFSS GOTO BTFSC GOTO MOVF MOVWF MOVF MOVWF MOVF BARGB0,MSB C3224SX3 AARGB0,MSB C3224SX2 AARGB1,W REMB0 AARGB2,W REMB1 AARGB3,W ; test exception flag F F F F F F F F F F F F F F ; test BARG exception ; test AARG exception 1997 Microchip Technology Inc. AN617 MOVWF BCF RLF RLF MOVF MOVWF CLRF CLRF CLRF GOTO CLRF INCF CLRF CLRF CLRF RETLW REMB2 REMB0,MSB AARGB1,F AARGB0,F AARGB0,W AARGB3 AARGB0 AARGB1 AARGB2 C3224SOK AARGB3 AARGB3,F AARGB2 AARGB1 AARGB0 0x00 C3224SX3 COMF COMF COMF COMF INCF GOTO AARGB0,F AARGB1,F AARGB2,F AARGB3,F TEMPB3,F C3224S ; numerator = 0x7FFFFFFF + 1 C3224SX4 INCF BTFSC INCF BTFSC INCF MOVF SUBWF BTFSS GOTO MOVF SUBWF BTFSS GOTO MOVF SUBWF BTFSS GOTO CLRF CLRF CLRF INCF BTFSC INCF BTFSC INCF BTFSC INCF BTFSS GOTO BSF RETLW REMB2,F _Z REMB1,F _Z REMB0,F BARGB2,W REMB2,W _Z C3224SOK BARGB1,W REMB1,W _Z C3224SOK BARGB0,W REMB0,W _Z C3224SOK REMB0 REMB1 REMB2 AARGB3,F _Z AARGB2,F _Z AARGB1,F _Z AARGB0,F AARGB0,MSB C3224SOK FPFLAGS,NAN 0xFF ; increment remainder and test for C3224SX2 ; quotient = 1, remainder = 0 ; overflow ; if remainder overflow, clear ; remainder, increment quotient and ; test for overflow exception ;********************************************************************************************** ;********************************************************************************************** ; 32/24 Bit Unsigned Fixed Point Divide 32/24 -> 32.24 ; ; Input: 32 bit unsigned fixed point dividend in AARGB0, AARGB1,AARGB2,AARGB3 24 bit unsigned fixed point divisor in BARGB0, BARGB1, BARGB2 1997 Microchip Technology Inc. DS00617B-page 161 AN617 ; Use: ; ; Output: 32 bit unsigned fixed point quotient in AARGB0, AARGB1,AARGB2,AARGB3 24 bit unsigned fixed point remainder in REMB0, REMB1, REMB2 ; Result: AARG, REM ; Max Timing: 3+862+2 = 867 clks ; Min Timing: 3+822+2 = 827 clks ; PM: 3+295+1 = 299 FXD3224U CALL FXD3224U <-- AARG / BARG DM: 11 CLRF CLRF CLRF REMB0 REMB1 REMB2 UDIV3224L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; 31/23 Bit Unsigned Fixed Point Divide 31/23 -> 31.23 ; ; Input: 31 bit unsigned fixed point dividend in AARGB0, AARGB1,AARGB2,AARGB3 23 bit unsigned fixed point divisor in BARGB0, BARGB1, BARBB2 ; Use: CALL ; ; Output: 31 bit unsigned fixed point quotient in AARGB0, AARGB1,AARGB2,AARGB3 23 bit unsigned fixed point remainder in REMB0, REMB1, REMB2 ; Result: AARG, REM ; Max Timing: 3+700+2 = 705 clks ; Min Timing: 3+660+2 = 665 clks ; PM: 3+228+1 = 232 FXD3123U FXD3123U CLRF CLRF CLRF <-- AARG / BARG DM: 10 REMB0 REMB1 REMB2 UDIV3123L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** END DS00617B-page 162 1997 Microchip Technology Inc. AN617 E.3 32/16 PIC16C5X/PIC16CXX Fixed Point Divide Routines ; RCS Header $Id: fxd26.a16 2.3 1996/10/16 14:23:57 F.J.Testa Exp $ ; $Revision: 2.3 $ ; 32/16 PIC16 FIXED POINT DIVIDE ROUTINES ; ; Input: fixed point arguments in AARG and BARG ; ; Output: quotient AARG/BARG followed by remainder in REM ; ; All timings are worst case cycle counts ; ; It is useful to note that the additional unsigned routines requiring a non-power of two ; argument can be called in a signed divide application where it is known that the ; respective argument is nonnegative, thereby offering some improvement in ; performance. ; ; Routine Clocks Function ; ; FXD3216S 595 32 bit/16 bit -> 32.16 signed fixed point divide ; ; FXD3216U 703 32 bit/16 bit -> 32.16 unsigned fixed point divide ; ; FXD3115U 541 31 bit/15 bit -> 31.15 unsigned fixed point divide ; ;********************************************************************************************** ;********************************************************************************************** ; 32/16 Bit Division Macros SDIV3216L macro ; Max Timing: 9+6*17+16+16+6*17+16+16+6*17+16+16+6*17+16+8 = 537 clks ; Min Timing: 9+6*16+15+15+6*16+15+15+6*16+15+15+6*16+15+3 = 501 clks ; PM: 157 LOOPS3216A SADD26LA DM: 9 MOVF SUBWF MOVF BTFSS INCFSZ SUBWF RLF BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F AARGB0, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF MOVF BTFSS GOTO AARGB0,W REMB1, F REMB0, F BARGB1,W AARGB0,LSB SADD26LA SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK26LA ADDWF MOVF REMB1, F BARGB0,W 1997 Microchip Technology Inc. DS00617B-page 163 AN617 BTFSC INCFSZ ADDWF _C BARGB0,W REMB0, F RLF AARGB0, F DECFSZ GOTO LOOPCOUNT, F LOOPS3216A RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB1, F REMB0, F BARGB1,W AARGB0,LSB SADD26L8 SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK26L8 SADD26L8 ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK26L8 RLF AARGB1, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB1, F REMB0, F BARGB1,W AARGB1,LSB SADD26LB SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK26LB SADD26LB ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK26LB RLF AARGB1, F DECFSZ GOTO LOOPCOUNT, F LOOPS3216B RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB1, F REMB0, F BARGB1,W AARGB1,LSB SADD26L16 SOK26LA LOOPS3216B DS00617B-page 164 1997 Microchip Technology Inc. AN617 SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK26L16 SADD26L16 ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK26L16 RLF AARGB2, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB1, F REMB0, F BARGB1,W AARGB2,LSB SADD26LC SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK26LC SADD26LC ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK26LC RLF AARGB2, F DECFSZ GOTO LOOPCOUNT, F LOOPS3216C RLF RLF RLF MOVF BTFSS GOTO AARGB3,W REMB1, F REMB0, F BARGB1,W AARGB2,LSB SADD26L24 SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK26L24 SADD26L24 ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK26L24 RLF AARGB3, F MOVLW 7 LOOPS3216C 1997 Microchip Technology Inc. DS00617B-page 165 AN617 MOVWF LOOPCOUNT RLF RLF RLF MOVF BTFSS GOTO AARGB3,W REMB1, F REMB0, F BARGB1,W AARGB3,LSB SADD26LD SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK26LD SADD26LD ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK26LD RLF AARGB3, F DECFSZ GOTO LOOPCOUNT, F LOOPS3216D BTFSC GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF AARGB3,LSB SOK26L BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F LOOPS3216D SOK26L endm UDIV3216L macro ; Max Timing: 16+6*22+21+21+6*22+21+21+6*22+21+21+6*22+21+8 = 699 clks ; Min Timing: 16+6*21+20+20+6*21+20+20+6*21+20+20+6*21+20+3 = 663 clks ; PM: 240 DS00617B-page 166 DM: 9 CLRF TEMP RLF RLF MOVF SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF RLF AARGB0,W REMB1, F BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F MOVLW MOVWF 7 LOOPCOUNT _C 1 TEMP, F AARGB0, F 1997 Microchip Technology Inc. AN617 LOOPU3216A UADD26LA UOK26LA UADD26L8 UOK26L8 RLF RLF RLF RLF MOVF BTFSS GOTO AARGB0,W REMB1, F REMB0, F TEMP, F BARGB1,W AARGB0,LSB UADD26LA SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F RLF AARGB0, F DECFSZ GOTO LOOPCOUNT, F LOOPU3216A RLF RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB1, F REMB0, F TEMP, F BARGB1,W AARGB0,LSB UADD26L8 SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F RLF AARGB1, F MOVLW 7 1997 Microchip Technology Inc. _C 1 TEMP, F UOK26LA _C 1 TEMP, F _C 1 TEMP, F UOK26L8 _C 1 TEMP, F DS00617B-page 167 AN617 LOOPU3216B UADD26LB UOK26LB UADD26L16 UOK26L16 DS00617B-page 168 MOVWF LOOPCOUNT RLF RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB1, F REMB0, F TEMP, F BARGB1,W AARGB1,LSB UADD26LB SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F RLF AARGB1, F DECFSZ GOTO LOOPCOUNT, F LOOPU3216B RLF RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB1, F REMB0, F TEMP, F BARGB1,W AARGB1,LSB UADD26L16 SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F RLF AARGB2, F _C 1 TEMP, F UOK26LB _C 1 TEMP, F _C 1 TEMP, F UOK26L16 _C 1 TEMP, F 1997 Microchip Technology Inc. AN617 LOOPU3216C UADD26LC UOK26LC UADD26L24 MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB1, F REMB0, F TEMP, F BARGB1,W AARGB2,LSB UADD26LC SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F RLF AARGB2, F DECFSZ GOTO LOOPCOUNT, F LOOPU3216C RLF RLF RLF RLF MOVF BTFSS GOTO AARGB3,W REMB1, F REMB0, F TEMP, F BARGB1,W AARGB2,LSB UADD26L24 SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F 1997 Microchip Technology Inc. _C 1 TEMP, F UOK26LC _C 1 TEMP, F _C 1 TEMP, F UOK26L24 _C 1 TEMP, F DS00617B-page 169 AN617 UOK26L24 LOOPU3216D UADD26LD UOK26LD RLF AARGB3, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF MOVF BTFSS GOTO AARGB3,W REMB1, F REMB0, F TEMP, F BARGB1,W AARGB3,LSB UADD26LD SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F RLF AARGB3, F DECFSZ GOTO LOOPCOUNT, F LOOPU3216D BTFSC GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF AARGB3,LSB UOK26L BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F _C 1 TEMP, F UOK26LD _C 1 TEMP, F UOK26L endm UDIV3115L macro ; Max Timing: 9+6*17+16+16+6*17+16+16+6*17+16+16+6*17+16+8 = 537 clks ; Min Timing: 9+6*16+15+15+6*16+15+15+6*16+15+15+6*16+15+3 = 501 clks ; PM: 157 DM: 9 MOVF SUBWF MOVF BTFSS INCFSZ SUBWF DS00617B-page 170 BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F 1997 Microchip Technology Inc. AN617 RLF AARGB0, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF MOVF BTFSS GOTO AARGB0,W REMB1, F REMB0, F BARGB1,W AARGB0,LSB UADD15LA SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK15LA UADD15LA ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK15LA RLF AARGB0, F DECFSZ GOTO LOOPCOUNT, F LOOPU3115A RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB1, F REMB0, F BARGB1,W AARGB0,LSB UADD15L8 SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK15L8 UADD15L8 ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK15L8 RLF AARGB1, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB1, F REMB0, F BARGB1,W AARGB1,LSB UADD15LB SUBWF MOVF BTFSS INCFSZ REMB1, F BARGB0,W _C BARGB0,W LOOPU3115A LOOPU3115B 1997 Microchip Technology Inc. DS00617B-page 171 AN617 SUBWF GOTO REMB0, F UOK15LB UADD15LB ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK15LB RLF AARGB1, F DECFSZ GOTO LOOPCOUNT, F LOOPU3115B RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB1, F REMB0, F BARGB1,W AARGB1,LSB UADD15L16 SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK15L16 UADD15L16 ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK15L16 RLF AARGB2, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB1, F REMB0, F BARGB1,W AARGB2,LSB UADD15LC SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK15LC UADD15LC ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK15LC RLF AARGB2, F DECFSZ GOTO LOOPCOUNT, F LOOPU3115C RLF RLF AARGB3,W REMB1, F LOOPU3115C DS00617B-page 172 1997 Microchip Technology Inc. AN617 RLF MOVF BTFSS GOTO REMB0, F BARGB1,W AARGB2,LSB UADD15L24 SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK15L24 UADD15L24 ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK15L24 RLF AARGB3, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF MOVF BTFSS GOTO AARGB3,W REMB1, F REMB0, F BARGB1,W AARGB3,LSB UADD15LD SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK15LD UADD15LD ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK15LD RLF AARGB3, F DECFSZ GOTO LOOPCOUNT, F LOOPU3115D BTFSC GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF AARGB3,LSB UOK15L BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F LOOPU3115D UOK15L endm ;********************************************************************************************** ;********************************************************************************************** ; 32/16 Bit Signed Fixed Point Divide 32/16 -> 32.16 ; Input: 32 bit fixed point dividend in AARGB0, AARGB1,AARGB2,AARGB3 1997 Microchip Technology Inc. DS00617B-page 173 AN617 ; 16 bit fixed point divisor in BARGB0, BARGB1 ; Use: ; ; Output: 32 bit fixed point quotient in AARGB0, AARGB1,AARGB2,AARGB3 16 bit fixed point remainder in REMB0, REMB1 ; Result: AARG, REM ; ; ; ; ; Max Timing: 26+537+5 30+537+22 36+537+22 40+537+5 = = = = 568 clks 589 clks 595 clks 582 clks 10 clks A A A A A > > < < = 0, 0, 0, 0, 0 B B B B > < > < 0 0 0 0 ; ; ; ; Min Timing: 26+501+5 30+501+22 36+501+22 40+501+5 = = = = 532 553 559 546 A A A A > > < < 0, 0, 0, 0, B B B B > < > < 0 0 0 0 ; PM: 40+157+21+55 = 273 FXD3216S CA3216S C3216SX DS00617B-page 174 CALL FXD3216S <-- AARG / BARG clks clks clks clks DM: 12 CLRF CLRF CLRF MOVF IORWF IORWF IORWF BTFSC RETLW SIGN REMB0 REMB1 AARGB0,W AARGB1,W AARGB2,W AARGB3,W _Z 0x00 MOVF XORWF MOVWF BTFSC COMF AARGB0,W BARGB0,W TEMP TEMP,MSB SIGN,F CLRF TEMPB3 ; clear exception flag BTFSS GOTO BARGB0,MSB CA3216S ; if MSB set, negate BARG COMF COMF INCF BTFSC INCF BARGB1, BARGB0, BARGB1, _Z BARGB0, BTFSS GOTO AARGB0,MSB C3216SX COMF COMF COMF COMF INCF BTFSC INCF BTFSC INCF BTFSC INCF AARGB3, AARGB2, AARGB1, AARGB0, AARGB3, _Z AARGB2, _Z AARGB1, _Z AARGB0, MOVF IORWF AARGB0,W BARGB0,W ; clear partial remainder F F F F ; if MSB set, negate AARG F F F F F F F F 1997 Microchip Technology Inc. AN617 MOVWF BTFSC GOTO C3216S TEMP TEMP,MSB C3216SX1 SDIV3216L BTFSC GOTO TEMPB3,LSB C3216SX4 BTFSS RETLW SIGN,MSB 0x00 COMF COMF COMF COMF INCF BTFSC INCF BTFSC INCF BTFSC INCF AARGB3, AARGB2, AARGB1, AARGB0, AARGB3, _Z AARGB2, _Z AARGB1, _Z AARGB0, COMF COMF INCF BTFSC INCF REMB1, REMB0, REMB1, _Z REMB0, RETLW 0x00 BTFSS GOTO BTFSC GOTO MOVF MOVWF MOVF MOVWF BCF RLF RLF RLF MOVF MOVWF MOVF MOVWF CLRF CLRF GOTO CLRF INCF CLRF CLRF CLRF RETLW BARGB0,MSB C3216SX3 AARGB0,MSB C3216SX2 AARGB2,W REMB0 AARGB3,W REMB1 REMB0,MSB AARGB2,F AARGB1,F AARGB0,F AARGB0,W AARGB2 AARGB1,W AARGB3 AARGB0 AARGB1 C3216SOK AARGB3 AARGB3,F AARGB2 AARGB1 AARGB0 0x00 ; test BARG exception C3216SX3 COMF COMF COMF COMF INCF GOTO AARGB0,F AARGB1,F AARGB2,F AARGB3,F TEMPB3,F C3216S ; numerator = 0x7FFFFFFF + 1 C3216SX4 INCF REMB1,F ; increment remainder and test for C3216SOK C3216SX1 C3216SX2 1997 Microchip Technology Inc. ; test exception flag F F F F F F F F F F F F ; test AARG exception ; quotient = 1, remainder = 0 DS00617B-page 175 AN617 BTFSC INCF MOVF SUBWF BTFSS GOTO MOVF SUBWF BTFSS GOTO CLRF CLRF INCF BTFSC INCF BTFSC INCF BTFSC INCF BTFSS GOTO BSF RETLW _Z REMB0,F BARGB1,W REMB1,W _Z C3216SOK BARGB0,W REMB0,W _Z C3216SOK REMB0 REMB1 AARGB3,F _Z AARGB2,F _Z AARGB1,F _Z AARGB0,F AARGB0,MSB C3216SOK FPFLAGS,NAN 0xFF ; overflow ; overflow ; if remainder overflow, clear ; remainder, increment quotient and ; test for overflow exception ;********************************************************************************************** ;********************************************************************************************** ; 32/16 Bit Unsigned Fixed Point Divide 32/16 -> 32.16 ; ; Input: 32 bit unsigned fixed point dividend in AARGB0, AARGB1,AARGB2,AARGB3 16 bit unsigned fixed point divisor in BARGB0, BARGB1 ; Use: CALL ; ; Output: 32 bit unsigned fixed point quotient in AARGB0, AARGB1,AARGB2,AARGB3 16 bit unsigned fixed point remainder in REMB0, REMB1 ; Result: AARG, REM ; Max Timing: 2+699+2 = 703 clks ; Max Timing: 2+663+2 = 667 clks ; PM: 2+240+1 = 243 FXD3216U FXD3216U <-- AARG / BARG DM: 9 CLRF CLRF REMB0 REMB1 UDIV3216L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; 31/15 Bit Unsigned Fixed Point Divide 31/15 -> 31.15 ; ; Input: 31 bit unsigned fixed point dividend in AARGB0, AARGB1,AARGB2,AARGB3 15 bit unsigned fixed point divisor in BARGB0, BARGB1 ; Use: CALL ; ; Output: 31 bit unsigned fixed point quotient in AARGB0, AARGB1,AARGB2,AARGB3 15 bit unsigned fixed point remainder in REMB0, REMB1 ; Result: AARG, REM DS00617B-page 176 FXD3115U <-- AARG / BARG 1997 Microchip Technology Inc. AN617 ; Max Timing: 2+537+2 = 541 clks ; Min Timing: 2+501+2 = 505 clks ; PM: 2+157+1 = 160 FXD3115U CLRF CLRF DM: 9 REMB0 REMB1 UDIV3115L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** 1997 Microchip Technology Inc. DS00617B-page 177 AN617 E.4 24/24 PIC16C5X/PIC16CXXX Fixed Point Divide Routines ; RCS Header $Id: fxd44.a16 2.3 1996/10/16 14:23:57 F.J.Testa Exp $ ; $Revision: 2.3 $ ; 24/24 PIC16 FIXED POINT DIVIDE ROUTINES ; ; Input: fixed point arguments in AARG and BARG ; ; Output: quotient AARG/BARG followed by remainder in REM ; ; All timings are worst case cycle counts ; ; It is useful to note that the additional unsigned routines requiring a non-power of two ; argument can be called in a signed divide application where it is known that the ; respective argument is nonnegative, thereby offering some improvement in ; performance. ; ; Routine Clocks Function ; ; FXD2424S 581 24 bit/24 bit -> 24.24 signed fixed point divide ; ; FXD2424U 676 24 bit/24 bit -> 24.24 unsigned fixed point divide ; ; FXD2323U 531 23 bit/23 bit -> 23.23 unsigned fixed point divide ;********************************************************************************************** ;********************************************************************************************** ; 24/24 Bit Division Macros SDIV2424L macro ; Max Timing: 13+6*22+21+21+6*22+21+21+6*22+21+12 = 526 clks ; Min Timing: 13+6*21+20+20+6*21+20+20+6*21+20+3 = 494 clks ; PM: 11+3*51+31+12 = 207 LOOPS2424A DS00617B-page 178 DM: 12 MOVF SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF RLF BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F AARGB0, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF MOVF BTFSS GOTO AARGB0,W REMB2, F REMB1, F REMB0, F BARGB2,W AARGB0,LSB SADD44LA SUBWF MOVF BTFSS INCFSZ REMB2, F BARGB1,W _C BARGB1,W 1997 Microchip Technology Inc. AN617 SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK44LA SADD44LA ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK44LA RLF AARGB0, F DECFSZ GOTO LOOPCOUNT, F LOOPS2424A RLF RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB2, F REMB1, F REMB0, F BARGB2,W AARGB0,LSB SADD44L8 SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK44L8 SADD44L8 ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK44L8 RLF AARGB1, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB2, F REMB1, F REMB0, F BARGB2,W AARGB1,LSB SADD44LB SUBWF MOVF REMB2, F BARGB1,W LOOPS2424B 1997 Microchip Technology Inc. DS00617B-page 179 AN617 BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK44LB SADD44LB ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK44LB RLF AARGB1, F DECFSZ GOTO LOOPCOUNT, F LOOPS2424B RLF RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB2, F REMB1, F REMB0, F BARGB2,W AARGB1,LSB SADD44L16 SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK44L16 SADD44L16 ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK44L16 RLF AARGB2, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB2, F REMB1, F REMB0, F BARGB2,W AARGB2,LSB SADD44LC LOOPS2424C DS00617B-page 180 1997 Microchip Technology Inc. AN617 SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK44LC SADD44LC ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK44LC RLF AARGB2, F DECFSZ GOTO LOOPCOUNT, F LOOPS2424C BTFSC GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF AARGB2,LSB SOK44L BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK44L endm UDIV2424L macro ; Max Timing: 20+6*28+27+27+6*28+27+27+6*28+27+12 = 671 clks ; Min Timing: 20+6*27+26+26+6*27+26+26+6*27+26+3 = 639 clks ; PM: 18+2*76+40+12 = 222 DM: 13 CLRF TEMP RLF RLF MOVF SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF AARGB0,W REMB2, F BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F CLRW 1997 Microchip Technology Inc. DS00617B-page 181 AN617 LOOPU2424A UADD44LA UOK44LA DS00617B-page 182 BTFSS MOVLW SUBWF RLF _C 1 TEMP, F AARGB0, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB0,W REMB2, F REMB1, F REMB0, F TEMP, F BARGB2,W AARGB0,LSB UADD44LA SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F RLF AARGB0, F DECFSZ GOTO LOOPCOUNT, F LOOPU2424A RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB2, F REMB1, F REMB0, F TEMP, F BARGB2,W AARGB0,LSB UADD44L8 SUBWF MOVF BTFSS INCFSZ SUBWF MOVF REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C 1 TEMP, F UOK44LA _C 1 TEMP, F 1997 Microchip Technology Inc. AN617 UADD44L8 UOK44L8 LOOPU2424B UADD44LB BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO _C BARGB0,W REMB0, F ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F RLF AARGB1, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB2, F REMB1, F REMB0, F TEMP, F BARGB2,W AARGB1,LSB UADD44LB SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F 1997 Microchip Technology Inc. _C 1 TEMP, F UOK44L8 _C 1 TEMP, F _C 1 TEMP, F UOK44LB _C 1 TEMP, F DS00617B-page 183 AN617 UOK44LB UADD44L16 UOK44L16 LOOPU2424C DS00617B-page 184 RLF AARGB1, F DECFSZ GOTO LOOPCOUNT, F LOOPU2424B RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB2, F REMB1, F REMB0, F TEMP, F BARGB2,W AARGB1,LSB UADD44L16 SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F RLF AARGB2, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB2, F REMB1, F REMB0, F TEMP, F BARGB2,W AARGB2,LSB UADD44LC SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F _C 1 TEMP, F UOK44L16 _C 1 TEMP, F 1997 Microchip Technology Inc. AN617 CLRW BTFSS MOVLW SUBWF GOTO UADD44LC UOK44LC _C 1 TEMP, F UOK44LC ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F RLF AARGB2, F DECFSZ GOTO LOOPCOUNT, F LOOPU2424C BTFSC GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF AARGB2,LSB UOK44L BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F _C 1 TEMP, F UOK44L endm UDIV2323L macro ; Max Timing: 13+6*22+21+21+6*22+21+21+6*22+21+12 = 526 clks ; Min Timing: 13+6*21+20+20+6*21+20+20+6*21+20+3 = 494 clks ; PM: 11+3*51+31+12 = 207 LOOPU2323A DM: 12 MOVF SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF RLF BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F AARGB0, F MOVLW MOVWF 7 LOOPCOUNT RLF AARGB0,W 1997 Microchip Technology Inc. DS00617B-page 185 AN617 RLF RLF RLF MOVF BTFSS GOTO REMB2, F REMB1, F REMB0, F BARGB2,W AARGB0,LSB UADD33LA SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK33LA UADD33LA ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK33LA RLF AARGB0, F DECFSZ GOTO LOOPCOUNT, F LOOPU2323A RLF RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB2, F REMB1, F REMB0, F BARGB2,W AARGB0,LSB UADD33L8 SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK33L8 UADD33L8 ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK33L8 RLF AARGB1, F MOVLW MOVWF 7 LOOPCOUNT DS00617B-page 186 1997 Microchip Technology Inc. AN617 LOOPU2323B RLF RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB2, F REMB1, F REMB0, F BARGB2,W AARGB1,LSB UADD33LB SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK33LB UADD33LB ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK33LB RLF AARGB1, F DECFSZ GOTO LOOPCOUNT, F LOOPU2323B RLF RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB2, F REMB1, F REMB0, F BARGB2,W AARGB1,LSB UADD33L16 SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK33L16 UADD33L16 ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK33L16 RLF AARGB2, F 1997 Microchip Technology Inc. DS00617B-page 187 AN617 MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB2, F REMB1, F REMB0, F BARGB2,W AARGB2,LSB UADD33LC SUBWF MOVF BTFSS INCFSZ SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK33LC UADD33LC ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK33LC RLF AARGB2, F DECFSZ GOTO LOOPCOUNT, F LOOPU2323C BTFSC GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF MOVF BTFSC INCFSZ ADDWF AARGB2,LSB UOK33L BARGB2,W REMB2, F BARGB1,W _C BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F LOOPU2323C UOK33L endm ;********************************************************************************************** ;********************************************************************************************** ; 24/24 Bit Signed Fixed Point Divide 24/24 -> 24.24 ; ; Input: 24 bit fixed point dividend in AARGB0, AARGB1,AARGB2 24 bit fixed point divisor in BARGB0, BARGB1, BARGB2 ; Use: CALL ; ; Output: 24 bit fixed point quotient in AARGB0, AARGB1,AARGB2 24 bit fixed point remainder in REMB0, REMB1, REMB2 DS00617B-page 188 FXD2424S 1997 Microchip Technology Inc. AN617 ; Result: AARG, REM ; ; ; ; ; Max Timing: 26+526+5 33+526+22 33+526+22 40+526+5 = = = = 557 clks 581 clks 581 clks 571 clks 10 clks A A A A A > > < < = 0, 0, 0, 0, 0 B B B B > < > < 0 0 0 0 ; ; ; ; Min Timing: 26+494+5 33+494+22 33+494+22 40+494+5 = = = = 525 549 549 539 A A A A > > < < 0, 0, 0, 0, B B B B > < > < 0 0 0 0 ; PM: 40+207+21+53 = 321 FXD2424S <-- AARG / BARG clks clks clks clks DM: 14 CLRF CLRF CLRF CLRF MOVF IORWF IORWF BTFSC RETLW SIGN REMB0 REMB1 REMB2 AARGB0,W AARGB1,W AARGB2,W _Z 0x00 MOVF XORWF MOVWF BTFSC COMF AARGB0,W BARGB0,W TEMP TEMP,MSB SIGN,F CLRF TEMPB3 ; clear exception flag BTFSS GOTO BARGB0,MSB CA2424S ; if MSB set, negate BARG COMF COMF COMF INCF BTFSC INCF BTFSC INCF BARGB2, BARGB1, BARGB0, BARGB2, _Z BARGB1, _Z BARGB0, BTFSS GOTO AARGB0,MSB C2424SX COMF COMF COMF INCF BTFSC INCF BTFSC INCF AARGB2, AARGB1, AARGB0, AARGB2, _Z AARGB1, _Z AARGB0, C2424SX MOVF IORWF MOVWF BTFSC GOTO AARGB0,W BARGB0,W TEMP TEMP,MSB C2424SX1 C2424S SDIV2424L CA2424S 1997 Microchip Technology Inc. ; clear partial remainder F F F F F F ; if MSB set, negate AARG F F F F F F DS00617B-page 189 AN617 BTFSC GOTO TEMPB3,LSB C2424SX4 BTFSS RETLW SIGN,MSB 0x00 COMF COMF COMF INCF BTFSC INCF BTFSC INCF AARGB2, AARGB1, AARGB0, AARGB2, _Z AARGB1, _Z AARGB0, COMF COMF COMF INCF BTFSC INCF BTFSC INCF REMB2, REMB1, REMB0, REMB2, _Z REMB1, _Z REMB0, RETLW 0x00 BTFSS GOTO BTFSC GOTO MOVF MOVWF MOVF MOVWF MOVF MOVWF CLRF CLRF CLRF GOTO CLRF CLRF CLRF INCF RETLW BARGB0,MSB C2424SX3 AARGB0,MSB C2424SX2 AARGB0,W REMB0 AARGB1,W REMB1 AARGB2,W REMB2 AARGB0 AARGB1 AARGB2 C2424SOK AARGB0 AARGB1 AARGB2 AARGB2,F 0x00 ; test BARG exception C2424SX3 COMF COMF COMF INCF GOTO AARGB0,F AARGB1,F AARGB2,F TEMPB3,F C2424S ; numerator = 0x7FFFFF + 1 C2424SX4 INCF BTFSC INCF BTFSC INCF MOVF SUBWF BTFSS GOTO MOVF SUBWF BTFSS GOTO MOVF REMB2,F _Z REMB1,F _Z REMB0,F BARGB2,W REMB2,W _Z C2424SOK BARGB1,W REMB1,W _Z C2424SOK BARGB0,W ; increment remainder and test for ; overflow C2424SOK C2424SX1 C2424SX2 DS00617B-page 190 ; test exception flag F F F F F F F F F F F F ; test AARG exception ; quotient = 0, remainder = AARG ; quotient = 1, remainder = 0 1997 Microchip Technology Inc. AN617 SUBWF BTFSS GOTO CLRF CLRF CLRF INCF BTFSC INCF BTFSC INCF BTFSS GOTO BSF RETLW REMB0,W _Z C2424SOK REMB0 REMB1 REMB2 AARGB2,F _Z AARGB1,F _Z AARGB0,F AARGB0,MSB C2424SOK FPFLAGS,NAN 0xFF ; if remainder overflow, clear ; remainder, increment quotient and ; test for overflow exception ;********************************************************************************************** ;********************************************************************************************** ; 24/24 Bit Unsigned Fixed Point Divide 24/24 -> 24.24 ; ; Input: 24 bit unsigned fixed point dividend in AARGB0, AARGB1,AARGB2 24 bit unsigned fixed point divisor in BARGB0, BARGB1, BARGB2 ; Use: CALL ; ; Output: 24 bit unsigned fixed point quotient in AARGB0, AARGB1,AARGB2 24 bit unsigned fixed point remainder in REMB0, REMB1, REMB2 ; Result: AARG, REM ; Max Timing: 3+671+2 = 676 clks ; Max Timing: 3+639+2 = 644 clks ; PM: 3+222+1 = 226 FXD2424U FXD2424U <-- AARG / BARG DM: 13 CLRF CLRF CLRF REMB0 REMB1 REMB2 UDIV2424L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; 23/23 Bit Unsigned Fixed Point Divide 23/23 -> 23.23 ; ; Input: 23 bit unsigned fixed point dividend in AARGB0, AARGB1,AARGB2 23 bit unsigned fixed point divisor in BARGB0, BARGB1, BARBB2 ; Use: CALL ; ; Output: 23 bit unsigned fixed point quotient in AARGB0, AARGB1,AARGB2 23 bit unsigned fixed point remainder in REMB0, REMB1, REMB2 ; Result: AARG, REM ; Max Timing: 3+526+2 = 531 clks ; Min Timing: 3+494+2 = 499 clks ; PM: 3+207+1 = 211 FXD2323U 1997 Microchip Technology Inc. <-- AARG / BARG DM: 12 DS00617B-page 191 AN617 FXD2323U CLRF CLRF CLRF REMB0 REMB1 REMB2 UDIV2323L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** END DS00617B-page 192 1997 Microchip Technology Inc. AN617 E.5 24/16 PIC16C5X/PIC16CXXX Fixed Point Divide Routines ; RCS Header $Id: fxd46.a16 2.3 1996/10/16 14:23:57 F.J.Testa Exp $ ; $Revision: 2.3 $ ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 24/16 PIC16 FIXED POINT DIVIDE ROUTINES Input: fixed point arguments in AARG and BARG Output: quotient AARG/BARG followed by remainder in REM All timings are worst case cycle counts It is useful to note that the additional unsigned routines requiring a non-power of two argument can be called in a signed divide application where it is known that the respective argument is nonnegative, thereby offering some improvement in performance. Routine Clocks Function FXD2416S 454 24 bit/16 bit -> 24.16 signed fixed point divide FXD2416U 529 24 bit/16 bit -> 24.16 unsigned fixed point divide FXD2315U 407 23 bit/15 bit -> 23.15 unsigned fixed point divide ;********************************************************************************************** ;********************************************************************************************** ; 24/16 Bit Division Macros SDIV2416L macro ; Max Timing: 9+6*17+16+16+6*17+16+16+6*17+16+8 = 403 clks ; Min Timing: 9+6*16+15+15+6*16+15+15+6*16+15+3 = 375 clks ; PM: 7+2*40+22+8 = 117 LOOPS2416A SADD46LA DM: 7 MOVF SUBWF MOVF BTFSS INCFSZ SUBWF RLF BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F AARGB0, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF MOVF BTFSS GOTO AARGB0,W REMB1, F REMB0, F BARGB1,W AARGB0,LSB SADD46LA SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK46LA ADDWF MOVF REMB1, F BARGB0,W 1997 Microchip Technology Inc. DS00617B-page 193 AN617 BTFSC INCFSZ ADDWF _C BARGB0,W REMB0, F RLF AARGB0, F DECFSZ GOTO LOOPCOUNT, F LOOPS2416A RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB1, F REMB0, F BARGB1,W AARGB0,LSB SADD46L8 SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK46L8 SADD46L8 ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK46L8 RLF AARGB1, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB1, F REMB0, F BARGB1,W AARGB1,LSB SADD46LB SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK46LB SADD46LB ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK46LB RLF AARGB1, F DECFSZ GOTO LOOPCOUNT, F LOOPS2416B RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB1, F REMB0, F BARGB1,W AARGB1,LSB SADD46L16 SOK46LA LOOPS2416B DS00617B-page 194 1997 Microchip Technology Inc. AN617 SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK46L16 SADD46L16 ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK46L16 RLF AARGB2, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB1, F REMB0, F BARGB1,W AARGB2,LSB SADD46LC SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK46LC SADD46LC ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK46LC RLF AARGB2, F DECFSZ GOTO LOOPCOUNT, F LOOPS2416C BTFSC GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF AARGB2,LSB SOK46L BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F LOOPS2416C SOK46L endm UDIV2416L macro ; Max Timing: 16+6*22+21+21+6*22+21+21+6*22+21+8 = 525 clks ; Min Timing: 16+6*21+20+20+6*21+20+20+6*21+20+3 = 497 clks ; PM: 14+31+27+31+27+31+8 = 169 CLRF TEMP RLF AARGB0,W 1997 Microchip Technology Inc. DM: 8 DS00617B-page 195 AN617 LOOPU2416A UADD46LA UOK46LA DS00617B-page 196 RLF MOVF SUBWF MOVF BTFSS INCFSZ SUBWF REMB1, F BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F CLRW BTFSS MOVLW SUBWF RLF _C 1 TEMP, F AARGB0, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF MOVF BTFSS GOTO AARGB0,W REMB1, F REMB0, F TEMP, F BARGB1,W AARGB0,LSB UADD46LA SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F RLF AARGB0, F DECFSZ GOTO LOOPCOUNT, F LOOPU2416A RLF RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB1, F REMB0, F TEMP, F BARGB1,W AARGB0,LSB UADD46L8 SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS REMB1, F BARGB0,W _C BARGB0,W REMB0, F _C 1 TEMP, F UOK46LA _C 1 TEMP, F _C 1997 Microchip Technology Inc. AN617 UADD46L8 UOK46L8 LOOPU2416B UADD46LB UOK46LB MOVLW SUBWF GOTO 1 TEMP, F UOK46L8 ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F RLF AARGB1, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB1, F REMB0, F TEMP, F BARGB1,W AARGB1,LSB UADD46LB SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F RLF AARGB1, F DECFSZ GOTO LOOPCOUNT, F LOOPU2416B RLF RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB1, F REMB0, F TEMP, F BARGB1,W AARGB1,LSB UADD46L16 SUBWF MOVF BTFSS INCFSZ SUBWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F 1997 Microchip Technology Inc. _C 1 TEMP, F _C 1 TEMP, F UOK46LB _C 1 TEMP, F DS00617B-page 197 AN617 CLRW BTFSS MOVLW SUBWF GOTO UADD46L16 UOK46L16 LOOPU2416C UADD46LC UOK46LC _C 1 TEMP, F UOK46L16 ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F RLF AARGB2, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB1, F REMB0, F TEMP, F BARGB1,W AARGB2,LSB UADD46LC SUBWF MOVF BTFSS INCFSZ SUBWF CLRW BTFSS MOVLW SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F ADDWF MOVF BTFSC INCFSZ ADDWF CLRW BTFSC MOVLW ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F RLF AARGB2, F DECFSZ GOTO LOOPCOUNT, F LOOPU2416C BTFSC GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF AARGB2,LSB UOK46L BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F _C 1 TEMP, F _C 1 TEMP, F UOK46LC _C 1 TEMP, F UOK46L DS00617B-page 198 1997 Microchip Technology Inc. AN617 endm UDIV2315L macro ; Max Timing: 9+6*17+16+16+6*17+16+16+6*17+16+8 = 403 clks ; Min Timing: 9+6*16+15+15+6*16+15+15+6*16+15+3 = 375 clks ; PM: 7+2*40+22+8 = 117 DM: 7 MOVF SUBWF MOVF BTFSS INCFSZ SUBWF RLF BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F AARGB0, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF MOVF BTFSS GOTO AARGB0,W REMB1, F REMB0, F BARGB1,W AARGB0,LSB UADD35LA SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK35LA UADD35LA ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK35LA RLF AARGB0, F DECFSZ GOTO LOOPCOUNT, F LOOPU2315A RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB1, F REMB0, F BARGB1,W AARGB0,LSB UADD35L8 SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK35L8 ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F LOOPU2315A UADD35L8 1997 Microchip Technology Inc. DS00617B-page 199 AN617 UOK35L8 RLF AARGB1, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF MOVF BTFSS GOTO AARGB1,W REMB1, F REMB0, F BARGB1,W AARGB1,LSB UADD35LB SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK35LB UADD35LB ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK35LB RLF AARGB1, F DECFSZ GOTO LOOPCOUNT, F LOOPU2315B RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB1, F REMB0, F BARGB1,W AARGB1,LSB UADD35L16 SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK35L16 UADD35L16 ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK35L16 RLF AARGB2, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF RLF MOVF BTFSS GOTO AARGB2,W REMB1, F REMB0, F BARGB1,W AARGB2,LSB UADD35LC SUBWF MOVF BTFSS INCFSZ REMB1, F BARGB0,W _C BARGB0,W LOOPU2315B LOOPU2315C DS00617B-page 200 1997 Microchip Technology Inc. AN617 SUBWF GOTO REMB0, F UOK35LC UADD35LC ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK35LC RLF AARGB2, F DECFSZ GOTO LOOPCOUNT, F LOOPU2315C BTFSC GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF AARGB2,LSB UOK35L BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK35L endm ;********************************************************************************************** ;********************************************************************************************** ; 24/16 Bit Signed Fixed Point Divide 24/16 -> 24.16 ; ; Input: 24 bit fixed point dividend in AARGB0, AARGB1,AARGB2 16 bit fixed point divisor in BARGB0, BARGB1 ; Use: CALL ; ; Output: 24 bit fixed point quotient in AARGB0, AARGB1,AARGB2 16 bit fixed point remainder in REMB0, REMB1 ; Result: AARG, REM ; ; ; ; ; Max Timing: 25+403+5 29+403+19 32+403+19 36+403+5 = = = = 433 clks 451 clks 454 clks 444 clks 9 clks A A A A A > > < < = 0, 0, 0, 0, 0 B B B B > < > < 0 0 0 0 ; ; ; ; Min Timing: 25+375+5 29+375+19 32+375+19 36+375+5 = = = = 405 423 426 416 A A A A > > < < 0, 0, 0, 0, B B B B > < > < 0 0 0 0 ; PM: 36+117+18+48 = 219 FXD2416S FXD2416S <-- AARG / BARG clks clks clks clks DM: 10 CLRF CLRF CLRF MOVF IORWF IORWF BTFSC RETLW SIGN REMB0 REMB1 AARGB0,W AARGB1,W AARGB2,W _Z 0x00 MOVF XORWF MOVWF AARGB0,W BARGB0,W TEMP 1997 Microchip Technology Inc. ; clear partial remainder DS00617B-page 201 AN617 BTFSC COMF TEMP,MSB SIGN,F CLRF TEMPB3 ; clear exception flag BTFSS GOTO BARGB0,MSB CA2416S ; if MSB set, negate BARG COMF COMF INCF BTFSC INCF BARGB1, BARGB0, BARGB1, _Z BARGB0, BTFSS GOTO AARGB0,MSB C2416SX COMF COMF COMF INCF BTFSC INCF BTFSC INCF AARGB2, AARGB1, AARGB0, AARGB2, _Z AARGB1, _Z AARGB0, C2416SX MOVF IORWF MOVWF BTFSC GOTO AARGB0,W BARGB0,W TEMP TEMP,MSB C2416SX1 C2416S SDIV2416L CA2416S C2416SOK C2416SX1 DS00617B-page 202 F F F F ; if MSB set, negate AARG F F F F F F BTFSC GOTO TEMPB3,LSB C2416SX4 BTFSS RETLW SIGN,MSB 0x00 COMF COMF COMF INCF BTFSC INCF BTFSC INCF AARGB2, AARGB1, AARGB0, AARGB2, _Z AARGB1, _Z AARGB0, COMF COMF INCF BTFSC INCF REMB1, REMB0, REMB1, _Z REMB0, RETLW 0x00 BTFSS GOTO BTFSC GOTO MOVF MOVWF MOVF MOVWF BARGB0,MSB C2416SX3 AARGB0,MSB C2416SX2 AARGB1,W REMB0 AARGB2,W REMB1 ; test exception flag F F F F F F F F F F ; test BARG exception ; test AARG exception 1997 Microchip Technology Inc. AN617 BCF RLF RLF MOVF MOVWF CLRF CLRF GOTO CLRF INCF CLRF CLRF RETLW REMB0,MSB AARGB1,F AARGB0,F AARGB0,W AARGB2 AARGB0 AARGB1 C2416SOK AARGB2 AARGB2,F AARGB1 AARGB0 0x00 C2416SX3 COMF COMF COMF INCF GOTO AARGB0,F AARGB1,F AARGB2,F TEMPB3,F C2416S ; numerator = 0x7FFFFF + 1 C2416SX4 INCF BTFSC INCF MOVF SUBWF BTFSS GOTO MOVF SUBWF BTFSS GOTO CLRF CLRF INCF BTFSC INCF BTFSC INCF BTFSS GOTO BSF RETLW REMB1,F _Z REMB0,F BARGB1,W REMB1,W _Z C2416SOK BARGB0,W REMB0,W _Z C2416SOK REMB0 REMB1 AARGB2,F _Z AARGB1,F _Z AARGB0,F AARGB0,MSB C2416SOK FPFLAGS,NAN 0xFF ; increment remainder and test for C2416SX2 ; quotient = 1, remainder = 0 ; overflow ; overflow ; if remainder overflow, clear ; remainder, increment quotient and ; test for overflow exception ;********************************************************************************************** ;********************************************************************************************** ; 24/16 Bit Unsigned Fixed Point Divide 24/16 -> 24.16 ; ; Input: 24 bit unsigned fixed point dividend in AARGB0, AARGB1,AARGB2 16 bit unsigned fixed point divisor in BARGB0, BARGB1 ; Use: CALL ; ; Output: 24 bit unsigned fixed point quotient in AARGB0, AARGB1,AARGB2 16 bit unsigned fixed point remainder in REMB0, REMB1 ; Result: AARG, REM ; Max Timing: 2+525+2 = 529 clks ; Max Timing: 2+497+2 = 501 clks ; PM: 2+169+1 = 172 FXD2416U FXD2416U CLRF 1997 Microchip Technology Inc. <-- AARG / BARG DM: 8 REMB0 DS00617B-page 203 AN617 CLRF REMB1 UDIV2416L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; 23/15 Bit Unsigned Fixed Point Divide 23/15 -> 23.15 ; ; Input: 23 bit unsigned fixed point dividend in AARGB0, AARGB1,AARGB2 15 bit unsigned fixed point divisor in BARGB0, BARGB1 ; Use: CALL ; ; Output: 23 bit unsigned fixed point quotient in AARGB0, AARGB1,AARGB2 15 bit unsigned fixed point remainder in REMB0, REMB1 ; Result: AARG, REM ; Max Timing: 2+403+2 = 407 clks ; Min Timing: 2+375+2 = 379 clks ; PM: 2+117+1 = 120 FXD2315U FXD2315U CLRF CLRF <-- AARG / BARG DM: 7 REMB0 REMB1 UDIV2315L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** END DS00617B-page 204 1997 Microchip Technology Inc. AN617 E.6 16/16 PIC16C5X/PIC16CXXX Fixed Point Divide Routines ; RCS Header $Id: fxd66.a16 2.4 1997/02/27 01:20:22 F.J.Testa Exp $ ; $Revision: 2.4 $ ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 16/16 PIC16 FIXED POINT DIVIDE ROUTINES Input: fixed point arguments in AARG and BARG Output: quotient AARG/BARG followed by remainder in REM All timings are worst case cycle counts It is useful to note that the additional unsigned routines requiring a non-power of two argument can be called in a signed divide application where it is known that the respective argument is nonnegative, thereby offering some improvement in performance. Routine Clocks Function FXD1616S 334 16 bit/16 bit -> 16.16 signed fixed point divide FXD1616U 373 16 bit/16 bit -> 16.16 unsigned fixed point divide FXD1515U 294 15 bit/15 bit -> 15.15 unsigned fixed point divide The above timings are based on the looped macros. If space permits, approximately 65-69 clocks can be saved by using the unrolled macros. ;********************************************************************************************** ;********************************************************************************************** ; 16/16 Bit Division Macros SDIV1616L macro ; Max Timing: 13+14*18+17+8 = 290 clks ; Min Timing: 13+14*16+15+3 = 255 clks ; PM: 42 LOOPS1616 DM: 7 RLF RLF RLF MOVF SUBWF MOVF BTFSS INCFSZ SUBWF RLF RLF AARGB0,W REMB1, F REMB0, F BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F AARGB1, F AARGB0, F MOVLW MOVWF D’15’ LOOPCOUNT RLF RLF RLF MOVF AARGB0,W REMB1, F REMB0, F BARGB1,W BTFSS GOTO AARGB1,LSB SADD66L 1997 Microchip Technology Inc. DS00617B-page 205 AN617 SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK66LL SADD66L ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK66LL RLF RLF AARGB1, F AARGB0, F DECFSZ GOTO LOOPCOUNT, F LOOPS1616 BTFSC GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF AARGB1,LSB SOK66L BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK66L endm UDIV1616L macro ; restore = 23 clks, ; Max Timing: 2+15*23+22 = 369 clks ; Min Timing: 2+15*17+16 = 273 clks ; PM: 24 LOOPU1616 UOK66LL DS00617B-page 206 nonrestore = 17 clks DM: 7 MOVLW MOVWF D’16’ LOOPCOUNT RLF RLF RLF MOVF SUBWF MOVF BTFSS INCFSZ SUBWF AARGB0,W REMB1, F REMB0, F BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F BTFSC GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF _C UOK66LL BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F BCF _C RLF AARGB1, F 1997 Microchip Technology Inc. AN617 RLF AARGB0, F DECFSZ GOTO LOOPCOUNT, F LOOPU1616 endm UDIV1515L macro ; Max Timing: 13+14*18+17+8 = 290 clks ; Min Timing: 13+14*17+16+3 = 270 clks ; PM: 42 DM: 7 RLF RLF RLF MOVF SUBWF MOVF BTFSS INCFSZ SUBWF RLF RLF AARGB0,W REMB1, F REMB0, F BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F AARGB1, F AARGB0, F MOVLW MOVWF D’15’ LOOPCOUNT RLF RLF RLF MOVF AARGB0,W REMB1, F REMB0, F BARGB1,W BTFSS GOTO AARGB1,LSB UADD55L SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK55LL UADD55L ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK55LL RLF RLF AARGB1, F AARGB0, F DECFSZ GOTO LOOPCOUNT, F LOOPU1515 BTFSC GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF AARGB1,LSB UOK55L BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F LOOPU1515 UOK55L 1997 Microchip Technology Inc. DS00617B-page 207 AN617 endm SDIV1616 macro ; Max Timing: 7+10+6*14+14+7*14+8 = 221 clks ; Min Timing: 7+10+6*13+13+7*13+3 = 202 clks ; PM: 7+10+6*18+18+7*18+8 = 277 DM: 6 variable i MOVF SUBWF MOVF BTFSS INCFSZ SUBWF RLF BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F AARGB0, F RLF RLF RLF MOVF ADDWF MOVF BTFSC INCFSZ ADDWF RLF AARGB0,W REMB1, F REMB0, F BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F AARGB0, F variable i = 2 while i < 8 RLF RLF RLF MOVF AARGB0,W REMB1, F REMB0, F BARGB1,W BTFSS GOTO AARGB0,LSB SADD66#v(i) SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK66#v(i) SADD66#v(i) ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK66#v(i) RLF AARGB0, F variable i = i + 1 endw RLF RLF RLF DS00617B-page 208 AARGB1,W REMB1, F REMB0, F 1997 Microchip Technology Inc. AN617 MOVF BARGB1,W BTFSS GOTO AARGB0,LSB SADD668 SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK668 SADD668 ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK668 RLF AARGB1, F variable i = 9 while i < 16 RLF RLF RLF MOVF AARGB1,W REMB1, F REMB0, F BARGB1,W BTFSS GOTO AARGB1,LSB SADD66#v(i) SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK66#v(i) SADD66#v(i) ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK66#v(i) RLF AARGB1, F variable i = i + 1 endw BTFSC GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF AARGB1,LSB SOK66 BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F SOK66 endm UDIV1616 ; macro restore = 20 clks, 1997 Microchip Technology Inc. nonrestore = 14 clks DS00617B-page 209 AN617 ; Max Timing: 16*20 = 320 clks ; Min Timing: 16*14 = 224 clks ; PM: 16*20 = 320 DM: 6 variable i variable i = 0 while i < 16 UOK66#v(i) RLF RLF RLF MOVF SUBWF MOVF BTFSS INCFSZ SUBWF AARGB0,W REMB1, F REMB0, F BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F BTFSC GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF _C UOK66#v(i) BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F BCF _C RLF RLF AARGB1, F AARGB0, F variable i = i + 1 endw endm UDIV1515 macro ; Max Timing: 7+10+6*14+14+7*14+8 = 221 clks ; Min Timing: 7+10+6*13+13+7*13+3 = 202 clks ; PM: 7+10+6*18+18+7*18+8 = 277 DM: 6 variable i DS00617B-page 210 MOVF SUBWF MOVF BTFSS INCFSZ SUBWF RLF BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F AARGB0, F RLF RLF RLF MOVF AARGB0,W REMB1, F REMB0, F BARGB1,W 1997 Microchip Technology Inc. AN617 ADDWF MOVF BTFSC INCFSZ ADDWF RLF REMB1, F BARGB0,W _C BARGB0,W REMB0, F AARGB0 variable i = 2 while i < 8 RLF RLF RLF MOVF AARGB0,W REMB1, F REMB0, F BARGB1,W BTFSS GOTO AARGB0,LSB UADD55#v(i) SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK55#v(i) UADD55#v(i) ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK55#v(i) RLF AARGB0, F variable i = i + 1 endw RLF RLF RLF MOVF AARGB1,W REMB1, F REMB0, F BARGB1,W BTFSS GOTO AARGB0,LSB UADD558 SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK558 UADD558 ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK558 RLF AARGB1, F variable i = 9 while i < 16 RLF 1997 Microchip Technology Inc. AARGB1,W DS00617B-page 211 AN617 RLF RLF MOVF REMB1, F REMB0, F BARGB1,W BTFSS GOTO AARGB1,LSB UADD55#v(i) SUBWF MOVF BTFSS INCFSZ SUBWF GOTO REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK55#v(i) UADD55#v(i) ADDWF MOVF BTFSC INCFSZ ADDWF REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK55#v(i) RLF AARGB1, F variable i = i + 1 endw BTFSC GOTO MOVF ADDWF MOVF BTFSC INCFSZ ADDWF AARGB1,LSB UOK55 BARGB1,W REMB1, F BARGB0,W _C BARGB0,W REMB0, F UOK55 endm ;********************************************************************************************** ;********************************************************************************************** ; 16/16 Bit Signed Fixed Point Divide 16/16 -> 16.16 ; ; Input: 16 bit fixed point dividend in AARGB0, AARGB1 16 bit fixed point divisor in BARGB0, BARGB1 ; Use: CALL ; ; Output: 16 bit fixed point quotient in AARGB0, AARGB1 16 bit fixed point remainder in REMB0, REMB1 ; Result: AARG, REM ; ; ; ; ; Max Timing: 24+290+5 28+290+16 28+290+16 32+290+5 = = = = 319 clks 334 clks 334 clks 327 clks 8 clks A A A A A > > < < = 0, 0, 0, 0, 0 B B B B > < > < 0 0 0 0 ; ; ; ; Min Timing: 24+255+5 28+255+16 28+255+16 32+255+5 = = = = 284 299 299 292 A A A A > > < < 0, 0, 0, 0, B B B B > < > < 0 0 0 0 ; PM: 32+42+15+39 = 128 DS00617B-page 212 FXD1616S <-- AARG / BARG clks clks clks clks DM: 10 1997 Microchip Technology Inc. AN617 FXD1616S CLRF CLRF CLRF MOVF IORWF BTFSC RETLW SIGN REMB0 REMB1 AARGB0,W AARGB1,W _Z 0x00 MOVF XORWF MOVWF BTFSC COMF AARGB0,W BARGB0,W TEMP TEMP,MSB SIGN,F CLRF TEMPB3 ; clear exception flag BTFSS GOTO BARGB0,MSB CA1616S ; if MSB set, negate BARG COMF COMF INCF BTFSC INCF BARGB1, BARGB0, BARGB1, _Z BARGB0, BTFSS GOTO AARGB0,MSB C1616SX COMF COMF INCF BTFSC INCF AARGB1, AARGB0, AARGB1, _Z AARGB0, C1616SX MOVF IORWF MOVWF BTFSC GOTO AARGB0,W BARGB0,W TEMP TEMP,MSB C1616SX1 C1616S SDIV1616L CA1616S C1616SOK C1616SX1 ; clear partial remainder F F F F F F F F BTFSC GOTO TEMPB3,LSB C1616SX4 BTFSS RETLW SIGN,MSB 0x00 COMF COMF INCF BTFSC INCF AARGB1, AARGB0, AARGB1, _Z AARGB0, COMF COMF INCF BTFSC INCF REMB1, REMB0, REMB1, _Z REMB0, RETLW 0x00 BTFSS GOTO BTFSC GOTO BARGB0,MSB C1616SX3 AARGB0,MSB C1616SX2 1997 Microchip Technology Inc. ; if MSB set, negate AARG ; test exception flag F F F F F F F F ; test BARG exception ; test AARG exception DS00617B-page 213 AN617 MOVF MOVWF MOVF MOVWF CLRF CLRF GOTO CLRF CLRF INCF RETLW AARGB0,W REMB0 AARGB1,W REMB1 AARGB0 AARGB1 C1616SOK AARGB0 AARGB1 AARGB1,F 0x00 C1616SX3 COMF COMF INCF GOTO AARGB0,F AARGB1,F TEMPB3,F C1616S ; numerator = 0x7FFF + 1 C1616SX4 INCF BTFSC INCF MOVF SUBWF BTFSS GOTO MOVF SUBWF BTFSS GOTO CLRF CLRF INCF BTFSC INCF BTFSS GOTO BSF RETLW REMB1,F _Z REMB0,F BARGB1,W REMB1,W _Z C1616SOK BARGB0,W REMB0,W _Z C1616SOK REMB0 REMB1 AARGB1,F _Z AARGB0,F AARGB0,MSB C1616SOK FPFLAGS,NAN 0xFF ; increment remainder and test for ; overflow C1616SX2 ; quotient = 0, remainder = AARG ; quotient = 1, remainder = 0 ; if remainder overflow, clear ; remainder, increment quotient and ; test for overflow exception ;********************************************************************************************** ;********************************************************************************************** ; 16/16 Bit Unsigned Fixed Point Divide 16/16 -> 16.16 ; ; Input: 16 bit unsigned fixed point dividend in AARGB0, AARGB1 16 bit unsigned fixed point divisor in BARGB0, BARGB1 ; Use: CALL ; ; Output: 16 bit unsigned fixed point quotient in AARGB0, AARGB1 16 bit unsigned fixed point remainder in REMB0, REMB1 ; Result: AARG, REM ; Max Timing: 2+369+2 = 373 clks ; Min Timing: 2+273+2 = 277 clks ; PM: 2+24+1 = 27 FXD1616U FXD1616U CLRF CLRF <-- AARG / BARG DM: 7 REMB0 REMB1 UDIV1616L RETLW DS00617B-page 214 0x00 1997 Microchip Technology Inc. AN617 ;********************************************************************************************** ;********************************************************************************************** ; 15/15 Bit Unsigned Fixed Point Divide 15/15 -> 15.15 ; ; Input: 15 bit unsigned fixed point dividend in AARGB0, AARGB1 15 bit unsigned fixed point divisor in BARGB0, BARGB1 ; Use: CALL ; ; Output: 15 bit unsigned fixed point quotient in AARGB0, AARGB1 15 bit unsigned fixed point remainder in REMB0, REMB1 ; Result: AARG, REM ; Max Timing: 2+290+2 = 294 clks ; Min Timing: 2+270+2 = 274 clks ; PM: 2+42+1 = 45 FXD1515U FXD1515U CLRF CLRF <-- AARG / BARG DM: 7 REMB0 REMB1 UDIV1515L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** 1997 Microchip Technology Inc. DS00617B-page 215 AN617 E.7 16/8 PIC16C5X/PIC16CXXX Fixed Point Divide Routines ; RCS Header $Id: fxd68.a16 2.3 1996/10/16 14:23:57 F.J.Testa Exp $ ; $Revision: 2.3 $ ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 16/8 PIC16 FIXED POINT DIVIDE ROUTINES Input: fixed point arguments in AARG and BARG Output: quotient AARG/BARG followed by remainder in REM All timings are worst case cycle counts It is useful to note that the additional unsigned routines requiring a non-power of two argument can be called in a signed divide application where it is known that the respective argument is nonnegative, thereby offering some improvement in performance. Routine Clocks Function FXD1608S 203 16 bit/8 bit -> 16.08 signed fixed point divide FXD1608U 294 16 bit/8 bit -> 16.08 unsigned fixed point divide FXD1607U 174 16 bit/7 bit -> 16.07 unsigned fixed point divide FXD1507U 166 15 bit/7 bit -> 15.07 unsigned fixed point divide The above timings are based on the looped macros. If space permits, approximately 41-50 clocks can be saved by using the unrolled macros. ;********************************************************************************************** ;********************************************************************************************** ; 16/08 Bit Division Macros SDIV1608L macro ; Max Timing: 3+5+2+5*11+10+10+6*11+10+2 = 163 clks ; Min Timing: 3+5+2+5*11+10+10+6*11+10+2 = 163 clks ; PM: 42 LOOPS1608A DS00617B-page 216 DM: 5 MOVF SUBWF RLF BARGB0,W REMB0, F AARGB0, F RLF RLF MOVF ADDWF RLF AARGB0,W REMB0, F BARGB0,W REMB0, F AARGB0, F MOVLW MOVWF 6 LOOPCOUNT RLF RLF MOVF AARGB0,W REMB0, F BARGB0,W BTFSC SUBWF BTFSS AARGB0,LSB REMB0, F AARGB0,LSB 1997 Microchip Technology Inc. AN617 REMB0, F AARGB0, F DECFSZ GOTO LOOPCOUNT, F LOOPS1608A RLF RLF MOVF AARGB1,W REMB0, F BARGB0,W BTFSC SUBWF BTFSS ADDWF RLF AARGB0,LSB REMB0, F AARGB0,LSB REMB0, F AARGB1, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF MOVF AARGB1,W REMB0, F BARGB0,W BTFSC SUBWF BTFSS ADDWF RLF AARGB1,LSB REMB0, F AARGB1,LSB REMB0, F AARGB1, F DECFSZ GOTO LOOPCOUNT, F LOOPS1608B BTFSS ADDWF AARGB1,LSB REMB0, F LOOPS1608B ADDWF RLF endm UDIV1608L macro ; Max Timing: 2+7*12+11+3+7*24+23 = 291 clks ; Min Timing: 2+7*11+10+3+7*17+16 = 227 clks ; PM: 39 LOOPU1608A UOK68A DM: 7 MOVLW MOVWF 8 LOOPCOUNT RLF RLF MOVF SUBWF AARGB0,W REMB0, F BARGB0,W REMB0, F BTFSC GOTO ADDWF BCF RLF _C UOK68A REMB0, F _C AARGB0, F DECFSZ GOTO LOOPCOUNT, F LOOPU1608A CLRF TEMP MOVLW MOVWF 8 LOOPCOUNT 1997 Microchip Technology Inc. DS00617B-page 217 AN617 LOOPU1608B UOK68B RLF RLF RLF MOVF SUBWF CLRF CLRW BTFSS INCFSZ SUBWF AARGB1,W REMB0, F TEMP, F BARGB0,W REMB0, F AARGB5 BTFSC GOTO MOVF ADDWF CLRF CLRW BTFSC INCFSZ ADDWF _C UOK68B BARGB0,W REMB0, F AARGB5 BCF RLF _C AARGB1, F DECFSZ GOTO LOOPCOUNT, F LOOPU1608B _C AARGB5,W TEMP, F _C AARGB5,W TEMP, F endm UDIV1607L macro ; Max Timing: 7+6*11+10+10+6*11+10+2 = 171 clks ; Min Timing: 7+6*11+10+10+6*11+10+2 = 171 clks ; PM: 39 LOOPU1607A DS00617B-page 218 DM: 5 RLF RLF MOVF SUBWF RLF AARGB0,W REMB0, F BARGB0,W REMB0, F AARGB0, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF MOVF AARGB0,W REMB0, F BARGB0,W BTFSC SUBWF BTFSS ADDWF RLF AARGB0,LSB REMB0, F AARGB0,LSB REMB0, F AARGB0, F DECFSZ GOTO LOOPCOUNT, F LOOPU1607A RLF RLF MOVF AARGB1,W REMB0, F BARGB0,W BTFSC SUBWF AARGB0,LSB REMB0, F 1997 Microchip Technology Inc. AN617 LOOPU1607B BTFSS ADDWF RLF AARGB0,LSB REMB0, F AARGB1, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF MOVF AARGB1,W REMB0, F BARGB0,W BTFSC SUBWF BTFSS ADDWF RLF AARGB1,LSB REMB0, F AARGB1,LSB REMB0, F AARGB1, F DECFSZ GOTO LOOPCOUNT, F LOOPU1607B BTFSS ADDWF AARGB1,LSB REMB0, F endm UDIV1507L macro ; Max Timing: 3+5+2+5*11+10+10+6*11+10+2 = 163 clks ; Min Timing: 3+5+2+5*11+10+10+6*11+10+2 = 163 clks ; PM: 42 LOOPU1507A DM: 5 MOVF SUBWF RLF BARGB0,W REMB0, F AARGB0, F RLF RLF MOVF ADDWF RLF AARGB0,W REMB0, F BARGB0,W REMB0, F AARGB0, F MOVLW MOVWF 6 LOOPCOUNT RLF RLF MOVF AARGB0,W REMB0, F BARGB0,W BTFSC SUBWF BTFSS ADDWF RLF AARGB0,LSB REMB0, F AARGB0,LSB REMB0, F AARGB0, F DECFSZ GOTO LOOPCOUNT, F LOOPU1507A RLF RLF MOVF AARGB1,W REMB0, F BARGB0,W BTFSC SUBWF BTFSS AARGB0,LSB REMB0, F AARGB0,LSB 1997 Microchip Technology Inc. DS00617B-page 219 AN617 LOOPU1507B ADDWF RLF REMB0, F AARGB1, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF MOVF AARGB1,W REMB0, F BARGB0,W BTFSC SUBWF BTFSS ADDWF RLF AARGB1,LSB REMB0, F AARGB1,LSB REMB0, F AARGB1, F DECFSZ GOTO LOOPCOUNT, F LOOPU1507B BTFSS ADDWF AARGB1,LSB REMB0, F endm SDIV1608 macro ; Max Timing: 3+5+14*8+2 = 122 clks ; Min Timing: 3+5+14*8+2 = 122 clks ; PM: 122 DM: 4 MOVF SUBWF RLF BARGB0,W REMB0, F AARGB0, F RLF RLF MOVF ADDWF RLF AARGB0,W REMB0, F BARGB0,W REMB0, F AARGB0, F variable i = 2 while i < 8 RLF RLF MOVF AARGB0,W REMB0, F BARGB0,W BTFSC SUBWF BTFSS ADDWF RLF AARGB0,LSB REMB0, F AARGB0,LSB REMB0, F AARGB0, F variable i = i + 1 endw DS00617B-page 220 RLF RLF MOVF AARGB1,W REMB0, F BARGB0,W BTFSC SUBWF AARGB0,LSB REMB0, F 1997 Microchip Technology Inc. AN617 BTFSS ADDWF RLF AARGB0,LSB REMB0, F AARGB1, F variable i = 9 while i < 16 RLF RLF MOVF AARGB1,W REMB0, F BARGB0,W BTFSC SUBWF BTFSS ADDWF RLF AARGB1,LSB REMB0, F AARGB1,LSB REMB0, F AARGB1, F variable i = i + 1 endw BTFSS ADDWF AARGB1,LSB REMB0, F endm UDIV1608 macro ; restore = 9/21 clks, nonrestore = 8/14 clks ; Max Timing: 8*9+1+8*21 = 241 clks ; Min Timing: 8*8+1+8*14 = 177 clks ; PM: 241 DM: 6 variable i = 0 while i < 8 UOK68#v(i) RLF RLF MOVF SUBWF AARGB0,W REMB0, F BARGB0,W REMB0, F BTFSC GOTO ADDWF BCF RLF _C UOK68#v(i) REMB0, F _C AARGB0, F variable i = i + 1 endw CLRF TEMP variable i = 8 while i < 16 RLF RLF RLF MOVF 1997 Microchip Technology Inc. AARGB1,W REMB0, F TEMP, F BARGB0,W DS00617B-page 221 AN617 UOK68#v(i) SUBWF CLRF CLRW BTFSS INCFSZ SUBWF REMB0, F AARGB5 BTFSC GOTO MOVF ADDWF CLRF CLRW BTFSC INCFSZ ADDWF _C UOK68#v(i) BARGB0,W REMB0, F AARGB5 BCF RLF _C AARGB1, F _C AARGB5,W TEMP, F _C AARGB5,W TEMP, F variable i = i + 1 endw endm UDIV1607 macro ; Max Timing: 5+15*8+2 = 127 clks ; Min Timing: 5+15*8+2 = 127 clks ; PM: 127 DM: 4 RLF RLF MOVF SUBWF RLF AARGB0,W REMB0, F BARGB0,W REMB0, F AARGB0, F variable i = 1 while i < 8 RLF RLF MOVF AARGB0,W REMB0, F BARGB0,W BTFSC SUBWF BTFSS ADDWF RLF AARGB0,LSB REMB0, F AARGB0,LSB REMB0, F AARGB0, F variable i = i + 1 endw DS00617B-page 222 RLF RLF MOVF AARGB1,W REMB0, F BARGB0,W BTFSC SUBWF BTFSS ADDWF AARGB0,LSB REMB0, F AARGB0,LSB REMB0, F 1997 Microchip Technology Inc. AN617 RLF AARGB1, F variable i = 9 while i < 16 RLF RLF MOVF AARGB1,W REMB0, F BARGB0,W BTFSC SUBWF BTFSS ADDWF RLF AARGB1,LSB REMB0, F AARGB1,LSB REMB0, F AARGB1, F variable i = i + 1 endw BTFSS ADDWF AARGB1,LSB REMB0, F endm UDIV1507 macro ; Max Timing: 3+5+14*8+2 = 122 clks ; Min Timing: 3+5+14*8+2 = 122 clks ; PM: 122 DM: 4 MOVF SUBWF RLF BARGB0,W REMB0, F AARGB0, F RLF RLF MOVF ADDWF RLF AARGB0,W REMB0, F BARGB0,W REMB0, F AARGB0, F variable i = 2 while i < 8 RLF RLF MOVF AARGB0,W REMB0, F BARGB0,W BTFSC SUBWF BTFSS ADDWF RLF AARGB0,LSB REMB0, F AARGB0,LSB REMB0, F AARGB0, F variable i = i + 1 endw RLF RLF MOVF AARGB1,W REMB0, F BARGB0,W BTFSC AARGB0,LSB 1997 Microchip Technology Inc. DS00617B-page 223 AN617 SUBWF BTFSS ADDWF RLF REMB0, F AARGB0,LSB REMB0, F AARGB1, F variable i = 9 while i < 16 RLF RLF MOVF AARGB1,W REMB0, F BARGB0,W BTFSC SUBWF BTFSS ADDWF RLF AARGB1,LSB REMB0, F AARGB1,LSB REMB0, F AARGB1, F variable i = i + 1 endw BTFSS ADDWF AARGB1,LSB REMB0, F endm ;********************************************************************************************** ;********************************************************************************************** ; 16/8 Bit Signed Fixed Point Divide 16/8 -> 16.08 ; ; Input: 16 bit signed fixed point dividend in AARGB0, AARGB1 8 bit signed fixed point divisor in BARGB0 ; Use: CALL ; ; Output: 16 bit signed fixed point quotient in AARGB0, AARGB1 8 bit signed fixed point remainder in REMB0 ; Result: AARG, REM ; ; ; ; ; Max Timing: 23+163+5 = 191 clks 24+163+13 = 200 clks 27+163+13 = 203 clks 28+163+5 = 196 clks 7 clks A A A A A > > < < = 0, 0, 0, 0, 0 B B B B > < > < 0 0 0 0 ; ; ; ; Min Timing: 23+163+5 = 191 clks 24+163+13 = 200 clks 27+163+13 = 203 clks 28+163+5 = 196 clks A A A A > > < < 0, 0, 0, 0, B B B B > < > < 0 0 0 0 ; PM: 28+42+12+34 = 116 FXD1608S DS00617B-page 224 FXD1608S <-- AARG / BARG DM: 8 CLRF CLRF MOVF IORWF BTFSC RETLW SIGN REMB0 AARGB0,W AARGB1,W _Z 0x00 MOVF XORWF MOVWF AARGB0,W BARGB0,W TEMP ; clear partial remainder 1997 Microchip Technology Inc. AN617 BTFSC COMF TEMP,MSB SIGN,F CLRF TEMPB3 ; clear exception flag BTFSS GOTO BARGB0,MSB CA1608S ; if MSB set, negate BARG COMF INCF BARGB0, F BARGB0, F BTFSS GOTO AARGB0,MSB C1608SX COMF COMF INCF BTFSC INCF AARGB1, AARGB0, AARGB1, _Z AARGB0, C1608SX MOVF IORWF MOVWF BTFSC GOTO AARGB0,W BARGB0,W TEMP TEMP,MSB C1608SX1 C1608S SDIV1608 CA1608S C1608SOK C1608SX1 C1608SX2 C1608SX3 ; if MSB set, negate AARG F F F F BTFSC GOTO BTFSS RETLW TEMPB3,LSB C1608SX4 SIGN,MSB 0x00 COMF COMF INCF BTFSC INCF AARGB1, AARGB0, AARGB1, _Z AARGB0, COMF INCF REMB0, F REMB0, F RETLW 0x00 BTFSS GOTO BTFSC GOTO MOVF MOVWF BCF RLF RLF MOVF MOVWF CLRF GOTO CLRF INCF CLRF RETLW BARGB0,MSB C1608SX3 AARGB0,MSB C1608SX2 AARGB1,W REMB0 REMB0,MSB AARGB1,F AARGB0,F AARGB0,W AARGB1 AARGB0 C1608SOK AARGB1 AARGB1,F AARGB0 0x00 ; test BARG exception COMF COMF INCF GOTO AARGB0,F AARGB1,F TEMPB3,F C1608S ; numerator = 0x7FFF + 1 1997 Microchip Technology Inc. ; test exception flag F F F F ; test AARG exception ; quotient = 1, remainder = 0 DS00617B-page 225 AN617 C1608SX4 INCF MOVF SUBWF BTFSS GOTO CLRF INCF BTFSC INCF BTFSS GOTO BSF RETLW REMB0,F BARGB0,W REMB0,W _Z C1608SOK REMB0 AARGB1,F _Z AARGB0,F AARGB0,MSB C1608SOK FPFLAGS,NAN 0xFF ; increment remainder and test for ; overflow ; if remainder overflow, clear ; remainder, increment quotient and ; test for overflow exception ;********************************************************************************************** ;********************************************************************************************** ; 16/8 Bit Unsigned Fixed Point Divide 16/8 -> 16.08 ; ; Input: 16 bit unsigned fixed point dividend in AARGB0, AARGB1 8 bit unsigned fixed point divisor in BARGB0 ; Use: CALL ; ; Output: 16 bit unsigned fixed point quotient in AARGB0, AARGB1 8 bit unsigned fixed point remainder in REMB0 ; Result: AARG, REM ; Max Timing: 1+291+2 = 294 clks ; Min Timing: 1+227+2 = 230 clks ; PM: 1+39+1 = 41 FXD1608U FXD1608U <-- AARG / BARG DM: 7 CLRF REMB0 UDIV1608L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; 16/7 Bit Unsigned Fixed Point Divide 16/7 -> 16.07 ; ; Input: 16 bit unsigned fixed point dividend in AARGB0, AARGB1 7 bit unsigned fixed point divisor in BARGB0 ; Use: CALL ; ; Output: 16 bit unsigned fixed point quotient in AARGB0, AARGB1 7 bit unsigned fixed point remainder in REMB0 ; Result: AARG, REM ; Max Timing: 1+171+2 = 174 clks ; Min Timing: 1+171+2 = 174 clks ; PM: 1+39+1 = 41 FXD1607U FXD1607U CLRF <-- AARG / BARG DM: 5 REMB0 UDIV1607L DS00617B-page 226 1997 Microchip Technology Inc. AN617 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; 15/7 Bit Unsigned Fixed Point Divide 15/7 -> 15.07 ; ; Input: 15 bit unsigned fixed point dividend in AARGB0, AARGB1 7 bit unsigned fixed point divisor in BARGB0 ; Use: CALL ; ; Output: 15 bit unsigned fixed point quotient in AARGB0, AARGB1 7 bit unsigned fixed point remainder in REMB0 ; Result: AARG, REM ; Max Timing: 1+163+2 = 166 clks ; Min Timing: 1+163+2 = 166 clks ; PM: 1+42+1 = 44 FXD1507U FXD1507U CLRF <-- AARG / BARG DM: 5 REMB0 UDIV1507L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** END 1997 Microchip Technology Inc. DS00617B-page 227 AN617 E.8 8/8 PIC16C5X/PIC16CXXX Fixed Point Divide Routines ; RCS Header $Id: fxd88.a16 2.3 1996/10/16 14:23:57 F.J.Testa Exp $ ; $Revision: 2.3 $ ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 8/8 PIC16 FIXED POINT DIVIDE ROUTINES Input: fixed point arguments in AARG and BARG Output: quotient AARG/BARG in AARG followed by remainder in REM All timings are worst case cycle counts It is useful to note that the additional unsigned routines requiring a non-power of two argument can be called in a signed divide application where it is known that the respective argument is nonnegative, thereby offering some improvement in performance. Routine Clocks Function FXD0808S 109 8 bit/8 bit -> 08.08 signed fixed point divide FXD0808U 100 8 bit/8 bit -> 08.08 unsigned fixed point divide FXD0807U 88 8 bit/7 bit -> 08.07 unsigned fixed point divide FXD0707U 80 7 bit/7 bit -> 07.07 unsigned fixed point divide The above timings are based on the looped macros. If space permits, approximately 19-25 clocks can be saved by using the unrolled macros. ;********************************************************************************************** ;********************************************************************************************** ; 08/08 Bit Division Macros SDIV0808L macro ; Max Timing: 3+5+2+5*11+10+2 = 77 clks ; Min Timing: 3+5+2+5*11+10+2 = 77 clks ; PM: 22 LOOPS0808A DS00617B-page 228 DM: 4 MOVF SUBWF RLF BARGB0,W REMB0, F AARGB0, F RLF RLF MOVF ADDWF RLF AARGB0,W REMB0, F BARGB0,W REMB0, F AARGB0, F MOVLW MOVWF 6 LOOPCOUNT RLF RLF MOVF AARGB0,W REMB0, F BARGB0,W BTFSC SUBWF BTFSS AARGB0,LSB REMB0, F AARGB0,LSB 1997 Microchip Technology Inc. AN617 ADDWF RLF REMB0, F AARGB0, F DECFSZ GOTO LOOPCOUNT, F LOOPS0808A BTFSS ADDWF AARGB0,LSB REMB0, F endm UDIV0808L macro ; Max Timing: 2+7*12+11 = 97 clks ; Min Timing: 2+7*11+10 = 89 clks ; PM: 13 LOOPU0808A UOK88A DM: 4 MOVLW MOVWF 8 LOOPCOUNT RLF RLF MOVF SUBWF AARGB0,W REMB0, F BARGB0,W REMB0, F BTFSC GOTO ADDWF BCF RLF _C UOK88A REMB0, F _C AARGB0, F DECFSZ GOTO LOOPCOUNT, F LOOPU0808A endm UDIV0807L macro ; Max Timing: 7+6*11+10+2 = 85 clks ; Min Timing: 7+6*11+10+2 = 85 clks ; PM: 19 LOOPU0807 DM: 4 RLF RLF MOVF SUBWF RLF AARGB0,W REMB0, F BARGB0,W REMB0, F AARGB0, F MOVLW MOVWF 7 LOOPCOUNT RLF RLF MOVF AARGB0,W REMB0, F BARGB0,W BTFSC SUBWF BTFSS ADDWF RLF AARGB0,LSB REMB0, F AARGB0,LSB REMB0, F AARGB0, F DECFSZ LOOPCOUNT, F 1997 Microchip Technology Inc. DS00617B-page 229 AN617 GOTO LOOPU0807 BTFSS ADDWF AARGB0,LSB REMB0, F endm UDIV0707L macro ; Max Timing: 3+5+2+5*11+10+2 = 77 clks ; Min Timing: 3+5+2+5*11+10+2 = 77 clks ; PM: 22 LOOPU0707 DM: 4 MOVF SUBWF RLF BARGB0,W REMB0, F AARGB0, F RLF RLF MOVF ADDWF RLF AARGB0,W REMB0, F BARGB0,W REMB0, F AARGB0, F MOVLW MOVWF 6 LOOPCOUNT RLF RLF MOVF AARGB0,W REMB0, F BARGB0,W BTFSC SUBWF BTFSS ADDWF RLF AARGB0,LSB REMB0, F AARGB0,LSB REMB0, F AARGB0, F DECFSZ GOTO LOOPCOUNT, F LOOPU0707 BTFSS ADDWF AARGB0,LSB REMB0, F endm SDIV0808 macro ; Max Timing: 3+5+6*8+2 = 58 clks ; Min Timing: 3+5+6*8+2 = 58 clks ; PM: 58 DM: 3 variable i DS00617B-page 230 MOVF SUBWF RLF BARGB0,W REMB0, F AARGB0, F RLF RLF MOVF ADDWF RLF AARGB0,W REMB0, F BARGB0,W REMB0, F AARGB0, F 1997 Microchip Technology Inc. AN617 i = 2 while i < 8 RLF RLF MOVF AARGB0,W REMB0, F BARGB0,W BTFSC SUBWF BTFSS ADDWF RLF AARGB0,LSB REMB0, F AARGB0,LSB REMB0, F AARGB0, F i= i + 1 endw BTFSS ADDWF AARGB0,LSB REMB0, F endm UDIV0808 macro ; restore = 9 clks, nonrestore = 8 clks ; Max Timing: 8*9 = 72 clks ; Min Timing: 8*8 = 64 clks ; PM: 72 DM: 3 variable i i = 0 while i < 8 UOK88#v(i) RLF RLF MOVF SUBWF AARGB0,W REMB0, F BARGB0,W REMB0, F BTFSC GOTO ADDWF BCF RLF _C UOK88#v(i) REMB0, F _C AARGB0, F i= i + 1 endw endm UDIV0807 macro ; Max Timing: 5+7*8+2 = 63 clks ; Min Timing: 5+7*8+2 = 63 clks ; PM: 63 DM: 3 variable i 1997 Microchip Technology Inc. DS00617B-page 231 AN617 RLF RLF MOVF SUBWF RLF AARGB0,W REMB0, F BARGB0,W REMB0, F AARGB0, F i = 1 while i < 8 RLF RLF MOVF AARGB0,W REMB0, F BARGB0,W BTFSC SUBWF BTFSS ADDWF RLF AARGB0,LSB REMB0, F AARGB0,LSB REMB0, F AARGB0, F i= i + 1 endw BTFSS ADDWF AARGB0,LSB REMB0, F endm UDIV0707 macro ; Max Timing: 3+5+6*8+2 = 58 clks ; Min Timing: 3+5+6*8+2 = 58 clks ; PM: 58 DM: 3 variable i MOVF SUBWF RLF BARGB0,W REMB0, F AARGB0, F RLF RLF MOVF ADDWF RLF AARGB0,W REMB0, F BARGB0,W REMB0, F AARGB0, F i = 2 while i < 8 RLF RLF MOVF AARGB0,W REMB0, F BARGB0,W BTFSC SUBWF BTFSS ADDWF RLF AARGB0,LSB REMB0, F AARGB0,LSB REMB0, F AARGB0, F i= i + 1 endw DS00617B-page 232 1997 Microchip Technology Inc. AN617 BTFSS ADDWF AARGB0,LSB REMB0, F endm ;********************************************************************************************** ;********************************************************************************************** ; 8/8 Bit Signed Fixed Point Divide 8/8 -> 08.08 ; ; Input: 8 bit signed fixed point dividend in AARGB0 8 bit signed fixed point divisor in BARGB0 ; Use: CALL ; ; Output: 8 bit signed fixed point quotient in AARGB0 8 bit signed fixed point remainder in REMB0 ; Result: AARG, REM ; ; ; ; ; Max Timing: 21+77+5 = 103 clks 22+77+10 = 109 clks 22+77+10 = 109 clks 23+77+5 = 105 clks 6 clks A A A A A > > < < = 0, 0, 0, 0, 0 B B B B > < > < 0 0 0 0 ; ; ; ; Min Timing: 21+77+5 = 103 clks 22+77+10 = 109 clks 22+77+10 = 109 clks 23+77+5 = 105 clks A A A A > > < < 0, 0, 0, 0, B B B B > < > < 0 0 0 0 ; PM: 23+22+9+25 = 79 FXD0808S FXD0808S <-- AARG / BARG DM: 7 CLRF CLRF MOVF BTFSC RETLW SIGN REMB0 AARGB0,W _Z 0x00 XORWF MOVWF BTFSC COMF BARGB0,W TEMP TEMP,MSB SIGN,F CLRF TEMPB3 ; clear exception flag BTFSS GOTO BARGB0,MSB CA0808S ; if MSB set, negate BARG COMF INCF BARGB0, F BARGB0, F BTFSS GOTO AARGB0,MSB C0808SX COMF INCF AARGB0, F AARGB0, F C0808SX MOVF IORWF MOVWF BTFSC GOTO AARGB0,W BARGB0,W TEMP TEMP,MSB C0808SX1 C0808S SDIV0808L CA0808S 1997 Microchip Technology Inc. ; clear partial remainder ; if MSB set, negate AARG DS00617B-page 233 AN617 BTFSC GOTO TEMPB3,LSB C0808SX4 BTFSS RETLW SIGN,MSB 0x00 COMF INCF AARGB0, F AARGB0, F COMF INCF REMB0, F REMB0, F RETLW 0x00 BTFSS GOTO BTFSC GOTO MOVF MOVWF CLRF GOTO CLRF INCF RETLW BARGB0,MSB C0808SX3 AARGB0,MSB C0808SX2 AARGB0,W REMB0 AARGB0 C0808SOK AARGB0 AARGB0,F 0x00 ; test BARG exception C0808SX3 COMF INCF GOTO AARGB0,F TEMPB3,F C0808S ; numerator = 0x7F + 1 C0808SX4 INCF MOVF SUBWF BTFSS GOTO CLRF INCF BTFSS GOTO BSF RETLW REMB0,F BARGB0,W REMB0,W _Z C0808SOK REMB0 AARGB0,F AARGB0,MSB C0808SOK FPFLAGS,NAN 0xFF ; increment remainder and test for ; overflow C0808SOK C0808SX1 C0808SX2 ; test exception flag ; test AARG exception ; quotient = 0, remainder = AARG ; quotient = 1, remainder = 0 ; if remainder overflow, clear ; remainder, increment quotient and ; test for overflow exception ;********************************************************************************************** ;********************************************************************************************** ; 8/8 Bit Unsigned Fixed Point Divide 8/8 -> 08.08 ; ; Input: 8 bit unsigned fixed point dividend in AARGB0 8 bit unsigned fixed point divisor in BARGB0 ; Use: CALL ; ; Output: 8 bit unsigned fixed point quotient in AARGB0 8 bit unsigned fixed point remainder in REMB0 ; Result: AARG, REM ; Max Timing: 1+97+2 = 100 clks ; Min Timing: 1+89+2 = 92 clks ; PM: 1+13+1 = 15 DS00617B-page 234 FXD0808U <-- AARG / BARG DM: 4 1997 Microchip Technology Inc. AN617 FXD0808U CLRF REMB0 UDIV0808L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; 8/7 Bit Unsigned Fixed Point Divide 8/7 -> 08.07 ; ; Input: 8 bit unsigned fixed point dividend in AARGB0 7 bit unsigned fixed point divisor in BARGB0 ; Use: CALL ; ; Output: 8 bit unsigned fixed point quotient in AARGB0 7 bit unsigned fixed point remainder in REMB0 ; Result: AARG, REM ; Max Timing: 1+85+2 = 88 clks ; Min Timing: 1+85+2 = 88 clks ; PM: 1+19+1 = 21 FXD0807U FXD0807U <-- AARG / BARG DM: 4 CLRF REMB0 UDIV0807L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; 7/7 Bit Unsigned Fixed Point Divide 7/7 -> 07.07 ; ; Input: 7 bit unsigned fixed point dividend in AARGB0 7 bit unsigned fixed point divisor in BARGB0 ; Use: CALL ; ; Output: 7 bit unsigned fixed point quotient in AARGB0 7 bit unsigned fixed point remainder in REMB0 ; Result: AARG, REM ; Max Timing: 1+77+2 = 80 clks ; Min Timing: 1+77+2 = 80 clks ; PM: 1+22+1 = 44 FXD0707U FXD0707U CLRF <-- AARG / BARG DM: 4 REMB0 UDIV0707L RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** 1997 Microchip Technology Inc. DS00617B-page 235 AN617 NOTES: DS00617B-page 236 1997 Microchip Technology Inc. AN617 Please check the Microchip BBS for the latest version of the source code. For BBS access information, see Section 6, Microchip Bulletin Board Service information, page 6-3. APPENDIX F: PIC17CXXX MULTIPLY ROUTINES ; RCS Header $Id: fxm.a17 2.2 1996/06/11 21:42:11 F.J.Testa Exp $ ; $Revision: 2.2 $ ; PIC17 FIXED POINT MULTIPLY ROUTINES ; ; Input: fixed point arguments in AARG and BARG ; ; Output: product AARG*BARG in AARG ; ; All timings are worst case cycle counts ; ; Routine Clocks Function ; ; ; FXM0808S 11 08x08 -> 16 bit signed fixed point multiply ; ; FXM0808U 6 08x08 -> 16 bit unsigned fixed point multiply ; ; FXM1608S 21 16x08 -> 24 bit signed fixed point multiply ; ; FXM1608U 12 16x08 -> 24 bit unsigned fixed point multiply ; ; FXM1616S 39 16x16 -> 32 bit signed fixed point multiply ; ; FXM1616U 26 16x16 -> 32 bit unsigned fixed point multiply ; ; FXM2416S 56 24x16 -> 40 bit signed fixed point multiply ; ; FXM2416U 40 24x16 -> 40 bit unsigned fixed point multiply ; ; FXM2424S 81 24x24 -> 48 bit signed fixed point multiply ; ; FXM2424U 65 24x24 -> 48 bit unsigned fixed point multiply ; ; FXM3216S 73 32x16 -> 48 bit signed fixed point multiply ; ; FXM3216U 54 32x16 -> 48 bit unsigned fixed point multiply ; ; FXM3224S 108 32x24 -> 56 bit signed fixed point multiply ; ; FXM3224U 90 32x24 -> 56 bit unsigned fixed point multiply ; ; FXM3232S 145 32x32 -> 64 bit signed fixed point multiply ; ; FXM3232U 125 32x32 -> 64 bit unsigned fixed point multiply ; ;********************************************************************************************** ;********************************************************************************************** ; ; 8x8 Bit Signed Fixed Point Multiply 08 x 08 -> 16 ; ; Input: 8 bit signed fixed point multiplicand in AARGB0 ; 8 bit signed fixed point multiplier in BARGB0 ; ; Use: CALL FXM0808S ; ; Output: 16 bit signed fixed point product in AARGB0, AARGB1 ; ; Result: AARG <-- AARG * BARG ; 1997 Microchip Technology Inc. DS00617B-page 237 AN617 ; Max Timing: ; ; Min Timing: ; ; PM: 10 ; FXM0808S MOVFP MULWF BTFSC SUBWF MOVFP BTFSC SUBWF MOVPF MOVPF RETLW 11 clks 11 clks DM: 3 AARGB0,WREG BARGB0 BARGB0,MSB PRODH,F BARGB0,WREG AARGB0,MSB PRODH,F PRODH,AARGB0 PRODL,AARGB1 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 8x8 Bit Unsigned Fixed Point Multiply 08 x 08 -> 16 ; ; Input: 8 bit unsigned fixed point multiplicand in AARGB0 ; 8 bit unsigned fixed point multiplier in BARGB0 ; ; Use: CALL FXM0808U ; ; Output: 16 bit unsigned fixed point product in AARGB0, AARGB1 ; ; Result: AARG <-- AARG * BARG ; ; Max Timing: 6 clks ; ; Min Timing: 6 clks ; ; PM: 5 DM: 3 ; FXM0808U MOVFP BARGB0,WREG MULWF AARGB0 MOVPF PRODH,AARGB0 MOVPF PRODL,AARGB1 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 16x8 Bit Signed Fixed Point Multiply 16 x 08 -> 24 ; ; Input: 16 bit signed fixed point multiplicand in AARGB0 ; 8 bit signed fixed point multiplier in BARGB0 ; ; Use: CALL FXM1608S ; ; Output: 24 bit signed fixed point product in AARGB0, AARGB1 ; ; Result: AARG <-- AARG * BARG ; ; Max Timing: 21 clks ; ; Min Timing: 18 clks ; ; PM: 20 DM: 4 ; FXM1608S MOVFP BARGB0,WREG MULWF AARGB1 MOVPF AARGB1,TEMP DS00617B-page 238 1997 Microchip Technology Inc. AN617 SIGN1608OK MOVPF MOVPF MULWF BTFSC SUBWF BTFSS GOTO MOVFP SUBWF MOVFP SUBWFB PRODH,AARGB1 PRODL,AARGB2 AARGB0 AARGB0,MSB PRODH,F BARGB0,MSB SIGN1608OK TEMP,WREG AARGB1,F AARGB0,WREG PRODH,F CLRF MOVFP ADDWF MOVFP ADDWFC AARGB0,F PRODL,WREG AARGB1,F PRODH,WREG AARGB0,F RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 16x8 Bit Unsigned Fixed Point Multiply 16 x 08 -> 24 ; ; Input: 16 bit unsigned fixed point multiplicand in AARGB0 ; 8 bit unsigned fixed point multiplier in BARGB0 ; ; Use: CALL FXM1608U ; ; Output: 24 bit unsigned fixed point product in AARGB0, AARGB1, AARGB2 ; ; Result: AARG <-- AARG * BARG ; ; Max Timing: 12 clks ; ; Min Timing: 12 clks ; ; PM: 11 DM: 4 ; FXM1608U MOVFP BARGB0,WREG MULWF AARGB1 MOVPF PRODH,AARGB1 MOVPF PRODL,AARGB2 MULWF AARGB0 MOVPF PRODH,AARGB0 MOVPF PRODL,WREG ADDWF AARGB1,F CLRF WREG,F ADDWFC AARGB0,F RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 16x16 Bit Signed Fixed Point Multiply 16 x 16 -> 32 ; ; Input: 16 bit signed fixed point multiplicand in AARGB0, AARGB1 ; 16 bit signed fixed point multiplier in BARGB0, BARGB1 ; ; Use: CALL FXM1616S ; ; Output: 32 bit signed fixed point product in AARGB0, AARGB1, ; AARGB2, AARGB3 ; 1997 Microchip Technology Inc. DS00617B-page 239 AN617 ; Result: AARG <-- AARG * BARG ; ; Max Timing: 39 clks ; ; Min Timing: 31 clks ; ; PM: 38 DM: 8 ; FXM1616S MOVPF AARGB0,TEMPB0 MOVPF AARGB1,TEMPB1 TSIGN1616A MOVFP MULWF MOVPF MOVPF AARGB1,WREG BARGB1 PRODH,AARGB2 PRODL,AARGB3 MOVFP MULWF MOVPF MOVPF AARGB0,WREG BARGB0 PRODH,AARGB0 PRODL,AARGB1 MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC BARGB1 PRODL,WREG AARGB2,F PRODH,WREG AARGB1,F WREG,F AARGB0,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC TEMPB1,WREG BARGB0 PRODL,WREG AARGB2,F PRODH,WREG AARGB1,F WREG,F AARGB0,F BTFSS GOTO MOVFP SUBWF MOVFP SUBWFB BARGB0,MSB TSIGN1616A TEMPB1,WREG AARGB1,F TEMPB0,WREG AARGB0,F BTFSS RETLW MOVFP SUBWF MOVFP SUBWFB TEMPB0,MSB 0x00 BARGB1,WREG AARGB1,F BARGB0,WREG AARGB0,F RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 16x16 Bit Unsigned Fixed Point Multiply 16 x 16 -> 32 ; ; Input: 16 bit unsigned fixed point multiplicand in AARGB0, AARGB1 ; 16 bit unsigned fixed point multiplier in BARGB0, BARGB1 ; ; Use: CALL FXM1616U ; ; Output: 32 bit unsigned fixed point product in AARGB0, AARGB1, ; AARGB2, AARGB3 DS00617B-page 240 1997 Microchip Technology Inc. AN617 ; ; Result: AARG <-- AARG * BARG ; ; Max Timing: 26 clks ; ; Min Timing: 26 clks ; ; PM: 25 DM: 7 ; ; FXM1616U MOVPF AARGB1,TEMPB1 MOVFP MULWF MOVPF MOVPF AARGB1,WREG BARGB1 PRODH,AARGB2 PRODL,AARGB3 MOVFP MULWF MOVPF MOVPF AARGB0,WREG BARGB0 PRODH,AARGB0 PRODL,AARGB1 MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC BARGB1 PRODL,WREG AARGB2,F PRODH,WREG AARGB1,F WREG,F AARGB0,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC TEMPB1,WREG BARGB0 PRODL,WREG AARGB2,F PRODH,WREG AARGB1,F WREG,F AARGB0,F RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 24x16 Bit Signed Fixed Point Multiply 24 x 16 -> 40 ; ; Input: 24 bit signed fixed point multiplicand in AARGB0, AARGB1, AARGB2 ; 16 bit signed fixed point multiplier in BARGB0, BARGB1 ; ; Use: CALL FXM2416S ; ; Output: 40 bit signed fixed point product in AARGB0, AARGB1, ; AARGB2, AARGB3, AARGB4 ; ; Result: AARG <-- AARG * BARG ; ; Max Timing: 56 clks ; ; Min Timing: 46 clks ; ; PM: 55 DM: 10 ; FXM2416S MOVPF AARGB0,TEMPB0 MOVPF AARGB1,TEMPB1 MOVPF AARGB2,TEMPB2 1997 Microchip Technology Inc. DS00617B-page 241 AN617 TSIGN2416A MOVFP MULWF MOVPF MOVPF AARGB2,WREG BARGB1 PRODH,AARGB3 PRODL,AARGB4 MOVFP MULWF MOVPF MOVPF AARGB1,WREG BARGB0 PRODH,AARGB1 PRODL,AARGB2 MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC BARGB1 PRODL,WREG AARGB3,F PRODH,WREG AARGB2,F WREG,F AARGB1,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC TEMPB2,WREG BARGB0 PRODL,WREG AARGB3,F PRODH,WREG AARGB2,F WREG,F AARGB1,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC MOVFP MULWF CLRF ADDWFC MOVPF ADDWF MOVPF ADDWFC AARGB0,WREG BARGB1 PRODL,WREG AARGB2,F PRODH,WREG AARGB1,F AARGB0,WREG BARGB0 AARGB0,W AARGB0,F PRODL,WREG AARGB1,F PRODH,WREG AARGB0,F BTFSS GOTO MOVFP SUBWF MOVFP SUBWFB MOVFP SUBWFB BARGB0,MSB TSIGN2416A TEMPB2,WREG AARGB2,F TEMPB1,WREG AARGB1,F TEMPB0,WREG AARGB0,F BTFSS RETLW MOVFP SUBWF MOVFP SUBWFB TEMPB0,MSB 0x00 BARGB1,WREG AARGB1,F BARGB0,WREG AARGB0,F RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 24x16 Bit Unsigned Fixed Point Multiply 24 x 16 -> 40 ; ; Input: 24 bit unsigned fixed point multiplicand in AARGB0, AARGB1, AARGB2 DS00617B-page 242 1997 Microchip Technology Inc. AN617 ; 16 bit unsigned fixed point multiplier in BARGB0, BARGB1 ; ; Use: CALL FXM2416U ; ; Output: 40 bit unsigned fixed point product in AARGB0, AARGB1, ; AARGB2, AARGB3, AARGB4 ; ; Result: AARG <-- AARG * BARG ; ; Max Timing: 40 clks ; ; Min Timing: 40 clks ; ; PM: 39 DM: 8 ; ; FXM2416U MOVPF AARGB2,TEMPB2 MOVFP MULWF MOVPF MOVPF AARGB2,WREG BARGB1 PRODH,AARGB3 PRODL,AARGB4 MOVFP MULWF MOVPF MOVPF AARGB1,WREG BARGB0 PRODH,AARGB1 PRODL,AARGB2 MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC BARGB1 PRODL,WREG AARGB3,F PRODH,WREG AARGB2,F WREG,F AARGB1,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC TEMPB2,WREG BARGB0 PRODL,WREG AARGB3,F PRODH,WREG AARGB2,F WREG,F AARGB1,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC MOVFP MULWF CLRF ADDWFC MOVPF ADDWF MOVPF ADDWFC AARGB0,WREG BARGB1 PRODL,WREG AARGB2,F PRODH,WREG AARGB1,F AARGB0,WREG BARGB0 AARGB0,W AARGB0,F PRODL,WREG AARGB1,F PRODH,WREG AARGB0,F RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 24x24 Bit Signed Fixed Point Multiply 24 x 24 -> 48 1997 Microchip Technology Inc. DS00617B-page 243 AN617 ; ; Input: 24 bit signed fixed point multiplicand in AARGB0, AARGB1, AARGB2 ; 24 bit signed fixed point multiplier in BARGB0, BARGB1, BARGB2 ; ; Use: CALL FXM2424S ; ; Output: 48 bit signed fixed point product in AARGB0, AARGB1, ; AARGB2, AARGB3, AARGB4, AARGB5 ; ; Result: AARG <-- AARG * BARG ; ; Max Timing: 81 clks ; ; Min Timing: 69 clks ; ; PM: 80 DM: 12 ; FXM2424S MOVPF AARGB0,TEMPB0 MOVPF AARGB1,TEMPB1 MOVPF AARGB2,TEMPB2 DS00617B-page 244 MOVFP MULWF MOVPF MOVPF AARGB2,WREG BARGB2 PRODH,AARGB4 PRODL,AARGB5 MOVFP MULWF MOVPF MOVPF AARGB1,WREG BARGB1 PRODH,AARGB2 PRODL,AARGB3 MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC BARGB2 PRODL,WREG AARGB4,F PRODH,WREG AARGB3,F WREG,F AARGB2,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC TEMPB2,WREG BARGB1 PRODL,WREG AARGB4,F PRODH,WREG AARGB3,F WREG,F AARGB2,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC MOVFP MULWF CLRF ADDWFC MOVPF ADDWF MOVPF ADDWFC AARGB0,WREG BARGB2 PRODL,WREG AARGB3,F PRODH,WREG AARGB2,F AARGB0,WREG BARGB1 AARGB1,W AARGB1,F PRODL,WREG AARGB2,F PRODH,WREG AARGB1,F MOVFP MULWF MOVPF TEMPB2,WREG BARGB0 PRODL,WREG 1997 Microchip Technology Inc. AN617 TSIGN2424A ADDWF MOVPF ADDWFC CLRF ADDWFC ADDWFC AARGB3,F PRODH,WREG AARGB2,F AARGB0,W AARGB1,F AARGB0,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC TEMPB1,WREG BARGB0 PRODL,WREG AARGB2,F PRODH,WREG AARGB1,F WREG,F AARGB0,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC TEMPB0,WREG BARGB0 PRODL,WREG AARGB1,F PRODH,WREG AARGB0,F BTFSS GOTO MOVFP SUBWF MOVFP SUBWFB MOVFP SUBWFB BARGB0,MSB TSIGN2424A TEMPB2,WREG AARGB2,F TEMPB1,WREG AARGB1,F TEMPB0,WREG AARGB0,F BTFSS RETLW MOVFP SUBWF MOVFP SUBWFB MOVFP SUBWFB TEMPB0,MSB 0x00 BARGB2,WREG AARGB2,F BARGB1,WREG AARGB1,F BARGB0,WREG AARGB0,F RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 24x24 Bit Unsigned Fixed Point Multiply 24 x 24 -> 48 ; ; Input: 24 bit unsigned fixed point multiplicand in AARGB0, AARGB1, AARGB2 ; 24 bit unsigned fixed point multiplier in BARGB0, BARGB1, BARGB2 ; ; Use: CALL FXM2424U ; ; Output: 48 bit unsigned fixed point product in AARGB0, AARGB1, ; AARGB2, AARGB3, AARGB4, AARGB5 ; ; Result: AARG <-- AARG * BARG ; ; Max Timing: 65 clks ; ; Min Timing: 65 clks ; ; PM: 64 DM: 12 ; ; FXM2424U MOVPF AARGB0,TEMPB0 1997 Microchip Technology Inc. DS00617B-page 245 AN617 DS00617B-page 246 MOVPF MOVPF AARGB1,TEMPB1 AARGB2,TEMPB2 MOVFP MULWF MOVPF MOVPF AARGB2,WREG BARGB2 PRODH,AARGB4 PRODL,AARGB5 MOVFP MULWF MOVPF MOVPF AARGB1,WREG BARGB1 PRODH,AARGB2 PRODL,AARGB3 MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC BARGB2 PRODL,WREG AARGB4,F PRODH,WREG AARGB3,F WREG,F AARGB2,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC TEMPB2,WREG BARGB1 PRODL,WREG AARGB4,F PRODH,WREG AARGB3,F WREG,F AARGB2,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC MOVFP MULWF CLRF ADDWFC MOVPF ADDWF MOVPF ADDWFC AARGB0,WREG BARGB2 PRODL,WREG AARGB3,F PRODH,WREG AARGB2,F AARGB0,WREG BARGB1 AARGB1,W AARGB1,F PRODL,WREG AARGB2,F PRODH,WREG AARGB1,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC ADDWFC TEMPB2,WREG BARGB0 PRODL,WREG AARGB3,F PRODH,WREG AARGB2,F AARGB0,W AARGB1,F AARGB0,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC TEMPB1,WREG BARGB0 PRODL,WREG AARGB2,F PRODH,WREG AARGB1,F WREG,F AARGB0,F MOVFP MULWF TEMPB0,WREG BARGB0 1997 Microchip Technology Inc. AN617 MOVPF ADDWF MOVPF ADDWFC PRODL,WREG AARGB1,F PRODH,WREG AARGB0,F RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 32x16 Bit Signed Fixed Point Multiply 32 x 16 -> 48 ; ; Input: 32 bit signed fixed point multiplicand in AARGB0, AARGB1, ; AARGB2, AARGB3 ; 16 bit signed fixed point multiplier in BARGB0, BARGB1 ; ; Use: CALL FXM3216S ; ; Output: 48 bit signed fixed point product in AARGB0, AARGB1, ; AARGB2, AARGB3, AARGB4, AARGB5 ; ; Result: AARG <-- AARG * BARG ; ; Max Timing: 73 clks ; ; Min Timing: 61 clks ; ; PM: 72 DM: 12 ; FXM3216S MOVPF AARGB0,TEMPB0 MOVPF AARGB1,TEMPB1 MOVPF AARGB2,TEMPB2 MOVPF AARGB3,TEMPB3 MOVFP MULWF MOVPF MOVPF AARGB3,WREG BARGB1 PRODH,AARGB4 PRODL,AARGB5 MOVFP MULWF MOVPF MOVPF AARGB2,WREG BARGB0 PRODH,AARGB2 PRODL,AARGB3 MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC BARGB1 PRODL,WREG AARGB4,F PRODH,WREG AARGB3,F WREG,F AARGB2,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC TEMPB3,WREG BARGB0 PRODL,WREG AARGB4,F PRODH,WREG AARGB3,F WREG,F AARGB2,F MOVFP MULWF MOVPF ADDWF MOVPF AARGB1,WREG BARGB1 PRODL,WREG AARGB3,F PRODH,WREG 1997 Microchip Technology Inc. DS00617B-page 247 AN617 TSIGN3216A ADDWFC MOVFP MULWF CLRF ADDWFC MOVPF ADDWF MOVPF ADDWFC AARGB2,F AARGB1,WREG BARGB0 AARGB1,W AARGB1,F PRODL,WREG AARGB2,F PRODH,WREG AARGB1,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC MOVFP MULWF CLRF ADDWFC MOVPF ADDWF MOVPF ADDWFC AARGB0,WREG BARGB1 PRODL,WREG AARGB2,F PRODH,WREG AARGB1,F AARGB0,WREG BARGB0 AARGB0,W AARGB0,F PRODL,WREG AARGB1,F PRODH,WREG AARGB0,F BTFSS GOTO MOVFP SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB BARGB0,MSB TSIGN3216A TEMPB3,WREG AARGB3,F TEMPB2,WREG AARGB2,F TEMPB1,WREG AARGB1,F TEMPB0,WREG AARGB0,F BTFSS RETLW MOVFP SUBWF MOVFP SUBWFB TEMPB0,MSB 0x00 BARGB1,WREG AARGB1,F BARGB0,WREG AARGB0,F RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 32x16 Bit Unsigned Fixed Point Multiply 32 x 16 -> 48 ; ; Input: 32 bit unsigned fixed point multiplicand in AARGB0, AARGB1, ; AARGB2, AARGB3 ; 16 bit unsigned fixed point multiplier in BARGB0, BARGB1 ; ; Use: CALL FXM3216U ; ; Output: 48 bit unsigned fixed point product in AARGB0, AARGB1, ; AARGB2, AARGB3, AARGB4, AARGB5 ; ; Result: AARG <-- AARG * BARG ; ; Max Timing: 54 clks ; ; Min Timing: 54 clks ; ; PM: 53 DM: 9 DS00617B-page 248 1997 Microchip Technology Inc. AN617 ; ; FXM3216U MOVPF AARGB3,TEMPB3 MOVFP MULWF MOVPF MOVPF AARGB3,WREG BARGB1 PRODH,AARGB4 PRODL,AARGB5 MOVFP MULWF MOVPF MOVPF AARGB2,WREG BARGB0 PRODH,AARGB2 PRODL,AARGB3 MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC BARGB1 PRODL,WREG AARGB4,F PRODH,WREG AARGB3,F WREG,F AARGB2,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC TEMPB3,WREG BARGB0 PRODL,WREG AARGB4,F PRODH,WREG AARGB3,F WREG,F AARGB2,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC MOVFP MULWF CLRF ADDWFC MOVPF ADDWF MOVPF ADDWFC AARGB1,WREG BARGB1 PRODL,WREG AARGB3,F PRODH,WREG AARGB2,F AARGB1,WREG BARGB0 AARGB1,W AARGB1,F PRODL,WREG AARGB2,F PRODH,WREG AARGB1,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC MOVFP MULWF CLRF ADDWFC MOVPF ADDWF MOVPF ADDWFC AARGB0,WREG BARGB1 PRODL,WREG AARGB2,F PRODH,WREG AARGB1,F AARGB0,WREG BARGB0 AARGB0,W AARGB0,F PRODL,WREG AARGB1,F PRODH,WREG AARGB0,F RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; 1997 Microchip Technology Inc. DS00617B-page 249 AN617 ; 32x24 Bit Signed Fixed Point Multiply 32 x 24 -> 56 ; ; Input: 32 bit signed fixed point multiplicand in AARGB0, AARGB1, ; AARGB2, AARGB3 ; 24 bit signed fixed point multiplier in BARGB0, BARGB1, BARGB2 ; ; Use: CALL FXM3224S ; ; Output: 56 bit signed fixed point product in AARGB0, AARGB1, ; AARGB2, AARGB3, AARGB4, AARGB5, AARGB6 ; ; Result: AARG <-- AARG * BARG ; ; Max Timing: 108 clks ; ; Min Timing: 94 clks ; ; PM: 107 DM: 15 ; FXM3224S MOVPF AARGB0,TEMPB0 MOVPF AARGB1,TEMPB1 MOVPF AARGB2,TEMPB2 MOVPF AARGB3,TEMPB3 DS00617B-page 250 MOVFP MULWF MOVPF MOVPF AARGB3,WREG BARGB2 PRODH,AARGB5 PRODL,SIGN MOVFP MULWF MOVPF MOVPF AARGB2,WREG BARGB1 PRODH,AARGB3 PRODL,AARGB4 MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC BARGB2 PRODL,WREG AARGB5,F PRODH,WREG AARGB4,F WREG,F AARGB3,F MOVF MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC TEMPB3,WREG BARGB1 PRODL,WREG AARGB5,F PRODH,WREG AARGB4,F WREG,F AARGB3,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC MOVFP MULWF CLRF ADDWFC MOVPF ADDWF MOVPF ADDWFC AARGB1,WREG BARGB2 PRODL,WREG AARGB4,F PRODH,WREG AARGB3,F AARGB1,WREG BARGB1 AARGB2,W AARGB2,F PRODL,WREG AARGB3,F PRODH,WREG AARGB2,F 1997 Microchip Technology Inc. AN617 TSIGN3224A MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC ADDWFC TEMPB3,WREG BARGB0 PRODL,WREG AARGB4,F PRODH,WREG AARGB3,F AARGB1,W AARGB2,F AARGB1,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC TEMPB2,WREG BARGB0 PRODL,WREG AARGB3,F PRODH,WREG AARGB2,F WREG,F AARGB1,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC TEMPB1,WREG BARGB0 PRODL,WREG AARGB2,F PRODH,WREG AARGB1,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC MOVFP MULWF CLRF ADDWFC MOVPF ADDWF MOVPF ADDWFC AARGB0,WREG BARGB1 PRODL,WREG AARGB2,F PRODH,WREG AARGB1,F AARGB0,WREG BARGB0 AARGB0,W AARGB0,F PRODL,WREG AARGB1,F PRODH,WREG AARGB0,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC ADDWFC TEMPB0,WREG BARGB2 PRODL,WREG AARGB3,F PRODH,WREG AARGB2,F WREG,F AARGB1,F AARGB0,F MOVFP SIGN,AARGB6 BTFSS GOTO MOVFP SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB BARGB0,MSB TSIGN3224A TEMPB3,WREG AARGB3,F TEMPB2,WREG AARGB2,F TEMPB1,WREG AARGB1,F TEMPB0,WREG AARGB0,F BTFSS RETLW TEMPB0,MSB 0x00 1997 Microchip Technology Inc. DS00617B-page 251 AN617 MOVFP SUBWF MOVFP SUBWFB MOVFP SUBWFB BARGB2,WREG AARGB2,F BARGB1,WREG AARGB1,F BARGB0,WREG AARGB0,F RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 32x24 Bit Unsigned Fixed Point Multiply 32 x 24 -> 56 ; ; Input: 32 bit unsigned fixed point multiplicand in AARGB0, AARGB1, ; AARGB2, AARGB3 ; 24 bit unsigned fixed point multiplier in BARGB0, BARGB1, BARGB2 ; ; Use: CALL FXM3224U ; ; Output: 56 bit unsigned fixed point product in AARGB0, AARGB1, ; AARGB2, AARGB3, AARGB4, AARGB5, AARGB6 ; ; Result: AARG <-- AARG * BARG ; ; Max Timing: 90 clks ; ; Min Timing: 90 clks ; ; PM: 89 DM: 15 ; ; FXM3224U MOVPF AARGB0,TEMPB0 MOVPF AARGB1,TEMPB1 MOVPF AARGB2,TEMPB2 MOVPF AARGB3,TEMPB3 DS00617B-page 252 MOVFP MULWF MOVPF MOVPF AARGB3,WREG BARGB2 PRODH,AARGB5 PRODL,SIGN MOVFP MULWF MOVPF MOVPF AARGB2,WREG BARGB1 PRODH,AARGB3 PRODL,AARGB4 MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC BARGB2 PRODL,WREG AARGB5,F PRODH,WREG AARGB4,F WREG,F AARGB3,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC TEMPB3,WREG BARGB1 PRODL,WREG AARGB5,F PRODH,WREG AARGB4,F WREG,F AARGB3,F MOVFP MULWF AARGB1,WREG BARGB2 1997 Microchip Technology Inc. AN617 MOVPF ADDWF MOVPF ADDWFC MOVFP MULWF CLRF ADDWFC MOVPF ADDWF MOVPF ADDWFC PRODL,WREG AARGB4,F PRODH,WREG AARGB3,F AARGB1,WREG BARGB1 AARGB2,W AARGB2,F PRODL,WREG AARGB3,F PRODH,WREG AARGB2,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC ADDWFC TEMPB3,WREG BARGB0 PRODL,WREG AARGB4,F PRODH,WREG AARGB3,F AARGB1,W AARGB2,F AARGB1,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC TEMPB2,WREG BARGB0 PRODL,WREG AARGB3,F PRODH,WREG AARGB2,F WREG,F AARGB1,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC TEMPB1,WREG BARGB0 PRODL,WREG AARGB2,F PRODH,WREG AARGB1,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC MOVFP MULWF CLRF ADDWFC MOVPF ADDWF MOVPF ADDWFC AARGB0,WREG BARGB1 PRODL,WREG AARGB2,F PRODH,WREG AARGB1,F AARGB0,WREG BARGB0 AARGB0,W AARGB0,F PRODL,WREG AARGB1,F PRODH,WREG AARGB0,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC ADDWFC TEMPB0,WREG BARGB2 PRODL,WREG AARGB3,F PRODH,WREG AARGB2,F WREG,F AARGB1,F AARGB0,F MOVFP SIGN,AARGB6 1997 Microchip Technology Inc. DS00617B-page 253 AN617 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 32x32 Bit Signed Fixed Point Multiply 32 x 32 -> 64 ; ; Input: 32 bit signed fixed point multiplicand in AARGB0, AARGB1, ; AARGB2, AARGB3 ; 32 bit signed fixed point multiplier in BARGB0, BARGB1, ; BARGB2, BARGB3 ; ; Use: CALL FXM3232S ; ; Output: 64 bit signed fixed point product in AARGB0, AARGB1, ; AARGB2, AARGB3, AARGB4, AARGB5, AARGB6, AARGB7 ; ; Result: AARG <-- AARG * BARG ; ; Max Timing: 145 clks ; ; Min Timing: 129 clks ; ; PM: 144 DM: 18 ; FXM3232S MOVPF AARGB0,TEMPB0 MOVPF AARGB1,TEMPB1 MOVPF AARGB2,TEMPB2 MOVPF AARGB3,TEMPB3 DS00617B-page 254 MOVFP MULWF MOVPF MOVPF AARGB3,WREG BARGB3 PRODL,TBLPTRL PRODH,TBLPTRH MOVFP MULWF MOVPF MOVPF AARGB2,WREG BARGB2 PRODL,AARGB5 PRODH,AARGB4 MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC BARGB3 PRODL,WREG TBLPTRH,F PRODH,WREG AARGB5,F WREG,F AARGB4,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC TEMPB3,WREG BARGB2 PRODL,WREG TBLPTRH,F PRODH,WREG AARGB5,F WREG,F AARGB4,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC MOVFP MULWF CLRF AARGB1,WREG BARGB3 PRODL,WREG AARGB5,F PRODH,WREG AARGB4,F AARGB1,WREG BARGB2 AARGB3,W 1997 Microchip Technology Inc. AN617 ADDWFC MOVPF ADDWF MOVPF ADDWFC AARGB3,F PRODL,WREG AARGB4,F PRODH,WREG AARGB3,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC ADDWFC TEMPB3,WREG BARGB1 PRODL,WREG AARGB5,F PRODH,WREG AARGB4,F AARGB2,W AARGB3,F AARGB2,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC TEMPB2,WREG BARGB1 PRODL,WREG AARGB4,F PRODH,WREG AARGB3,F WREG,F AARGB2,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC TEMPB1,WREG BARGB1 PRODL,WREG AARGB3,F PRODH,WREG AARGB2,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC MOVFP MULWF CLRF ADDWFC MOVPF ADDWF MOVPF ADDWFC AARGB0,WREG BARGB2 PRODL,WREG AARGB3,F PRODH,WREG AARGB2,F AARGB0,WREG BARGB1 AARGB1,W AARGB1,F PRODL,WREG AARGB2,F PRODH,WREG AARGB1,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC ADDWFC TEMPB0,WREG BARGB3 PRODL,WREG AARGB4,F PRODH,WREG AARGB3,F WREG,F AARGB2,F AARGB1,F MOVFP MULWF MOVPF MOVPF ADDWF CLRF ADDWFC TEMPB0,WREG BARGB0 PRODH,AARGB0 PRODL,WREG AARGB1,F WREG,F AARGB0,F MOVFP TEMPB3,WREG 1997 Microchip Technology Inc. DS00617B-page 255 AN617 TSIGN3232A MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC ADDWFC ADDWFC BARGB0 PRODL,WREG AARGB4,F PRODH,WREG AARGB3,F WREG,F AARGB2,F AARGB1,F AARGB0,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC ADDWFC TEMPB2,WREG BARGB0 PRODL,WREG AARGB3,F PRODH,WREG AARGB2,F WREG,F AARGB1,F AARGB0,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC TEMPB1,WREG BARGB0 PRODL,WREG AARGB2,F PRODH,WREG AARGB1,F WREG,F AARGB0,F MOVFP MOVFP TBLPTRL,AARGB7 TBLPTRH,AARGB6 BTFSS GOTO MOVFP SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB BARGB0,MSB TSIGN3232A TEMPB3,WREG AARGB3,F TEMPB2,WREG AARGB2,F TEMPB1,WREG AARGB1,F TEMPB0,WREG AARGB0,F BTFSS RETLW MOVFP SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB TEMPB0,MSB 0x00 BARGB3,WREG AARGB3,F BARGB2,WREG AARGB2,F BARGB1,WREG AARGB1,F BARGB0,WREG AARGB0,F RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 32x32 Bit Unsigned Fixed Point Multiply 32 x 32 -> 64 ; ; Input: 32 bit unsigned fixed point multiplicand in AARGB0, AARGB1, ; AARGB2, AARGB3 ; 32 bit unsigned fixed point multiplier in BARGB0, BARGB1, ; BARGB2, BARGB3 DS00617B-page 256 1997 Microchip Technology Inc. AN617 ; ; Use: CALL FXM3232U ; ; Output: 64 bit unsigned fixed point product in AARGB0, AARGB1, ; AARGB2, AARGB3, AARGB4, AARGB5, AARGB6, AARGB7 ; ; Result: AARG <-- AARG * BARG ; ; Max Timing: 125 clks ; ; Min Timing: 125 clks ; ; PM: 124 DM: 18 ; ; FXM3232U MOVPF AARGB0,TEMPB0 MOVPF AARGB1,TEMPB1 MOVPF AARGB2,TEMPB2 MOVPF AARGB3,TEMPB3 MOVFP MULWF MOVPF MOVPF AARGB3,WREG BARGB3 PRODL,TBLPTRL PRODH,TBLPTRH MOVFP MULWF MOVPF MOVPF AARGB2,WREG BARGB2 PRODL,AARGB5 PRODH,AARGB4 MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC BARGB3 PRODL,WREG TBLPTRH,F PRODH,WREG AARGB5,F WREG,F AARGB4,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC TEMPB3,WREG BARGB2 PRODL,WREG TBLPTRH,F PRODH,WREG AARGB5,F WREG,F AARGB4,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC MOVFP MULWF CLRF ADDWFC MOVPF ADDWF MOVPF ADDWFC AARGB1,WREG BARGB3 PRODL,WREG AARGB5,F PRODH,WREG AARGB4,F AARGB1,WREG BARGB2 AARGB3,W AARGB3,F PRODL,WREG AARGB4,F PRODH,WREG AARGB3,F MOVFP MULWF MOVPF ADDWF TEMPB3,WREG BARGB1 PRODL,WREG AARGB5,F 1997 Microchip Technology Inc. DS00617B-page 257 AN617 DS00617B-page 258 MOVPF ADDWFC CLRF ADDWFC ADDWFC PRODH,WREG AARGB4,F AARGB2,W AARGB3,F AARGB2,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC TEMPB2,WREG BARGB1 PRODL,WREG AARGB4,F PRODH,WREG AARGB3,F WREG,F AARGB2,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC TEMPB1,WREG BARGB1 PRODL,WREG AARGB3,F PRODH,WREG AARGB2,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC MOVFP MULWF CLRF ADDWFC MOVPF ADDWF MOVPF ADDWFC AARGB0,WREG BARGB2 PRODL,WREG AARGB3,F PRODH,WREG AARGB2,F AARGB0,WREG BARGB1 AARGB1,W AARGB1,F PRODL,WREG AARGB2,F PRODH,WREG AARGB1,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC ADDWFC TEMPB0,WREG BARGB3 PRODL,WREG AARGB4,F PRODH,WREG AARGB3,F WREG,F AARGB2,F AARGB1,F MOVFP MULWF MOVPF MOVPF ADDWF CLRF ADDWFC TEMPB0,WREG BARGB0 PRODH,AARGB0 PRODL,WREG AARGB1,F WREG,F AARGB0,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC ADDWFC ADDWFC TEMPB3,WREG BARGB0 PRODL,WREG AARGB4,F PRODH,WREG AARGB3,F WREG,F AARGB2,F AARGB1,F AARGB0,F 1997 Microchip Technology Inc. AN617 MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC ADDWFC TEMPB2,WREG BARGB0 PRODL,WREG AARGB3,F PRODH,WREG AARGB2,F WREG,F AARGB1,F AARGB0,F MOVFP MULWF MOVPF ADDWF MOVPF ADDWFC CLRF ADDWFC TEMPB1,WREG BARGB0 PRODL,WREG AARGB2,F PRODH,WREG AARGB1,F WREG,F AARGB0,F MOVFP MOVFP TBLPTRL,AARGB7 TBLPTRH,AARGB6 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** 1997 Microchip Technology Inc. DS00617B-page 259 AN617 NOTES: DS00617B-page 260 1997 Microchip Technology Inc. AN617 Please check the Microchip BBS for the latest version of the source code. For BBS access information, see Section 6, Microchip Bulletin Board Service information, page 6-3. APPENDIX G:PIC17CXXX DIVIDE ROUTINES Table of Contents for Appendix G G.1 PIC17CXXX Fixed Point Divide Routines A.................................................................................................. 261 G.2 PIC17CXXX Fixed Point Divide Routines B.................................................................................................. 306 G.3 PIC17CXXX Fixed Point Divide Routines C ................................................................................................. 347 G.1 PIC17CXXX Fixed Point Divide Routines A ; RCS Header $Id: fxda.a17 2.4 1997/03/22 03:11:13 F.J.Testa Exp $ ; $Revision: 2.4 $ ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; PIC17 FIXED POINT DIVIDE ROUTINES A Input: fixed point arguments in AARG and BARG Output: quotient AARG/BARG followed by remainder in REM All timings are worst case cycle counts It is useful to note that the additional unsigned routines requiring a non-power of two argument can be called in a signed divide application where it is known that the respective argument is nonnegative, thereby offering some improvement in performance. Routine Clocks Function FXD3232S 630 32 bit/32 bit -> 32.32 signed fixed point divide FXD3232U 683 32 bit/32 bit -> 32.32 unsigned fixed point divide FXD3231U 588 32 bit/31 bit -> 32.31 unsigned fixed point divide FXD3131U 579 31 bit/31 bit -> 31.31 unsigned fixed point divide FXD3224S 529 32 bit/24 bit -> 32.24 signed fixed point divide FXD3224U 584 32 bit/24 bit -> 32.24 unsigned fixed point divide FXD3223U 489 32 bit/23 bit -> 32.23 unsigned fixed point divide FXD3123U 481 31 bit/23 bit -> 31.23 unsigned fixed point divide ;********************************************************************************************** ;********************************************************************************************** ; ; 32/32 Bit Division Macros ; SDIV3232 macro ; ; Max Timing: 9+14+30*18+10 = 573 clks ; ; Min Timing: 9+14+30*17+3 = 536 clks ; ; PM: 9+14+30*24+10 = 753 DM: 12 ; variable i MOVFP 1997 Microchip Technology Inc. BARGB3,WREG DS00617B-page 261 AN617 SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB RLCF REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F RLCF RLCF RLCF RLCF RLCF MOVFP ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC RLCF AARGB0,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,WREG REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F variable i = D’2’ while i < D’8’ RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB0,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,WREG AARGB0,LSB SADD22#v(i) REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK22#v(i) SADD22#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK22#v(i) RLCF AARGB0, F variable i = i + 1 endw RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS DS00617B-page 262 AARGB1,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,WREG AARGB0,LSB 1997 Microchip Technology Inc. AN617 GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB GOTO SADD228 REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK228 SADD228 ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK228 RLCF AARGB1, F variable i = D’9’ while i < D’16’ RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB1,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,WREG AARGB1,LSB SADD22#v(i) REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK22#v(i) SADD22#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK22#v(i) RLCF AARGB1, F variable i = i + 1 endw RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB 1997 Microchip Technology Inc. AARGB2,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,WREG AARGB1,LSB SADD2216 REMB3, F BARGB2,WREG REMB2, F DS00617B-page 263 AN617 MOVFP SUBWFB MOVFP SUBWFB GOTO BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK2216 SADD2216 ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK2216 RLCF AARGB2, F variable i = D’17’ while i < D’24’ RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB2,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,WREG AARGB2,LSB SADD22#v(i) REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK22#v(i) SADD22#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK22#v(i) RLCF AARGB2, F variable i = i + 1 endw RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP DS00617B-page 264 AARGB3,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,WREG AARGB2,LSB SADD2224 REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG 1997 Microchip Technology Inc. AN617 SUBWFB GOTO REMB0, F SOK2224 SADD2224 ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK2224 RLCF AARGB3, F variable i = D’25’ while i < D’32’ RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB3,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,WREG AARGB3,LSB SADD22#v(i) REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK22#v(i) SADD22#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK22#v(i) RLCF AARGB3, F variable i = i + 1 endw BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC AARGB3,LSB SOK22 BARGB3,WREG REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK22 endm UDIV3232 macro ; ; restore = 25/30 clks, 1997 Microchip Technology Inc. nonrestore = 17/20 clks DS00617B-page 265 AN617 ; ; ; ; ; ; ; Max Timing: 16*25+1+16*30 = 881 clks Min Timing: 16*17+1+16*20 = 593 clks PM: 16*25+1+16*30 = 881 DM: 13 variable i variable i = D’0’ while i < D’8’ UOK22#v(i) RLCF RLCF RLCF RLCF RLCF MOVFP SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC BCF AARGB0,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,WREG REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F _C UOK22#v(i) BARGB3,WREG REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F _C RLCF AARGB0, F variable i = i + 1 endw variable i = D’8’ while i < D’16’ RLCF RLCF RLCF RLCF RLCF MOVFP SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB BTFSC GOTO MOVFP ADDWF MOVFP DS00617B-page 266 AARGB1,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,WREG REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F _C UOK22#v(i) BARGB3,WREG REMB3, F BARGB2,WREG 1997 Microchip Technology Inc. AN617 UOK22#v(i) ADDWFC MOVFP ADDWFC MOVFP ADDWFC BCF REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F _C RLCF AARGB1, F variable i = i + 1 endw CLRF TEMP, F variable i = D’16’ while i < D’24’ UOK22#v(i) RLCF RLCF RLCF RLCF RLCF RLCF MOVFP SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB CLRF SUBWFB BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC CLRF ADDWFC BCF AARGB2,W REMB3, F REMB2, F REMB1, F REMB0, F TEMP, F BARGB3,WREG REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG TEMP, F _C UOK22#v(i) BARGB3,WREG REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F _C RLCF AARGB2, F variable i = i + 1 endw variable i = D’24’ while i < D’32’ RLCF RLCF RLCF RLCF RLCF RLCF MOVFP 1997 Microchip Technology Inc. AARGB3,W REMB3, F REMB2, F REMB1, F REMB0, F TEMP, F BARGB3,WREG DS00617B-page 267 AN617 UOK22#v(i) SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB CLRF SUBWFB BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC CLRF ADDWFC BCF REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F _C UOK22#v(i) BARGB3,WREG REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F _C RLCF AARGB3, F variable i = i + 1 endw endm NDIV3232 ; ; ; ; ; ; macro Max Timing: 16+31*21+10 = 677 clks Min Timing: 16+31*20+3 = 639 clks PM: 16+31*29+10 = 925 DM: 13 variable i RLCF RLCF RLCF RLCF RLCF MOVFP SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB CLRF SUBWFB RLCF AARGB0,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,WREG REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F TEMP,W TEMP, F AARGB0, F variable i = D’1’ while i < D’8’ RLCF RLCF RLCF RLCF DS00617B-page 268 AARGB0,W REMB3, F REMB2, F REMB1, F 1997 Microchip Technology Inc. AN617 RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB CLRF SUBWFB GOTO REMB0, F TEMP, F BARGB3,WREG AARGB0,LSB NADD22#v(i) REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK22#v(i) NADD22#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC CLRF ADDWFC REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK22#v(i) RLCF AARGB0, F variable i = i + 1 endw RLCF RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB CLRF SUBWFB GOTO AARGB1,W REMB3, F REMB2, F REMB1, F REMB0, F TEMP, F BARGB3,WREG AARGB0,LSB NADD228 REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK228 NADD228 ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC CLRF ADDWFC REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK228 RLCF AARGB1, F variable i = D’9’ 1997 Microchip Technology Inc. DS00617B-page 269 AN617 while i < D’16’ RLCF RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB CLRF SUBWFB GOTO AARGB1,W REMB3, F REMB2, F REMB1, F REMB0, F TEMP, F BARGB3,WREG AARGB1,LSB NADD22#v(i) REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK22#v(i) NADD22#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC CLRF ADDWFC REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK22#v(i) RLCF AARGB1, F variable i = i + 1 endw NADD2216 DS00617B-page 270 RLCF RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB CLRF SUBWFB GOTO AARGB2,W REMB3, F REMB2, F REMB1, F REMB0, F TEMP, F BARGB3,WREG AARGB1,LSB NADD2216 REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK2216 ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC CLRF REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F 1997 Microchip Technology Inc. AN617 NOK2216 ADDWFC TEMP, F RLCF AARGB2, F variable i = D’17’ while i < D’24’ RLCF RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB CLRF SUBWFB GOTO AARGB2,W REMB3, F REMB2, F REMB1, F REMB0, F TEMP, F BARGB3,WREG AARGB2,LSB NADD22#v(i) REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK22#v(i) NADD22#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC CLRF ADDWFC REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK22#v(i) RLCF AARGB2, F variable i = i + 1 endw NADD2224 RLCF RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB CLRF SUBWFB GOTO AARGB3,W REMB3, F REMB2, F REMB1, F REMB0, F TEMP, F BARGB3,WREG AARGB2,LSB NADD2224 REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK2224 ADDWF MOVFP REMB3, F BARGB2,WREG 1997 Microchip Technology Inc. DS00617B-page 271 AN617 NOK2224 ADDWFC MOVFP ADDWFC MOVFP ADDWFC CLRF ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F RLCF AARGB3, F variable i = D’25’ while i < D’32’ RLCF RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB CLRF SUBWFB GOTO AARGB3,W REMB3, F REMB2, F REMB1, F REMB0, F TEMP, F BARGB3,WREG AARGB3,LSB NADD22#v(i) REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK22#v(i) NADD22#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC CLRF ADDWFC REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK22#v(i) RLCF AARGB3, F variable i = i + 1 endw BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC AARGB3,LSB NOK22 BARGB3,WREG REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F NOK22 endm UDIV3231 DS00617B-page 272 macro 1997 Microchip Technology Inc. AN617 ; ; ; ; ; ; ; Max Timing: 14+31*18+10 = 582 clks Min Timing: 14+31*17+3 = 544 clks PM: 14+31*24+10 = 768 DM: 12 variable i RLCF RLCF RLCF RLCF RLCF MOVFP SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB RLCF AARGB0,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,WREG REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F variable i = D’1’ while i < D’8’ RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB0,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,WREG AARGB0,LSB UADD21#v(i) REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK21#v(i) UADD21#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK21#v(i) RLCF AARGB0, F variable i = i + 1 endw RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS 1997 Microchip Technology Inc. AARGB1,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,WREG AARGB0,LSB DS00617B-page 273 AN617 GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB GOTO UADD218 REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK218 UADD218 ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK218 RLCF AARGB1, F variable i = D’9’ while i < D’16’ RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB1,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,WREG AARGB1,LSB UADD21#v(i) REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK21#v(i) UADD21#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK21#v(i) RLCF AARGB1, F variable i = i + 1 endw RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB DS00617B-page 274 AARGB2,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,WREG AARGB1,LSB UADD2116 REMB3, F BARGB2,WREG REMB2, F 1997 Microchip Technology Inc. AN617 MOVFP SUBWFB MOVFP SUBWFB GOTO BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK2116 UADD2116 ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK2116 RLCF AARGB2, F variable i = D’17’ while i < D’24’ RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB2,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,WREG AARGB2,LSB UADD21#v(i) REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK21#v(i) UADD21#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK21#v(i) RLCF AARGB2, F variable i = i + 1 endw RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP 1997 Microchip Technology Inc. AARGB3,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,WREG AARGB2,LSB UADD2124 REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG DS00617B-page 275 AN617 SUBWFB GOTO REMB0, F UOK2124 UADD2124 ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK2124 RLCF AARGB3, F variable i = D’25’ while i < D’32’ RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB3,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,WREG AARGB3,LSB UADD21#v(i) REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK21#v(i) UADD21#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK21#v(i) RLCF AARGB3, F variable i = i + 1 endw BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC AARGB3,LSB UOK21 BARGB3,WREG REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK21 endm UDIV3131 macro ; ; Max Timing: DS00617B-page 276 9+14+30*18+10 = 573 clks 1997 Microchip Technology Inc. AN617 ; ; ; ; ; Min Timing: 9+14+30*17+3 = 536 clks PM: 9+14+30*24+10 = 753 DM: 12 variable i MOVFP SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB RLCF BARGB3,WREG REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F RLCF RLCF RLCF RLCF RLCF MOVFP ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC RLCF AARGB0,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,WREG REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F variable i = D’2’ while i < D’8’ RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB0,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,WREG AARGB0,LSB UADD11#v(i) REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK11#v(i) UADD11#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK11#v(i) RLCF AARGB0, F variable i = i + 1 endw 1997 Microchip Technology Inc. DS00617B-page 277 AN617 RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB1,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,WREG AARGB0,LSB UADD118 REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK118 UADD118 ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK118 RLCF AARGB1, F variable i = D’9’ while i < D’16’ RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB1,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,WREG AARGB1,LSB UADD11#v(i) REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK11#v(i) UADD11#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK11#v(i) RLCF AARGB1, F variable i = i + 1 endw RLCF RLCF RLCF DS00617B-page 278 AARGB2,W REMB3, F REMB2, F 1997 Microchip Technology Inc. AN617 RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB GOTO REMB1, F REMB0, F BARGB3,WREG AARGB1,LSB UADD1116 REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK1116 UADD1116 ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK1116 RLCF AARGB2, F variable i = D’17’ while i < D’24’ RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB2,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,WREG AARGB2,LSB UADD11#v(i) REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK11#v(i) UADD11#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK11#v(i) RLCF AARGB2, F variable i = i + 1 endw RLCF RLCF RLCF RLCF RLCF MOVFP 1997 Microchip Technology Inc. AARGB3,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,WREG DS00617B-page 279 AN617 BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB2,LSB UADD1124 REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK1124 UADD1124 ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK1124 RLCF AARGB3, F variable i = D’25’ while i < D’32’ RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB3,W REMB3, F REMB2, F REMB1, F REMB0, F BARGB3,WREG AARGB3,LSB UADD11#v(i) REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK11#v(i) UADD11#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK11#v(i) RLCF AARGB3, F variable i = i + 1 endw BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC MOVFP ADDWFC MOVFP ADDWFC DS00617B-page 280 AARGB3,LSB UOK11 BARGB3,WREG REMB3, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F 1997 Microchip Technology Inc. AN617 UOK11 endm ;********************************************************************************************** ;********************************************************************************************** ; ; 32/24 Bit Division Macros ; SDIV3224 macro ; ; Max Timing: 7+11+30*15+8 = 476 clks ; ; Min Timing: 7+11+30*14+3 = 441 clks ; ; PM: 7+11+30*19+8 = 596 DM: 10 ; variable i MOVFP SUBWF MOVFP SUBWFB MOVFP SUBWFB RLCF BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F RLCF RLCF RLCF RLCF MOVFP ADDWF MOVFP ADDWFC MOVFP ADDWFC RLCF AARGB0,W REMB2, F REMB1, F REMB0, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F variable i = D’2’ while i < D’8’ RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB0,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB0,LSB SADD24#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK24#v(i) SADD24#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK24#v(i) RLCF AARGB0, F 1997 Microchip Technology Inc. DS00617B-page 281 AN617 variable i = i + 1 endw RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB1,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB0,LSB SADD248 REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK248 SADD248 ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK248 RLCF AARGB1, F variable i = D’9’ while i < D’16’ RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB1,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB1,LSB SADD24#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK24#v(i) SADD24#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK24#v(i) RLCF AARGB1, F variable i = i + 1 endw RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB DS00617B-page 282 AARGB2,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB1,LSB SADD2416 REMB2, F BARGB1,WREG REMB1, F 1997 Microchip Technology Inc. AN617 MOVFP SUBWFB GOTO BARGB0,WREG REMB0, F SOK2416 SADD2416 ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK2416 RLCF AARGB2, F variable i = D’17’ while i < D’24’ RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB2,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB2,LSB SADD24#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK24#v(i) SADD24#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK24#v(i) RLCF AARGB2, F variable i = i + 1 endw RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB3,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB2,LSB SADD2424 REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK2424 SADD2424 ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK2424 RLCF AARGB3, F variable i = D’25’ 1997 Microchip Technology Inc. DS00617B-page 283 AN617 while i < D’32’ RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB3,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB3,LSB SADD24#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK24#v(i) SADD24#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK24#v(i) RLCF AARGB3, F variable i = i + 1 endw BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC MOVFP ADDWFC AARGB3,LSB SOK24 BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK24 endm UDIV3224 macro ; ; restore = 20/25 clks, nonrestore = 14/17 clks ; ; Max Timing: 16*20+1+16*25 = 721 clks ; ; Min Timing: 16*14+1+16*17 = 497 clks ; ; PM: 16*20+1+16*25 = 721 DM: 11 ; variable i variable i = D’0’ while i < D’8’ RLCF RLCF RLCF RLCF MOVFP SUBWF MOVFP SUBWFB DS00617B-page 284 AARGB0,W REMB2, F REMB1, F REMB0, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F 1997 Microchip Technology Inc. AN617 UOK24#v(i) MOVFP SUBWFB BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC MOVFP ADDWFC BCF BARGB0,WREG REMB0, F _C UOK24#v(i) BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F _C RLCF AARGB0, F variable i = i + 1 endw variable i = D’8’ while i < D’16’ UOK24#v(i) RLCF RLCF RLCF RLCF MOVFP SUBWF MOVFP SUBWFB MOVFP SUBWFB BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC MOVFP ADDWFC BCF AARGB1,W REMB2, F REMB1, F REMB0, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F _C UOK24#v(i) BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F _C RLCF AARGB1, F variable i = i + 1 endw CLRF TEMP, F variable i = D’16’ while i < D’24’ RLCF RLCF RLCF RLCF RLCF MOVFP SUBWF MOVFP SUBWFB MOVFP SUBWFB CLRF 1997 Microchip Technology Inc. AARGB2,W REMB2, F REMB1, F REMB0, F TEMP, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F DS00617B-page 285 AN617 UOK24#v(i) SUBWFB BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC MOVFP ADDWFC CLRF ADDWFC BCF TEMP, F _C UOK24#v(i) BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F _C RLCF AARGB2, F variable i = i + 1 endw variable i = D’24’ while i < D’32’ UOK24#v(i) RLCF RLCF RLCF RLCF RLCF MOVFP SUBWF MOVFP SUBWFB MOVFP SUBWFB CLRF SUBWFB BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC MOVFP ADDWFC CLRF ADDWFC BCF AARGB3,W REMB2, F REMB1, F REMB0, F TEMP, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F _C UOK24#v(i) BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F _C RLCF AARGB3, F variable i = i + 1 endw endm NDIV3224 macro ; ; Max Timing: 13+31*18+8 = 579 clks ; ; Min Timing: 13+31*17+3 = 543 clks ; ; PM: 13+31*24+8 = 765 DM: 11 ; variable i DS00617B-page 286 1997 Microchip Technology Inc. AN617 RLCF RLCF RLCF RLCF MOVFP SUBWF MOVFP SUBWFB MOVFP SUBWFB CLRF SUBWFB RLCF AARGB0,W REMB2, F REMB1, F REMB0, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F TEMP,W TEMP, F AARGB0, F variable i = D’1’ while i < D’8’ RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB CLRF SUBWFB GOTO AARGB0,W REMB2, F REMB1, F REMB0, F TEMP, F BARGB2,WREG AARGB0,LSB NADD24#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK24#v(i) NADD24#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC CLRF ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK24#v(i) RLCF AARGB0, F variable i = i + 1 endw RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB CLRF SUBWFB GOTO 1997 Microchip Technology Inc. AARGB1,W REMB2, F REMB1, F REMB0, F TEMP, F BARGB2,WREG AARGB0,LSB NADD248 REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK248 DS00617B-page 287 AN617 NADD248 ADDWF MOVFP ADDWFC MOVFP ADDWFC CLRF ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK248 RLCF AARGB1, F variable i = D’9’ while i < D’16’ RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB CLRF SUBWFB GOTO AARGB1,W REMB2, F REMB1, F REMB0, F TEMP, F BARGB2,WREG AARGB1,LSB NADD24#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK24#v(i) NADD24#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC CLRF ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK24#v(i) RLCF AARGB1, F variable i = i + 1 endw NADD2416 DS00617B-page 288 RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB CLRF SUBWFB GOTO AARGB2,W REMB2, F REMB1, F REMB0, F TEMP, F BARGB2,WREG AARGB1,LSB NADD2416 REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK2416 ADDWF MOVFP ADDWFC MOVFP REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG 1997 Microchip Technology Inc. AN617 NOK2416 ADDWFC CLRF ADDWFC REMB0, F WREG, F TEMP, F RLCF AARGB2, F variable i = D’17’ while i < D’24’ RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB CLRF SUBWFB GOTO AARGB2,W REMB2, F REMB1, F REMB0, F TEMP, F BARGB2,WREG AARGB2,LSB NADD24#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK24#v(i) NADD24#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC CLRF ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK24#v(i) RLCF AARGB2, F variable i = i + 1 endw NADD2424 RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB CLRF SUBWFB GOTO AARGB3,W REMB2, F REMB1, F REMB0, F TEMP, F BARGB2,WREG AARGB2,LSB NADD2424 REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK2424 ADDWF MOVFP ADDWFC MOVFP ADDWFC CLRF ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F 1997 Microchip Technology Inc. DS00617B-page 289 AN617 NOK2424 RLCF AARGB3, F variable i = D’25’ while i < D’32’ RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB CLRF SUBWFB GOTO AARGB3,W REMB2, F REMB1, F REMB0, F TEMP, F BARGB2,WREG AARGB3,LSB NADD24#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK24#v(i) NADD24#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC CLRF ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK24#v(i) RLCF AARGB3, F variable i = i + 1 endw BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC MOVFP ADDWFC AARGB3,LSB NOK24 BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F NOK24 endm UDIV3223 macro ; ; Max Timing: 11+31*15+8 = 484 clks ; ; Min Timing: 11+31*14+3 = 448 clks ; ; PM: 11+31*19+8 = 608 ; variable i RLCF RLCF RLCF RLCF MOVFP SUBWF DS00617B-page 290 DM: 10 AARGB0,W REMB2, F REMB1, F REMB0, F BARGB2,WREG REMB2, F 1997 Microchip Technology Inc. AN617 MOVFP SUBWFB MOVFP SUBWFB RLCF BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F variable i = D’1’ while i < D’8’ RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB0,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB0,LSB UADD23#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK23#v(i) UADD23#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK23#v(i) RLCF AARGB0, F variable i = i + 1 endw RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB1,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB0,LSB UADD238 REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK238 UADD238 ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK238 RLCF AARGB1, F variable i = D’9’ while i < D’16’ RLCF RLCF RLCF RLCF 1997 Microchip Technology Inc. AARGB1,W REMB2, F REMB1, F REMB0, F DS00617B-page 291 AN617 MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO BARGB2,WREG AARGB1,LSB UADD23#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK23#v(i) UADD23#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK23#v(i) RLCF AARGB1, F variable i = i + 1 endw RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB2,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB1,LSB UADD2316 REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK2316 UADD2316 ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK2316 RLCF AARGB2, F variable i = D’17’ while i < D’24’ UADD23#v(i) DS00617B-page 292 RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB2,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB2,LSB UADD23#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK23#v(i) ADDWF MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F 1997 Microchip Technology Inc. AN617 UOK23#v(i) MOVFP ADDWFC BARGB0,WREG REMB0, F RLCF AARGB2, F variable i = i + 1 endw RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB3,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB2,LSB UADD2324 REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK2324 UADD2324 ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK2324 RLCF AARGB3, F variable i = D’25’ while i < D’32’ RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB3,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB3,LSB UADD23#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK23#v(i) UADD23#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK23#v(i) RLCF AARGB3, F variable i = i + 1 endw BTFSC GOTO MOVFP ADDWF MOVFP 1997 Microchip Technology Inc. AARGB3,LSB UOK23 BARGB2,WREG REMB2, F BARGB1,WREG DS00617B-page 293 AN617 ADDWFC MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK23 endm UDIV3123 macro ; ; Max Timing: 7+11+30*15+8 = 476 clks ; ; Min Timing: 7+11+30*14+3 = 441 clks ; ; PM: 7+11+30*19+8 = 596 DM: 10 ; variable i MOVFP SUBWF MOVFP SUBWFB MOVFP SUBWFB RLCF BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F RLCF RLCF RLCF RLCF MOVFP ADDWF MOVFP ADDWFC MOVFP ADDWFC RLCF AARGB0,W REMB2, F REMB1, F REMB0, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F variable i = D’2’ while i < D’8’ RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB0,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB0,LSB UADD13#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK13#v(i) UADD13#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK13#v(i) RLCF AARGB0, F variable i = i + 1 DS00617B-page 294 1997 Microchip Technology Inc. AN617 endw RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB1,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB0,LSB UADD138 REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK138 UADD138 ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK138 RLCF AARGB1, F variable i = D’9’ while i < D’16’ RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB1,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB1,LSB UADD13#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK13#v(i) UADD13#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK13#v(i) RLCF AARGB1, F variable i = i + 1 endw RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB 1997 Microchip Technology Inc. AARGB2,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB1,LSB UADD1316 REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F DS00617B-page 295 AN617 GOTO UOK1316 UADD1316 ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK1316 RLCF AARGB2, F variable i = D’17’ while i < D’24’ RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB2,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB2,LSB UADD13#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK13#v(i) UADD13#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK13#v(i) RLCF AARGB2, F variable i = i + 1 endw RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB3,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB2,LSB UADD1324 REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK1324 UADD1324 ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK1324 RLCF AARGB3, F variable i = D’25’ while i < D’32’ DS00617B-page 296 1997 Microchip Technology Inc. AN617 RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB3,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB3,LSB UADD13#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK13#v(i) UADD13#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK13#v(i) RLCF AARGB3, F variable i = i + 1 endw BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC MOVFP ADDWFC AARGB3,LSB UOK13 BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK13 endm ;********************************************************************************************** ;********************************************************************************************** ; ; 32/32 Bit Signed Fixed Point Divide 32/32 -> 32.32 ; ; Input: 32 bit signed fixed point dividend in AARGB0, AARGB1,AARGB2,AARGB3 ; 32 bit unsigned fixed point divisor in BARGB0, BARGB1, BARGB2, BARGB3 ; ; Use: CALL FXD3232S ; ; Output: 32 bit signed fixed point quotient in AARGB0, AARGB1,AARGB2,AARGB3 ; 32 bit fixed point remainder in REMB0, REMB1, REMB2, REMB3 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 27+573+5 = 605 clks A > 0, B > 0 ; 34+573+23 = 630 clks A > 0, B < 0 ; 34+573+23 = 630 clks A < 0, B > 0 ; 41+573+5 = 619 clks A < 0, B < 0 ; 12 clks A = 0 ; ; Min Timing: 27+536+5 = 568 clks A > 0, B > 0 ; 34+536+23 = 593 clks A > 0, B < 0 ; 31+536+23 = 593 clks A < 0, B > 0 ; 41+536+5 = 582 clks A < 0, B < 0 ; 1997 Microchip Technology Inc. DS00617B-page 297 AN617 ; PM: 41+753+22+54 = 870 ; FXD3232S CLRF CLRF CLRF CLRF CLRF MOVPF IORWF IORWF IORWF BTFSC RETLW DM: 14 SIGN,F REMB0,F REMB1,F REMB2,F REMB3,F AARGB0,WREG AARGB1,W AARGB2,W AARGB3,W _Z 0x00 ; clear partial remainder MOVPF XORWF BTFSC COMF AARGB0,WREG BARGB0,W WREG,MSB SIGN,F CLRF TEMPB3,W ; clear exception flag BTFSS GOTO BARGB0,MSB CA3232S ; if MSB set, negate BARG COMF COMF COMF COMF INCF ADDWFC ADDWFC ADDWFC BARGB3, BARGB2, BARGB1, BARGB0, BARGB3, BARGB2, BARGB1, BARGB0, BTFSS GOTO AARGB0,MSB C3232SX COMF COMF COMF COMF INCF ADDWFC ADDWFC ADDWFC AARGB3, AARGB2, AARGB1, AARGB0, AARGB3, AARGB2, AARGB1, AARGB0, C3232SX MOVPF IORWF BTFSC GOTO AARGB0,WREG BARGB0,W WREG,MSB C3232SX1 C3232S SDIV3232 CA3232S C3232SOK DS00617B-page 298 F F F F F F F F ; if MSB set, negate AARG F F F F F F F F BTFSC GOTO TEMPB3,LSB C3232SX4 BTFSS RETLW SIGN,MSB 0x00 COMF COMF COMF COMF CLRF INCF ADDWFC ADDWFC AARGB3, AARGB2, AARGB1, AARGB0, WREG, F AARGB3, AARGB2, AARGB1, ; test exception flag F F F F F F F 1997 Microchip Technology Inc. AN617 ADDWFC AARGB0, F COMF COMF COMF COMF INCF ADDWFC ADDWFC ADDWFC REMB3, REMB2, REMB1, REMB0, REMB3, REMB2, REMB1, REMB0, RETLW 0x00 BTFSS GOTO BTFSC GOTO MOVPF MOVPF MOVPF MOVPF CLRF CLRF CLRF CLRF GOTO CLRF CLRF CLRF CLRF INCF RETLW BARGB0,MSB C3232SX3 AARGB0,MSB C3232SX2 AARGB0,REMB0 AARGB1,REMB1 AARGB2,REMB2 AARGB3,REMB3 AARGB0,F AARGB1,F AARGB2,F AARGB3,F C3232SOK AARGB0,F AARGB1,F AARGB2,F AARGB3,F AARGB3,F 0x00 ; test BARG exception C3232SX3 COMF COMF COMF COMF INCF GOTO AARGB0,F AARGB1,F AARGB2,F AARGB3,F TEMPB3,F C3232S ; numerator = 0x7FFFFFFF + 1 C3232SX4 INCF CLRF ADDWFC ADDWFC ADDWFC MOVFP CPFSEQ GOTO MOVFP CPFSEQ GOTO MOVFP CPFSEQ GOTO MOVFP CPFSEQ GOTO CLRF CLRF CLRF CLRF INCF ADDWFC ADDWFC ADDWFC BTFSS REMB3,F WREG,F REMB2,F REMB1,F REMB0,F BARGB3,WREG REMB3 C3232SOK BARGB2,WREG REMB2 C3232SOK BARGB1,WREG REMB1 C3232SOK BARGB0,WREG REMB0 C3232SOK REMB0,F REMB1,F REMB2,F REMB3,W AARGB3,F AARGB2,F AARGB1,F AARGB0,F AARGB0,MSB ; increment remainder and test for ; overflow C3232SX1 C3232SX2 1997 Microchip Technology Inc. F F F F F F F F ; test AARG exception ; quotient = 0, remainder = AARG ; quotient = 1, remainder = 0 ; if remainder overflow, clear ; remainder, increment quotient and ; test for overflow exception DS00617B-page 299 AN617 GOTO BSF RETLW C3232SOK FPFLAGS,NAN 0xFF ;********************************************************************************************** ;********************************************************************************************** ; ; 32/32 Bit Unsigned Fixed Point Divide 32/32 -> 32.32 ; ; Input: 32 bit unsigned fixed point dividend in AARGB0, AARGB1,AARGB2,AARGB3 ; 32 bit unsigned fixed point divisor in BARGB0, BARGB1, BARGB2, BARGB3 ; ; Use: CALL FXD3232U ; ; Output: 32 bit unsigned fixed point quotient in AARGB0, AARGB1AARGB2,AARGB3 ; 32 bit unsigned fixed point remainder in REMB0, REMB1, REMB2, REMB3 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 4+677+2 = 683 clks ; ; Min Timing: 4+639+2 = 645 clks ; ; PM: 4+925+1 = 930 DM: 13 ; FXD3232U CLRF REMB0, F CLRF REMB1, F CLRF REMB2, F CLRF REMB3, F NDIV3232 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 32/31 Bit Unsigned Fixed Point Divide 32/31 -> 32.31 ; ; Input: 32 bit unsigned fixed point dividend in AARGB0, AARGB1,AARGB2,AARGB3 ; 31 bit unsigned fixed point divisor in BARGB0, BARGB1, BARGB2, BARGB3 ; ; Use: CALL FXD3231U ; ; Output: 32 bit unsigned fixed point quotient in AARGB0, AARGB1,AARGB2,AARGB3 ; 31 bit unsigned fixed point remainder in REMB0, REMB1, REMB2, REMB3 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 4+582+2 = 588 clks ; ; Min Timing: 4+544+2 = 550 clks ; ; PM: 4+768+1 = 773 DM: 12 ; FXD3231U CLRF REMB0, F CLRF REMB1, F CLRF REMB2, F CLRF REMB3, F UDIV3231 RETLW DS00617B-page 300 0x00 1997 Microchip Technology Inc. AN617 ;********************************************************************************************** ;********************************************************************************************** ; ; 31/31 Bit Unsigned Fixed Point Divide 31/31 -> 31.31 ; ; Input: 31 bit unsigned fixed point dividend in AARGB0, AARGB1,AARGB2,AARGB3 ; 31 bit unsigned fixed point divisor in BARGB0, BARGB1, BARGB2, BARGB3 ; ; Use: CALL FXD3131U ; ; Output: 31 bit unsigned fixed point quotient in AARGB0, AARGB1,AARGB2,AARGB3 ; 31 bit unsigned fixed point remainder in REMB0, REMB1, REMB2, REMB3 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 4+573+2 = 579 clks ; ; Min Timing: 4+536+2 = 542 clks ; ; PM: 4+753+1 = 758 DM: 12 ; FXD3131U CLRF REMB0, F CLRF REMB1, F CLRF REMB2, F CLRF REMB3, F UDIV3131 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 32/24 Bit Signed Fixed Point Divide 32/24 -> 32.24 ; ; Input: 32 bit signed fixed point dividend in AARGB0, AARGB1,AARGB2,AARGB3 ; 24 bit unsigned fixed point divisor in BARGB0, BARGB1, BARGB2 ; ; Use: CALL FXD3224S ; ; Output: 32 bit signed fixed point quotient in AARGB0, AARGB1,AARGB2,AARGB3 ; 24 bit fixed point remainder in REMB0, REMB1, REMB2 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 25+476+5 = 506 clks A > 0, B > 0 ; 30+476+21 = 527 clks A > 0, B < 0 ; 32+476+21 = 529 clks A < 0, B > 0 ; 37+476+5 = 518 clks A < 0, B < 0 ; 11 clks A = 0 ; ; Min Timing: 25+441+3 = 469 clks A > 0, B > 0 ; 30+441+19 = 490 clks A > 0, B < 0 ; 32+441+19 = 492 clks A < 0, B > 0 ; 37+441+3 = 481 clks A < 0, B < 0 ; ; PM: 37+596+20+51 = 704 DM: 12 ; FXD3224S CLRF SIGN,F CLRF REMB0,F ; clear partial remainder CLRF REMB1,F CLRF REMB2,F MOVPF AARGB0,WREG IORWF AARGB1,W IORWF AARGB2,W 1997 Microchip Technology Inc. DS00617B-page 301 AN617 IORWF BTFSC RETLW AARGB3,W _Z 0x00 MOVPF XORWF BTFSC COMF AARGB0,WREG BARGB0,W WREG,MSB SIGN,F CLRF TEMPB3,W ; clear exception flag BTFSS GOTO BARGB0,MSB CA3224S ; if MSB set, negate BARG COMF COMF COMF INCF ADDWFC ADDWFC BARGB2, BARGB1, BARGB0, BARGB2, BARGB1, BARGB0, BTFSS GOTO AARGB0,MSB C3224SX COMF COMF COMF COMF INCF ADDWFC ADDWFC ADDWFC AARGB3, AARGB2, AARGB1, AARGB0, AARGB3, AARGB2, AARGB1, AARGB0, C3224SX MOVPF IORWF BTFSC GOTO AARGB0,WREG BARGB0,W WREG,MSB C3224SX1 C3224S SDIV3224 CA3224S C3224SOK DS00617B-page 302 F F F F F F ; if MSB set, negate AARG F F F F F F F F BTFSC GOTO TEMPB3,LSB C3224SX4 BTFSS RETLW SIGN,MSB 0x00 COMF COMF COMF COMF CLRF INCF ADDWFC ADDWFC ADDWFC AARGB3, AARGB2, AARGB1, AARGB0, WREG, F AARGB3, AARGB2, AARGB1, AARGB0, COMF COMF COMF INCF ADDWFC ADDWFC REMB2, REMB1, REMB0, REMB2, REMB1, REMB0, RETLW 0x00 ; test exception flag F F F F F F F F F F F F F F 1997 Microchip Technology Inc. AN617 C3224SX1 BTFSS GOTO BTFSC GOTO MOVPF MOVPF MOVPF BCF RLCF RLCF MOVFP CLRF CLRF CLRF GOTO CLRF INCF CLRF CLRF CLRF RETLW BARGB0,MSB C3224SX3 AARGB0,MSB C3224SX2 AARGB1,REMB0 AARGB2,REMB1 AARGB3,REMB2 REMB0,MSB AARGB1,F AARGB0,F AARGB0,AARGB3 AARGB0,F AARGB1,F AARGB2,F C3224SOK AARGB3,F AARGB3,F AARGB2,F AARGB1,F AARGB0,F 0x00 C3224SX3 COMF COMF COMF COMF INCF GOTO AARGB0,F AARGB1,F AARGB2,F AARGB3,F TEMPB3,F C3224S ; numerator = 0x7FFFFFFF + 1 C3224SX4 INCF CLRF ADDWFC ADDWFC MOVFP CPFSEQ GOTO MOVFP CPFSEQ GOTO MOVFP CPFSEQ GOTO CLRF CLRF CLRF INCF ADDWFC ADDWFC ADDWFC BTFSS GOTO BSF RETLW REMB2,F WREG,F REMB1,F REMB0,F BARGB2,WREG REMB2 C3224SOK BARGB1,WREG REMB1 C3224SOK BARGB0,WREG REMB0 C3224SOK REMB0,F REMB1,F REMB2,W AARGB3,F AARGB2,F AARGB1,F AARGB0,F AARGB0,MSB C3224SOK FPFLAGS,NAN 0xFF ; increment remainder and test for C3224SX2 ; test BARG exception ; test AARG exception ; quotient = 1, remainder = 0 ; overflow ; if remainder overflow, clear ; remainder, increment quotient and ; test for overflow exception ;********************************************************************************************** ;********************************************************************************************** ; ; 32/24 Bit Unsigned Fixed Point Divide 32/24 -> 32.24 ; ; Input: 32 bit unsigned fixed point dividend in AARGB0, AARGB1, AARGB2, AARGB3 ; 24 bit unsigned fixed point divisor in BARGB0, BARGB1, BARGB2 ; ; Use: CALL FXD3224U ; ; Output: 32 bit unsigned fixed point quotient in AARGB0, AARGB1, AARGB2, AARGB3 1997 Microchip Technology Inc. DS00617B-page 303 AN617 ; 24 bit unsigned ; ; Result: AARG, REM <-; ; Max Timing: 3+579+2 ; ; Min Timing: 3+543+2 ; ; PM: 3+765+1 = 769 ; FXD3224U CLRF CLRF CLRF fixed point remainder in REMB0, REMB1, REMB2 AARG / BARG = 584 clks = 548 clks DM: 11 REMB0, F REMB1, F REMB2, F NDIV3224 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 32/23 Bit Unsigned Fixed Point Divide 32/23 -> 32.23 ; ; Input: 32 bit unsigned fixed point dividend in AARGB0, AARGB1,AARGB2, AARGB3 ; 23 bit unsigned fixed point divisor in BARGB0, BARGB1, BARGB2 ; ; Use: CALL FXD3223U ; ; Output: 32 bit unsigned fixed point quotient in AARGB0, AARGB1,AARGB2, AARGB3 ; 23 bit unsigned fixed point remainder in REMB0, REMB1, REMB2 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 3+484+2 = 489 clks ; ; Min Timing: 3+448+2 = 453 clks ; ; PM: 3+608+1 = 612 DM: 10 ; FXD3223U CLRF REMB0, F CLRF REMB1, F CLRF REMB2, F UDIV3223 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 31/23 Bit Unsigned Fixed Point Divide 31/23 -> 31.23 ; ; Input: 31 bit unsigned fixed point dividend in AARGB0, AARGB1,AARGB2, AARGB3 ; 23 bit unsigned fixed point divisor in BARGB0, BARGB1, BARGB2 ; ; Use: CALL FXD3123U ; ; Output: 31 bit unsigned fixed point quotient in AARGB0, AARGB1,AARGB2, AARGB3 ; 23 bit unsigned fixed point remainder in REMB0, REMB1, REMB2 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 3+476+2 = 481 clks ; ; Min Timing: 3+441+2 = 446 clks DS00617B-page 304 1997 Microchip Technology Inc. AN617 ; ; PM: 3+596+1 = 600 ; FXD3123U CLRF CLRF CLRF DM: 10 REMB0, F REMB1, F REMB2, F UDIV3123 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** 1997 Microchip Technology Inc. DS00617B-page 305 AN617 G.2 PIC17CXXX Fixed Point Divide Routines B ; RCS Header $Id: fxdb.a17 2.4 1997/03/22 03:11:13 F.J.Testa Exp $ ; $Revision: 2.4 $ ; PIC17 FIXED POINT DIVIDE ROUTINES B ; ; Input: fixed point arguments in AARG and BARG ; ; Output: quotient AARG/BARG followed by remainder in REM ; ; All timings are worst case cycle counts ; ; It is useful to note that the additional unsigned routines requiring a non-power of two ; argument can be called in a signed divide application where it is known that the ; respective argument is nonnegative, thereby offering some improvement in ; performance. ; ; Routine Clocks Function ; ; FXD2416S 328 24 bit/16 bit -> 24.16 signed fixed point divide ; ; FXD2416U 365 24 bit/16 bit -> 24.16 unsigned fixed point divide ; ; FXD2415U 294 24 bit/15 bit -> 24.15 unsigned fixed point divide ; ; FXD2315U 287 23 bit/15 bit -> 23.15 unsigned fixed point divide ; ; ; FXD1616S 227 16 bit/16 bit -> 16.16 signed fixed point divide ; ; FXD1616U 244 16 bit/16 bit -> 16.16 unsigned fixed point divide ; ; FXD1615U 197 16 bit/15 bit -> 16.15 unsigned fixed point divide ; ; FXD1515U 191 15 bit/15 bit -> 15.15 unsigned fixed point divide ; ; ; FXD1608S 159 16 bit/08 bit -> 16.08 signed fixed point divide ; ; FXD1608U 196 16 bit/08 bit -> 16.08 unsigned fixed point divide ; ; FXD1607U 130 16 bit/07 bit -> 16.07 unsigned fixed point divide ; ; FXD1507U 125 15 bit/07 bit -> 15.07 unsigned fixed point divide ; ; ; FXD0808S 88 08 bit/08 bit -> 08.08 signed fixed point divide ; ; FXD0808U 75 08 bit/08 bit -> 08.08 unsigned fixed point divide ; ; FXD0807U 66 08 bit/07 bit -> 08.07 unsigned fixed point divide ; ; FXD0707U 61 07 bit/07 bit -> 07.07 unsigned fixed point divide ; ;********************************************************************************************** ;********************************************************************************************** ; ; 24/16 Bit Division Macros ; SDIV2416 macro ; ; Max Timing: 5+8+22*12+6 = 283 clks ; ; Min Timing: 5+8+22*11+3 = 258 clks DS00617B-page 306 1997 Microchip Technology Inc. AN617 ; ; ; PM: 5+8+22*14+6 = 327 DM: 8 variable i MOVFP SUBWF MOVFP SUBWFB RLCF BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F RLCF RLCF RLCF MOVFP ADDWF MOVFP ADDWFC RLCF AARGB0,W REMB1, F REMB0, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F variable i = D’2’ while i < D’8’ RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB0,W REMB1, F REMB0, F BARGB1,WREG AARGB0,LSB SADD46#v(i) REMB1, F BARGB0,WREG REMB0, F SOK46#v(i) SADD46#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F SOK46#v(i) RLCF AARGB0, F variable i = i + 1 endw RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB1,W REMB1, F REMB0, F BARGB1,WREG AARGB0,LSB SADD468 REMB1, F BARGB0,WREG REMB0, F SOK468 SADD468 ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F SOK468 RLCF AARGB1, F variable i = D’9’ while i < D’16’ 1997 Microchip Technology Inc. DS00617B-page 307 AN617 RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB1,W REMB1, F REMB0, F BARGB1,WREG AARGB1,LSB SADD46#v(i) REMB1, F BARGB0,WREG REMB0, F SOK46#v(i) SADD46#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F SOK46#v(i) RLCF AARGB1, F variable i = i + 1 endw RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB2,W REMB1, F REMB0, F BARGB1,WREG AARGB1,LSB SADD4616 REMB1, F BARGB0,WREG REMB0, F SOK4616 SADD4616 ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F SOK4616 RLCF AARGB2, F variable i = D’17’ while i < D’24’ RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB2,W REMB1, F REMB0, F BARGB1,WREG AARGB2,LSB SADD46#v(i) REMB1, F BARGB0,WREG REMB0, F SOK46#v(i) SADD46#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F SOK46#v(i) RLCF AARGB2, F variable i = i + 1 endw BTFSC GOTO DS00617B-page 308 AARGB2,LSB SOK46 1997 Microchip Technology Inc. AN617 MOVFP ADDWF MOVFP ADDWFC BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK46 endm UDIV2416 macro ; ; restore = 15/20 clks, nonrestore = 11/14 clks ; ; Max Timing: 16*15+1+8*20 = 401 clks ; ; Min Timing: 16*11+1+8*14 = 289 clks ; ; PM: 16*15+1+8*20 = 401 DM: 8 ; variable i variable i = D’0’ while i < D’8’ UOK46#v(i) RLCF RLCF RLCF MOVFP SUBWF MOVFP SUBWFB BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC BCF AARGB0,W REMB1, F REMB0, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F _C UOK46#v(i) BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F _C RLCF AARGB0, F variable i = i + 1 endw variable i = D’8’ while i < D’16’ UOK46#v(i) RLCF RLCF RLCF MOVFP SUBWF MOVFP SUBWFB BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC BCF AARGB1,W REMB1, F REMB0, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F _C UOK46#v(i) BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F _C RLCF AARGB1, F 1997 Microchip Technology Inc. DS00617B-page 309 AN617 variable i = i + 1 endw CLRF TEMP, F variable i = D’16’ while i < D’24’ UOK46#v(i) RLCF RLCF RLCF RLCF MOVFP SUBWF MOVFP SUBWFB CLRF SUBWFB BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC CLRF ADDWFC BCF AARGB2,W REMB1, F REMB0, F TEMP, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F _C UOK46#v(i) BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F _C RLCF AARGB2, F variable i = i + 1 endw endm NDIV2416 macro ; ; Max Timing: 10+23*15+6 = 361 clks ; ; Min Timing: 10+23*14+3 = 335 clks ; ; PM: 10+23*19+6 = 450 DM: 8 ; variable i RLCF RLCF RLCF MOVFP SUBWF MOVFP SUBWFB CLRF SUBWFB RLCF AARGB0,W REMB1, F REMB0, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F TEMP,W TEMP, F AARGB0, F variable i = D’1’ while i < D’8’ RLCF DS00617B-page 310 AARGB0,W 1997 Microchip Technology Inc. AN617 RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB CLRF SUBWFB GOTO REMB1, F REMB0, F TEMP, F BARGB1,WREG AARGB0,LSB NADD46#v(i) REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK46#v(i) NADD46#v(i) ADDWF MOVFP ADDWFC CLRF ADDWFC REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK46#v(i) RLCF AARGB0, F variable i = i + 1 endw RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB CLRF SUBWFB GOTO AARGB1,W REMB1, F REMB0, F TEMP, F BARGB1,WREG AARGB0,LSB NADD468 REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK468 NADD468 ADDWF MOVFP ADDWFC CLRF ADDWFC REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK468 RLCF AARGB1, F variable i = D’9’ while i < D’16’ NADD46#v(i) RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB CLRF SUBWFB GOTO AARGB1,W REMB1, F REMB0, F TEMP, F BARGB1,WREG AARGB1,LSB NADD46#v(i) REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK46#v(i) ADDWF REMB1, F 1997 Microchip Technology Inc. DS00617B-page 311 AN617 NOK46#v(i) MOVFP ADDWFC CLRF ADDWFC BARGB0,WREG REMB0, F WREG, F TEMP, F RLCF AARGB1, F variable i = i + 1 endw RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB CLRF SUBWFB GOTO AARGB2,W REMB1, F REMB0, F TEMP, F BARGB1,WREG AARGB1,LSB NADD4616 REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK4616 NADD4616 ADDWF MOVFP ADDWFC CLRF ADDWFC REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK4616 RLCF AARGB2, F variable i = D’17’ while i < D’24’ RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB CLRF SUBWFB GOTO AARGB2,W REMB1, F REMB0, F TEMP, F BARGB1,WREG AARGB2,LSB NADD46#v(i) REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK46#v(i) NADD46#v(i) ADDWF MOVFP ADDWFC CLRF ADDWFC REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK46#v(i) RLCF AARGB2, F variable i = i + 1 endw BTFSC GOTO MOVFP DS00617B-page 312 AARGB2,LSB NOK46 BARGB1,WREG 1997 Microchip Technology Inc. AN617 ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F NOK46 endm UDIV2415 macro ; ; Max Timing: 8+23*12+6 = 290 clks ; ; Min Timing: 8+23*11+3 = 264 clks ; ; PM: 8+23*14+6 = 336 ; variable i RLCF RLCF RLCF MOVFP SUBWF MOVFP SUBWFB RLCF DM: 8 AARGB0,W REMB1, F REMB0, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F variable i = D’1’ while i < D’8’ RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB0,W REMB1, F REMB0, F BARGB1,WREG AARGB0,LSB UADD45#v(i) REMB1, F BARGB0,WREG REMB0, F UOK45#v(i) UADD45#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK45#v(i) RLCF AARGB0, F variable i = i + 1 endw UADD458 RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB1,W REMB1, F REMB0, F BARGB1,WREG AARGB0,LSB UADD458 REMB1, F BARGB0,WREG REMB0, F UOK458 ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F 1997 Microchip Technology Inc. DS00617B-page 313 AN617 UOK458 RLCF AARGB1, F variable i = D’9’ while i < D’16’ RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB1,W REMB1, F REMB0, F BARGB1,WREG AARGB1,LSB UADD45#v(i) REMB1, F BARGB0,WREG REMB0, F UOK45#v(i) UADD45#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK45#v(i) RLCF AARGB1, F variable i = i + 1 endw RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB2,W REMB1, F REMB0, F BARGB1,WREG AARGB1,LSB UADD4516 REMB1, F BARGB0,WREG REMB0, F UOK4516 UADD4516 ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK4516 RLCF AARGB2, F variable i = D’17’ while i < D’24’ RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB2,W REMB1, F REMB0, F BARGB1,WREG AARGB2,LSB UADD45#v(i) REMB1, F BARGB0,WREG REMB0, F UOK45#v(i) UADD45#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK45#v(i) RLCF AARGB2, F DS00617B-page 314 1997 Microchip Technology Inc. AN617 variable i = i + 1 endw BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC AARGB2,LSB UOK45 BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK45 endm UDIV2315 macro ; ; Max Timing: 5+8+22*12+6 = 283 clks ; ; Min Timing: 5+8+22*11+3 = 258 clks ; ; PM: 5+8+22*14+6 = 327 DM: 8 ; variable i MOVFP SUBWF MOVFP SUBWFB RLCF BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F RLCF RLCF RLCF MOVFP ADDWF MOVFP ADDWFC RLCF AARGB0,W REMB1, F REMB0, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F variable i = D’2’ while i < D’8’ RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB0,W REMB1, F REMB0, F BARGB1,WREG AARGB0,LSB UADD35#v(i) REMB1, F BARGB0,WREG REMB0, F UOK35#v(i) UADD35#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK35#v(i) RLCF AARGB0, F variable i = i + 1 endw 1997 Microchip Technology Inc. DS00617B-page 315 AN617 RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB1,W REMB1, F REMB0, F BARGB1,WREG AARGB0,LSB UADD358 REMB1, F BARGB0,WREG REMB0, F UOK358 UADD358 ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK358 RLCF AARGB1, F variable i = D’9’ while i < D’16’ RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB1,W REMB1, F REMB0, F BARGB1,WREG AARGB1,LSB UADD35#v(i) REMB1, F BARGB0,WREG REMB0, F UOK35#v(i) UADD35#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK35#v(i) RLCF AARGB1, F variable i = i + 1 endw RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB2,W REMB1, F REMB0, F BARGB1,WREG AARGB1,LSB UADD3516 REMB1, F BARGB0,WREG REMB0, F UOK3516 UADD3516 ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK3516 RLCF AARGB2, F variable i = D’17’ while i < D’24’ RLCF RLCF DS00617B-page 316 AARGB2,W REMB1, F 1997 Microchip Technology Inc. AN617 RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO REMB0, F BARGB1,WREG AARGB2,LSB UADD35#v(i) REMB1, F BARGB0,WREG REMB0, F UOK35#v(i) UADD35#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK35#v(i) RLCF AARGB2, F variable i = i + 1 endw BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC AARGB2,LSB UOK35 BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK35 endm ;********************************************************************************************** ;********************************************************************************************** ; ; 16/16 Bit Division Macros ; SDIV1616 macro ; ; Max Timing: 5+8+14*12+6 = 187 clks ; ; Min Timing: 5+8+14*11+6 = 173 clks ; ; PM: 5+8+14*14+6 = 215 DM: 6 ; variable i MOVFP SUBWF MOVFP SUBWFB RLCF BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F RLCF RLCF RLCF MOVFP ADDWF MOVFP ADDWFC RLCF AARGB0,W REMB1, F REMB0, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F variable i = D’2’ while i < D’8’ RLCF RLCF 1997 Microchip Technology Inc. AARGB0,W REMB1, F DS00617B-page 317 AN617 RLCF MOVFP REMB0, F BARGB1,WREG BTFSS GOTO AARGB0,LSB SADD66#v(i) SUBWF MOVFP SUBWFB GOTO REMB1, F BARGB0,WREG REMB0, F SOK66#v(i) SADD66#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F SOK66#v(i) RLCF AARGB0, F variable i = i + 1 endw RLCF RLCF RLCF MOVFP AARGB1,W REMB1, F REMB0, F BARGB1,WREG BTFSS GOTO AARGB0,LSB SADD668 SUBWF MOVFP SUBWFB GOTO REMB1, F BARGB0,WREG REMB0, F SOK668 SADD668 ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F SOK668 RLCF AARGB1, F variable i = D’9’ while i < D’16’ RLCF RLCF RLCF MOVFP AARGB1,W REMB1, F REMB0, F BARGB1,WREG BTFSS GOTO AARGB1,LSB SADD66#v(i) SUBWF MOVFP SUBWFB GOTO REMB1, F BARGB0,WREG REMB0, F SOK66#v(i) SADD66#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F SOK66#v(i) RLCF AARGB1, F variable i = i + 1 endw DS00617B-page 318 1997 Microchip Technology Inc. AN617 BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC AARGB1,LSB SOK66 BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK66 endm UDIV1616 macro ; ; restore = 15 clks, nonrestore = 11 clks ; ; Max Timing: 8*15+8*15 = 240 clks ; ; Min Timing: 8*11+8*11 = 176 clks ; ; PM: 8*15+8*15 = 240 DM: 6 ; variable i variable i = D’0’ while i < D’8’ UOK66#v(i) RLCF RLCF RLCF MOVFP SUBWF MOVFP SUBWFB AARGB0,W REMB1, F REMB0, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC BCF RLCF _C UOK66#v(i) BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F _C AARGB0, F variable i = i + 1 endw variable i = D’8’ while i < D’16’ RLCF RLCF RLCF MOVFP SUBWF MOVFP SUBWFB AARGB1,W REMB1, F REMB0, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC _C UOK66#v(i) BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F 1997 Microchip Technology Inc. DS00617B-page 319 AN617 UOK66#v(i) BCF RLCF _C AARGB1, F variable i = i + 1 endw endm NDIV1616 macro ; ; Max Timing: 9+15*15+6 = 240 clks ; ; Min Timing: 9+15*14+6 = 225 clks ; ; PM: 9+15*19+6 = 300 DM: 7 ; variable i RLCF RLCF MOVFP SUBWF MOVFP SUBWFB CLRF SUBWFB RLCF AARGB0,W REMB1, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F TEMP,W TEMP, F AARGB0, F variable i = D’1’ while i < D’8’ RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB CLRF SUBWFB GOTO AARGB0,W REMB1, F REMB0, F TEMP, F BARGB1,WREG AARGB0,LSB NADD66#v(i) REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK66#v(i) NADD66#v(i) ADDWF MOVFP ADDWFC CLRF ADDWFC REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK66#v(i) RLCF AARGB0, F variable i = i + 1 endw RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO DS00617B-page 320 AARGB1,W REMB1, F REMB0, F TEMP, F BARGB1,WREG AARGB0,LSB NADD668 1997 Microchip Technology Inc. AN617 SUBWF MOVFP SUBWFB CLRF SUBWFB GOTO REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK668 NADD668 ADDWF MOVFP ADDWFC CLRF ADDWFC REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK668 RLCF AARGB1, F variable i = D’9’ while i < D’16’ RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB CLRF SUBWFB GOTO AARGB1,W REMB1, F REMB0, F TEMP, F BARGB1,WREG AARGB1,LSB NADD66#v(i) REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK66#v(i) NADD66#v(i) ADDWF MOVFP ADDWFC CLRF ADDWFC REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK66#v(i) RLCF AARGB1, F variable i = i + 1 endw BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC AARGB1,LSB NOK66 BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F NOK66 endm UDIV1615 macro ; ; Max Timing: 7+15*12+6 = 193 clks ; ; Min Timing: 7+15*11+6 = 178 clks ; ; PM: 7+15*14+6 = 213 DM: 6 ; variable i RLCF 1997 Microchip Technology Inc. AARGB0,W DS00617B-page 321 AN617 RLCF MOVFP SUBWF MOVFP SUBWFB RLCF REMB1, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F variable i = D’1’ while i < D’8’ RLCF RLCF RLCF MOVFP AARGB0,W REMB1, F REMB0, F BARGB1,WREG BTFSS GOTO AARGB0,LSB UADD65#v(i) SUBWF MOVFP SUBWFB GOTO REMB1, F BARGB0,WREG REMB0, F UOK65#v(i) UADD65#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK65#v(i) RLCF AARGB0, F variable i = i + 1 endw RLCF RLCF RLCF MOVFP AARGB1,W REMB1, F REMB0, F BARGB1,WREG BTFSS GOTO AARGB0,LSB UADD658 SUBWF MOVFP SUBWFB GOTO REMB1, F BARGB0,WREG REMB0, F UOK658 UADD658 ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK658 RLCF AARGB1, F variable i = D’9’ while i < D’16’ DS00617B-page 322 RLCF RLCF RLCF MOVFP AARGB1,W REMB1, F REMB0, F BARGB1,WREG BTFSS GOTO AARGB1,LSB UADD65#v(i) SUBWF REMB1, F 1997 Microchip Technology Inc. AN617 MOVFP SUBWFB GOTO BARGB0,WREG REMB0, F UOK65#v(i) UADD65#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK65#v(i) RLCF AARGB1, F variable i = i + 1 endw BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC AARGB1,LSB UOK65 BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK65 endm UDIV1515 macro ; ; Max Timing: 5+8+14*12+6 = 187 clks ; ; Min Timing: 5+8+14*11+6 = 173 clks ; ; PM: 5+8+14*14+6 = 215 DM: 6 ; variable i MOVFP SUBWF MOVFP SUBWFB RLCF BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F RLCF RLCF RLCF MOVFP ADDWF MOVFP ADDWFC RLCF AARGB0,W REMB1, F REMB0, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F variable i = D’2’ while i < D’8’ RLCF RLCF RLCF MOVFP AARGB0,W REMB1, F REMB0, F BARGB1,WREG BTFSS GOTO AARGB0,LSB UADD55#v(i) SUBWF MOVFP SUBWFB GOTO REMB1, F BARGB0,WREG REMB0, F UOK55#v(i) 1997 Microchip Technology Inc. DS00617B-page 323 AN617 UADD55#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK55#v(i) RLCF AARGB0, F variable i = i + 1 endw RLCF RLCF RLCF MOVFP AARGB1,W REMB1, F REMB0, F BARGB1,WREG BTFSS GOTO AARGB0,LSB UADD558 SUBWF MOVFP SUBWFB GOTO REMB1, F BARGB0,WREG REMB0, F UOK558 UADD558 ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK558 RLCF AARGB1, F variable i = D’9’ while i < D’16’ RLCF RLCF RLCF MOVFP AARGB1,W REMB1, F REMB0, F BARGB1,WREG BTFSS GOTO AARGB1,LSB UADD55#v(i) SUBWF MOVFP SUBWFB GOTO REMB1, F BARGB0,WREG REMB0, F UOK55#v(i) UADD55#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK55#v(i) RLCF AARGB1, F variable i = i + 1 endw BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC AARGB1,LSB UOK55 BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK55 DS00617B-page 324 1997 Microchip Technology Inc. AN617 endm ;_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ ; ; Extra 16 Bit Divide Macros ; DIV1616 macro ; ; Timing: restore = 16 clks, nonrestore = 13 clks 16*16 = 256 clks ; variable i variable i = D’0’ while i < D’16’ RS1616_#v( i ) RLCF RLCF RLCF RLCF AARGB1, F AARGB0, F REMB1, F REMB0, F MOVFP SUBWF MOVFP SUBWFB BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F BTFSS GOTO _C RS1616_#v( i ) BSF GOTO AARGB1,LSB OK1616_#v( i ) MOVFP ADDWF MOVFP ADDWFC BCF BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB1,LSB OK1616_#v(i) variable i = i + 1 endw endm DIVMAC ; ; ; macro Timing: restore = 19 clks, nonrestore = 14 clks 16*19 = 304 clks variable i variable i = D’0’ while i < D’16’ RLCF RLCF RLCF RLCF MOVFP SUBWF BTFSS GOTO MOVFP SUBWF 1997 Microchip Technology Inc. AARGB1, F AARGB0, F REMB1, F REMB0, F BARGB0,WREG REMB0,W _Z notz#v( i ) BARGB1,WREG REMB1,W DS00617B-page 325 AN617 notz#v( i ) nosub#v(i) BTFSS GOTO _C nosub#v( i ) MOVFP SUBWF MOVFP SUBWFB BSF GOTO BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB1,LSB ok#v(i) BCF AARGB1,LSB ok#v(i) variable i = i + 1 endw endm ;********************************************************************************************** ;********************************************************************************************** ; ; 16/08 Bit Division Macros ; SDIV1608 macro ; ; Max Timing: 3+5+14*8+2 = 122 clks ; ; Min Timing: 3+5+14*8+2 = 122 clks ; ; PM: 3+5+14*8+2 = 122 DM: 4 ; variable i MOVFP SUBWF RLCF BARGB0,WREG REMB0, F AARGB0, F RLCF RLCF MOVFP ADDWF RLCF AARGB0,W REMB0, F BARGB0,WREG REMB0, F AARGB0, F variable i = D’2’ while i < D’8’ RLCF RLCF MOVFP AARGB0,W REMB0, F BARGB0,WREG BTFSC SUBWF BTFSS ADDWF RLCF AARGB0,LSB REMB0, F AARGB0,LSB REMB0, F AARGB0, F variable i = i + 1 endw RLCF DS00617B-page 326 AARGB1,W 1997 Microchip Technology Inc. AN617 RLCF MOVFP REMB0, F BARGB0,WREG BTFSC SUBWF BTFSS ADDWF RLCF AARGB0,LSB REMB0, F AARGB0,LSB REMB0, F AARGB1, F variable i = D’9’ while i < D’16’ RLCF RLCF MOVFP AARGB1,W REMB0, F BARGB0,WREG BTFSC SUBWF BTFSS ADDWF RLCF AARGB1,LSB REMB0, F AARGB1,LSB REMB0, F AARGB1, F variable i = i + 1 endw BTFSS ADDWF AARGB1,LSB REMB0, F endm UDIV1608 macro ; ; restore = 9/15 clks, nonrestore = 8/11 clks ; ; Max Timing: 8*9+1+8*15 = 193 clks max ; ; Min Timing: 8*8+1+8*11 = 153 clks min ; ; PM: 8*9+1+8*15 = 193 DM: 4 ; variable i variable i = D’0’ while i < D’8’ UOK68#v(i) RLCF RLCF MOVFP SUBWF AARGB0,W REMB0, F BARGB0,WREG REMB0, F BTFSC GOTO ADDWF BCF RLCF _C UOK68#v(i) REMB0, F _C AARGB0, F variable i = i + 1 endw CLRF TEMP, F variable i = D’8’ 1997 Microchip Technology Inc. DS00617B-page 327 AN617 while i < D’16’ UOK68#v(i) RLCF RLCF RLCF MOVFP SUBWF CLRF SUBWFB AARGB1,W REMB0, F TEMP, F BARGB0,WREG REMB0, F WREG, F TEMP, F BTFSC GOTO MOVFP ADDWF CLRF ADDWFC BCF RLCF _C UOK68#v(i) BARGB0,WREG REMB0, F WREG, F TEMP, F _C AARGB1, F variable i = i + 1 endw endm NDIV1608 macro ; ; Max Timing: 7+15*12+3 = 190 clks ; ; Min Timing: 7+15*11+3 = 175 clks ; ; PM: 7+15*14+3 = 220 DM: 5 ; variable i RLCF RLCF MOVFP SUBWF CLRF SUBWFB RLCF AARGB0,W REMB0, F BARGB0,WREG REMB0, F TEMP,W TEMP, F AARGB0, F variable i = D’1’ while i < D’8’ RLCF RLCF RLCF MOVFP AARGB0,W REMB0, F TEMP, F BARGB0,WREG BTFSS GOTO SUBWF CLRF SUBWFB GOTO AARGB0,LSB NADD68#v(i) REMB0, F WREG, F TEMP, F NOK68#v(i) NADD68#v(i) ADDWF CLRF ADDWFC REMB0, F WREG, F TEMP, F NOK68#v(i) RLCF AARGB0, F DS00617B-page 328 1997 Microchip Technology Inc. AN617 variable i = i + 1 endw RLCF RLCF RLCF MOVFP AARGB1,W REMB0, F TEMP, F BARGB0,WREG BTFSS GOTO SUBWF CLRF SUBWFB GOTO AARGB0,LSB NADD688 REMB0, F WREG, F TEMP, F NOK688 NADD688 ADDWF CLRF ADDWFC REMB0, F WREG, F TEMP, F NOK688 RLCF AARGB1, F variable i = D’9’ while i < D’16’ RLCF RLCF RLCF MOVFP AARGB1,W REMB0, F TEMP, F BARGB0,WREG BTFSS GOTO SUBWF CLRF SUBWFB GOTO AARGB1,LSB NADD68#v(i) REMB0, F WREG, F TEMP, F NOK68#v(i) NADD68#v(i) ADDWF CLRF ADDWFC REMB0, F WREG, F TEMP, F NOK68#v(i) RLCF AARGB1, F variable i = i + 1 endw BTFSS MOVFP ADDWF AARGB1,LSB BARGB0,WREG REMB0, F endm UDIV1607 macro ; ; Max Timing: 5+15*8+2 = 127 clks ; ; Min Timing: 5+15*8+2 = 127 clks ; ; PM: 5+15*8+2 = 127 DM: 4 ; variable i 1997 Microchip Technology Inc. DS00617B-page 329 AN617 RLCF RLCF MOVFP SUBWF RLCF AARGB0,W REMB0, F BARGB0,WREG REMB0, F AARGB0, F variable i = D’1’ while i < D’8’ RLCF RLCF MOVFP AARGB0,W REMB0, F BARGB0,WREG BTFSC SUBWF BTFSS ADDWF RLCF AARGB0,LSB REMB0, F AARGB0,LSB REMB0, F AARGB0, F variable i = i + 1 endw RLCF RLCF MOVFP AARGB1,W REMB0, F BARGB0,WREG BTFSC SUBWF BTFSS ADDWF RLCF AARGB0,LSB REMB0, F AARGB0,LSB REMB0, F AARGB1, F variable i = D’9’ while i < D’16’ RLCF RLCF MOVFP AARGB1,W REMB0, F BARGB0,WREG BTFSC SUBWF BTFSS ADDWF RLCF AARGB1,LSB REMB0, F AARGB1,LSB REMB0, F AARGB1, F variable i = i + 1 endw BTFSS ADDWF AARGB1,LSB REMB0, F endm UDIV1507 macro ; ; Max Timing: 3+5+14*8+2 = 122 clks ; ; Min Timing: 3+5+14*8+2 = 122 clks ; ; PM: 3+5+14*8+2 = 122 DM: 4 ; variable i DS00617B-page 330 1997 Microchip Technology Inc. AN617 MOVFP SUBWF RLCF BARGB0,WREG REMB0, F AARGB0, F RLCF RLCF MOVFP ADDWF RLCF AARGB0,W REMB0, F BARGB0,WREG REMB0, F AARGB0, F variable i = D’2’ while i < D’8’ RLCF RLCF MOVFP AARGB0,W REMB0, F BARGB0,WREG BTFSC SUBWF BTFSS ADDWF RLCF AARGB0,LSB REMB0, F AARGB0,LSB REMB0, F AARGB0, F variable i = i + 1 endw RLCF RLCF MOVFP AARGB1,W REMB0, F BARGB0,WREG BTFSC SUBWF BTFSS ADDWF RLCF AARGB0,LSB REMB0, F AARGB0,LSB REMB0, F AARGB1, F variable i = D’9’ while i < D’16’ RLCF RLCF MOVFP AARGB1,W REMB0, F BARGB0,WREG BTFSC SUBWF BTFSS ADDWF RLCF AARGB1,LSB REMB0, F AARGB1,LSB REMB0, F AARGB1, F variable i = i + 1 endw BTFSS ADDWF AARGB1,LSB REMB0, F endm ;********************************************************************************************** 1997 Microchip Technology Inc. DS00617B-page 331 AN617 ;********************************************************************************************** ; ; 08/08 Bit Division Macros ; SDIV0808 macro ; ; Max Timing: 3+5+6*8+2 = 58 clks ; ; Min Timing: 3+5+6*8+2 = 58 clks ; ; PM: 3+5+6*8+2 = 58 DM: 3 ; variable i MOVFP SUBWF RLCF BARGB0,WREG REMB0, F AARGB0, F RLCF RLCF MOVFP ADDWF RLCF AARGB0,W REMB0, F BARGB0,WREG REMB0, F AARGB0, F variable i = D’2’ while i < D’8’ RLCF RLCF MOVFP AARGB0,W REMB0, F BARGB0,WREG BTFSC SUBWF BTFSS ADDWF RLCF AARGB0,LSB REMB0, F AARGB0,LSB REMB0, F AARGB0, F variable i = i + 1 endw BTFSS ADDWF AARGB0,LSB REMB0, F endm UDIV0808 macro ; ; restore = 9 clks, nonrestore = 8 clks ; ; Max Timing: 8*9 = 72 clks max ; ; Min Timing: 8*8 = 64 clks min ; ; PM: 8*9 = 72 DM: 3 ; variable i variable i = D’0’ while i < D’8’ RLCF RLCF DS00617B-page 332 AARGB0,W REMB0, F 1997 Microchip Technology Inc. AN617 UOK88#v(i) MOVFP SUBWF BARGB0,WREG REMB0, F BTFSC GOTO ADDWF BCF RLCF _C UOK88#v(i) REMB0, F _C AARGB0, F variable i = i + 1 endw endm UDIV0807 macro ; ; Max Timing: 5+7*8+2 = 63 clks ; ; Min Timing: 5+7*8+2 = 63 clks ; ; PM: 5+7*8+2 = 63 DM: 3 ; variable i RLCF RLCF MOVFP SUBWF RLCF AARGB0,W REMB0, F BARGB0,WREG REMB0, F AARGB0, F variable i = D’1’ while i < D’8’ RLCF RLCF MOVFP AARGB0,W REMB0, F BARGB0,WREG BTFSC SUBWF BTFSS ADDWF RLCF AARGB0,LSB REMB0, F AARGB0,LSB REMB0, F AARGB0, F variable i = i + 1 endw BTFSS ADDWF AARGB0,LSB REMB0, F endm UDIV0707 macro ; ; Max Timing: 3+5+6*8+2 = 58 clks ; ; Min Timing: 3+5+6*8+2 = 58 clks ; ; PM: 3+5+6*8+2 = 58 DM: 3 ; variable i 1997 Microchip Technology Inc. DS00617B-page 333 AN617 MOVFP SUBWF RLCF BARGB0,WREG REMB0, F AARGB0, F RLCF RLCF MOVFP ADDWF RLCF AARGB0,W REMB0, F BARGB0,WREG REMB0, F AARGB0, F variable i = D’2’ while i < D’8’ RLCF RLCF MOVFP AARGB0,W REMB0, F BARGB0,WREG BTFSC SUBWF BTFSS ADDWF RLCF AARGB0,LSB REMB0, F AARGB0,LSB REMB0, F AARGB0, F variable i = i + 1 endw BTFSS ADDWF AARGB0,LSB REMB0, F endm ;********************************************************************************************** ;********************************************************************************************** ; ; 24/16 Bit Signed Fixed Point Divide 24/16 -> 24.16 ; ; Input: 24 bit fixed point dividend in AARGB0, AARGB1, AARGB2 ; 16 bit fixed point divisor in BARGB0, BARGB1 ; ; Use: CALL FXD2416S ; ; Output: 24 bit fixed point quotient in AARGB0, AARGB1, AARGB2 ; 16 bit fixed point remainder in REMB0, REMB1 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 23+283+5 = 311 clks A > 0, B > 0 ; 26+283+17 = 326 clks A > 0, B < 0 ; 28+283+17 = 328 clks A < 0, B > 0 ; 31+283+5 = 319 clks A < 0, B < 0 ; 9 clks A = 0 ; ; Min Timing: 23+258+5 = 286 clks A > 0, B > 0 ; 26+258+17 = 301 clks A > 0, B < 0 ; 28+258+17 = 303 clks A < 0, B > 0 ; 31+258+5 = 294 clks A < 0, B < 0 ; ; PM: 30+327+16+41 = 414 DM: 9 ; FXD2416S CLRF SIGN,F CLRF REMB0,F ; clear partial remainder CLRF REMB1,F MOVPF AARGB0,WREG IORWF AARGB1,W DS00617B-page 334 1997 Microchip Technology Inc. AN617 IORWF BTFSC RETLW AARGB2,W _Z 0x00 MOVPF XORWF BTFSC COMF AARGB0,WREG BARGB0,W WREG,MSB SIGN,F CLRF TEMPB3,W ; clear exception flag BTFSS GOTO BARGB0,MSB CA2416S ; if MSB set go & negate BARG COMF COMF INCF ADDWFC BARGB1, BARGB0, BARGB1, BARGB0, BTFSS GOTO AARGB0,MSB C2416SX COMF COMF COMF INCF ADDWFC ADDWFC AARGB2, AARGB1, AARGB0, AARGB2, AARGB1, AARGB0, C2416SX MOVPF IORWF BTFSC GOTO AARGB0,WREG BARGB0,W WREG,MSB C2416SX1 C2416S SDIV2416 CA2416S C2416SOK C2416SX1 F F F F ; if MSB set go & negate AARGa F F F F F F BTFSC GOTO TEMPB3,LSB C2416SX4 ; test exception flag BTFSS RETLW SIGN,MSB 0x00 ; negate COMF COMF COMF CLRF INCF ADDWFC ADDWFC AARGB2, AARGB1, AARGB0, WREG, F AARGB2, AARGB1, AARGB0, COMF COMF INCF ADDWFC REMB1, REMB0, REMB1, REMB0, RETLW 0x00 BTFSS GOTO BTFSC GOTO MOVPF MOVPF BCF RLCF RLCF BARGB0,MSB C2416SX3 AARGB0,MSB C2416SX2 AARGB1,REMB0 AARGB2,REMB1 REMB0,MSB AARGB1,F AARGB0,F 1997 Microchip Technology Inc. F F F F F F F F F F ; test BARG exception ; test AARG exception DS00617B-page 335 AN617 MOVFP CLRF CLRF GOTO CLRF INCF CLRF CLRF RETLW AARGB0,AARGB2 AARGB0,F AARGB1,F C2416SOK AARGB2,F AARGB2,F AARGB1,F AARGB0,F 0x00 C2416SX3 COMF COMF COMF INCF GOTO AARGB0,F AARGB1,F AARGB2,F TEMPB3,F C2416S ; numerator = 0x7FFFFF + 1 C2416SX4 INCF CLRF ADDWFC MOVFP CPFSEQ GOTO MOVFP CPFSEQ GOTO CLRF CLRF INCF ADDWFC ADDWFC BTFSS GOTO BSF RETLW REMB1,F WREG,F REMB0,F BARGB1,WREG REMB1 C2416SOK BARGB0,WREG REMB0 C2416SOK REMB0,W REMB1,W AARGB2,F AARGB1,F AARGB0,F AARGB0,MSB C2416SOK FPFLAGS,NAN 0xFF ; increment remainder and test for C2416SX2 ; quotient = 1, remainder = 0 ; overflow ; overflow ; if remainder overflow, clear ; remainder, increment quotient and ; test for overflow exception ;********************************************************************************************** ;********************************************************************************************** ; ; 24/16 Bit Unsigned Fixed Point Divide 24/16 -> 24.16 ; ; Input: 24 bit unsigned fixed point dividend in AARGB0, AARGB1, AARGB2 ; 16 bit unsigned fixed point divisor in BARGB0, BARGB1 ; ; Use: CALL FXD2416U ; ; Output: 24 bit unsigned fixed point quotient in AARGB0, AARGB1, AARGB2 ; 16 bit unsigned fixed point remainder in REMB0, REMB1 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 2+361+2 = 365 clks ; ; Min Timing: 2+335+2 = 339 clks ; ; PM: 2+450+1 = 453 DM: 8 ; FXD2416U CLRF REMB0, F CLRF REMB1, F NDIV2416 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** DS00617B-page 336 1997 Microchip Technology Inc. AN617 ; ; 24/15 Bit Unsigned Fixed Point Divide 24/15 -> 24.15 ; ; Input: 24 bit unsigned fixed point dividend in AARGB0, AARGB1, AARGB2 ; 15 bit unsigned fixed point divisor in BARGB0, BARGB1 ; ; Use: CALL FXD2415U ; ; Output: 24 bit unsigned fixed point quotient in AARGB0, AARGB1, AARGB2 ; 15 bit unsigned fixed point remainder in REMB0, REMB1 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 2+290+2 = 294 clks ; ; Min Timing: 2+264+2 = 268 clks ; ; PM: 2+336+1 = 339 DM: 8 ; FXD2415U CLRF REMB0, F CLRF REMB1, F UDIV2415 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 23/15 Bit Unsigned Fixed Point Divide 23/15 -> 23.15 ; ; Input: 23 bit unsigned fixed point dividend in AARGB0, AARGB1, AARGB2 ; 15 bit unsigned fixed point divisor in BARGB0, BARGB1 ; ; Use: CALL FXD2315U ; ; Output: 23 bit unsigned fixed point quotient in AARGB0, AARGB1, AARGB2 ; 15 bit unsigned fixed point remainder in REMB0, REMB1 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 2+283+2 = 287 clks ; ; Min Timing: 2+258+2 = 262 clks ; ; PM: 2+327+1 = 330 DM: 8 ; FXD2315U CLRF REMB0, F CLRF REMB1, F UDIV2315 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 16/16 Bit Signed Fixed Point Divide 16/16 -> 16.16 ; ; Input: 16 bit fixed point dividend in AARGB0, AARGB1 ; 16 bit fixed point divisor in BARGB0, BARGB1 ; ; Use: CALL FXD1616S ; ; Output: 16 bit fixed point quotient in AARGB0, AARGB1 ; 16 bit fixed point remainder in REMB0, REMB1 1997 Microchip Technology Inc. DS00617B-page 337 AN617 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 22+187+5 = 214 clks ; 25+187+15 = 227 clks ; 25+187+15 = 227 clks ; 28+187+5 = 220 clks ; 8 clks ; ; Min Timing: 22+173+5 = 200 clks ; 25+173+15 = 213 clks ; 25+173+15 = 213 clks ; 28+173+5 = 206 clks ; ; PM: 27+215+14+34 = 290 DM: 8 ; FXD1616S CLRF SIGN,F CLRF REMB0,F CLRF REMB1,F MOVPF AARGB0,WREG IORWF AARGB1,W BTFSC _Z RETLW 0x00 A A A A A > > < < = 0, 0, 0, 0, 0 B B B B > < > < 0 0 0 0 A A A A > > < < 0, 0, 0, 0, B B B B > < > < 0 0 0 0 ; clear partial remainder MOVPF XORWF BTFSC COMF AARGB0,WREG BARGB0,W WREG,MSB SIGN,F CLRF TEMPB3,W ; clear exception flag BTFSS GOTO BARGB0,MSB CA1616S ; if MSB set go & negate BARG COMF COMF INCF ADDWFC BARGB1, BARGB0, BARGB1, BARGB0, BTFSS GOTO AARGB0,MSB C1616SX COMF COMF INCF ADDWFC AARGB1, AARGB0, AARGB1, AARGB0, C1616SX MOVPF IORWF BTFSC GOTO AARGB0,WREG BARGB0,W WREG,MSB C1616SX1 C1616S SDIV1616 CA1616S C1616SOK DS00617B-page 338 F F F F ; if MSB set go & negate AARGa F F F F BTFSC GOTO TEMPB3,LSB C1616SX4 ; test exception flag BTFSS RETLW SIGN,MSB 0x00 ; negate COMF COMF CLRF INCF ADDWFC AARGB1, AARGB0, WREG, F AARGB1, AARGB0, F F F F 1997 Microchip Technology Inc. AN617 COMF COMF INCF ADDWFC REMB1, REMB0, REMB1, REMB0, RETLW 0x00 BTFSS GOTO BTFSC GOTO MOVPF MOVPF CLRF CLRF GOTO CLRF CLRF INCF RETLW BARGB0,MSB C1616SX3 AARGB0,MSB C1616SX2 AARGB0,REMB0 AARGB1,REMB1 AARGB0,F AARGB1,F C1616SOK AARGB0,F AARGB1,F AARGB1,F 0x00 C1616SX3 COMF COMF INCF GOTO AARGB0,F AARGB1,F TEMPB3,F C1616S ; numerator = 0x7FFF + 1 C1616SX4 INCF CLRF ADDWFC MOVFP CPFSEQ GOTO MOVFP CPFSEQ GOTO CLRF CLRF INCF ADDWFC BTFSS GOTO BSF RETLW REMB1,F WREG,F REMB0,F BARGB1,WREG REMB1 C1616SOK BARGB0,WREG REMB0 C1616SOK REMB0,F REMB1,W AARGB1,F AARGB0,F AARGB0,MSB C1616SOK FPFLAGS,NAN 0xFF ; increment remainder and test for ; overflow C1616SX1 C1616SX2 F F F F ; test BARG exception ; test AARG exception ; quotient = 0, remainder = AARG ; quotient = 1, remainder = 0 ; if remainder overflow, clear ; remainder, increment quotient and ; test for overflow exception ;********************************************************************************************** ;********************************************************************************************** ; ; 16/16 Bit Unsigned Fixed Point Divide 16/16 -> 16.16 ; ; Input: 16 bit unsigned fixed point dividend in AARGB0, AARGB1 ; 16 bit unsigned fixed point divisor in BARGB0, BARGB1 ; ; Use: CALL FXD1616U ; ; Output: 16 bit unsigned fixed point quotient in AARGB0, AARGB1 ; 16 bit unsigned fixed point remainder in REMB0, REMB1 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 2+240+2 = 244 clks ; ; Min Timing: 2+176+2 = 180 clks ; 1997 Microchip Technology Inc. DS00617B-page 339 AN617 ; PM: 2+240+1 = 243 ; FXD1616U CLRF CLRF DM: 6 REMB0, F REMB1, F UDIV1616 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 16/15 Bit Unsigned Fixed Point Divide 16/15 -> 16.15 ; ; Input: 16 bit unsigned fixed point dividend in AARGB0, AARGB1 ; 15 bit unsigned fixed point divisor in BARGB0, BARGB1 ; ; Use: CALL FXD1615U ; ; Output: 16 bit unsigned fixed point quotient in AARGB0, AARGB1 ; 15 bit unsigned fixed point remainder in REMB0, REMB1 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 2+193+2 = 197 clks ; ; Min Timing: 2+178+2 = 182 clks ; ; PM: 2+213+1 = 216 DM: 6 ; FXD1615U CLRF REMB0, F CLRF REMB1, F UDIV1615 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 15/15 Bit Unsigned Fixed Point Divide 15/15 -> 15.15 ; ; Input: 15 bit unsigned fixed point dividend in AARGB0, AARGB1 ; 15 bit unsigned fixed point divisor in BARGB0, BARGB1 ; ; Use: CALL FXD1515U ; ; Output: 15 bit unsigned fixed point quotient in AARGB0, AARGB1 ; 15 bit unsigned fixed point remainder in REMB0, REMB1 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 2+187+2 = 191 clks ; ; Min Timing: 2+173+2 = 177 clks ; ; PM: 2+215+1 = 218 DM: 6 ; FXD1515U CLRF REMB0, F CLRF REMB1, F UDIV1515 RETLW 0x00 ;********************************************************************************************** DS00617B-page 340 1997 Microchip Technology Inc. AN617 ;********************************************************************************************** ; ; 16/8 Bit Signed Fixed Point Divide 16/08 -> 16.08 ; ; Input: 16 bit fixed point dividend in AARGB0, AARGB1 ; 8 bit fixed point divisor in BARGB0 ; ; Use: CALL FXD1608S ; ; Output: 16 bit fixed point quotient in AARGB0, AARGB1 ; 8 bit fixed point remainder in REMB0 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 21+122+5 = 148 clks A > 0, B > 0 ; 22+122+13 = 157 clks A > 0, B < 0 ; 24+122+13 = 159 clks A < 0, B > 0 ; 25+122+5 = 152 clks A < 0, B < 0 ; 7 clks A = 0 ; ; Min Timing: 21+122+5 = 148 clks A > 0, B > 0 ; 22+122+13 = 157 clks A > 0, B < 0 ; 24+122+13 = 159 clks A < 0, B > 0 ; 25+122+5 = 152 clks A < 0, B < 0 ; ; PM: 25+122+12+30 = 189 DM: 6 ; FXD1608S CLRF SIGN,F CLRF REMB0,F ; clear partial remainder MOVPF AARGB0,WREG IORWF AARGB1,W BTFSC _Z RETLW 0x00 MOVPF XORWF BTFSC COMF AARGB0,WREG BARGB0,W WREG,MSB SIGN,F CLRF TEMPB3,W ; clear exception flag BTFSS GOTO BARGB0,MSB CA1608S ; if MSB set go & negate BARG COMF INCF BARGB0, F BARGB0, F BTFSS GOTO AARGB0,MSB C1608SX COMF COMF INCF ADDWFC AARGB1, AARGB0, AARGB1, AARGB0, C1608SX MOVPF IORWF BTFSC GOTO AARGB0,WREG BARGB0,W WREG,MSB C1608SX1 C1608S SDIV1608 CA1608S C1608SOK ; if MSB set go & negate AARGa F F F F BTFSC GOTO TEMPB3,LSB C1608SX4 ; test exception flag BTFSS SIGN,MSB ; negate 1997 Microchip Technology Inc. DS00617B-page 341 AN617 RETLW 0x00 COMF COMF CLRF INCF ADDWFC AARGB1, AARGB0, WREG, F AARGB1, AARGB0, COMF INCF REMB0, F REMB0, F RETLW 0x00 BTFSS GOTO BTFSC GOTO MOVPF BCF RLCF RLCF MOVFP CLRF GOTO CLRF INCF CLRF RETLW BARGB0,MSB C1608SX3 AARGB0,MSB C1608SX2 AARGB1,REMB0 REMB0,MSB AARGB1,F AARGB0,F AARGB0,AARGB1 AARGB0,F C1608SOK AARGB1,F AARGB1,F AARGB0,F 0x00 ; test BARG exception C1608SX3 COMF COMF INCF GOTO AARGB0,F AARGB1,F TEMPB3,F C1608S ; numerator = 0x7FFF + 1 C1608SX4 INCF MOVFP CPFSEQ GOTO CLRF INCF ADDWFC BTFSS GOTO BSF RETLW REMB0,F BARGB0,WREG REMB0 C1608SOK REMB0,W AARGB1,F AARGB0,F AARGB0,MSB C1608SOK FPFLAGS,NAN 0xFF ; increment remainder and test for ; overflow C1608SX1 C1608SX2 F F F F ; test AARG exception ; quotient = 1, remainder = 0 ; if remainder overflow, clear ; remainder, increment quotient and ; test for overflow exception ;********************************************************************************************** ;********************************************************************************************** ; ; 16/8 Bit Unsigned Fixed Point Divide 16/08 -> 16.08 ; ; Input: 16 bit unsigned fixed point dividend in AARGB0, AARGB1 ; 8 bit unsigned fixed point divisor in BARGB0 ; ; Use: CALL FXD1608U ; ; Output: 16 bit unsigned fixed point quotient in AARGB0, AARGB1 ; 8 bit unsigned fixed point remainder in REMB0 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 1+193+2 = 196 clks ; ; Min Timing: 1+153+2 = 156 clks ; DS00617B-page 342 1997 Microchip Technology Inc. AN617 ; PM: 1+193+1 = 195 ; FXD1608U CLRF DM: 4 REMB0, F UDIV1608 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 16/7 Bit Unsigned Fixed Point Divide 16/07 -> 16.07 ; ; Input: 16 bit unsigned fixed point dividend in AARGB0, AARGB1 ; 7 bit unsigned fixed point divisor in BARGB0 ; ; Use: CALL FXD1607U ; ; Output: 16 bit unsigned fixed point quotient in AARGB0, AARGB1 ; 7 bit unsigned fixed point remainder in REMB0 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 1+127+2 = 130 clks ; ; Min Timing: 1+127+2 = 130 clks ; ; PM: 1+127+1 = 129 DM: 4 ; FXD1607U CLRF REMB0, F UDIV1607 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; 15/7 Bit Unsigned Fixed Point Divide 15/07 -> 15.07 ; ; Input: 15 bit unsigned fixed point dividend in AARGB0, AARGB1 ; 7 bit unsigned fixed point divisor in BARGB0 ; ; Use: CALL FXD1507U ; ; Output: 15 bit unsigned fixed point quotient in AARGB0, AARGB1 ; 7 bit unsigned fixed point remainder in REMB0 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 1+122+2 = 125 clks ; ; Min Timing: 1+122+2 = 125 clks ; ; PM: 1+122+1 = 124 DM: 4 ; FXD1507U CLRF REMB0, F UDIV1507 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 8/8 Bit Signed Fixed Point Divide 08/08 -> 08.08 ; 1997 Microchip Technology Inc. DS00617B-page 343 AN617 ; Input: 8 bit fixed point dividend in AARGB0 ; 8 bit fixed point divisor in BARGB0 ; ; Use: CALL FXD0808S ; ; Output: 8 bit fixed point quotient in AARGB0 ; 8 bit fixed point remainder in REMB0 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 19+58+5 = 82 clks A > ; 20+58+10 = 88 clks A > ; 20+58+10 = 88 clks A < ; 21+58+5 = 84 clks A < ; 6 clks A = ; ; Min Timing: 19+58+5 = 82 clks A > ; 20+58+10 = 88 clks A > ; 20+58+10 = 88 clks A < ; 21+58+5 = 84 clks A < ; ; PM: 20+58+9+23 = 110 DM: 5 ; FXD0808S CLRF SIGN,F CLRF REMB0,F ; clear MOVPF AARGB0,WREG BTFSC _Z RETLW 0x00 XORWF BTFSC COMF BARGB0,W WREG,MSB SIGN,F CLRF TEMPB3,W BTFSS GOTO BARGB0,MSB CA0808S COMF INCF BARGB0, F BARGB0, F BTFSS GOTO AARGB0,MSB C0808SX COMF INCF AARGB0, F AARGB0, F C0808SX MOVPF IORWF BTFSC GOTO AARGB0,WREG BARGB0,W WREG,MSB C0808SX1 C0808S SDIV0808 CA0808S C0808SOK DS00617B-page 344 BTFSC GOTO TEMPB3,LSB C0808SX4 BTFSS RETLW SIGN,MSB 0x00 COMF INCF AARGB0, F AARGB0, F COMF INCF REMB0, F REMB0, F 0, 0, 0, 0, 0 B B B B > < > < 0 0 0 0 0, 0, 0, 0, B B B B > < > < 0 0 0 0 partial remainder ; clear exception flag ; test exception flag 1997 Microchip Technology Inc. AN617 RETLW 0x00 BTFSS GOTO BTFSC GOTO MOVPF CLRF GOTO CLRF INCF RETLW BARGB0,MSB C0808SX3 AARGB0,MSB C0808SX2 AARGB0,REMB0 AARGB0,F C0808SOK AARGB0,F AARGB0,F 0x00 ; test BARG exception C0808SX3 COMF INCF GOTO AARGB0,F TEMPB3,F C0808S ; numerator = 0x7F + 1 C0808SX4 INCF MOVFP CPFSEQ GOTO CLRF INCF BTFSS GOTO BSF RETLW REMB0,F BARGB0,WREG REMB0 C0808SOK REMB0,F AARGB0,F AARGB0,MSB C0808SOK FPFLAGS,NAN 0xFF ; increment remainder and test for ; overflow C0808SX1 C0808SX2 ; test AARG exception ; quotient = 0, remainder = AARG ; quotient = 1, remainder = 0 ; if remainder overflow, clear ; remainder, increment quotient and ; test for overflow exception ;********************************************************************************************** ;********************************************************************************************** ; ; 8/8 Bit Unsigned Fixed Point Divide 08/08 -> 08.08 ; ; Input: 8 bit unsigned fixed point dividend in AARGB0 ; 8 bit unsigned fixed point divisor in BARGB0 ; ; Use: CALL FXD0808U ; ; Output: 8 bit unsigned fixed point quotient in AARGB0 ; 8 bit unsigned fixed point remainder in REMB0 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 1+72+2 = 75 clks ; ; Min Timing: 1+64+2 = 67 clks ; ; PM: 1+72+1 = 74 DM: 3 ; FXD0808U CLRF REMB0, F UDIV0808 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 8/7 Bit Unsigned Fixed Point Divide 08/07 -> 08.07 ; ; Input: 8 bit unsigned fixed point dividend in AARGB0 ; 7 bit unsigned fixed point divisor in BARGB0 ; 1997 Microchip Technology Inc. DS00617B-page 345 AN617 ; Use: CALL FXD0807U ; ; Output: 8 bit unsigned fixed point quotient in AARGB0 ; 7 bit unsigned fixed point remainder in REMB0 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 1+63+2 = 66 clks ; ; Min Timing: 1+63+2 = 66 clks ; ; PM: 1+63+1 = 65 DM: 3 ; FXD0807U CLRF REMB0, F UDIV0807 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; 7/7 Bit Unsigned Fixed Point Divide 07/07 -> 07.07 ; ; Input: 7 bit unsigned fixed point dividend in AARGB0 ; 7 bit unsigned fixed point divisor in BARGB0 ; ; Use: CALL FXD0707U ; ; Output: 7 bit unsigned fixed point quotient in AARGB0 ; 7 bit unsigned fixed point remainder in REMB0 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 1+58+2 = 61 clks ; ; Min Timing: 1+58+2 = 61 clks ; ; PM: 1+58+1 = 60 DM: 3 ; FXD0707U CLRF REMB0, F UDIV0707 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** DS00617B-page 346 1997 Microchip Technology Inc. AN617 G.3 PIC17CXXX Fixed Point Divide Routines C ; RCS Header $Id: fxdc.a17 2.4 1997/03/22 03:11:13 F.J.Testa Exp $ ; $Revision: 2.4 $ ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; PIC17 FIXED POINT DIVIDE ROUTINES C Input: fixed point arguments in AARG and BARG Output: quotient AARG/BARG followed by remainder in REM All timings are worst case cycle counts It is useful to note that the additional unsigned routines requiring a non-power of two argument can be called in a signed divide application where it is known that the respective argument is nonnegative, thereby offering some improvement in performance. Routine Clocks Function FXD3216S 429 32 bit/16 bit -> 32.16 signed fixed point divide FXD3216U 485 32 bit/16 bit -> 32.16 unsigned fixed point divide FXD3215U 390 32 bit/15 bit -> 32.15 unsigned fixed point divide FXD3115U 383 31 bit/15 bit -> 31.15 unsigned fixed point divide FXD2424S 404 24 bit/24 bit -> 24.24 signed fixed point divide FXD2424U 440 24 bit/24 bit -> 24.24 unsigned fixed point divide FXD2423U 369 24 bit/23 bit -> 24.23 unsigned fixed point divide FXD2323U 361 23 bit/23 bit -> 23.23 unsigned fixed point divide ;********************************************************************************************** ;********************************************************************************************** ; ; 32/16 Bit Division Macros ; SDIV3216 macro ; ; Max Timing: 5+8+30*12+6 = 379 clks ; ; Min Timing: 5+8+30*11+6 = 349 clks ; ; PM: 5+8+30*14+6 = 439 DM: 8 ; variable i MOVFP SUBWF MOVFP SUBWFB RLCF BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F RLCF RLCF RLCF MOVFP ADDWF AARGB0,W REMB1, F REMB0, F BARGB1,WREG REMB1, F 1997 Microchip Technology Inc. DS00617B-page 347 AN617 MOVFP ADDWFC RLCF BARGB0,WREG REMB0, F AARGB0, F variable i = D’2’ while i < D’8’ RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB0,W REMB1, F REMB0, F BARGB1,WREG AARGB0,LSB SADD26#v(i) REMB1, F BARGB0,WREG REMB0, F SOK26#v(i) SADD26#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F SOK26#v(i) RLCF AARGB0, F variable i = i + 1 endw RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB1,W REMB1, F REMB0, F BARGB1,WREG AARGB0,LSB SADD268 REMB1, F BARGB0,WREG REMB0, F SOK268 SADD268 ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F SOK268 RLCF AARGB1, F variable i = D’9’ while i < D’16’ RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB1,W REMB1, F REMB0, F BARGB1,WREG AARGB1,LSB SADD26#v(i) REMB1, F BARGB0,WREG REMB0, F SOK26#v(i) SADD26#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F SOK26#v(i) RLCF AARGB1, F DS00617B-page 348 1997 Microchip Technology Inc. AN617 variable i = i + 1 endw RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB2,W REMB1, F REMB0, F BARGB1,WREG AARGB1,LSB SADD2616 REMB1, F BARGB0,WREG REMB0, F SOK2616 SADD2616 ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F SOK2616 RLCF AARGB2, F variable i = D’17’ while i < D’24’ RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB2,W REMB1, F REMB0, F BARGB1,WREG AARGB2,LSB SADD26#v(i) REMB1, F BARGB0,WREG REMB0, F SOK26#v(i) SADD26#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F SOK26#v(i) RLCF AARGB2, F variable i = i + 1 endw RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB3,W REMB1, F REMB0, F BARGB1,WREG AARGB2,LSB SADD2624 REMB1, F BARGB0,WREG REMB0, F SOK2624 SADD2624 ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F SOK2624 RLCF AARGB3, F variable i = D’25’ 1997 Microchip Technology Inc. DS00617B-page 349 AN617 while i < D’32’ RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB3,W REMB1, F REMB0, F BARGB1,WREG AARGB3,LSB SADD26#v(i) REMB1, F BARGB0,WREG REMB0, F SOK26#v(i) SADD26#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F SOK26#v(i) RLCF AARGB3, F variable i = i + 1 endw BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC AARGB3,LSB SOK26 BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK26 endm UDIV3216 macro ; ; restore = 15/20 clks, nonrestore = 11/14 clks ; ; Max Timing: 16*15+1+16*20 = 561 clks ; ; Min Timing: 16*11+1+16*14 = 401 clks ; ; PM: 16*15+1+16*20 = 561 DM: 9 ; variable i variable i = D’0’ while i < D’8’ UOK26#v(i) DS00617B-page 350 RLCF RLCF RLCF MOVFP SUBWF MOVFP SUBWFB BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC BCF AARGB0,W REMB1, F REMB0, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F _C UOK26#v(i) BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F _C RLCF AARGB0, F 1997 Microchip Technology Inc. AN617 variable i = i + 1 endw variable i = D’8’ while i < D’16’ UOK26#v(i) RLCF RLCF RLCF MOVFP SUBWF MOVFP SUBWFB BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC BCF AARGB1,W REMB1, F REMB0, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F _C UOK26#v(i) BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F _C RLCF AARGB1, F variable i = i + 1 endw CLRF TEMP, F variable i = D’16’ while i < D’24’ UOK26#v(i) RLCF RLCF RLCF RLCF MOVFP SUBWF MOVFP SUBWFB CLRF SUBWFB BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC CLRF ADDWFC BCF AARGB2,W REMB1, F REMB0, F TEMP, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F _C UOK26#v(i) BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F _C RLCF AARGB2, F variable i = i + 1 endw variable i = D’24’ while i < D’32’ 1997 Microchip Technology Inc. DS00617B-page 351 AN617 UOK26#v(i) RLCF RLCF RLCF RLCF MOVFP SUBWF MOVFP SUBWFB CLRF SUBWFB BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC CLRF ADDWFC BCF AARGB3,W REMB1, F REMB0, F TEMP, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F _C UOK26#v(i) BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F _C RLCF AARGB3, F variable i = i + 1 endw endm NDIV3216 macro ; ; Max Timing: 10+31*15+6 = 481 clks ; ; Min Timing: 10+31*14+6 = 450 clks ; ; PM: 10+31*19+6 = 605 DM: 9 ; variable i RLCF RLCF RLCF MOVFP SUBWF MOVFP SUBWFB CLRF SUBWFB RLCF AARGB0,W REMB1, F REMB0, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F TEMP,W TEMP, F AARGB0, F variable i = D’1’ while i < D’8’ RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB CLRF SUBWFB GOTO DS00617B-page 352 AARGB0,W REMB1, F REMB0, F TEMP, F BARGB1,WREG AARGB0,LSB NADD26#v(i) REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK26#v(i) 1997 Microchip Technology Inc. AN617 NADD26#v(i) ADDWF MOVFP ADDWFC CLRF ADDWFC REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK26#v(i) RLCF AARGB0, F variable i = i + 1 endw RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB CLRF SUBWFB GOTO AARGB1,W REMB1, F REMB0, F TEMP, F BARGB1,WREG AARGB0,LSB NADD268 REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK268 NADD268 ADDWF MOVFP ADDWFC CLRF ADDWFC REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK268 RLCF AARGB1, F variable i = D’9’ while i < D’16’ RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB CLRF SUBWFB GOTO AARGB1,W REMB1, F REMB0, F TEMP, F BARGB1,WREG AARGB1,LSB NADD26#v(i) REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK26#v(i) NADD26#v(i) ADDWF MOVFP ADDWFC CLRF ADDWFC REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK26#v(i) RLCF AARGB1, F variable i = i + 1 endw RLCF 1997 Microchip Technology Inc. AARGB2,W DS00617B-page 353 AN617 RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB CLRF SUBWFB GOTO REMB1, F REMB0, F TEMP, F BARGB1,WREG AARGB1,LSB NADD2616 REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK2616 NADD2616 ADDWF MOVFP ADDWFC CLRF ADDWFC REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK2616 RLCF AARGB2, F variable i = D’17’ while i < D’24’ RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB CLRF SUBWFB GOTO AARGB2,W REMB1, F REMB0, F TEMP, F BARGB1,WREG AARGB2,LSB NADD26#v(i) REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK26#v(i) NADD26#v(i) ADDWF MOVFP ADDWFC CLRF ADDWFC REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK26#v(i) RLCF AARGB2, F variable i = i + 1 endw NADD2624 DS00617B-page 354 RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB CLRF SUBWFB GOTO AARGB3,W REMB1, F REMB0, F TEMP, F BARGB1,WREG AARGB2,LSB NADD2624 REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK2624 ADDWF REMB1, F 1997 Microchip Technology Inc. AN617 NOK2624 MOVFP ADDWFC CLRF ADDWFC BARGB0,WREG REMB0, F WREG, F TEMP, F RLCF AARGB3, F variable i = D’25’ while i < D’32’ RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB CLRF SUBWFB GOTO AARGB3,W REMB1, F REMB0, F TEMP, F BARGB1,WREG AARGB3,LSB NADD26#v(i) REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK26#v(i) NADD26#v(i) ADDWF MOVFP ADDWFC CLRF ADDWFC REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK26#v(i) RLCF AARGB3, F variable i = i + 1 endw BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC AARGB3,LSB NOK26 BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F NOK26 endm UDIV3215 macro ; ; Max Timing: 8+31*12+6 = 386 clks ; ; Min Timing: 8+31*11+6 = 355 clks ; ; PM: 8+31*14+6 = 448 DM: 8 ; variable i RLCF RLCF RLCF MOVFP SUBWF MOVFP SUBWFB RLCF 1997 Microchip Technology Inc. AARGB0,W REMB1, F REMB0, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F DS00617B-page 355 AN617 variable i = D’1’ while i < D’8’ RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB0,W REMB1, F REMB0, F BARGB1,WREG AARGB0,LSB UADD25#v(i) REMB1, F BARGB0,WREG REMB0, F UOK25#v(i) UADD25#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK25#v(i) RLCF AARGB0, F variable i = i + 1 endw RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB1,W REMB1, F REMB0, F BARGB1,WREG AARGB0,LSB UADD258 REMB1, F BARGB0,WREG REMB0, F UOK258 UADD258 ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK258 RLCF AARGB1, F variable i = D’9’ while i < D’16’ RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB1,W REMB1, F REMB0, F BARGB1,WREG AARGB1,LSB UADD25#v(i) REMB1, F BARGB0,WREG REMB0, F UOK25#v(i) UADD25#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK25#v(i) RLCF AARGB1, F variable i = i + 1 endw DS00617B-page 356 1997 Microchip Technology Inc. AN617 RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB2,W REMB1, F REMB0, F BARGB1,WREG AARGB1,LSB UADD2516 REMB1, F BARGB0,WREG REMB0, F UOK2516 UADD2516 ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK2516 RLCF AARGB2, F variable i = D’17’ while i < D’24’ RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB2,W REMB1, F REMB0, F BARGB1,WREG AARGB2,LSB UADD25#v(i) REMB1, F BARGB0,WREG REMB0, F UOK25#v(i) UADD25#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK25#v(i) RLCF AARGB2, F variable i = i + 1 endw RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB3,W REMB1, F REMB0, F BARGB1,WREG AARGB2,LSB UADD2524 REMB1, F BARGB0,WREG REMB0, F UOK2524 UADD2524 ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK2524 RLCF AARGB3, F variable i = D’25’ while i < D’32’ RLCF 1997 Microchip Technology Inc. AARGB3,W DS00617B-page 357 AN617 RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO REMB1, F REMB0, F BARGB1,WREG AARGB3,LSB UADD25#v(i) REMB1, F BARGB0,WREG REMB0, F UOK25#v(i) UADD25#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK25#v(i) RLCF AARGB3, F variable i = i + 1 endw BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC AARGB3,LSB UOK25 BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK25 endm UDIV3115 macro ; ; Max Timing: 5+8+30*12+6 = 379 clks ; ; Min Timing: 5+8+30*11+6 = 349 clks ; ; PM: 5+8+30*14+6 = 439 DM: 8 ; variable i MOVFP SUBWF MOVFP SUBWFB RLCF BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F RLCF RLCF RLCF MOVFP ADDWF MOVFP ADDWFC RLCF AARGB0,W REMB1, F REMB0, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F variable i = D’2’ while i < D’8’ RLCF RLCF RLCF MOVFP BTFSS GOTO DS00617B-page 358 AARGB0,W REMB1, F REMB0, F BARGB1,WREG AARGB0,LSB UADD15#v(i) 1997 Microchip Technology Inc. AN617 SUBWF MOVFP SUBWFB GOTO REMB1, F BARGB0,WREG REMB0, F UOK15#v(i) UADD15#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK15#v(i) RLCF AARGB0, F variable i = i + 1 endw RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB1,W REMB1, F REMB0, F BARGB1,WREG AARGB0,LSB UADD158 REMB1, F BARGB0,WREG REMB0, F UOK158 UADD158 ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK158 RLCF AARGB1, F variable i = D’9’ while i < D’16’ RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB1,W REMB1, F REMB0, F BARGB1,WREG AARGB1,LSB UADD15#v(i) REMB1, F BARGB0,WREG REMB0, F UOK15#v(i) UADD15#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK15#v(i) RLCF AARGB1, F variable i = i + 1 endw RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB 1997 Microchip Technology Inc. AARGB2,W REMB1, F REMB0, F BARGB1,WREG AARGB1,LSB UADD1516 REMB1, F BARGB0,WREG REMB0, F DS00617B-page 359 AN617 GOTO UOK1516 UADD1516 ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK1516 RLCF AARGB2, F variable i = D’17’ while i < D’24’ RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB2,W REMB1, F REMB0, F BARGB1,WREG AARGB2,LSB UADD15#v(i) REMB1, F BARGB0,WREG REMB0, F UOK15#v(i) UADD15#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK15#v(i) RLCF AARGB2, F variable i = i + 1 endw RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO AARGB3,W REMB1, F REMB0, F BARGB1,WREG AARGB2,LSB UADD1524 REMB1, F BARGB0,WREG REMB0, F UOK1524 UADD1524 ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK1524 RLCF AARGB3, F variable i = D’25’ while i < D’32’ RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB GOTO DS00617B-page 360 AARGB3,W REMB1, F REMB0, F BARGB1,WREG AARGB3,LSB UADD15#v(i) REMB1, F BARGB0,WREG REMB0, F UOK15#v(i) 1997 Microchip Technology Inc. AN617 UADD15#v(i) ADDWF MOVFP ADDWFC REMB1, F BARGB0,WREG REMB0, F UOK15#v(i) RLCF AARGB3, F variable i = i + 1 endw BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC AARGB3,LSB UOK15 BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK15 endm ;********************************************************************************************** ;********************************************************************************************** ; ; 24/24 Bit Division Macros ; SDIV2424 macro ; ; Max Timing: 7+11+22*15+8 = 356 clks ; ; Min Timing: 7+11+22*14+3 = 329 clks ; ; PM: 7+11+22*19+8 = 444 DM: 9 ; variable i MOVFP SUBWF MOVFP SUBWFB MOVFP SUBWFB RLCF BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F RLCF RLCF RLCF RLCF MOVFP ADDWF MOVFP ADDWFC MOVFP ADDWFC RLCF AARGB0,W REMB2, F REMB1, F REMB0, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F variable i = D’2’ while i < D’8’ RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO 1997 Microchip Technology Inc. AARGB0,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB0,LSB SADD44#v(i) DS00617B-page 361 AN617 SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK44#v(i) SADD44#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK44#v(i) RLCF AARGB0, F variable i = i + 1 endw RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB1,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB0,LSB SADD448 REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK448 SADD448 ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK448 RLCF AARGB1, F variable i = D’9’ while i < D’16’ RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB1,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB1,LSB SADD44#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK44#v(i) SADD44#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK44#v(i) RLCF AARGB1, F DS00617B-page 362 1997 Microchip Technology Inc. AN617 variable i = i + 1 endw RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB2,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB1,LSB SADD4416 REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK4416 SADD4416 ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK4416 RLCF AARGB2, F variable i = D’17’ while i < D’24’ RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB2,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB2,LSB SADD44#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK44#v(i) SADD44#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F SOK44#v(i) RLCF AARGB2, F variable i = i + 1 endw BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC MOVFP ADDWFC 1997 Microchip Technology Inc. AARGB2,LSB SOK44 BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F DS00617B-page 363 AN617 SOK44 endm UDIV2424 macro ; ; restore = 20/25 clks, nonrestore = 14/17 clks ; ; Max Timing: 16*20+1+8*25 = 521 clks ; ; Min Timing: 16*14+1+8*17 = 361 clks ; ; PM: 16*20+1+8*25 = 521 DM: 10 ; variable i variable i = 0 while i < 8 UOK44#v(i) RLCF RLCF RLCF RLCF MOVFP SUBWF MOVFP SUBWFB MOVFP SUBWFB BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC MOVFP ADDWFC BCF AARGB0,W REMB2, F REMB1, F REMB0, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F _C UOK44#v(i) BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F _C RLCF AARGB0, F variable i = i + 1 endw variable i = D’8’ while i < D’16’ RLCF RLCF RLCF RLCF MOVFP SUBWF MOVFP SUBWFB MOVFP SUBWFB BTFSC GOTO MOVFP ADDWF MOVFP DS00617B-page 364 AARGB1,W REMB2, F REMB1, F REMB0, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F _C UOK44#v(i) BARGB2,WREG REMB2, F BARGB1,WREG 1997 Microchip Technology Inc. AN617 UOK44#v(i) ADDWFC MOVFP ADDWFC BCF REMB1, F BARGB0,WREG REMB0, F _C RLCF AARGB1, F variable i = i + 1 endw CLRF TEMP, F variable i = D’16’ while i < D’24’ UOK44#v(i) RLCF RLCF RLCF RLCF RLCF MOVFP SUBWF MOVFP SUBWFB MOVFP SUBWFB CLRF SUBWFB BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC MOVFP ADDWFC CLRF ADDWFC BCF AARGB2,W REMB2, F REMB1, F REMB0, F TEMP, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F _C UOK44#v(i) BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F _C RLCF AARGB2, F variable i = i + 1 endw endm NDIV2424 macro ; ; Max Timing: 13+23*18+8 = 435 clks ; ; Min Timing: 13+23*17+3 = 407 clks ; ; PM: 13+23*24+8 = 573 DM: 10 ; variable i RLCF RLCF RLCF RLCF MOVFP 1997 Microchip Technology Inc. AARGB0,W REMB2, F REMB1, F REMB0, F BARGB2,WREG DS00617B-page 365 AN617 SUBWF MOVFP SUBWFB MOVFP SUBWFB CLRF SUBWFB RLCF REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F TEMP,W TEMP, F AARGB0, F variable i = D’1’ while i < D’8’ RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB CLRF SUBWFB GOTO AARGB0,W REMB2, F REMB1, F REMB0, F TEMP, F BARGB2,WREG AARGB0,LSB NADD44#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK44#v(i) NADD44#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC CLRF ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK44#v(i) RLCF AARGB0, F variable i = i + 1 endw NADD448 DS00617B-page 366 RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB CLRF SUBWFB GOTO AARGB1,W REMB2, F REMB1, F REMB0, F TEMP, F BARGB2,WREG AARGB0,LSB NADD448 REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK448 ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F 1997 Microchip Technology Inc. AN617 NOK448 CLRF ADDWFC WREG, F TEMP, F RLCF AARGB1, F variable i = D’9’ while i < D’16’ RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB CLRF SUBWFB GOTO AARGB1,W REMB2, F REMB1, F REMB0, F TEMP, F BARGB2,WREG AARGB1,LSB NADD44#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK44#v(i) NADD44#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC CLRF ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK44#v(i) RLCF AARGB1, F variable i = i + 1 endw RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB CLRF SUBWFB GOTO AARGB2,W REMB2, F REMB1, F REMB0, F TEMP, F BARGB2,WREG AARGB1,LSB NADD4416 REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK4416 NADD4416 ADDWF MOVFP ADDWFC MOVFP ADDWFC CLRF ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK4416 RLCF AARGB2, F 1997 Microchip Technology Inc. DS00617B-page 367 AN617 variable i = D’17’ while i < D’24’ RLCF RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB CLRF SUBWFB GOTO AARGB2,W REMB2, F REMB1, F REMB0, F TEMP, F BARGB2,WREG AARGB2,LSB NADD44#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK44#v(i) NADD44#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC CLRF ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F WREG, F TEMP, F NOK44#v(i) RLCF AARGB2, F variable i = i + 1 endw BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC MOVFP ADDWFC AARGB2,LSB NOK44 BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F NOK44 endm UDIV2423 macro ; ; Max Timing: 11+23*15+8 = 364 clks ; ; Min Timing: 11+23*14+3 = 336 clks ; ; PM: 11+23*19+8 = 456 ; variable i RLCF RLCF RLCF RLCF MOVFP SUBWF MOVFP DS00617B-page 368 DM: 9 AARGB0,W REMB2, F REMB1, F REMB0, F BARGB2,WREG REMB2, F BARGB1,WREG 1997 Microchip Technology Inc. AN617 SUBWFB MOVFP SUBWFB RLCF REMB1, F BARGB0,WREG REMB0, F AARGB0, F variable i = D’1’ while i < D’8’ RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB0,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB0,LSB UADD43#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK43#v(i) UADD43#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK43#v(i) RLCF AARGB0, F variable i = i + 1 endw RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB1,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB0,LSB UADD438 REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK438 UADD438 ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK438 RLCF AARGB1, F variable i = D’9’ while i < D’16’ RLCF RLCF RLCF RLCF MOVFP 1997 Microchip Technology Inc. AARGB1,W REMB2, F REMB1, F REMB0, F BARGB2,WREG DS00617B-page 369 AN617 BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB1,LSB UADD43#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK43#v(i) UADD43#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK43#v(i) RLCF AARGB1, F variable i = i + 1 endw RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB2,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB1,LSB UADD4316 REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK4316 UADD4316 ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK4316 RLCF AARGB2, F variable i = D’17’ while i < D’24’ UADD43#v(i) DS00617B-page 370 RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB2,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB2,LSB UADD43#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK43#v(i) ADDWF MOVFP ADDWFC MOVFP REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG 1997 Microchip Technology Inc. AN617 UOK43#v(i) ADDWFC REMB0, F RLCF AARGB2, F variable i = i + 1 endw BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC MOVFP ADDWFC AARGB2,LSB UOK43 BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK43 endm UDIV2323 macro ; ; Max Timing: 7+11+22*15+8 = 356 clks ; ; Min Timing: 7+11+22*14+3 = 329 clks ; ; PM: 7+11+22*19+8 = 444 DM: 9 ; variable i MOVFP SUBWF MOVFP SUBWFB MOVFP SUBWFB RLCF BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F RLCF RLCF RLCF RLCF MOVFP ADDWF MOVFP ADDWFC MOVFP ADDWFC RLCF AARGB0,W REMB2, F REMB1, F REMB0, F BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F AARGB0, F variable i = D’2’ while i < D’8’ RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP 1997 Microchip Technology Inc. AARGB0,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB0,LSB UADD33#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG DS00617B-page 371 AN617 SUBWFB GOTO REMB0, F UOK33#v(i) UADD33#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK33#v(i) RLCF AARGB0, F variable i = i + 1 endw RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB1,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB0,LSB UADD338 REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK338 UADD338 ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK338 RLCF AARGB1, F variable i = D’9’ while i < D’16’ RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB1,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB1,LSB UADD33#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK33#v(i) UADD33#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK33#v(i) RLCF AARGB1, F variable i = i + 1 endw DS00617B-page 372 1997 Microchip Technology Inc. AN617 RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB2,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB1,LSB UADD3316 REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK3316 UADD3316 ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK3316 RLCF AARGB2, F variable i = D’17’ while i < D’24’ RLCF RLCF RLCF RLCF MOVFP BTFSS GOTO SUBWF MOVFP SUBWFB MOVFP SUBWFB GOTO AARGB2,W REMB2, F REMB1, F REMB0, F BARGB2,WREG AARGB2,LSB UADD33#v(i) REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK33#v(i) UADD33#v(i) ADDWF MOVFP ADDWFC MOVFP ADDWFC REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK33#v(i) RLCF AARGB2, F variable i = i + 1 endw BTFSC GOTO MOVFP ADDWF MOVFP ADDWFC MOVFP ADDWFC AARGB2,LSB UOK33 BARGB2,WREG REMB2, F BARGB1,WREG REMB1, F BARGB0,WREG REMB0, F UOK33 1997 Microchip Technology Inc. DS00617B-page 373 AN617 endm ;********************************************************************************************** ;********************************************************************************************** ; ; 32/16 Bit Signed Fixed Point Divide 32/16 -> 32.16 ; ; Input: 32 bit signed fixed point dividend in AARGB0, AARGB1,AARGB2,AARGB3 ; 16 bit unsigned fixed point divisor in BARGB0, BARGB1 ; ; Use: CALL FXD3216S ; ; Output: 32 bit signed fixed point quotient in AARGB0, AARGB1,AARGB2,AARGB3 ; 16 bit fixed point remainder in REMB0, REMB1 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 24+379+5 = 408 clks A > 0, B > 0 ; 27+379+19 = 425 clks A > 0, B < 0 ; 31+379+19 = 429 clks A < 0, B > 0 ; 34+379+5 = 418 clks A < 0, B < 0 ; 10 clks A = 0 ; ; Min Timing: 24+349+5 = 378 clks A > 0, B > 0 ; 27+349+19 = 395 clks A > 0, B < 0 ; 31+349+19 = 399 clks A < 0, B > 0 ; 34+349+5 = 388 clks A < 0, B < 0 ; ; PM: 34+439+18+46 = 537 DM: 10 ; FXD3216S CLRF SIGN,F CLRF REMB0,F ; clear partial remainder CLRF REMB1,F MOVPF AARGB0,WREG IORWF AARGB1,W IORWF AARGB2,W IORWF AARGB3,W BTFSC _Z RETLW 0x00 CA3216S DS00617B-page 374 MOVPF XORWF BTFSC COMF AARGB0,WREG BARGB0,W WREG,MSB SIGN,F CLRF TEMPB3,W ; clear exception flag BTFSS GOTO BARGB0,MSB CA3216S ; if MSB set go & negate BARG COMF COMF INCF ADDWFC BARGB1, BARGB0, BARGB1, BARGB0, BTFSS GOTO AARGB0,MSB C3216SX COMF COMF COMF COMF INCF ADDWFC ADDWFC ADDWFC AARGB3, AARGB2, AARGB1, AARGB0, AARGB3, AARGB2, AARGB1, AARGB0, F F F F ; if MSB set go & negate AARGa F F F F F F F F 1997 Microchip Technology Inc. AN617 C3216SX MOVPF IORWF BTFSC GOTO C3216S SDIV3216 AARGB0,WREG BARGB0,W WREG,MSB C3216SX1 BTFSC GOTO TEMPB3,LSB C3216SX4 ; test exception flag BTFSS RETLW SIGN,MSB 0x00 ; negate COMF COMF COMF COMF CLRF INCF ADDWFC ADDWFC ADDWFC AARGB3, AARGB2, AARGB1, AARGB0, WREG, F AARGB3, AARGB2, AARGB1, AARGB0, COMF COMF INCF ADDWFC REMB1, REMB0, REMB1, REMB0, RETLW 0x00 BTFSS GOTO BTFSC GOTO MOVPF MOVPF BCF RLCF RLCF RLCF MOVFP MOVFP CLRF CLRF GOTO CLRF INCF CLRF CLRF CLRF RETLW BARGB0,MSB C3216SX3 AARGB0,MSB C3216SX2 AARGB2,REMB0 AARGB3,REMB1 REMB0,MSB AARGB2,F AARGB1,F AARGB0,F AARGB0,AARGB2 AARGB1,AARGB3 AARGB0,F AARGB1,F C3216SOK AARGB3,F AARGB3,F AARGB2,F AARGB1,F AARGB0,F 0x00 ; test BARG exception C3216SX3 COMF COMF COMF COMF INCF GOTO AARGB0,F AARGB1,F AARGB2,F AARGB3,F TEMPB3,F C3216S ; numerator = 0x7FFFFFFF + 1 C3216SX4 INCF CLRF ADDWFC MOVFP CPFSEQ REMB1,F WREG,F REMB0,F BARGB1,WREG REMB1 ; increment remainder and test for C3216SOK C3216SX1 C3216SX2 1997 Microchip Technology Inc. F F F F F F F F F F F F ; test AARG exception ; quotient = 1, remainder = 0 ; overflow DS00617B-page 375 AN617 GOTO MOVFP CPFSEQ GOTO CLRF CLRF INCF ADDWFC ADDWFC ADDWFC BTFSS GOTO BSF RETLW C3216SOK BARGB0,WREG REMB0 C3216SOK REMB0,W REMB1,W AARGB3,F AARGB2,F AARGB1,F AARGB0,F AARGB0,MSB C3216SOK FPFLAGS,NAN 0xFF ; overflow ; if remainder overflow, clear ; remainder, increment quotient and ; test for overflow exception ;********************************************************************************************** ;********************************************************************************************** ; ; 32/16 Bit Unsigned Fixed Point Divide 32/16 -> 32.16 ; ; Input: 32 bit unsigned fixed point dividend in AARGB0, AARGB1,AARGB2,AARGB3 ; 16 bit unsigned fixed point divisor in BARGB0, BARGB1 ; ; Use: CALL FXD3216U ; ; Output: 32 bit unsigned fixed point quotient in AARGB0, AARGB1AARGB2,AARGB3 ; 16 bit unsigned fixed point remainder in REMB0, REMB1 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 2+481+2 = 485 clks ; ; Min Timing: 2+450+2 = 459 clks ; ; PM: 2+605+1 = 608 DM: 9 ; FXD3216U CLRF REMB0, F CLRF REMB1, F NDIV3216 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 32/15 Bit Unsigned Fixed Point Divide 32/15 -> 32.15 ; ; Input: 32 bit unsigned fixed point dividend in AARGB0, AARGB1,AARGB2,AARGB3 ; 15 bit unsigned fixed point divisor in BARGB0, BARGB1 ; ; Use: CALL FXD3215U ; ; Output: 32 bit unsigned fixed point quotient in AARGB0, AARGB1 ; 15 bit unsigned fixed point remainder in REMB0, REMB1 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 2+386+2 = 390 clks ; ; Min Timing: 2+355+2 = 359 clks ; ; PM: 2+448+1 = 451 DM: 8 ; DS00617B-page 376 1997 Microchip Technology Inc. AN617 FXD3215U CLRF CLRF REMB0, F REMB1, F UDIV3215 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 31/15 Bit Unsigned Fixed Point Divide 31/15 -> 31.15 ; ; Input: 31 bit unsigned fixed point dividend in AARGB0, AARGB1,AARGB2,AARGB3 ; 15 bit unsigned fixed point divisor in BARGB0, BARGB1 ; ; Use: CALL FXD3115U ; ; Output: 31 bit unsigned fixed point quotient in AARGB0, AARGB1 ; 15 bit unsigned fixed point remainder in REMB0, REMB1 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 2+379+2 = 383 clks ; ; Min Timing: 2+349+2 = 353 clks ; ; PM: 2+439+1 = 442 DM: 8 ; FXD3115U CLRF REMB0, F CLRF REMB1, F UDIV3115 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 24/24 Bit Signed Fixed Point Divide 24/24 -> 24.24 ; ; Input: 24 bit signed fixed point dividend in AARGB0, AARGB1, AARGB2 ; 24 bit unsigned fixed point divisor in BARGB0, BARGB1, BARGB2 ; ; Use: CALL FXD2424S ; ; Output: 24 bit signed fixed point quotient in AARGB0, AARGB1, AARGB2 ; 24 bit fixed point remainder in REMB0, REMB1, REMB2 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 24+356+5 = 385 clks A > 0, B > 0 ; 29+356+19 = 404 clks A > 0, B < 0 ; 29+356+19 = 404 clks A < 0, B > 0 ; 34+356+5 = 395 clks A < 0, B < 0 ; 10 clks A = 0 ; ; Min Timing: 24+329+5 = 358 clks A > 0, B > 0 ; 29+329+19 = 377 clks A > 0, B < 0 ; 29+329+19 = 377 clks A < 0, B > 0 ; 34+329+5 = 368 clks A < 0, B < 0 ; ; PM: 34+444+18+44 = 540 DM: 11 ; FXD2424S CLRF SIGN,F CLRF REMB0,F ; clear partial remainder CLRF REMB1,F 1997 Microchip Technology Inc. DS00617B-page 377 AN617 CLRF MOVPF IORWF IORWF BTFSC RETLW REMB2,F AARGB0,WREG AARGB1,W AARGB2,W _Z 0x00 MOVPF XORWF BTFSC COMF AARGB0,WREG BARGB0,W WREG,MSB SIGN,F CLRF TEMPB3,W ; clear exception flag BTFSS GOTO BARGB0,MSB CA2424S ; if MSB set, negate BARG COMF COMF COMF INCF ADDWFC ADDWFC BARGB2, BARGB1, BARGB0, BARGB2, BARGB1, BARGB0, BTFSS GOTO AARGB0,MSB C2424SX COMF COMF COMF INCF ADDWFC ADDWFC AARGB2, AARGB1, AARGB0, AARGB2, AARGB1, AARGB0, C2424SX MOVPF IORWF BTFSC GOTO AARGB0,WREG BARGB0,W WREG,MSB C2424SX1 C2424S SDIV2424 CA2424S C2424SOK C2424SX1 DS00617B-page 378 F F F F F F ; if MSB set, negate AARG F F F F F F BTFSC GOTO TEMPB3,LSB C2424SX4 BTFSS RETLW SIGN,MSB 0x00 COMF COMF COMF CLRF INCF ADDWFC ADDWFC AARGB2, AARGB1, AARGB0, WREG, F AARGB2, AARGB1, AARGB0, COMF COMF COMF INCF ADDWFC ADDWFC REMB2, REMB1, REMB0, REMB2, REMB1, REMB0, RETLW 0x00 BTFSS GOTO BARGB0,MSB C2424SX3 ; test exception flag F F F F F F F F F F F F ; test BARG exception 1997 Microchip Technology Inc. AN617 BTFSC GOTO MOVPF MOVPF MOVPF CLRF CLRF CLRF GOTO CLRF CLRF CLRF INCF RETLW AARGB0,MSB C2424SX2 AARGB0,REMB0 AARGB1,REMB1 AARGB2,REMB2 AARGB0,F AARGB1,F AARGB2,F C2424SOK AARGB0,F AARGB1,F AARGB2,F AARGB2,F 0x00 C2424SX3 COMF COMF COMF INCF GOTO AARGB0,F AARGB1,F AARGB2,F TEMPB3,F C2424S ; numerator = 0x7FFFFF + 1 C2424SX4 INCF CLRF ADDWFC ADDWFC MOVFP CPFSEQ GOTO MOVFP CPFSEQ GOTO MOVFP CPFSEQ GOTO CLRF CLRF CLRF INCF ADDWFC ADDWFC BTFSS GOTO BSF RETLW REMB2,F WREG,F REMB1,F REMB0,F BARGB2,WREG REMB2 C2424SOK BARGB1,WREG REMB1 C2424SOK BARGB0,WREG REMB0 C2424SOK REMB0,F REMB1,F REMB2,W AARGB2,F AARGB1,F AARGB0,F AARGB0,MSB C2424SOK FPFLAGS,NAN 0xFF ; increment remainder and test for ; overflow C2424SX2 ; test AARG exception ; quotient = 0, remainder = AARG ; quotient = 1, remainder = 0 ; if remainder overflow, clear ; remainder, increment quotient and ; test for overflow exception ;********************************************************************************************** ;********************************************************************************************** ; ; 24/24 Bit Unsigned Fixed Point Divide 24/24 -> 24.24 ; ; Input: 24 bit unsigned fixed point dividend in AARGB0, AARGB1, AARGB2 ; 24 bit unsigned fixed point divisor in BARGB0, BARGB1, BARGB2 ; ; Use: CALL FXD2424U ; ; Output: 24 bit unsigned fixed point quotient in AARGB0, AARGB1, AARGB2 ; 24 bit unsigned fixed point remainder in REMB0, REMB1, REMB2 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 3+435+2 = 440 clks ; ; Min Timing: 3+407+2 = 412 clks ; 1997 Microchip Technology Inc. DS00617B-page 379 AN617 ; PM: 3+573+1 = 577 ; FXD2424U CLRF CLRF CLRF DM: 10 REMB0, F REMB1, F REMB2, F NDIV2424 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 24/23 Bit Unsigned Fixed Point Divide 24/23 -> 24.23 ; ; Input: 24 bit unsigned fixed point dividend in AARGB0, AARGB1, AARGB2 ; 23 bit unsigned fixed point divisor in BARGB0, BARGB1, BARGB2 ; ; Use: CALL FXD2423U ; ; Output: 24 bit unsigned fixed point quotient in AARGB0, AARGB1, AARGB2 ; 23 bit unsigned fixed point remainder in REMB0, REMB1, REMB2 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 3+364+2 = 369 clks ; ; Min Timing: 3+336+2 = 341 clks ; ; PM: 3+456+1 = 460 DM: 9 ; FXD2423U CLRF REMB0, F CLRF REMB1, F CLRF REMB2, F UDIV2423 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** ; ; 23/23 Bit Unsigned Fixed Point Divide 23/23 -> 23.23 ; ; Input: 23 bit unsigned fixed point dividend in AARGB0, AARGB1, AARGB2 ; 23 bit unsigned fixed point divisor in BARGB0, BARGB1, BARGB2 ; ; Use: CALL FXD2323U ; ; Output: 23 bit unsigned fixed point quotient in AARGB0, AARGB1, AARGB2 ; 23 bit unsigned fixed point remainder in REMB0, REMB1, REMB2 ; ; Result: AARG, REM <-- AARG / BARG ; ; Max Timing: 3+356+2 = 361 clks ; ; Min Timing: 3+329+2 = 334 clks ; ; PM: 3+444+1 = 448 DM: 9 ; FXD2323U CLRF REMB0, F CLRF REMB1, F CLRF REMB2, F UDIV2323 DS00617B-page 380 1997 Microchip Technology Inc. AN617 RETLW 0x00 ;********************************************************************************************** ;********************************************************************************************** 1997 Microchip Technology Inc. DS00617B-page 381 Note the following details of the code protection feature on PICmicro® MCUs. • • • • • • The PICmicro family meets the specifications contained in the Microchip Data Sheet. Microchip believes that its family of PICmicro microcontrollers is one of the most secure products of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the PICmicro microcontroller in a manner outside the operating specifications contained in the data sheet. The person doing so may be engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable”. Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our product. If you have any further questions about this matter, please contact the local sales office nearest to you. Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, FilterLab, KEELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER, PICSTART, PRO MATE, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2002, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. 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Le Colleoni 1 20041 Agrate Brianza Milan, Italy Tel: 39-039-65791-1 Fax: 39-039-6899883 United Kingdom Arizona Microchip Technology Ltd. 505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44 118 921 5869 Fax: 44-118 921-5820 01/18/02 2002 Microchip Technology Inc.