DEM-ADS807E ® EVALUATION FIXTURE FEATURES DESCRIPTION ● PROVIDES FAST AND EASY PERFORMANCE TESTING FOR ADS807E The DEM-ADS807E evaluation fixture is designed for ease of use when evaluating the high speed analogto-digital converter ADS807E. The ADS807E offers 12 bits of resolution with sampling rates of up to 53MHz. Because of its flexible design the user can evaluate the converter in many different configurations: either dc-coupled or ac-coupled input; or, singleended or differential inputs. The data output of the ADS807E converter is decoupled from the connector by CMOS octal logic buffers. ● SINGLE-ENDED OR DIFFERENTIAL INPUT CONFIGURATION ● ACTIVE OR PASSIVE FRONT ENDS ● EXTERNAL REFERENCE OPTION International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111 Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 © 1998 Burr-Brown Corporation LI-519 Printed in U.S.A. August, 1998 INITIAL CONFIGURATION By using solder switches and resistor placements, DEMADS807E can be set up in a variety of configurations to accommodate a specific mode of operation. Before starting evaluation, the user should decide on the configuration and make the appropriate connections or changes. The demonstration board comes with following factory-set configuration: nents). Resistor R9 (0Ω) has to be removed when wiring this circuit configuration. The buffered input configuration has the benefit of providing a near ideal source impedance to the driver amplifiers, especially important for the inverting gain stage. Transformer Coupled The demonstration board provides the option to evaluate the A/D converter with either an amplifier-based differential interface, or with a RF transformer. The RF transformer is used to convert the single-ended input signal applied to SMA connector J4 into a differential signal. The following steps have to be carried out to set up the board for the transformer coupling: • The signal input is the unbuffered input at SMA connector J2. • Amplifiers U5 and U6 are performing a single-ended-todifferential conversion, using an inverting and a noninverting gain stage. • Remove R22, R23, R24, and R25. • The signal is ac-coupled into the ADS807E by the coupling capacitors C39 and C40. • Remove C39 and C40 to disconnect the op amp outputs from the converter inputs. • The converter is set to operate with the internal reference. Solder switch ‘INT/EXT’ is closed. • Install R27 (0Ω) to connect the common-mode voltage available on the CM pin to the secondary side of the transformer. • The common-mode voltage required to bias the input of the ADS807E is derived from the internal top and bottom references by R22, R23, and R24, R25, and applied to each signal input, pin 24 and pin 25 (U1). • Install R26 and R28, typically 24.9Ω. • Add an appropriate termination resistor (R29), depending on the selected transformer model. The installed model has a 1:1 turns ratio. POWER SUPPLY The demonstration board requires ±5V power supply voltages. Two separate power connectors are on the board. Connector P2, labeled with –5V, GND, and +5V, is the supply connection for the analog front end (U4, U5, U6). Connector P1, labeled with VDRV, GND, and +5V, is the supply connector for the converter (U1). The VDRV connector is tied to pin 28 of the ADS807E. Varying the voltage on this pin will vary the data output voltage levels accordingly. Setting VDRV to +3V typically provides the best performance results. This differential input configuration can be operated with external references as well. Single-Ended Operation The flexible design of the interface circuit configuration allows the user to operate the ADS807E with a single-ended input signal. The following component changes must be made: • Disconnect the output of amplifier U5 by removing C39. • Remove R22 and R23. • Install R30 (0Ω). SIGNAL INPUT Unbuffered Input The factory-set configuration of the demonstration board uses the high-speed op amp OPA642N; a voltage feedback op amp that features low distortion. Configured in an inverting and non-inverting configuration, two OPA642Ns convert the single-ended signal applied to SMA connector J2 into a differential signal to drive the differential input of the ADS807E. The signal is ac-coupled to the ADS807 and the required level shifting is done with resistors R22 through R25 at the inputs of the ADS807E. The op amp drivers are set for a gain of 2. Amplifier U6 is now ac-coupled to the IN input of the ADS807E and is driving it single-ended. This requires the signal swing to be twice as high as in the differential mode, now 2Vp-p instead of 1Vp-p. Input Full-Scale Range Select The ADS807E provides an option for the user to select between a 2Vp-p and a 3Vp-p full-scale input range. This function is controlled by the logic level applied to pin 15 (RSEL) of the ADS807E. Internally, the RSEL pin has a pulldown resistor, setting the converter up for the 2Vp-p range. Tying the RSEL pin to a logic HIGH potential (+5V) will switch the converter into the 3Vp-p range operation. This can be easily accomplished on the demostration board by closing the RSEL solder switch. Buffered Input The demonstration board offers the option for a second buffered input. If this configuration is desired, several components have to be added to the board (e.g., a buffer amplifier such as the OPA642 and its surrounding compo- ® DEM-ADS807E 2 CLOCK The DEM-ADS807E requires an external TTL clock applied at SMA connector J1. This input represents a 50Ω load to the source. In order to preserve the specified performance of the ADS807E converter, the clock source should feature a very low jitter. This is particularly important if the converter is to be evaluated in an undersampling condition. The ADS807E can accept logic HIGH levels as low as +2.7V. For best performance results, a +3V logic HIGH voltage with rise and fall times of 1µs should be used. DATA OUTPUT The data output is provided at CMOS logic levels. The ADS807E uses Straight Offset Binary coding. The data output pins of the converter are buffered from the I/O connector, CN1, by two CMOS octal buffer (FCT541). PC BOARD LAYOUT The DEM-ADS807E demonstration board consists of a four-layer PC board. To achieve the highest level of performance, surface-mount components are used wherever possible. This reduces the trace length and minimizes the effects of parasitic capacitance and inductance. The A/D converter is treated like an analog component. Therefore, the demonstration board has one consistent ground plane. Keep in mind that this approach may not necessarily yield optimum performance results when designing the ADS807E into different individual applications. In any case, thoroughly bypassing the power supply and reference pins of the converter, as demonstrated on the evaluation board, is strongly recommended. EXTERNAL REFERENCE The ADS807E can be operated with an external reference. For this, solder switch ‘INT/EXT’ must be opened disabling the internal references. Close solder switches JP3 and JP4 and apply the external reference voltage at connector P3. The selected reference voltage determines the full-scale input signal range of converter. However, the specified range for external reference voltages should be observed (see the ADS807 data sheet for details). ® 3 DEM-ADS807E FIGURE 1. DEM-ADS807E Circuit Schematic. ® DEM-ADS807E 4 VINSE J2 VINDIFF J3(1) C37(1) 0.1µF R12(1) R6 66.5Ω R7(1) 49.9Ω C36(1) R10(1) 402Ω C4 10µF + C3 0.1µF + C25(1) 2.2µF C24(1) 0.1µF 2 R9 0Ω OPA642N 1 –5V U4(1) 1 +5V VDRV C42(1) 0.1µF R11(1) 402Ω C26(1) 0.1µF 5 4 3 2 R31(1) 0Ω C27(1) 2.2µF + VDD 3 + C2 10µF C1 0.1µF P1 R19 0Ω C38 0.1µF R13 200Ω R17 402Ω J4 DIFF. IN R15 0Ω R8 49.9Ω 3 +5V C41(1) 0.1µF C8 10µF + C7 0.1µF R14 402Ω 2 2 R20A(1) + C33 2.2µF 1 –5V U6 1 +5V –5V U5 C44 0.1µF OPA642N C32 0.1µF 3 C34 0.1µF 5 4 C35 2.2µF + R18 402Ω + C29(1) 2.2µF C28(1) 0.1µF 3 OPA642N C30 0.1µF 5 4 +5V C46 0.1µF C6 10µF + C5 0.1µF C43 0.1µF 4 3 6 5 C31 2.2µF + 1 –5V 2 1 T1 TT1-6 2 P2 C39 0.1µF R16 24.9Ω R26(1) 24.9Ω R20B 0Ω R25 1.82kΩ R24 1.82kΩ R21 24.9Ω R29(1) R27(1) 0Ω R28(1) 24.9Ω 0.1µF C40 REFT 3 2 JP4 VDRV R30(1) R23 1.82kΩ VDD VDD C45 + 10µF C14 + 10µF C12 + 10µF OE C21 + 2.2µF C20 0.1µF C18 0.1µF C17 100pF INT/EXT OTR RSEL C10 2.2µF C19 + 2.2µF JP3 REFB REFT R22 1.82kΩ REFB 1 P3(1) 28 27 26 25 C16 100pF 24 C15 0.1µF 23 C13 0.1µF 22 C11 0.1µF 21 20 19 18 17 16 C9 0.1µF 15 VDRV +VS GND IN IN CM REFT REFB GND OE INT/EXT OTR RSEL +VS CLK GND (MSB) B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 (LSB) B12 U1 ADS807E 07 06 05 04 03 02 01 00 D7 D6 D5 D4 D3 D2 D1 D0 OEB OEA 20 O7 O6 O5 O4 O3 O2 O1 O0 11 12 13 14 15 16 17 18 GND 10 VCC 11 12 13 14 15 16 17 18 GND 10 VCC U2 IDT74FCT541T D7 D6 D5 D4 D3 D2 D1 D0 OEB OEA 20 L1(1) U3 IDT74FCT541T +5V VDD L2 0.3µH NOTE: (1) Part not assembled. 9 2 1 8 7 4 3 6 5 4 3 2 19 5 6 7 8 9 R4 10kΩ 9 10 1 8 11 7 12 5 4 3 2 19 1 6 R2(1) 10kΩ R5 10kΩ R4(1) 10kΩ 13 14 ADS807E EVALUATION FIXTURE R1 49.9Ω J1 Clock Input C22 0.1µF C23 0.1µF 2 4 6 8 10 12 14 1 3 5 7 9 11 13 15 16 18 20 22 24 25 26 27 28 29 17 19 21 23 33 30 31 32 34 35 36 37 38 40 39 CN1 OE CN1 GND CN1 GND CN1 GND CN1 GND CN1 GND CN1 GND CN1 GND CN1 (MSB) B1 CN1 B2 CN1 B3 CN1 B4 CN1 B5 CN1 B6 CN1 B7 CN1 B8 CN1 GND CN1 GND CN1 GND CN1 GND CN1 GND CN1 GND CN1 GND CN1 GND CN1 GND CN1 GND CN1 B9 CN1 B10 CN1 B11 CN1 (LSB) B12 CN1 CLK CN1 GND CN1 GND CN1 GND CN1 GND CN1 GND CN1 GND CN1 GND CN1 GND CN1 GND FIGURE 2. Top Layer with Silk Screen. FIGURE 3. Power Plane. ® 5 DEM-ADS807E FIGURE 4. Ground Plane. FIGURE 5. Bottom Layer with Silk Screen. ® DEM-ADS807E 6 COMPONENT LIST REFERENCE QTY COMPONENT DESCRIPTION MANUFACTURER Burr-Brown U1 1 ADS807E High-Speed ADC, 28-Lead SSOP U2, U3 2 74FCT541 5V Octal Buffer, 20-Lead SOIC IDT U5, U6 2 OPA642 NB Wideband, Single Op Amp, SO-8 Burr-Brown R9, R19, R15, R20B 4 CRCW0805ZEROF 0Ω, MF 0805 Chip Resistor, 1% Dale R16, R21 2 CRCW0805245R9F 24.9Ω, MF 0805 Chip Resistor, 1% Dale R1, R8 2 CRCW080549R9F 49.9Ω, MF 0805 Chip Resistor, 1% Dale R6 1 CRCW080566R5F 66.5Ω, MF 0805 Chip Resistor, 1% Dale R13 1 CRCW08052000F 200Ω, MF 0805 Chip Resistor, 1% Dale R14, R17, R18 3 CRCW08054020F 402Ω, MF 0805 Chip Resistor, 1% Dale R22, R23, R24,R 25 4 CRCW08051821F 1.82kΩ, MF 0805 Chip Resistor, 1% Dale CRCW08051002F 10kΩ, MF 0805 Chip Resistor, 1% Dale R3, R5 2 R2, R4,R 7, R10, R11, R12, R20A, R26, R27, R28, R29, R30, R31 13 C2, C4, C6, C8, C12, C14, C45 7 T491B106M006AS 10µF, 6V, Size 3528 Tantalum Capacitor Kemet C10, C19, C21, C29, C31, C33, C35 7 T491A225M010AS 2.2µF, 10V, Size 3216 Tantalum Capacitor Kemet C1, C3, C5, C7, C9, C11, C13, C15, C18, C20, C22,C23, C28, C30, C32, C34, C38, C39, C40, C41, C43, C44, C46 23 08055C104KAT 0.1µF, 50V X7R 0805 Ceramic Capacitor AVX 08055C101KAT 100pF, 50V NP0 0805 Ceramic Capacitor AVX Not Assembled C16, C17 2 C24, C25, C26, C27, C36, C37, C42 7 L1 1 L1-1206B900R Ferrite Chip, 900Ω at100MHz Steward T1 1 T1-1T-KK81 RF Transformer Mini-Circuits Not Assembled P1, P2 2 ED555/3DS 3-Pin Term Block On-Shore Technology CN1 1 IDH-40LP-S3-TG 20 x 2 Dual-Row Shrouded Header Robinson-Nugent EF Johnson J1, J2, J4 3 142-0701-201 Straight SMA PCB Connector 4 1-SJ5003-0-N Rubber Feet, Black, 0.44 x 0.2 Digi-Key 1 PCB A2462 PC Board A2462, Rev. D Burr-Brown ® 7 DEM-ADS807E