Revised July 2001 FIN1031 3.3V LVDS 4-Bit High Speed Differential Driver General Description Features This quad driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350mV which provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed transfer of clock and data. ■ Greater than 400Mbs data rate The FIN1031 can be paired with its companion receiver, the FIN1032, or any other Fairchild LVDS receiver. ■ Meets or exceeds the TIA/EIA-644 LVDS standard ■ 3.3V power supply operation ■ 0.4ns maximum differential pulse skew ■ 2.0ns maximum propagation delay ■ Low power dissipation ■ Power OFF protection ■ Pin compatible with equivalent RS-422 and LVPECL devices ■ 16-Lead SOIC and TSSOP packages save space Ordering Code: Order Number Package Number FIN1031M M16A FIN1031MTC Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Function Table Connection Diagram Inputs Outputs EN EN DIN DOUT+ H X H H L H X L L H H X OPEN L H X L H H L X L L L H X L OPEN L H L H X Z Z H = HIGH Logic Level X = Don’t Care DOUT− L = LOW Logic Level Z = High Impedance Pin Descriptions Pin Name DIN1, DIN2, DIN3, DIN4 Description LVTTL Data Inputs DOUT1+, DOUT2+, DOUT3+, DOUT4+ Non-Inverting Driver Outputs DOUT1−, DOUT2−, DOUT3−, DOUT4− Inverting Driver Outputs EN Driver Enable Pin EN Inverting Driver Enable Pin VCC Power Supply GND Ground © 2001 Fairchild Semiconductor Corporation DS500507 www.fairchildsemi.com FIN1031 3.3V LVDS 4-Bit High Speed Differential Driver July 2001 FIN1031 Absolute Maximum Ratings(Note 1) Recommended Operating Conditions −0.5V to +4.6V Supply Voltage (VCC) DC Input Voltage (VIN) @VCC ≥ 3V −0.5V to +6V @VCC = 0V −0.5V to +4.6V Supply Voltage (VCC) 3.0V to 3.6V Input Voltage (VIN) 0 to VCC −40°C to +85°C Operating Temperature (TA) DC Output Voltage (VOUT) @VCC = 0V −0.5V to +4.6V Driver Short Circuit Current (IOSD) Storage Temperature Range (TSTG) Continuous −65°C to +150°C 150°C Max Junction Temperature (TJ) Lead Temperature (TL) (Soldering, 10 seconds) 260°C ESD (Human Body Model) ≥ 8000V Note 1: The “Absolute Maximum Ratings”: are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature and output/input loading variables. Fairchild does not recommend operation of circuits outside databook specification. ≥ 600V ESD (Machine Model) DC Electrical Characteristics Over supply voltage and operating temperature ranges, unless otherwise specified Symbol Parameter VOD Output Differential Voltage ∆VOD VOD Magnitude Change from Test Conditions Min 250 Differential LOW-to-HIGH RL = 100Ω, Driver Enabled, VOS Offset Voltage See Figure 1 ∆VOS Offset Magnitude Change from Typ Max (Note 2) 1.125 350 1.25 Differential LOW-to-HIGH Units 450 mV 25 mV 1.375 V 25 mV µA IOFF Power Off Output Current VCC = 0V, VOUT = 0V or 3.6V ±20 IOS Short Circuit Output Current VOUT = 0V, Driver Enabled −6 VOD = 0V, Driver Enabled ±6 mA VIH Input HIGH Voltage 2.0 VCC VIL Input LOW Voltage GND 0.8 V IIN Input Current VIN = 0V or VCC ±20 µA IOZ Disabled Output Leakage Current EN = 0.8V, EN = 2.0V ±20 µA ±20 µA VOUT = 0V or 4.7V II(OFF) Power-OFF Input Current VCC = 0V, VIN = 0V or 3.6V VIK Input Clamp Voltage IIK = −18 mA ICC Power Supply Current No Load, VIN = 0V or VCC, Driver Enabled −1.5 V V 3.2 5 RL = 100 Ω, Driver Disabled 3.2 5 RL = 100 Ω, VIN = 0V or VCC, Driver Enabled 17.9 25 mA CIN Input Capacitance 7 pF COUT Output Capacitance 4 pF Note 2: All typical values are at TA = 25°C and with VCC = 3.3V. www.fairchildsemi.com 2 Over supply voltage and operating temperature ranges, unless otherwise specified Symbol tPLHD Parameter Test Conditions Differential Propagation Delay LOW-to-HIGH tPHLD Differential Propagation Delay HIGH-to-LOW Min Typ Max (Note 3) Units 0.8 1.4 2.0 ns 0.8 1.4 2.0 ns tTLHD Differential Output Rise Time (20% to 80%) RL = 100 Ω, CL = 10 pF, 0.6 0.85 1.2 ns tTHLD Differential Output Fall Time (80% to 20%) See Figure 2 and Figure 3 (Note 7) 0.6 0.85 1.2 ns 0.4 ns 0.3 ns tSK(P) Pulse Skew |tPLH - tPHL| tSK(LH) Channel-to-Channel Skew tSK(HL) (Note 4) tSK(PP) Part-to-Part Skew (Note 5) fMAX Maximum Frequency (Note 6) tZHD Differential Output Enable Time from Z to HIGH 2.5 5.0 ns tZLD Differential Output Enable Time from Z to LOW RL = 100Ω, CL = 10 pF, 2.7 5.0 ns tHZD Differential Output Disable Time from HIGH to Z See Figure 4 and Figure 5 (Note 7) 3.2 5.0 ns tLZD Differential Output Disable Time from LOW to Z 3.4 5.0 ns 1.0 200 275 ns MHz Note 3: All typical values are at TA = 25°C and with VCC = 3.3V. Note 4: tSK(LH), tSK(HL) is the skew between specified outputs of a single device when the outputs have identical loads and are switching in the same direction. Note 5: tSK(PP) is the magnitude of the difference in propagation delay times between any specified terminals of two devices switching in the same direction (either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test circuits. Note 6: fMAX Criteria: Input tR = tF < 1 ns, 0V to 3V, 50% Duty Cycle; Output VOD > 250 mV, 45% to 55% Duty Cycle; all output channels switching in phase. Note 7: Test Circuits in Figure 2 and Figure 4 are simplified representations of test fixture and DUT loading. 3 www.fairchildsemi.com FIN1031 AC Electrical Characteristics FIN1031 Note A: All input pulses have frequency = 10 MHz, tR or tF = 1 ns Note B: C L includes all fixture and instrumentation capacitances FIGURE 1. Differential Driver DC Test Circuit FIGURE 2. Differential Driver Propagation Delay and Transition Time Test Circuit Note B: All input pulses have the frequency = 10 MHz, tR or tF = 1 ns Note A: C L includes all fixture and instrumentation capacitances FIGURE 4. Differential Driver Enable and Disable Test Circuit FIGURE 3. AC Waveforms FIGURE 5. Enable and Disable AC Waveforms www.fairchildsemi.com 4 FIN1031 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M16A 5 www.fairchildsemi.com FIN1031 3.3V LVDS 4-Bit High Speed Differential Driver Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 6