DS90LV011AH High Temperature 3V LVDS Differential Driver General Description Features The DS90LV011AH is an LVDS driver optimized for high data rate and low power applications. The DS90LV011AH is a current mode driver allowing power dissipation to remain low even at high frequency. In addition, the short circuit fault current is also minimized. The device is designed to support data rates in excess of 400Mbps (200MHz) utilizing Low Voltage Differential Signaling (LVDS) technology. n n n n n n n n n n n n The device is offered in a 5-lead small outline transistor package. The LVDS outputs have been arranged for easy PCB layout. The differential driver outputs provide low EMI with its typical low output swing of 350 mV. The DS90LV011AH can be paired with its companion single line receiver, the DS90LT012AH, or with any of National’s LVDS receivers, to provide a high-speed LVDS interface. -40˚C to 125˚C operating temperature range Conforms to TIA/EIA-644-A Standard > 400Mbps (200MHz) switching rates 700 ps (100 ps typical) maximum differential skew 1.5 ns maximum propagation delay Single 3.3V power supply ± 350 mV differential signaling Power Off Protection (outputs in TRI-STATE) Pinout simplifies PCB layout Low power dissipation (23 mW @ 3.3V typical) SOT-23 5-lead package Pin compatible with SN65LVDS1 Connection Diagram 20161522 (Top View) Order Number DS90LV011AHMF See NS Package Number MF05A Functional Diagram 20161502 © 2005 National Semiconductor Corporation DS201615 www.national.com DS90LV011AH High Temperature 3V LVDS Differential Driver September 2005 DS90LV011AH Absolute Maximum Ratings (Note 1) Maximum Junction Temperature If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VDD) +150˚C ESD Ratings ≥ 9kV HBM (1.5 kΩ, 100 pF) EIAJ (0 Ω, 200 pF) −0.3V to +4V ≥ 900V LVCMOS input voltage (TTL IN) −0.3V to +3.6V CDM (0 Ω, 0 pF) LVDS output voltage (OUT ± ) −0.3V to +3.9V IEC direct (330 Ω, 150 pF) LVDS output short circuit current MF Package Recommended Operating Conditions 902 mW 7.22 mW/˚C above +25˚C Thermal resistance (θJA) Min Typ Max Units Supply Voltage (VDD) 3.0 3.3 3.6 V Temperature (TA) −40 +25 +125 ˚C 138.5˚C/Watt Storage Temperature ≥ 4kV 24mA Maximum Package Power Dissipation @ +25˚C Derate MF Package ≥ 2000V −65˚C to +150˚C Lead Temperature Range Soldering (4 sec.) +260˚C Electrical Characteristics Over Supply Voltage and Operating Temperature ranges, unless otherwise specified. (Notes 2, 3, 8) Symbol Parameter |VOD| Output Differential Voltage ∆VOD VOD Magnitude Change Conditions RL = 100Ω (Figure 1 and Figure 2) Pin Min Typ Max Units OUT+, OUT− 250 350 450 mV 3 35 mV 1.125 1.22 1.375 V 0 1 25 mV VOS Offset Voltage ∆VOS Offset Magnitude Change RL = 100Ω (Figure 1) IOFF Power-off Leakage VOUT = 3.6V or GND, VDD = 0V ±1 ± 10 µA IOS Output Short Circuit Current (Note 4) VOUT+ and VOUT− = 0V −6 −24 mA IOSD Differential Output Short Circuit Current (Note 4) VOD = 0V −5 −12 mA COUT Output Capacitance VIH Input High Voltage VIL Input Low Voltage 3 TTL IN IIH Input High Current VIN = 3.3V or 2.4V IIL Input Low Current VIN = GND or 0.5V VCL Input Clamp Voltage ICL = −18 mA CIN Input Capacitance IDD Power Supply Current No Load 2.0 VDD V GND 0.8 V ± 10 ± 10 µA ±2 ±1 −1.5 VIN = VDD or GND pF µA −0.6 V 3 pF VDD RL = 100Ω 5 8 mA 7 10 mA Switching Characteristics Over Supply Voltage and Operating Temperature Ranges, unless otherwise specified. (Notes 3, 5, 6, 7) Min Typ Max Units tPHLD Symbol Differential Propagation Delay High to Low Parameter RL = 100Ω, CL = 15 pF Conditions 0.3 1.0 1.5 ns tPLHD Differential Propagation Delay Low to High (Figure 3 and Figure 4) 0.3 1.1 1.5 ns tSKD1 Differential Pulse Skew |tPHLD − tPLHD| (Note 9) 0 0.1 0.7 ns tSKD3 Differential Part to Part Skew (Note 10) 0 0.2 1.0 ns tSKD4 Differential Part to Part Skew (Note 11) 0 0.4 1.2 ns tTLH Transition Low to High Time 0.2 0.5 1.0 ns tTHL Transition High to Low Time 0.2 0.5 1.0 fMAX Maximum Operating Frequency (Note 12) 200 250 ns MHz Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation. Note 2: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except VOD. Note 3: All typicals are given for: VDD = +3.3V and TA = +25˚C. www.national.com 2 (Continued) Note 4: Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only. Note 5: These parameters are guaranteed by design. The limits are based on statistical analysis of the device performance over PVT (process, voltage, temperature) ranges. Note 6: CL includes probe and fixture capacitance. Note 7: Generator waveform for all tests unless otherwise specified: f = 1 MHz, ZO = 50Ω, tr ≤ 1 ns, tf ≤ 1 ns (10%-90%). Note 8: The DS90LV011AH is a current mode device and only function with datasheet specification when a resistive load is applied to the drivers outputs. Note 9: tSKD1, |tPHLD − tPLHD|, is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the same channel. Note 10: tSKD3, Differential Part to Part Skew, is defined as the difference between the minimum and maximum specified differential propagation delays. This specification applies to devices at the same VDD and within 5˚C of each other within the operating temperature range. Note 11: tSKD4, part to part skew, is the differential channel to channel skew of any event between devices. This specification applies to devices over recommended operating temperature and voltage ranges, and across process distribution. tSKD4 is defined as |Max − Min| differential propagation delay. Note 12: fMAX generator input conditions: tr = tf < 1 ns (0% to 100%), 50% duty cycle, 0V to 3V. Output criteria: duty cycle = 45%/55%, VOD > 250mV. The parameter is guaranteed by design. The limit is based on the statistical analysis of the device over the PVT range by the transitions times (tTLH and tTHL). Parameter Measurement Information 20161503 FIGURE 1. Differential Driver DC Test Circuit 20161524 FIGURE 2. Differential Driver Full Load DC Test Circuit 20161504 FIGURE 3. Differential Driver Propagation Delay and Transition Time Test Circuit 3 www.national.com DS90LV011AH Switching Characteristics DS90LV011AH Parameter Measurement Information (Continued) 20161505 FIGURE 4. Differential Driver Propagation Delay and Transition Time Waveforms Application Information TABLE 1. Device Pin Descriptions Package Pin Number SOT23 www.national.com Pin Name Description 5 TTL IN LVTTL/LVCMOS driver input pins 4 OUT+ Non-inverting driver output pin 3 OUT− Inverting driver output pin 2 GND Ground pin 1 VDD Power supply pin, +3.3V ± 0.3V NC No connect 4 DS90LV011AH High Temperature 3V LVDS Differential Driver Physical Dimensions inches (millimeters) unless otherwise noted 5-Lead SOT23, JEDEC MO-178, 1.6mm Order Number DS90LV011AHMF NS Package Number MF05A National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. For the most current product information visit us at www.national.com. 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