19-2656; Rev 1; 1/03 µP Reset Circuits with Long Manual Reset Setup Period The MAX6443–MAX6452 low-current microprocessor reset circuits feature single or dual manual reset inputs with an extended 6.72s setup period. Because of the extended setup period, short switch closures (nuisance resets) are ignored. On all devices, the reset output asserts when any of the monitored supply voltages drops below its specified threshold. The reset output remains asserted for the reset timeout period (210ms typ) after all monitored supplies exceed their reset thresholds. The reset output is one-shot pulse asserted for the reset timeout period (140ms min) when selected manual reset input(s) are held low for an extended setup timeout period of 6.72s. These devices ignore manual reset transitions of less than 6.72s (typ). The MAX6443–MAX6448 are single fixed-voltage µP supervisors. The MAX6443/MAX6444 have a single extended manual reset input. The MAX6445/MAX6446 have two extended manual reset inputs. The MAX6447/ MAX6448 have one extended and one immediate manual reset input. The MAX6449–MAX6452 have one fixed-threshold µP supervisor and one adjustable-threshold µP supervisor. The MAX6449/MAX6450 have two delayed manual reset inputs. The MAX6451/MAX6452 have one delayed and one immediate manual reset input. The MAX6443–MAX6452 have an active-low RESET with push-pull or open-drain output logic options. These devices, offered in small SOT packages, are fully guaranteed over the extended temperature range (-40°C to +85°C). Applications Set-Top Boxes Consumer Electronics Features ♦ Single- or Dual-Supply Voltage Monitors ♦ Precision Factory-Set Reset Thresholds from 1.6V to 4.6V ♦ Adjustable Threshold to Monitor Voltages Down to 0.63V (MAX6449–MAX6452) ♦ Single or Dual Manual Reset Inputs with Extended 6.72s Setup Period ♦ Optional Short Setup Time Manual Reset Input (MAX6447/MAX6448 and MAX6451/MAX6452) ♦ Immune to Short Voltage Transients ♦ Low 6µA Supply Current ♦ Guaranteed Valid Reset Down to VCC = 1.0V ♦ Active-Low RESET (Push-Pull or Open-Drain) Outputs ♦ 140ms (min) Reset Timeout Period ♦ Small SOT143 and SOT23 Packages Ordering Information PART TEMP RANGE PIN-PACKAGE MAX6443 US_ _L -T -40°C to +85°C 4 SOT143-4 MAX6444 US_ _L -T -40°C to +85°C 4 SOT143-4 Note: The “_ _ ” is a placeholder for the threshold voltage level of the devices. A desired threshold level is set by the two-number suffix found in Table 1. All devices are available in tapeand-reel only. There is a 2500-piece minimum order increment for standard versions (Table 2). Sample stock is typically held on standard versions only. Nonstandard versions require a minimum order increment of 10,000 pieces. Contact factory for availability. DVD Players Modems Pin Configurations MP3 Players Industrial Equipment Automotive TOP VIEW 4 VCC GND 1 Medical Devices MAX6443 MAX6444 3 MR1 RESET 2 SOT143 Pin Configurations continued at end of data sheet. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX6443–MAX6452 General Description MAX6443–MAX6452 µP Reset Circuits with Long Manual Reset Setup Period ABSOLUTE MAXIMUM RATINGS All Voltages Referenced to GND VCC ..........................................................................-0.3V to +6V Open-Drain RESET ..................................................-0.3V to +6V Push-Pull RESET ........................................-0.3V to (VCC + 0.3V) MR1, MR2, MR2, RSTIN ..........................................-0.3V to +6V Input Current, All Pins.......................................................±20mA Continuous Power Dissipation (TA = +70°C) 4-Pin SOT143-4 (derate 4.0mW/°C above +70°C) .....320mW 5-Pin SOT23-5 (derate 7.1mW/°C above +70°C) .......571mW 6-Pin SOT23-6 (derate 8.7mW/°C above +70°C) .......696mW Operating Temperature Range .......................... -40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = 1.0V to 5.5V, TA = -40°C to +85°C, unless otherwise specified. Typical values are at TA = +25°C.) (Note 1) PARAMETER Operating Voltage Range VCC Supply Current VCC Reset Threshold SYMBOL CONDITIONS VCC ICC VTH MIN 1.0 5.5 V 20 VCC = 3.6V, no load 6 16 46 4.50 4.63 4.75 44 4.25 4.38 4.50 31 3.00 3.08 3.15 29 2.85 2.93 3.00 26 2.55 2.63 2.70 23 2.25 2.32 2.38 22 2.12 2.19 2.25 17 1.62 1.67 1.71 16 1.52 1.58 1.62 60 MAX6449–MAX6452 RSTIN Threshold Hysteresis VHYST MAX6449–MAX6452 RSTIN Input Current IRSTIN MAX6449–MAX6452 TA = 0°C to +85°C 0.615 TA = -40°C to +85°C 0.610 Reset Timeout Period tRP VCC to RESET Output Delay tRD 2.5 MR1 Minimum Setup Period Pulse Width tMR 140 MAX6445/MAX6446/MAX6449/MAX6450 210 V mV +25 15 VCC falling at 1mV/µs V mV 0.645 0.650 -25 MAX6449–MAX6452, VRSTIN falling at 1mV/µs RSTIN to Reset Output Delay 0.630 µA ppm/°C 2 × VTH VTH-RSTIN 2 UNITS 7 Reset Threshold Hysteresis MR1 + MR2 Minimum Setup Period Pulse Width MAX VCC = 5.5V, no load Reset Threshold Tempco RSTIN Threshold TYP nA µs 280 20 ms µs 4.48 6.72 8.96 s 4.48 6.72 8.96 s _______________________________________________________________________________________ µP Reset Circuits with Long Manual Reset Setup Period (VCC = 1.0V to 5.5V, TA = -40°C to +85°C, unless otherwise specified. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MR2 Minimum Setup Period Pulse Width MAX6447/MAX6448/MAX6451/MAX6452 MR2 Glitch Rejection MAX6447/MAX6448/MAX6451/MAX6452 100 MR2 to RESET Delay MAX6447/MAX6448/MAX6451/MAX6452 200 Manual Reset Timeout Period 1 tMRP MR1 to VCC Pullup Impedance MR2 to VCC Pullup Impedance RESET Output Low (Open Drain or Push-Pull) RESET Output High (Push-Pull) MAX6445/MAX6446/MAX6449/MAX6450 VOL VOH RESET Open-Drain Leakage Current ILKG MR1, MR2, MR2 Input Low Voltage VIL MR1, MR2, MR2 Input High Voltage VIH MAX UNITS µs ns ns 140 210 280 ms 25 50 75 kΩ 25 50 75 kΩ VCC ≥ 1.00V, ISINK = 50µA, RESET asserted 0.3 VCC ≥ 1.20V, ISINK = 100µA, RESET asserted 0.3 VCC ≥ 2.55V, ISINK = 1.2mA, RESET asserted 0.3 VCC ≥ 4.25V, ISINK = 3.2mA, RESET asserted 0.4 V VCC ≥ 1.80V, ISOURCE = 200µA, RESET deasserted 0.8 × VCC VCC ≥ 3.15V, ISOURCE = 500µA, RESET deasserted 0.8 × VCC VCC ≥ 4.75V, ISOURCE = 800µA, RESET deasserted 0.8 × VCC RESET deasserted V 1 0.3 × VCC 0.7 × VCC µA V V Note 1: Devices production tested at +25°C. Overtemperature limits are guaranteed by design. _______________________________________________________________________________________ 3 MAX6443–MAX6452 ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (VCC = 3.3V, TA = +25°C, unless otherwise noted.) 6 5 4 TA = -40°C 3 2 1 1.03 1.02 1.01 1.00 0.99 0.98 250 0.97 MAX6443/52 toc03 1.04 TRANSIENT DURATION (µs) TA = +25°C 7 1.05 MAX6443/52 toc02 TA = +85°C NORMALIZED TIMEOUT PERIOD 200 150 RESET OCCURS ABOVE THE CURVE 100 50 VTH = 4.4V 0.96 0 0.95 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0 -15 -40 10 SUPPLY VOLTAGE (V) 35 60 85 1.01 1.00 0.99 0.98 0.97 23.2 22.8 22.4 22.0 21.6 21.2 10 35 60 23.2 22.4 22.0 21.6 21.2 20.8 20.4 20.0 -40 -15 10 TEMPERATURE (°C) 35 60 85 -40 -15 TEMPERATURE (°C) MANUAL RESET TO RESET DELAY (MAX6445/MAX6446/MAX6449/MAX6450) MAX6443/52 toc07 10 35 TEMPERATURE (°C) VCC TO RESET DELAY MAX6443/52 toc08 VCC = 5V MR1 (5V/div) VCC = 4.5V VTH = 4.392V VCC (100mV/div) VCC = 4.3V MR2 (5V/div) RESET (5V/div) TIME (1s/div) 4 1000 22.8 20.4 85 RSTIN FALLING AT 1mV/µs 23.6 20.8 20.0 -15 800 24.0 RSTIN TO RESET DELAY (µs) 1.02 VCC = FALLING AT 1mV/µs 23.6 600 RSTIN TO RESET DELAY vs. TEMPERATURE (RSTIN FALLING) 24.0 VCC TO RESET DELAY (µs) MAX6443/52 toc04 1.03 400 RESET THRESHOLD OVERDRIVE (mV) VCC TO RESET DELAY vs. TEMPERATURE NORMALIZED VCC RESET THRESHOLD vs. TEMPERATURE -40 200 0 TEMPERATURE (°C) MAX6443/52 toc05 SUPPLY CURRENT (µA) MAX6443/52 toc01 9 8 MAXIMUM TRANSIENT DURATION vs. RESET THRESHOLD OVERDRIVE NORMALIZED RESET TIMEOUT PERIOD vs. TEMPERATURE MAX6443/52 toc06 SUPPLY CURRENT vs. SUPPLY VOLTAGE NORMALIZED VCC RESET THRESHOLD MAX6443–MAX6452 µP Reset Circuits with Long Manual Reset Setup Period RESET (2V/div) TIME (100µs/div) _______________________________________________________________________________________ 60 85 µP Reset Circuits with Long Manual Reset Setup Period PIN MAX6443 MAX6444 MAX6445 MAX6446 MAX6447 MAX6448 MAX6449 MAX6450 MAX6451 MAX6452 NAME 1 2 2 2 2 GND 2 3 1 — 1 3 1 — 1 RESET 3 MR1 — 3 — 3 — 4 4 4 4 4 FUNCTION Ground Active-Low Push-Pull or Open-Drain Output. RESET changes from high to low when VCC or RSTIN drops below its selected reset threshold and remains low for the 210ms reset timeout period after all monitored power-supply inputs exceed their selected reset thresholds. RESET is one-shot pulsed low for the reset timeout period (140ms min) after selected manual reset inputs are asserted longer than the specified setup period. For the open-drain output, use a minimum 20kΩ pullup resistor to VCC . Manual Reset Input, Active Low. Internal 50kΩ pullup to VCC. Pull MR1 low for the typical input pulse width (6.72s) to one-shot pulse RESET for the reset timeout period. Manual Reset Input, Active Low. Pull both MR1 and MR2 low for the typical input pulse width (6.72s) to oneshot pulse RESET for the reset timeout period. VCC VCC Voltage Input. Power supply and input for the primary microprocessor voltage reset monitor. — 5 — 6 — MR2 Manual Reset Input, Active Low. Internal 50kΩ pullup to VCC. Pull both MR1 and MR2 low for the typical input pulse width (6.72s) to one-shot pulse RESET for the reset timeout period. — — 5 — 6 MR2 Manual Reset Input. Pull the MR2 high to immediately one-shot pulse RESET for the reset timeout period. — — — 5 5 Detailed Description Reset Output The reset output is typically connected to the reset input of a microprocessor (µP). A µP’s reset input starts or restarts the µP in a known state. The MAX6443– MAX6452 µP supervisory circuits provide the reset logic to prevent code-execution errors during powerup, power-down and brownout conditions (see the Typical Operating Circuit). RESET changes from high to low whenever the monitored voltages (RSTIN or VCC) drop below the reset RSTIN Reset Input. High-impedance input to the adjustable reset comparator. Connect RSTIN to the center point of an external resistor-divider to set the threshold of the externally monitored voltage. threshold voltages. Once VRSTIN and VCC exceed their respective reset threshold voltages, RESET remains low for the reset timeout period and then goes high. RESET is one-shot pulsed whenever selected manual reset inputs are asserted. RESET stays asserted for the normal reset timeout period (140ms min). RESET is guaranteed to be in the proper output logic state for VCC inputs ≥ 1V. For applications requiring valid reset logic when VCC is less than 1V, see the Ensuring a Valid RESET Output Down to VCC = 0V section. _______________________________________________________________________________________ 5 MAX6443–MAX6452 Pin Description MAX6443–MAX6452 µP Reset Circuits with Long Manual Reset Setup Period Manual Reset Input Options Unlike typical manual reset functions associated with supervisors, each device in the MAX6443–MAX6452 family includes at least one manual reset input, which must be held logic-low for an extended setup period (6.72s typ) before the RESET output asserts. When valid manual reset input conditions/setup periods are met, the RESET output is one-shot pulse asserted low for a fixed reset timeout period (140ms min). Existing front-panel pushbutton switches (i.e., power on/off, channel up/down, or mode select) can be used to drive the manual reset inputs. The extended manual reset setup period prevents nuisance system resets during normal front-panel usage or resulting from inadvertent short-term pushbutton closure. The MAX6443/MAX6444, MAX6447/MAX6448, and MAX6451/MAX6452 include a single manual reset input with extended setup period (MR1). The MAX6445/ MAX6446 and MAX6449/MAX6450 include two manual reset inputs (MR1 and MR2) with extended setup periods. For dual MR1, MR2 devices, both inputs must be held low simultaneously for the extended setup period (6.72s typ) before the reset output is pulse asserted. The dual extended setup provides greater protection from nuisance resets. (For example, the user or service technician is informed to simultaneously push both the on/off button and the channel-select button for 6.72s to reset the system.) The MAX6443–MAX6452 RESET output is pulse asserted once for the reset timeout period after each valid manual reset input condition. At least one manual reset input must be released (go high) and then be driven low for the extended setup period before RESET asserts again. Internal timing circuitry debounces low-to-high manual reset logic transitions, so no external circuitry is required. Figure 1 illustrates the single manual reset function of the MAX6443/MAX6444 single-voltage monitors, and Figure 2 represents the dual manual reset function of the MAX6445/MAX6446 and MAX6449/MAX6450. The MAX6447/MAX6448 and MAX6451/MAX6452 include both an extended setup period and immediate setup period manual reset inputs. A low-to-high MR2 rising edge transition immediately pulse asserts the RESET output for the reset timeout period (140ms min). If the MAX6447/MAX6448 and MAX6451/MAX6452 MR2 input senses another rising edge before the end of the 140ms timeout period (Figure 3), the internal timer clears and begins counting again. If no rising edges are detected within the 210ms timeout period, RESET deasserts. The high-to-low transition on MR2 input is internally debounced for 210ms to ensure that 6 RESET TIMEOUT PERIOD 210ms MR1 SETUP PERIOD 6.72s MR1 RESET Figure 1. MAX6443/MAX6444 Manual Reset Timing Diagram 210ms MR1 6.72s MR2 RESET Figure 2. MAX6445/MAX6446/MAX6449/MAX64450 Manual Reset Timing Diagram there are no false RESET assertions when MR2 is driven from high to low (Figure 4). The MR2 input can be used for system test purposes or smart-card-detect applications (see the Applications Information section). Adjustable Input Voltage (RSTIN) The MAX6449–MAX6452 monitor the voltage on RSTIN using an adjustable reset threshold set with an external resistor voltage-divider (Figure 5). Use the following formula to calculate the externally monitored voltage (VMON-TH): VMON-TH = VTH-RSTIN ✕ (R1+ R2) / R2 where VMON-TH is the desired reset threshold voltage and V TH-RSTIN is the reset input threshold (0.63V). Resistors R1 and R2 can have very high values to minimize current consumption because of low leakage currents. Set R2 to some conveniently high value (250kΩ, for example), and calculate R1 based on the desired reset threshold voltage, using the following formula: R1 = R2 ✕ (VMON-TH / VTH-RSTIN - 1) Ω _______________________________________________________________________________________ µP Reset Circuits with Long Manual Reset Setup Period MAX6443–MAX6452 t < 210ms COUNTER RESET 210ms DEBOUNCING PERIOD t = 210ms POSITIVE EDGE MR2 210ms TIMEOUT PERIOD MR2 NO RESET OUTPUT ASSERTED RESET RESET Figure 3. MAX6447/MAX6448/MAX6451/MAX6452 MR2 Assertion DebouncingTiming Diagram VCC VMON_TH MAX6449 MAX6451 R1 RSTIN Figure 4. MAX6447/MAX6448/MAX6451/MAX6452 MR2 Deassertion Debouncing Timing Diagram +3.3V VCC VCC RESET RESET VCC µP MAX6443 R2 LED GND RESET GND MR1 NMI VMON_TH = 0.63 x (R1 + R2) / R2 Figure 5. Calculating the Monitored Threshold Voltages Applications Information PUSHBUTTON SWITCH: CLOSE FOR < 4.48s FOR SYSTEM INTERRUPT; CLOSE FOR > 6.72s FOR SYSTEM RESET Interrupt Before Reset To minimize data loss and speed system recovery, many applications interrupt the processor or reset only portions of the system before a processor hard reset is asserted. The extended setup time of the MAX6443– MAX6452 manual reset inputs allows the same pushbutton (connected to both the processor interrupt and the extended MR1 input, as shown in Figure 6) to control both the interrupt and hard reset functions. If the pushbutton is closed for less than 6.72s, the processor is only interrupted. If the system still does not respond properly, the pushbutton (or two buttons for the dual manual reset) can be closed for the full extended setup period to hard reset the processor. If desired, connect an LED to the RESET output to blink off (or on) for the reset timeout period to signify when the pushbutton is Figure 6. Interrupt Before Reset Application Circuit closed long enough for a hard reset (the same LED might be used as the front-panel power-on display). Smart Card Insertion/Removal The MAX6447/MAX6448/MAX6451/MAX6452 dual manual resets are useful in applications in which both an extended and immediate setup periods are needed. Figure 7 illustrates the insertion and removal of a smart card. MR1 monitors a front-panel pushbutton. When closed for 6.72s, RESET one-shot pulses low for 140ms min. Because MR1 is internally pulled to VCC through a 50kΩ resistor, the front-panel switch can be connected to _______________________________________________________________________________________ 7 MAX6443–MAX6452 µP Reset Circuits with Long Manual Reset Setup Period +3.3V 3.3V 5V +1.5V CORE SUPPLY I/O SUPPLY VCC VCC RESET RESET µP MAX6451 RSTIN MR1 DIGITAL INPUT MAX6444 MAX6446 MAX6448 MAX6450 MAX6452 100kΩ RESET MR2 GND µP RESET N SMART CARD DETECT: IMMEDIATE ONE-SHOT WHEN MANUAL RESET CLOSES GND FRONT-PANEL SWITCH STANDARD µP INPUT AND 6.72s MANUAL RESET DELAY Figure 7. MAX6451/MAX6452 Application Circuit a microprocessor for general-purpose I/O control. MR2 monitors a switch to detect when a smart card is inserted. When the switch is closed high (card inserted), RESET one-shot pulses low for 140ms. MR2 is internally debounced for 210ms to prevent false resets when the smart card is removed. Interfacing to Other Voltages for Logic Compatibility The open-drain RESET output can be used to interface to a µP with other logic levels. As shown in Figure 8, the open-drain output can be connected to voltages from 0 to 6V. Generally, the pullup resistor connected to the RESET connects to the supply voltage that is being monitored at the IC’s VCC pin. However, some systems may use the open-drain output to level-shift from the monitored supply to reset circuitry powered by some other supply (Figure 8). Keep in mind that as the supervisor’s VCC decreases toward 1V, so does the IC’s ability to sink current at RESET. RESET is pulled high as VCC decays toward 0. The voltage where this occurs depends on the pullup resistor value and the voltage to which it is connected. 8 Figure 8. Interfacing to Other Voltage Levels Ensuring a Valid RESET Down to VCC = 0V (Push-Pull RESET) When VCC falls below 1V, RESET current-sinking capabilities decline drastically. The high-impedance CMOSlogic inputs connected to RESET can drift to undetermined voltages. This presents no problems in most applications, because most µPs and other circuitry do not operate with VCC below 1V. In applications in which RESET must be valid down to 0V, add a pulldown resistor between RESET and GND for the push-pull outputs. The resistor sinks any stray leakage currents, holding RESET low (Figure 9). The value of the pulldown resistor is not critical; 100kΩ is large enough not to load RESET and small enough to pull RESET to ground. The external pulldown cannot be used with the open-drain reset outputs. Transient Immunity In addition to issuing a reset to the µP during power-up, power-down, and brownout conditions, these supervisors are relatively immune to short-duration falling transients (glitches). The graph Maximum Transient Duration vs. Reset Threshold Overdrive in the Typical Operating Characteristics section shows this relationship. _______________________________________________________________________________________ µP Reset Circuits with Long Manual Reset Setup Period MAX6443 MAX6445 MAX6447 MAX6449 MAX6451 PART NO. SUFFIX (__) VCC NOMINAL VOLTAGE THRESHOLD (V) 46 4.625 44 4.375 31 3.075 29 2.925 26 2.625 23 2.313 22 2.188 17 1.665 16 1.575 VCC RESET 100kΩ GND Figure 9. Ensuring RESET Valid to VCC = 0 The area below the curves of the graph is the region in which these devices typically do not generate a reset pulse. This graph was generated using a falling pulse applied to VCC, starting above the actual reset threshold (VTH) and ending below it by the magnitude indicated (reset threshold overdrive). As the magnitude of the transient increases (VCC goes further below the reset threshold), the maximum allowable pulse width decreases. Typically, a VCC transient that goes 100mV below the reset threshold and lasts 20µs or less does not cause a reset pulse to be asserted. Chip Information TRANSISTOR COUNT: 1384 PROCESS: BiCMOS MAX6443–MAX6452 Table 1. Reset Voltage Threshold VCC Table 2. Standard Versions Table PART TOP MARK PART TOP MARK MAX6443US16L KAFW MAX6448UK16L AEER MAX6443US23L KAFX MAX6448UK23L AEES MAX6443US26L KAFY MAX6448UK26L AEET MAX6443US29L KAFK MAX6448UK29L AEEU MAX6443US46L KAFZ MAX6448UK46L AEEV MAX6444US16L KAGA MAX6449UT16L ABEL MAX6444US23L KAGB MAX6449UT23L ABNP MAX6444US26L KAGC MAX6449UT26L ABNQ MAX6444US29L KAGD MAX6449UT29L ABNR MAX6444US46L KAFL MAX6449UT46L ABNS MAX6445UK16L AEEF MAX6450UT16L ABEM MAX6445UK23L AEEG MAX6450UT23L ABNX MAX6445UK26L AEEH MAX6450UT26L ABNY MAX6445UK29L AEEI MAX6450UT29L ABNZ MAX6445UK46L AEAO MAX6450UT46L ABOA MAX6446UK16L AEEN MAX6451UT16L ABNT MAX6446UK23L AEEO MAX6451UT23L ABEN MAX6446UK26L AEEP MAX6451UT26L ABNU MAX6446UK29L AEAP MAX6451UT29L ABNV MAX6446UK46L AEEQ MAX6451UT46L ABNW MAX6447UK16L AEEJ MAX6452UT16L ABOB MAX6447UK23L AEEK MAX6452UT23L ABOC MAX6447UK26L AEAQ MAX6452UT26L ABOD MAX6447UK29L AEEL MAX6452UT29L ABOE MAX6447UK46L AEEM MAX6452UT46L ABOF _______________________________________________________________________________________ 9 µP Reset Circuits with Long Manual Reset Setup Period MAX6443–MAX6452 Pin Configurations (continued) TOP VIEW RESET 1 GND 2 5 MR2 MAX6445 MAX6446 MR1 3 RESET 1 GND 2 4 VCC GND 2 MAX6449 MAX6450 MR1 3 MR2 4 VCC 6 MR2 5 RSTIN 4 VCC MAX6447 MAX6448 MR1 3 SOT23-5 RESET 1 5 SOT23-5 RESET 1 6 MR2 5 RSTIN GND 2 4 VCC MR1 3 MAX6451 MAX6452 SOT23-6 SOT23-6 Typical Operating Circuit Ordering Information (continued) PART TEMP RANGE PIN-PACKAGE MAX6445 UK_ _L -T -40°C to +85°C 5 SOT23-5 MAX6446 UK_ _L -T -40°C to +85°C 5 SOT23-5 MAX6447 UK_ _L -T -40°C to +85°C 5 SOT23-5 MAX6448 UK_ _L -T -40°C to +85°C 5 SOT23-5 MAX6449 UT_ _L -T -40°C to +85°C 6 SOT23-6 MAX6450 UT_ _L -T -40°C to +85°C 6 SOT23-6 MAX6451 UT_ _L -T -40°C to +85°C 6 SOT23-6 MAX6452 UT_ _L -T -40°C to +85°C 6 SOT23-6 Note: The “_ _ ” is a placeholder for the threshold voltage level of the devices. A desired threshold level is set by the two-number suffix found in Table 1. All devices are available in tapeand-reel only. There is a 2500-piece minimum order increment for standard versions (Table 2). Sample stock is typically held on standard versions only. Nonstandard versions require a minimum order increment of 10,000 pieces. Contact factory for availability. +3.3V VCC VCC µP MAX6444 MR1 RESET RESET GND GND RESET TIMEOUT PERIOD 210ms MR1 SETUP PERIOD 6.72s MR1 RESET 10 ______________________________________________________________________________________ µP Reset Circuits with Long Manual Reset Setup Period PART MR1 SETUP MR2 (NO SETUP) MR2 SETUP RSTIN PUSH-PULL RESET OPEN-DRAIN RESET MAX6443 6.72s — — — ✔ — MAX6444 6.72s — — — — ✔ MAX6445 6.72s — 6.72s — ✔ — MAX6446 6.72s — 6.72s — — ✔ MAX6447 6.72s ✔ — — ✔ — MAX6448 6.72s ✔ — — — ✔ MAX6449 6.72s — 6.72s ✔ ✔ — MAX6450 6.72s — 6.72s ✔ — ✔ MAX6451 6.72s ✔ — ✔ ✔ — MAX6452 6.72s ✔ — ✔ — ✔ *Other timing options may be available. Contact factory for availability. Functional Diagram VCC MAX6443– MAX6452 RESET TIMEOUT PERIOD (210ms typ) MAX6449– RSTIN MAX6452 VCC MANUAL RESET SETUP PERIOD (6.72s typ) 0.63V MR2 ONE-SHOT DEBOUNCE CIRCUIT 1.23V VCC GND RESET MR2 MAX6447 MAX6448 MAX6451 MAX6452 VCC MR1 MR2 MAX6445 MAX6446 MAX6449 MAX6450 ______________________________________________________________________________________ 11 MAX6443–MAX6452 Selector Guide Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) SOT5L.EPS MAX6443–MAX6452 µP Reset Circuits with Long Manual Reset Setup Period 12 ______________________________________________________________________________________ µP Reset Circuits with Long Manual Reset Setup Period 6LSOT.EPS Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 13 © 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. MAX6443–MAX6452 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)