Rev.4.2_00 HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR S-1323 Series The S-1323 Series is a positive voltage regulator with a low dropout voltage, high output voltage accuracy, and low current consumption developed based on CMOS technology. A built-in low on-resistance transistor provides a low dropout voltage and large output current, and a builtin overcurrent protector prevents the load current from exceeding the current capacitance of the output transistor. An ON/OFF circuit ensures a long battery life. Compared with the voltage regulators using the conventional CMOS process, a larger variety of capacitors are available, including small ceramic capacitors. Small SNT-4A and SC-82AB packages realize high-density mounting. Features • Output voltage: • High-accuracy output voltage: • Low current consumption: 1.5 V to 5.5 V, selectable in 0.1 V steps. ±1.0% During operation: 70 µA typ., 90 µA max. During shutdown: 0.1 µA typ., 1.0 µA max. • High peak current capability: 150 mA output is possible (at VIN ≥ VOUT(S) + 1.0 V)*1 Ensures long battery life. • Built-in ON/OFF circuit: • Low ESR capacitor can be used: A ceramic capacitor of 1.0 µF or more can be used for the output capacitor. 70 dB typ. (at 1.0 kHz) • High ripple rejection: Overcurrent of output transistor can be restricted. • Built-in overcurrent protector: SNT-4A, SC-82AB • Small package: • Lead-free products *1. Attention should be paid to the power dissipation of the package when the output current is large. Applications • Power supply for battery-powered devices • Power supply for personal communication devices • Power supply for home electric/electronic appliances • Power supply for cellular phones Packages Package Name SNT-4A SC-82AB Package PF004-A NP004-A Drawing Code Tape Reel PF004-A PF004-A NP004-A NP004-A Seiko Instruments Inc. Land PF004-A － 1 HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR Rev.4.2_00 S-1323 Series Block Diagram *1 VOUT VIN Overcurrent protector + ON/OFF circuit ON/OFF − Reference voltage circuit VSS *1. Parasitic diode Figure 1 2 Seiko Instruments Inc. Rev.4.2_00 HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR S-1323 Series Product Name Structure • The product types, output voltage and package types for the S-1323 Series can be selected at the user’s request. Refer to the “Product name” for the meanings of the characters in the product name and “Product name list” for the full product names. 1. Product name S−1323 x xx xx − xxx TF G IC direction in tape specifications*1 Product name (abbreviation)*2 Package name (abbreviation) PF：SNT-4A NB：SC-82AB Output voltage 15 to 55 (e.g. when the output voltage is 1.5 V, it is expressed as 15.) Product type*3 A: ON/OFF pin negative logic B: ON/OFF pin positive logic *1. Refer to the taping specifications at the end of this book. *2. Refer to the product name list. *3. Refer to 3. Shutdown (ON/OFF pin) under the Operation. Seiko Instruments Inc. 3 HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR Rev.4.2_00 S-1323 Series 2. Product name list Table 1 Output Voltage SNT-4A SC-82AB 1.5V±1.0% S-1323B15PF-N8ATFG S-1323B15NB-N8ATFG 1.6V±1.0% S-1323B16PF-N8BTFG S-1323B16NB-N8BTFG 1.7V±1.0% S-1323B17PF-N8CTFG S-1323B17NB-N8CTFG 1.8V±1.0% S-1323B18PF-N8DTFG S-1323B18NB-N8DTFG 1.85V±1.0% S-1323B1JPF-N9PTFG － 1.9V±1.0% S-1323B19PF-N8ETFG S-1323B19NB-N8ETFG 2.0V±1.0% S-1323B20PF-N8FTFG S-1323B20NB-N8FTFG 2.1V±1.0% S-1323B21PF-N8GTFG S-1323B21NB-N8GTFG 2.2V±1.0% S-1323B22PF-N8HTFG S-1323B22NB-N8HTFG 2.3V±1.0% S-1323B23PF-N8ITFG S-1323B23NB-N8ITFG 2.4V±1.0% S-1323B24PF-N8JTFG S-1323B24NB-N8JTFG 2.5V±1.0% S-1323B25PF-N8KTFG S-1323B25NB-N8KTFG 2.6V±1.0% S-1323B26PF-N8LTFG S-1323B26NB-N8LTFG 2.7V±1.0% S-1323B27PF-N8MTFG S-1323B27NB-N8MTFG 2.8V±1.0% S-1323B28PF-N8NTFG S-1323B28NB-N8NTFG 2.85V±1.0% S-1323B2JPF-N9QTFG － 2.9V±1.0% S-1323B29PF-N8OTFG S-1323B29NB-N8OTFG 3.0V±1.0% S-1323B30PF-N8PTFG S-1323B30NB-N8PTFG 3.1V±1.0% S-1323B31PF-N8QTFG S-1323B31NB-N8QTFG 3.2V±1.0% S-1323B32PF-N8RTFG S-1323B32NB-N8RTFG 3.3V±1.0% S-1323B33PF-N8STFG S-1323B33NB-N8STFG 3.4V±1.0% S-1323B34PF-N8TTFG S-1323B34NB-N8TTFG 3.5V±1.0% S-1323B35PF-N8UTFG S-1323B35NB-N8UTFG 3.6V±1.0% S-1323B36PF-N8VTFG S-1323B36NB-N8VTFG 3.7V±1.0% S-1323B37PF-N8WTFG S-1323B37NB-N8WTFG 3.8V±1.0% S-1323B38PF-N8XTFG S-1323B38NB-N8XTFG 3.9V±1.0% S-1323B39PF-N8YTFG S-1323B39NB-N8YTFG 4.0V±1.0% S-1323B40PF-N8ZTFG S-1323B40NB-N8ZTFG 4.1V±1.0% S-1323B41PF-N9ATFG S-1323B41NB-N9ATFG 4.2V±1.0% S-1323B42PF-N9BTFG S-1323B42NB-N9BTFG 4.3V±1.0% S-1323B43PF-N9CTFG S-1323B43NB-N9CTFG 4.4V±1.0% S-1323B44PF-N9DTFG S-1323B44NB-N9DTFG 4.5V±1.0% S-1323B45PF-N9ETFG S-1323B45NB-N9ETFG 4.6V±1.0% S-1323B46PF-N9FTFG S-1323B46NB-N9FTFG 4.7V±1.0% S-1323B47PF-N9GTFG S-1323B47NB-N9GTFG 4.8V±1.0% S-1323B48PF-N9HTFG S-1323B48NB-N9HTFG 4.9V±1.0% S-1323B49PF-N9ITFG S-1323B49NB-N9ITFG 5.0V±1.0% S-1323B50PF-N9JTFG S-1323B50NB-N9JTFG 5.1V±1.0% S-1323B51PF-N9KTFG S-1323B51NB-N9KTFG 5.2V±1.0% S-1323B52PF-N9LTFG S-1323B52NB-N9LTFG 5.3V±1.0% S-1323B53PF-N9MTFG S-1323B53NB-N9MTFG 5.4V±1.0% S-1323B54PF-N9NTFG S-1323B54NB-N9NTFG 5.5V±1.0% S-1323B55PF-N9OTFG S-1323B55NB-N9OTFG Remark Please contact the SII marketing department for type A products. 4 Seiko Instruments Inc. Rev.4.2_00 HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR S-1323 Series Pin Configurations Table 2 SNT-4A Top view 1 4 2 3 Pin No. 1 2 3 4 Symbol VOUT VIN ON/OFF VSS Description Output voltage pin Input voltage pin Shutdown pin GND pin Figure 2 Table 3 SC-82AB Top view 4 1 3 Pin No. 1 2 3 4 Symbol VOUT VSS ON/OFF VIN Description Output voltage pin GND pin Shutdown pin Input voltage pin 2 Figure 3 Seiko Instruments Inc. 5 HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR Rev.4.2_00 S-1323 Series Absolute Maximum Ratings Table 4 Item Symbol VIN VON/OFF VOUT Input voltage Output voltage SNT-4A Power dissipation SC-82AB PD (Ta = 25°C unless otherwise specified) Absolute Maximum Rating Unit V VSS−0.3 ∼ VSS+7 V VSS−0.3 ∼ VIN+0.3 V VSS−0.3 ∼ VIN+0.3 mW 300*1 200 (When not mounted on board) mW *1 mW 400 °C −40 ∼ +85 °C −40 ∼ +125 Topr Operating ambient temperature Tstg Storage temperature *1. When mounted on board [Mounted board] (1) Board size: 114.3 mm × 76.2 mm × t1.6 mm (2) Board name: JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. (2) When not mounted on board 500 Power Dissipation (PD) (mW) Power Dissipation (PD) (mW) (1) When mounted on board 500 400 SC-82AB 300 200 SNT-4A 100 0 0 50 100 150 400 300 SC-82AB 200 100 0 0 Ambient Temperature (Ta) (°C) 50 Seiko Instruments Inc. 150 Ambient Temperature (Ta) (°C) Figure 4 Power Dissipation of Package 6 100 Rev.4.2_00 HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR S-1323 Series Electrical Characteristics Table 5 (Ta = 25°C unless otherwise specified) Item Symbol Conditions Unit Test Circuit V 1 mA V 3 1 0.1 %/V 1 20 40 mV 1 ±100 ppm/ °C 1 70 90 µA 2 0.1 1.0 µA 2 2.0 6.5 V Min. Typ. Max. VOUT(S) × 0.99 150*5 VOUT(S) 0.50 VOUT(S) × 1.01 0.65 0.02 Output voltage*1 VOUT(E) VIN = VOUT(S) + 1.0 V, IOUT = 30 mA Output current*2 Dropout voltage*3 IOUT Vdrop VIN VIN ≥ VOUT(S) + 1.0 V IOUT = 150 mA VOUT(S) + 0.5 V ≤ VIN ≤ 6.5 V, IOUT = 30 mA VIN = VOUT(S) + 1.0 V, 1.0 mA ≤ IOUT ≤ 150 mA VIN = VOUT(S) + 1.0 V, IOUT = 30 mA, −40°C ≤ Ta ≤ 85°C VIN = VOUT(S) + 1.0 V, ON/OFF pin = ON, no load VIN = VOUT(S) + 1.0 V, ON/OFF pin = OFF, no load VSH VIN = VOUT(S) + 1.0 V, RL = 1.0 kΩ 1.5 V 4 VSL VIN = VOUT(S) + 1.0 V, RL = 1.0 kΩ 0.3 V 4 ISH VIN = 6.5 V, VON/OFF = 6.5 V −0.1 0.1 µA 4 ISL VIN = 6.5 V, VON/OFF = 0 V −0.1 0.1 µA 4 70 dB 5 250 mA 3 Line regulation ∆VOUT1 ∆VIN• VOUT Load regulation ∆VOUT2 Output voltage *4 temperature coefficient Current consumption during operation Current consumption during shutdown Input voltage Shutdown pin input voltage “H” Shutdown pin input voltage “L” Shutdown pin input current “H” Shutdown pin input current “L” ∆VOUT ∆Ta • VOUT Ripple rejection Short-circuit current ISS1 ISS2 RR Ishort VIN = VOUT(S) + 1.0 V, f = 1.0 kHz, ∆Vrip = 0.5 Vrms, IOUT = 30 mA VIN = VOUT(S) + 1.0 V, ON/OFF pin = ON, VOUT = 0 V *1. VOUT(S): Specified output voltage VOUT(E): Actual output voltage at the fixed load The output voltage when fixing IOUT(= 30 mA) and inputting VOUT(S) + 1.0 V *2. The output current at which the output voltage becomes 95% of VOUT(E) after gradually increasing the output current. *3. Vdrop = VIN1 − (VOUT3 × 0.98) VOUT3 is the output voltage when VIN = VOUT(S) + 1.0 V and IOUT = 150 mA. VIN1 is the input voltage at which the output voltage becomes 98% of VOUT3 after gradually decreasing the input voltage. *4. The change in temperature [mV/°C] is calculated using the following equation. ∆VOUT [mV/ °C]*1 = VOUT(S)[V ]*2 × ∆VOUT [ppm/ °C]*3 ÷ 1000 ∆Ta ∆Ta • VOUT *1. The change in temperature of the output voltage *2. Specified output voltage *3. Output voltage temperature coefficient *5. The output current can be at least this value. Due to restrictions on the package power dissipation, this value may not be satisfied. Attention should be paid to the power dissipation of the package when the output current is large. This specification is guaranteed by design. Seiko Instruments Inc. 7 HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR Rev.4.2_00 S-1323 Series Test Circuits 1. + VOUT VIN ON/OFF V VSS A + Set to power ON Figure 5 2. + A VOUT VIN ON/OFF VSS Set to VIN or GND Figure 6 3. VIN + VOUT ON/OFF A V VSS + Set to power ON Figure 7 4. VIN + VOUT + A ON/OFF VSS V RL Figure 8 5. VIN VOUT + ON/OFF VSS V RL Set to Power ON Figure 9 8 Seiko Instruments Inc. Rev.4.2_00 HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR S-1323 Series Standard Circuit Output Input VIN VOUT *2 CL ON/OFF VSS *1 CIN Single GND GND *1. CIN is a capacitor for stabilizing the input. *2. A ceramic capacitor of 1.0 µF or more can be used in CL. Figure 10 Caution The above connection diagram and constant will not guarantee successful operation. Perform thorough evaluation using the actual application to set the constant. Application Conditions Input capacitor (CIN): Output capacitor (CL): ESR of output capacitor: 1.0 µF or more 1.0 µF or more 10 Ω or less Caution A general series regulator may oscillate, depending on the external components selected. Check that no oscillation occurs with the application using the above capacitor. Seiko Instruments Inc. 9 HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR Rev.4.2_00 S-1323 Series Explanation of Terms 1. Low dropout voltage regulator The low dropout voltage regulator is a voltage regulator whose dropout voltage is low due to its built-in low on-resistance transistor. 2. Low ESR A capacitor whose ESR (Equivalent Series Resistance) is low. The S-1323 Series enables use of a low ESR capacitor, such as a ceramic capacitor, for the output-side capacitor CL. A capacitor whose ESR is 10 Ω or less can be used. 3. Output voltage (VOUT) The accuracy of the output voltage is ensured at ±1.0% under the specified conditions of fixed input voltage*1, fixed output current, and fixed temperature. *1. Differs depending the product. Caution If the above conditions change, the output voltage value may vary and exceed the accuracy range of the output voltage. Please see the electrical characteristics and attached characteristics data for details. 4. Line regulation ∆V OUT1 ∆V IN • V OUT Indicates the dependency of the output voltage on the input voltage. That is, the values show how much the output voltage changes due to a change in the input voltage with the output current remaining unchanged. 5. Load regulation (∆VOUT2) Indicates the dependency of the output voltage on the output current. That is, the values show how much the output voltage changes due to a change in the output current with the input voltage remaining unchanged. 6. Dropout voltage (Vdrop) Indicates the difference between the input voltage VIN1, which is the input voltage (VIN) at the point where the output voltage has fallen to 98% of the output voltage value VOUT3 after VIN was gradually decreased from VIN = VOUT(S) + 1.0 V, and the output voltage at that point (VOUT3 × 0.98). Vdrop = VIN1 − (VOUT3 × 0.98) 10 Seiko Instruments Inc. Rev.4.2_00 HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR S-1323 Series ∆Ta • VOUT 7. Temperatur e coefficient of output voltage ∆VOUT The shadowed area in Figure 11 is the range where VOUT varies in the operating temperature range when the temperature coefficient of the output voltage is ±100 ppm/°C. Ex. S-1323B28 Typ. VOUT [V] +0.28 mV/°C VOUT(E)*1 −0.28 mV/°C −40 25 85 Ta [°C] *1. VOUT(E) is the value of the output voltage measured at 25°C. Figure 11 A change in the temperature of the output voltage [mV/°C] is calculated using the following equation. ∆VOUT [mV/ °C]*1 = VOUT(S)[V ]*2 × ∆VOUT [ppm/ °C]*3 ÷ 1000 ∆Ta ∆Ta • VOUT *1. Change in temperature of output voltage *2. Specified output voltage *3. Output voltage temperature coefficient Seiko Instruments Inc. 11 HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR Rev.4.2_00 S-1323 Series Operation 1. Basic operation Figure 12 shows the block diagram of the S-1323 Series. The error amplifier compares the reference voltage (Vref) with Vfb, which is the output voltage resistancedivided by feedback resistors Rs and Rf. It supplies the output transistor with the gate voltage necessary to ensure a certain output voltage free of any fluctuations of input voltage and temperature. VIN *1 Current supply Error amplifier VOUT Vref − Rf + Vfb Reference voltage circuit Rs VSS *1. Parasitic diode Figure 12 2. Output transistor The S-1323 Series uses a low on-resistance P-channel MOS FET as the output transistor. Be sure that VOUT does not exceed VIN + 0.3 V to prevent the voltage regulator from being damaged due to inverse current flowing from VOUT pin through a parasitic diode to VIN pin. 12 Seiko Instruments Inc. Rev.4.2_00 HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR S-1323 Series 3. Shutdown pin (ON/OFF pin) This pin starts and stops the regulator. When the ON/OFF pin is set to the shutdown level, the operation of all internal circuits stops, and the builtin P-channel MOS FET output transistor between the VIN pin and VOUT pin is turned off to substantially reduce the current consumption. The VOUT pin becomes the VSS level due to the internally divided resistance of several hundreds kΩ between the VOUT pin and VSS pin. The structure of the ON/OFF pin is as shown in Figure 13. Since the ON/OFF pin is neither pulled down nor pulled up internally, do not use it in the floating state. In addition, note that the current consumption increases if a voltage of 0.3 V to VIN – 0.3 V is applied to the ON/OFF pin. When the ON/OFF pin is not used, connect it to the VSS pin if the logic type is “A” and to the VIN pin if it is “B”. Table 6 Logic Type ON/OFF Pin Internal Circuits VOUT Pin Voltage Current Consumption A “L”: Power on Operating Set value ISS1 A “H”: Power off Stopped VSS level ISS2 B “L”: Power off Stopped VSS level ISS2 B “H”: Power on Operating Set value ISS1 VIN ON/OFF VSS Figure 13 Selection of Output Capacitor (CL) The S-1323 Series requires an output capacitor between the VOUT and VSS pins for phase compensation. A ceramic capacitor with a capacitance of 1.0 µF or more can be used. Even if using an OS capacitor, tantalum capacitor, or aluminum electrolytic capacitor, a capacitance of 1.0 µF or more and an ESR of 10 Ω or less are required. The value of the output overshoot or undershoot transient response varies depending on the value of the output capacitor. When selecting the output capacitor, perform sufficient evaluation, including evaluation of temperature characteristics, on the actual device. Seiko Instruments Inc. 13 HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR Rev.4.2_00 S-1323 Series Precautions • Wiring patterns for the VIN, VOUT and GND pins should be designed so that the impedance is low. When mounting an output capacitor between the VOUT and VSS pins (CL) and a capacitor for stabilizing the input between VIN and VSS pins (CIN), the distance from the capacitors to these pins should be as short as possible. • Note that the output voltage may increase when a series regulator is used at low load current (1.0 mA or less). • Generally a series regulator may cause oscillation, depending on the selection of external parts. The following conditions are recommended for this IC. However, be sure to perform sufficient evaluation under the actual usage conditions for selection, including evaluation of temperature characteristics. Input capacitor (CIN): 1.0 µF or more Output capacitor (CL): 1.0 µF or more Equivalent series resistance (ESR): 10 Ω or less • The voltage regulator may oscillate when the impedance of the power supply is high and the input capacitor is small or an input capacitor is not connected. • The application conditions for the input voltage, output voltage, and load current should not exceed the package power dissipation. • Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic protection circuit. • In determining the output current, attention should be paid to the output current value specified in Table 5 in the electrical characteristics and footnote *5 of the table. • SII claims no responsibility for any disputes arising out of or in connection with any infringement by products including this IC of patents owned by a third party. 14 Seiko Instruments Inc. Rev.4.2_00 HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR S-1323 Series Characteristics (Typical Data) (1) Output Voltage vs. Output current (when load current increases) S-1323B15 (Ta = 25°C) S-1323B30 (Ta = 25°C) 2.0 2.5 V VIN = 1.8 V 1.0 VOUT [V] VOUT [V] 1.5 6.5 V 2.0 V 0.5 0 0 100 200 300 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 4.0 V VIN = 3.3 V 0 400 6.5 V 3.5 V 100 IOUT [mA] 200 300 400 IOUT [mA] S-1323B50 (Ta = 25°C) 6 5 6.5 V VOUT [V] 4 VIN = 5.3 V 3 5.5 V 2 6.0 V 1 0 0 100 200 300 400 Remark In determining the output current, attention should be paid to the following. 1) The minimum output current value and footnote *5 in the electrical characteristics 2) The package power dissipation IOUT [mA] (2) Output voltage vs. Input voltage S-1323B30 (Ta = 25°C) 1.60 3.10 1.55 3.05 VOUT [V] VOUT [V] S-1323B15 (Ta = 25°C) 1.50 IOUT = 1 mA 30 mA 50 mA 1.45 1.40 1.0 1.5 2.0 2.5 3.00 IOUT = 1 mA 30 mA 50 mA 2.95 3.0 3.5 2.90 2.5 VIN [V] 3.0 3.5 4.0 4.5 5.0 VIN [V] S-1323B50 (Ta = 25°C) 5.10 VOUT [V] 5.05 5.00 IOUT = 1 mA 30 mA 50 mA 4.95 4.90 4.5 5.0 5.5 6.0 6.5 7.0 VIN [V] Seiko Instruments Inc. 15 HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR Rev.4.2_00 S-1323 Series (3) Dropout voltage vs. Output current S-1323B15 S-1323B30 0.6 0.6 85°C 0.5 25°C 0.4 Vdrop [V] Vdrop [V] 0.5 –40°C 0.3 0.2 0.1 0 85°C 25°C 0.4 0.3 –40°C 0.2 0.1 0 50 100 0 200 150 0 50 IOUT [mA] 100 200 150 IOUT [mA] S-1323B50 0.6 Vdrop [V] 0.5 85°C 25°C 0.4 0.3 –40°C 0.2 0.1 0 0 50 100 200 150 IOUT [mA] (4) Output voltage vs. Ambient temperature S-1323B30 1.60 3.10 1.55 3.05 1.50 3.00 VOUT [V] VOUT [V] S-1323B15 1.45 1.40 –40 –20 0 20 40 60 80 100 2.95 2.90 –40 –20 Ta [°C] 5.10 VOUT [V] 5.05 5.00 4.95 –20 0 20 40 60 80 100 Ta [°C] 16 20 40 Ta [°C] S-1323B50 4.90 –40 0 Seiko Instruments Inc. 60 80 100 Rev.4.2_00 HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR S-1323 Series (5) Current consumption vs. Input voltage S-1323B30 120 120 100 100 80 85°C 25°C ISS1 [µA] ISS1 [µA] S-1323B15 60 40 –40°C 20 25°C 85°C 80 –40°C 60 40 20 0 2 0 6 4 0 8 0 2 6 4 VIN [V] 8 VIN [V] S-1323B50 120 –40°C 100 ISS1 [µA] 80 25°C 85°C 60 40 20 0 2 0 6 4 8 VIN [V] (6) Ripple rejection S-1323B15 (Ta = 25°C) S-1323B30 (Ta = 25°C) VIN = 2.5 V, COUT = 1.0 µF VIN = 4.0 V, COUT = 1.0 µF IOUT = 1 mA 80 60 30 mA 150 mA 40 20 0 10 100 1k 10k 100k 1M 100 Ripple Rejection [dB] Ripple Rejection [dB] 100 80 IOUT = 1 mA 60 150 mA 40 30 mA 20 0 10 Frequency [Hz] 100 1k 10k 100k 1M Frequency [Hz] S-1323B50 (Ta = 25°C) VIN = 6.0 V, COUT = 1.0 µF Ripple Rejection [dB] 100 80 IOUT = 1 mA 60 150 mA 40 30 mA 20 0 10 100 1k 10k 100k 1M Frequency [Hz] Seiko Instruments Inc. 17 HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR Rev.4.2_00 S-1323 Series Reference Data (1) Input transient response characteristics 3.02 3.01 3.00 VIN -20 VOUT -10 5 3.03 4 3.02 3 2 2.99 2.98 3.04 0 10 20 30 40 50 60 70 VOUT [V] VOUT [V] 3.03 6 VIN [V] 3.04 IOUT = 30 mA, tr = tf = 5.0 µs, COUT = 1.0 µF, CIN = 0 µF 3.01 3.00 1 2.99 0 2.98 80 -20 6 5 VIN 4 3 VOUT 2 VIN [V] IOUT = 30 mA, tr = tf = 5.0 µs, COUT = 0.47 µF, CIN = 0 µF 1 -10 0 10 20 t [µs] 30 40 50 60 70 0 80 t [µs] IOUT = 30 mA, tr = tf = 5.0 µs, COUT = 2.2 µF, CIN = 0 µF 3.04 3.02 3.01 3.00 6 5 VIN 4 3 VOUT 2 2.99 2.98 -20 VIN [V] VOUT [V] 3.03 1 -10 0 10 20 30 40 50 60 70 0 80 t [µs] (2) Load transient response characteristics VIN = 4.0 V, COUT = 1.0 µF, CIN = 1.0 µF, IOUT = 50↔100 mA 3.20 100 3.15 3.10 3.05 3.00 IOUT 50 0 VOUT –50 3.10 3.05 3.00 2.95 –100 2.95 2.90 –150 2.90 -4 -2 0 2 4 6 8 10 12 14 16 150 100 IOUT -4 3.20 3.00 150 100 IOUT 50 0 VOUT –50 –100 2.95 2.90 -4 IOUT [mA] VOUT [V] 3.05 –150 -2 0 2 4 6 8 10 12 14 16 t [µs] 18 –50 –100 –150 -2 0 2 4 6 t [µs] VIN = 4.0 V, COUT = 2.2 µF, CIN = 1.0 µF, IOUT = 50↔100 mA 3.10 0 VOUT t [µs] 3.15 50 Seiko Instruments Inc. 8 10 12 14 16 IOUT [mA] 150 3.15 VOUT [V] 3.20 IOUT [mA] VOUT [V] VIN = 4.0 V, COUT = 0.47 µF, CIN = 1.0 µF, IOUT = 50↔100 mA Rev.4.2_00 HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR S-1323 Series (3) Shutdown pin transient response characteristics S-1323B15 (Ta = 25°C) S-1323B30 (Ta = 25°C) VIN = 2.5 V, tr = tf = 1.0 µs, COUT = 1.0 µF, CIN = 1.0 µF VIN = 4.0 V, tr = tf = 1.0 µs, COUT = 1.0 µF, CIN = 1.0 µF 5 4 1 3 1.0 0 VON/OFF 0.5 –1 VOUT 0 –0.5 -10 -5 0 5 10 15 20 25 30 35 VOUT [V] 2 1.5 VON/OFF [V] VOUT [V] 2.0 3 4 VON/OFF 2 2 0 1 –2 0 –3 –1 40 6 –2 VOUT VON/OFF [V] 2.5 –4 –6 -10 t [µs] -5 0 5 10 15 20 25 30 35 40 t [µs] S-1323B50 (Ta = 25°C) 7 6 5 4 3 2 1 0 –1 8 6 4 2 0 –2 –4 –6 –8 VON/OFF VOUT -10 -5 0 5 10 15 20 25 30 35 VON/OFF [V] VOUT [V] VIN = 6.0 V, tr = tf = 1.0 µs, COUT = 1.0 µF, CIN = 1.0 µF 40 t [µs] Seiko Instruments Inc. 19 1.2±0.04 3 4 +0.05 0.08 -0.02 2 1 0.65 0.48±0.02 0.2±0.05 No. PF004-A-P-SD-4.0 TITLE SNT-4A-A-PKG Dimensions PF004-A-P-SD-4.0 No. SCALE UNIT mm Seiko Instruments Inc. +0.1 ø1.5 -0 4.0±0.1 2.0±0.05 0.25±0.05 +0.1 5° 1.45±0.1 2 1 3 4 ø0.5 -0 4.0±0.1 0.65±0.05 Feed direction No. PF004-A-C-SD-1.0 TITLE SNT-4A-A-Carrier Tape PF004-A-C-SD-1.0 No. SCALE UNIT mm Seiko Instruments Inc. 12.5max. 9.0±0.3 Enlarged drawing in the central part ø13±0.2 (60°) (60°) No. PF004-A-R-SD-1.0 SNT-4A-A-Reel TITLE PF004-A-R-SD-1.0 No. SCALE UNIT QTY. mm Seiko Instruments Inc. 5,000 0.52 1.16 0.52 0.3 0.35 0.3 Caution Making the wire pattern under the package is possible. However, note that the package may be upraised due to the thickness made by the silk screen printing and of a solder resist on the pattern because this package does not have the standoff. No. PF004-A-L-SD-3.0 TITLE SNT-4A-A-Land Recommendation PF004-A-L-SD-3.0 No. SCALE UNIT mm Seiko Instruments Inc. 2.0±0.2 1.3±0.2 4 3 0.05 +0.1 0.3 -0.05 +0.1 0.16 -0.06 2 1 +0.1 0.4 -0.05 No. NP004-A-P-SD-1.1 TITLE SC82AB-A-PKG Dimensions NP004-A-P-SD-1.1 No. SCALE UNIT mm Seiko Instruments Inc. +0.1 ø1.5 -0 4.0±0.1 2.0±0.05 1.1±0.1 4.0±0.1 0.2±0.05 ø1.05±0.1 (0.7) 2.2±0.2 2 1 3 4 Feed direction No. NP004-A-C-SD-3.0 TITLE SC82AB-A-Carrier Tape No. NP004-A-C-SD-3.0 SCALE UNIT mm Seiko Instruments Inc. 4.0±0.1 2.0±0.1 ø1.5 1.1±0.1 +0.1 -0 4.0±0.1 0.2±0.05 ø1.05±0.1 2.3±0.15 2 1 3 4 Feed direction No. NP004-A-C-S1-2.0 TITLE SC82AB-A-Carrier Tape No. NP004-A-C-S1-2.0 SCALE UNIT mm Seiko Instruments Inc. 12.5max. 9.0±0.3 Enlarged drawing in the central part ø13±0.2 (60°) (60°) No. NP004-A-R-SD-1.1 TITLE SC82AB-A-Reel No. NP004-A-R-SD-1.1 QTY. SCALE UNIT mm Seiko Instruments Inc. 3,000 • • • • • • The information described herein is subject to change without notice. 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