ETC S-T111

Rev.1.2_00
HIGH RIPPLE-REJECTION
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-T111 Series
The S-T111 Series is a positive voltage regulator
with a low dropout voltage, high output voltage
accuracy, and low current consumption developed
based on CMOS technology.
A built-in low on-resistance transistor provides a
low dropout voltage and large output current, and
a built-in overcurrent protector prevents the load
current from exceeding the current capacitance of
the output transistor. An ON/OFF circuit ensures a
long battery life. Compared with the voltage
regulators using the conventional CMOS process,
a larger variety of capacitors are available,
including small ceramic capacitors. A small SOT23-5 package realizes high-density mounting.
„ Features
• Output voltage:
• High-accuracy output voltage:
• Low dropout voltage:
• Low current consumption:
1.5 V to 5.5 V, selectable in 0.1 V steps.
±1.0%
190 mV typ. (3.0 V output product, IOUT = 100 mA)
During operation: 50 µA typ., 90 µA max.
During shutdown: 0.1 µA typ., 1.0 µA max.
*1
• High peak current capability:
150 mA output is possible (@ VIN ≥ VOUT(S) + 1.0 V)
Ensures long battery life.
• Built-in ON/OFF circuit:
• Low ESR capacitor can be used: A ceramic capacitor of 0.1 µF or more can be used for the output
capacitor.
80 dB typ. (@ 1.0 kHz)
• High ripple rejection:
Overcurrent of output transistor can be restricted.
• Built-in overcurrent protector:
SOT-23-5
• Small package:
*1. Attention should be paid to the power dissipation of the package when the output current is large.
„ Applications
• Power supply for battery-powered devices
• Power supply for personal communication devices
• Power supply for home electric/electronic appliances
• Power supply for cellular phones
„ Package
• SOT-23-5
(Package drawing code: MP005-A)
Seiko Instruments Inc.
1
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.1.2_00
S-T111 Series
„ Block Diagram
*1
VIN
VOUT
Overcurrent
protector
+
ON/OFF
circuit
ON/OFF
−
Reference
voltage circuit
VSS
*1. Parasitic diode
Figure 1
2
Seiko Instruments Inc.
Rev.1.2_00
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-T111 Series
„ Product Code Structure
• The product types and output voltage for the S-T111 Series can be selected at the user’s request. Refer
to the “Product name” for the meanings of the characters in the product name and “Product name list” for
the full product names.
1. Product name
S-T111
x
xx
xx
–
xxx
–
TF
IC direction in tape specifications
Product name (abbreviation)
*1
*2
Package name (abbreviation)
MC: SOT-23-5
Output voltage
15 to 55
(E.g., when the output voltage is 1.5 V, it is
expressed as 15.)
*3
Product type
A: ON/OFF pin negative logic
B: ON/OFF pin positive logic
*1. Refer to the taping specifications at the end of this book.
*2. Refer to the product name list.
*3. Refer to 3. Shutdown (ON/OFF pin) under the Operation.
2. Product name list
Table 1
Output Voltage
Product Name
1.5 V ±1.0%
S-T111B15MC-OGA-TF
1.8 V ±1.0%
S-T111B18MC-OGD-TF
2.5 V ±1.0%
S-T111B25MC-OGK-TF
2.6 V ±1.0%
S-T111B26MC-OGL-TF
2.7 V ±1.0%
S-T111B27MC-OGM-TF
2.8 V ±1.0%
S-T111B28MC-OGN-TF
2.9 V ±1.0%
S-T111B29MC-OGO-TF
3.0 V ±1.0%
S-T111B30MC-OGP-TF
3.1 V ±1.0%
S-T111B31MC-OGQ-TF
3.3 V ±1.0%
S-T111B33MC-OGS-TF
5.0 V ±1.0%
S-T111B50MC-OHJ-TF
Remark Please contact the SII marketing department for products
with an output voltage other than those specified above or
type A products.
Seiko Instruments Inc.
3
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.1.2_00
S-T111 Series
„ Pin Configuration
Table 2
SOT-23-5
Top view
5
4
Pin No.
1
2
3
4
5
Symbol
ON/OFF
VSS
*1
NC
VOUT
VIN
Description
Shutdown pin
GND pin
No connection
Output voltage pin
Input voltage pin
*1. The NC pin is electrically open.
The NC pin can be connected to VIN or VSS.
1
2
3
Figure 2
„ Absolute Maximum Ratings
Table 3
Item
Input voltage
Output voltage
Power dissipation
Operating ambient temperature
Storage ambient temperature
Symbol
VIN
VON/OFF
VOUT
PD
Topr
Tstg
(Ta = 25°C unless otherwise specified)
Absolute Maximum Rating
Unit
V
VSS − 0.3 to VSS + 7
VSS − 0.3 to VIN + 0.3
VSS − 0.3 to VIN + 0.3
300
mW
−40 to +85
°C
−40 to +125
Caution The absolute maximum ratings are rated values exceeding which the product could suffer
physical damage. These values must therefore not be exceeded under any conditions.
4
Seiko Instruments Inc.
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-T111 Series
Rev.1.2_00
„ Electrical Characteristics
Table 4
(Ta = 25°C unless otherwise specified)
Item
Symbol
*1
VOUT(E)
*2
IOUT
Vdrop
Output voltage
Conditions
VIN = VOUT(S) + 1.0 V, IOUT = 30 mA
Min.
Typ.
Max.
VOUT(S) VOUT(S) VOUT(S)
× 0.99
× 1.01
*5
150


Not specified

0.08
0.14

0.32
0.55

0.28
0.47

0.25
0.35

0.20
0.29

0.19
0.26
Unit
Test
Circuit
V
1
mA
V
3
1
VIN
VIN ≥ VOUT(S) + 1.0 V
IOUT = 50 mA
1.5 V ≤ VOUT(S) ≤ 2.7 V
2.8 V ≤ VOUT(S) ≤ 5.5 V
IOUT = 100 mA
1.5 V ≤ VOUT(S) ≤ 1.6 V
1.7 V ≤ VOUT(S) ≤ 1.8 V
1.9 V ≤ VOUT(S) ≤ 2.3 V
2.4 V ≤ VOUT(S) ≤ 2.7 V
2.8 V ≤ VOUT(S) ≤ 5.5 V
VOUT(S) + 0.5 V ≤ VIN ≤ 6.5 V,
IOUT = 30 mA
VIN = VOUT(S) + 1.0 V,
1.0 mA ≤ IOUT ≤ 80 mA
VIN = VOUT(S) + 1.0 V, IOUT = 10 mA,
−40°C ≤ Ta ≤ 85°C
VIN = VOUT(S) + 1.0 V, ON/OFF pin = ON,
no load
VIN = VOUT(S) + 1.0 V, ON/OFF pin = OFF,
no load

VSH
VIN = VOUT(S) + 1.0 V, RL = 1.0 kΩ
1.5


VSL
VIN = VOUT(S) + 1.0 V, RL = 1.0 kΩ


0.3
ISH
VIN = 6.5 V, VON/OFF = 6.5 V
−0.1

0.1
ISL
VIN = 6.5 V, VON/OFF = 0 V
−0.1

0.1
Ripple rejection
RR

80

dB
5
Short-circuit current
Ishort
VIN = VOUT(S) + 1.0 V, f = 1.0 kHz,
∆Vrip = 0.5 Vrms, IOUT = 30 mA
VIN = VOUT(S) + 1.0 V, ON/OFF pin = ON,
VOUT = 0 V

200

mA
3
Output current
*3
Dropout voltage
Line regulation
∆VOUT1
∆VIN• VOUT
Load regulation
∆VOUT2
Output voltage
*4
temperature coefficient
Current consumption
during operation
Current consumption
during shutdown
Input voltage
Shutdown pin
input voltage “H”
Shutdown pin
input voltage “L”
Shutdown pin
input current “H”
Shutdown pin
input current “L”
∆VOUT
∆Ta • VOUT
ISS1
ISS2

0.05
0.2
%/V

12
40
mV

±100

ppm
/ °C

50
90
µA
2

0.1
1.0
2.0

6.5
V

4
µA
*1. VOUT(S): Specified output voltage
VOUT(E): Actual output voltage at the fixed load
The output voltage when fixing IOUT(= 30 mA) and inputting VOUT(S) + 1.0 V
*2. The output current at which the output voltage becomes 95% of VOUT(E) after gradually increasing the output current.
*3. Vdrop = VIN1 − (VOUT3 × 0.98)
VOUT3 is the output voltage when VIN = VOUT(S) + 1.0 V and IOUT 50 mA or IOUT = 100 mA.
VIN1 is the input voltage at which the output voltage becomes 98% of VOUT3 after gradually decreasing the input voltage.
*4. The change in temperature [mV/°C] is calculated using the following equation.
∆VOUT
[mV/ °C]*1 = VOUT(S)[V ]*2 × ∆VOUT [ppm/ °C]*3 ÷ 1000
∆Ta
∆Ta • VOUT
*1. The change in temperature of the output voltage
*2. Specified output voltage
*3. Output voltage temperature coefficient
*5. The output current can be at least this value.
Due to restrictions on the package power dissipation, this value may not be satisfied. Attention should be paid to the power
dissipation of the package when the output current is large.
This specification is guaranteed by design.
Seiko Instruments Inc.
5
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.1.2_00
S-T111 Series
„ Test Circuits
1.
+
VOUT
VIN
ON/OFF
V
VSS
A
+
Set to
power ON
Figure 3
2.
A
VOUT
VIN
ON/OFF
VSS
Set to
VIN or GND
Figure 4
3.
VIN
+
VOUT
ON/OFF
A
V
VSS
+
Set to
power ON
Figure 5
4.
VIN
VOUT
+
A
+
ON/OFF
VSS
V
RL
Figure 6
5.
VIN
VOUT
+
ON/OFF
VSS
V
RL
Set to
Power ON
Figure 7
6
Seiko Instruments Inc.
Rev.1.2_00
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-T111 Series
„ Standard Circuit
Output
Input
VIN
CIN
VOUT
*2
CL
ON/OFF
VSS
*1
Single GND
GND
*1. CIN is a capacitor for stabilizing the input.
*2. A ceramic capacitor of 0.1 µF or more can be used for CL.
Figure 8
Caution The above connection diagram and constant will not guarantee successful operation.
Perform thorough evaluation using the actual application to set the constant.
„ Application Conditions
Input capacitor (CIN):
Output capacitor (CL):
ESR of output capacitor:
0.1 µF or more
0.1 µF or more
10 Ω or less
Caution A general series regulator may oscillate, depending on the external components selected.
Check that no oscillation occurs with the application using the above capacitor.
„ Selection of Input and Output Capacitors (CIN, CL)
The S-T111 Series requires an output capacitor between the VOUT and VSS pins for phase compensation.
Operation is stabilized by a ceramic capacitor with an output capacitance of 0.1 µF or more in the entire
temperature range. However, when using an OS capacitor, tantalum capacitor, or aluminum electrolytic
capacitor, a ceramic capacitor with a capacitance of 0.1 µF or more and an ESR of 10 Ω or less is required.
The value of the output overshoot or undershoot transient response varies depending on the value of the output
capacitor. The required capacitance of the input capacitor differs depending on the application.
The recommended value for an application is 1.0 µF or more for CIN and 0.47 µF or more for CL; however, when
selecting the output capacitor, perform sufficient evaluation, including evaluation of temperature characteristics,
on the actual device.
Seiko Instruments Inc.
7
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.1.2_00
S-T111 Series
„ Explanation of Terms
1. Low dropout voltage regulator
The low dropout voltage regulator is a voltage regulator whose dropout voltage is low due to its built-in
low on-resistance transistor.
2. Low ESR
A capacitor whose ESR (Equivalent Series Resistance) is low. The S-T111 Series enables use of a low
ESR capacitor, such as a ceramic capacitor, for the output-side capacitor CL. A capacitor whose ESR is
10 Ω or less can be used.
3. Output voltage (VOUT)
The accuracy of the output voltage is ensured at ±1.0% under the specified conditions of fixed input
*1
voltage , fixed output current, and fixed temperature.
*1. Differs depending on the product.
Caution If the above conditions change, the output voltage value may vary and exceed the
accuracy range of the output voltage. Please see the electrical characteristics and
attached characteristics data for details.

∆VOUT1 

IN • VOUT 
∆V

4. Line regulation 
Indicates the dependency of the output voltage on the input voltage. That is, the values show how much
the output voltage changes due to a change in the input voltage with the output current remaining
unchanged.
5. Load regulation (∆VOUT2)
Indicates the dependency of the output voltage on the output current. That is, the values show how
much the output voltage changes due to a change in the output current with the input voltage remaining
unchanged.
6. Dropout voltage (Vdrop)
Indicates the difference between the input voltage VIN1, which is the input voltage (VIN) at the point where
the output voltage has fallen to 98% of the output voltage value VOUT3 after VIN was gradually decreased
from VIN = VOUT(S) + 1.0 V, and the output voltage at that point (VOUT3 × 0.98).
Vdrop = VIN1 − (VOUT3 × 0.98)
8
Seiko Instruments Inc.
Rev.1.2_00
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-T111 Series
 ∆VOUT 
7. Temperatur e coefficient of output voltage 

 ∆Ta • VOUT 
The shadowed area in Figure 9 is the range where VOUT varies in the operating temperature range when
the temperature coefficient of the output voltage is ±100 ppm/°C.
Ex. S-T111B28 Typ.
VOUT
[V]
+0.28 mV / °C
*1
VOUT(E)
−0.28 mV / °C
−40
25
85
Ta [°C]
*1. VOUT(E) is the value of the output voltage measured at 25°C.
Figure 9
A change in the temperature of the output voltage [mV/°C] is calculated using the following equation.
∆VOUT
[mV/ °C]*1 = VOUT(S)[V ]*2 × ∆VOUT [ppm/ °C]*3 ÷ 1000
∆Ta
∆Ta • VOUT
*1. Change in temperature of output voltage
*2. Specified output voltage
*3. Output voltage temperature coefficient
Seiko Instruments Inc.
9
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.1.2_00
S-T111 Series
„ Operation
1. Basic operation
Figure 10 shows the block diagram of the S-T111 Series.
The error amplifier compares the reference voltage (Vref) with Vfb, which is the output voltage resistancedivided by feedback resistors Rs and Rf. It supplies the output transistor with the gate voltage necessary
to ensure a certain output voltage free of any fluctuations of input voltage and temperature.
VIN
*1
Current
supply
Error
amplifier
VOUT
Vref
−
Rf
+
Vfb
Reference voltage
circuit
Rs
VSS
*1.
Parasitic diode
Figure 10
2. Output transistor
The S-T111 Series uses a low on-resistance P-channel MOS FET as the output transistor.
Be sure that VOUT does not exceed VIN + 0.3 V to prevent the voltage regulator from being damaged due
to inverse current flowing from the VOUT pin through a parasitic diode to the VIN pin.
10
Seiko Instruments Inc.
Rev.1.2_00
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-T111 Series
3. Shutdown pin (ON/OFF pin)
This pin starts and stops the regulator.
When the ON/OFF pin is set to the shutdown level, the operation of all internal circuits stops, and the builtin P-channel MOS FET output transistor between the VIN pin and VOUT pin is turned off to substantially
reduce the current consumption. The VOUT pin becomes the VSS level due to the internally divided
resistance of several MΩ between the VOUT pin and VSS pin.
The structure of the ON/OFF pin is as shown in Figure 11. Since the ON/OFF pin is neither pulled down
nor pulled up internally, do not use it in the floating state. In addition, note that the current consumption
increases if a voltage of 0.3 V to VIN – 0.3 V is applied to the ON/OFF pin. When the ON/OFF pin is not
used, connect it to the VSS pin if the logic type is “A” and to the VIN pin if it is “B”.
Table 5
Logic Type
ON/OFF Pin
Internal Circuits
VOUT Pin Voltage
Current Consumption
A
“L”: Power on
Operating
Set value
ISS1
A
“H”: Power off
Stopped
VSS level
ISS2
B
“L”: Power off
Stopped
VSS level
ISS2
B
“H”: Power on
Operating
Set value
ISS1
VIN
ON/OFF
VSS
Figure 11
Seiko Instruments Inc.
11
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.1.2_00
S-T111 Series
„ Precautions
• Wiring patterns for the VIN, VOUT and GND pins should be designed so that the impedance is low.
When mounting an output capacitor between the VOUT and VSS pins (CL) and a capacitor for stabilizing
the input between VIN and VSS pins (CIN), the distance from the capacitors to these pins should be as
short as possible.
• Note that the output voltage may increase when a series regulator is used at low load current (1.0 mA or
less).
• Generally a series regulator may cause oscillation, depending on the selection of external parts. The
following conditions are recommended for this IC. However, be sure to perform sufficient evaluation
under the actual usage conditions for selection, including evaluation of temperature characteristics.
Input capacitor (CIN):
1.0 µF or more
Output capacitor (CL):
0.47 µF or more
Equivalent series resistance (ESR): 10 Ω or less
• The voltage regulator may oscillate when the impedance of the power supply is high and the input
capacitor is small or an input capacitor is not connected.
• The application conditions for the input voltage, output voltage, and load current should not exceed the
package power dissipation.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in
electrostatic protection circuit.
• In determining the output current, attention should be paid to the output current value specified in Table 4
in the electrical characteristics and footnote *5) of the table.
• SII claims no responsibility for any disputes arising out of or in connection with any infringement by
products including this IC of patents owned by a third party.
12
Seiko Instruments Inc.
Rev.1.2_00
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-T111 Series
„ Typical Characteristics
(1) Output Voltage vs. Output current (when load current increases)
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
S-T111B30 (Ta = 25°C)
3.5
3.0
2.5
6.5 V
VIN = 1.8 V
VOUT [V]
VOUT [V]
S-T111B15 (Ta = 25°C)
2.5 V
100
200
400
300
500
6.5 V
1.5
1.0
4.0 V
0.5
0
0
VIN = 3.3 V
2.0
600
0
100
IOUT [mA]
200
400
300
500
600
IOUT [mA]
S-T111B50 (Ta = 25°C)
6
5
VOUT [V]
4
VIN = 5.3 V
3
6.0 V
2
6.5 V
1
0
0
100
200
400
300
500
600
Remark In determining the output current, attention
should be paid to the following.
1) The minimum output current value
and footnote *5 in the electrical
characteristics
2) The package power dissipation
IOUT [mA]
(2) Output voltage vs. Input voltage
S-T111B30 (Ta = 25°C)
1.6
3.1
1.5
3.0
1.4
IOUT = 1 mA
30 mA
50 mA
1.3
1.2
1.1
1.0
1.0
VOUT [V]
VOUT [V]
S-T111B15 (Ta = 25°C)
1.5
2.0
2.9
IOUT = 1 mA
30 mA
50 mA
2.8
2.7
2.6
2.5
3.0
3.5
2.5
2.5
VIN [V]
3.0
3.5
4.0
4.5
5.0
VIN [V]
S-T111B50 (Ta = 25°C)
5.5
VOUT [V]
5.0
4.5
4.0
IOUT = 1 mA
50 mA
3.5
30 mA
3.0
2.5
2.0
3.0
4.0
5.0
6.0
7.0
VIN [V]
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HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.1.2_00
S-T111 Series
(3) Dropout voltage vs. Output current
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
S-T111B30
85°C
25°C
Vdrop [V]
Vdrop [V]
S-T111B15
–40°C
0
50
100
200
150
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
85°C
–40°C
0
IOUT [mA]
Vdrop [V]
85°C
25°C
–40°C
0
50
100
200
150
IOUT [mA]
Vdrop [V]
(4) Dropout voltage vs. Set output voltage
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
150 mA
100 mA
50 mA
30 mA
10 mA
0
1
2
3
4
5
6
7
VOTA [V]
14
50
100
IOUT [mA]
S-T111B50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
25°C
Seiko Instruments Inc.
150
200
Rev.1.2_00
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-T111 Series
(5) Output voltage vs. Ambient temperature
S-T111B15
S-T111B30
1.60
VOUT [V]
VOUT [V]
1.55
1.50
1.45
1.40
–50
–25
25
0
50
75
100
3.20
3.15
3.10
3.05
3.00
2.95
2.90
2.85
2.80
–50
–25
0
Ta [°C]
25
50
75
100
Ta [°C]
S-T111B50
5.3
5.2
VOUT [V]
5.1
5.0
4.9
4.8
4.7
–50
–25
25
0
50
75
100
Ta [°C]
(6) Current consumption vs. Input voltage
S-T111B30
120
120
100
100
80
ISS1 [µA]
ISS1 [µA]
S-T111B15
25°C
60 85°C
40
–40°C
20
0
25°C
85°C
80
–40°C
60
40
20
0
2
0
4
6
8
0
VIN [V]
2
4
6
8
VIN [V]
S-T111B50
120
ISS1 [µA]
100
25°C
80
–40°C
60
40
85°C
20
0
0
2
4
6
8
VIN [V]
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15
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.1.2_00
S-T111 Series
(7) Ripple rejection
S-T111B15 (Ta = 25°C)
S-T111B30 (Ta = 25°C)
VIN = 2.5 V, COUT = 0.47 µF
VIN = 4.0 V, COUT = 0.47 µF
100
50 mA
80
60
Ripple Rejection [dB]
Ripple Rejection [dB]
100
IOUT = 1 mA
30 mA
40
20
0
10
100
1k
10k
100k
1M
20
0
10
Ripple Rejection [dB]
100
80
IOUT = 1 mA
30 mA
20
0
10
100
1k
10k
100k
1M
Frequency [Hz]
16
100
1k
10k
Frequency [Hz]
VIN = 6.0 V, COUT = 0.47 µF
40
30 mA
40
S-T111B50 (Ta = 25°C)
50 mA
IOUT = 1 mA
60
Frequency [Hz]
60
50 mA
80
Seiko Instruments Inc.
100k
1M
Rev.1.2_00
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-T111 Series
„ Reference Data
(1) Input transient response characteristics
S-T111B15 (Ta = 25°C)
S-T111B30 (Ta = 25°C)
-40
-20
0
20
40
60
6
3.08
3.06
3.04
3.02
3.00
5
VIN
4
3
VOUT
2
1
2.98
2.96
-40
80 100 120 140 160
VIN [V]
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
VOUT [V]
1.62
1.60
1.58
VIN
1.56
1.54
1.52
VOUT
1.50
1.48
1.46
IOUT = 30 mA, tr = tf = 5.0 µs, COUT = 0.47 µF, CIN = 0 µF
VIN [V]
VOUT [V]
IOUT = 30 mA, tr = tf = 5.0 µs, COUT = 0.47 µF, CIN = 0 µF
-20
0
20
40
t [µs]
60
0
80 100 120 140 160
t [µs]
S-T111B50 (Ta = 25°C)
5.12
5.10
VIN
5.08
5.06
5.04
5.02
VOUT
5.00
4.98
4.96
-40
-20
0
20
40
60
8
7
6
5
4
3
2
1
0
VIN [V]
VOUT [V]
IOUT = 30 mA, tr = tf = 5.0 µs, COUT = 0.47 µF, CIN = 0 µF
80 100 120 140 160
t [µs]
(2) Load transient response characteristics
S-T111B15 (Ta = 25°C)
S-T111B30 (Ta = 25°C)
VIN = 2.5 V, COUT = 0.47 µF, CIN = 1.0 µF, IOUT = 50↔100 mA
VIN = 4.0 V, COUT = 0.47 µF, CIN = 1.0 µF, IOUT = 50↔100 mA
1.55
1.50
100
3.15
50
3.10
0
VOUT
–50
3.00
–50
–100
2.95
1.40
–150
2.90
20
40
60
-40 -20
80 100 120 140 160
50
0
–100
0
100
IOUT
3.05 VOUT
1.45
-40 -20
150
t [µs]
IOUT [mA]
1.60
IOUT
3.20
VOUT [V]
VOUT [V]
1.65
150
IOUT [mA]
1.70
–150
0
20
40
60
80 100 120 140 160
t [µs]
S-T111B50 (Ta = 25°C)
VIN = 6.0 V, COUT = 0.47 µF, CIN = 1.0 µF, IOUT = 50↔100 mA
5.20
150
5.10
5.05
5.00
100
IOUT
50
0
VOUT
–50
–100
4.95
4.90
-40 -20
IOUT [mA]
VOUT [V]
5.15
–150
0
20
40
60
80 100 120 140 160
t [µs]
Seiko Instruments Inc.
17
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.1.2_00
S-T111 Series
(3) Shutdown pin transient response characteristics
S-T111B15 (Ta = 25°C)
S-T111B30 (Ta = 25°C)
VIN = 2.5 V, COUT = 0.47 µF, CIN = 1.0 µF, IOUT = 100 mA
VIN = 4.0 V, COUT = 0.47 µF, CIN = 1.0 µF, IOUT = 100 mA
VOUT [V]
2
1
0
–1
2
8
1
6
0
–1
VOUT
-0.4 -0.2
0
0.2 0.4
0.6 0.8
1.0
1.2
1.4 1.6
6
4
VON/OFF
4
2
–2
0
–3
–2
0
–2
VOUT
-0.4 -0.2
t [ms]
18
2
–4
0
0.2 0.4
0.6 0.8
t [ms]
Seiko Instruments Inc.
1.0
1.2
1.4 1.6
–6
VON/OFF [V]
VON/OFF
3
10
VOUT [V]
4
3
VON/OFF [V]
5
2.9±0.2
1.9±0.2
4
5
1
2
+0.1
0.16 -0.06
3
0.95±0.1
0.4±0.1
No. MP005-A-P-SD-1.2
TITLE
No.
SOT235-A-PKG Dimensions
MP005-A-P-SD-1.2
SCALE
UNIT
mm
Seiko Instruments Inc.
4.0±0.1(10 pitches:40.0±0.2)
+0.1
ø1.5 -0
2.0±0.05
+0.2
ø1.0 -0
0.25±0.1
4.0±0.1
1.4±0.2
3.2±0.2
3 2 1
4
5
Feed direction
No. MP005-A-C-SD-2.1
TITLE
SOT235-A-Carrier Tape
No.
MP005-A-C-SD-2.1
SCALE
UNIT
mm
Seiko Instruments Inc.
12.5max.
9.0±0.3
Enlarged drawing in the central part
ø13±0.2
(60°)
(60°)
No. MP005-A-R-SD-1.1
SOT235-A-Reel
TITLE
No.
MP005-A-R-SD-1.1
SCALE
QTY.
UNIT
mm
Seiko Instruments Inc.
3,000
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