W3DG7216V-D1 -JD1 White Electronic Designs PRELIMINARY* 128MB - 16Mx72 SDRAM, UNBUFFERED FEATURES DESCRIPTION The W3DG7216V is a 16Mx72 synchronous DRAM module which consists of nine 16Meg x 8 SDRAM components in TSOP II package, and one 2Kb EEPROM in an 8 pin TSSOP package for Serial Presence Detect which are mounted on a 144 pin SO-DIMM multilayer FR4 Substrate. PC100 and PC133 compatible Burst Mode Operation Auto and Self Refresh capability LVTTL compatible inputs and outputs Serial Presence Detect with EEPROM Fully synchronous: All signals are registered on the positive edge of the system clock Programmable Burst Lengths: 1, 2, 4, 8 or Full Page 3.3V ± 0.3V Power Supply 144 Pin SO-DIMM JEDEC • Package height options: JD1: 31.75 (1.25”) * This product is under development, is not qualified or characterized and is subject to change without notice. PIN CONFIGURATIONS (FRONT SIDE/BACK SIDE) PIN NAMES PINOUT A0 – A12 Address Input (Multiplexed) Select Bank PIN FRONT PIN BACK PIN FRONT PIN BACK PIN FRONT PIN BACK BA0-BA1 1 VSS 2 VSS 49 DQ13 50 DQ45 97 DQ22 98 DQ54 DQ0-63 Data Input/Output 3 DQ0 4 DQ32 51 DQ14 52 DQ46 99 DQ23 100 DQ55 CLK0 Clock Input 5 DQ1 6 DQ33 53 DQ15 54 DQ47 101 VCC 102 VCC CB0-7 Check Bit (Data-In/Data-Out) 7 DQ2 8 DQ34 55 VSS 56 VSS 103 A6 104 A7 CKE0 Clock Enable Input 9 DQ3 10 DQ35 57 CB0 58 CB4 105 A8 106 BA0 CS0# Chip Select Input 11 VCC 12 VCC 59 CB1 60 CB5 107 VSS 108 VSS RAS# Row Address Strobe 13 DQ4 14 DQ36 61 CLK0 62 CKE0 109 A9 110 BA1 CAS# Column Address Strobe 15 DQ5 16 DQ37 63 VCC 64 VCC 111 A10 112 A11 WE# #Write Enable 17 DQ6 18 DQ38 65 RAS# 66 CAS# 113 VCC 114 VCC 19 DQ7 20 DQ39 67 WE# 68 CKE1 115 DQMB2 116 DQMB6 21 VSS 22 VSS 69 SO# 70 A12 117 DQMB3 118 DQMB7 23 DQMB0 24 DQMB4 71 S1# 72 NC 119 VSS 120 VSS 25 DQMB1 26 DQMB5 73 NC 74 NC 121 DQ24 122 DQ56 27 VCC 28 VCC 75 VSS 76 VSS 123 DQ25 124 DQ57 29 A0 31 30 A1 32 33 A2 35 VSS 37 39 A3 77 CB2 80 CB6 125 DQ26 DQ27 126 79 CB7 127 34 A5 81 VCC 36 VSS 83 DQ16 82 VCC 129 VCC 130 VCC 84 DQ48 131 DQ28 132 DQ60 DQ8 38 DQ40 85 DQ17 86 DQ49 DQ9 40 DQ41 87 DQ18 88 DQ50 133 DQ29 134 DQ61 135 DQ30 136 41 DQ10 42 DQ42 89 DQ19 90 DQ51 137 DQ62 DQ31 138 DQ63 43 DQ11 44 DQ43 91 VSS 92 VSS 139 VSS 140 VSS 45 VCC 46 VCC 93 DQ20 94 DQ52 141 SDA 142 SCL 47 DQ12 48 DQ44 95 DQ21 96 DQ53 143 VCC 144 VCC 1 128 DQ58 A4 June 2004 Rev 2 CB3 78 DQ59 DQM0-7 DQM VCC Power Supply (3.3V) VSS Ground SDA Serial Data I/O SCL Serial Clock DNU Do Not Use NC No Connect White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com W3DG7216V-D1 -JD1 White Electronic Designs PRELIMINARY FUNCTIONAL BLOCK DIAGRAM WE# S0# DQMB4 DQMB0 DQM DQ0 DQ1 I/O 0 I/O 1 DQ2 I/O 2 DQ3 DQ4 DQ5 I/O 3 I/O 4 DQ6 I/O 6 I/O 7 DQ7 S0# DQM WE# D0 I/O 5 DQ32 DQ33 I/O 0 I/O 1 DQ34 I/O 2 DQ35 DQ36 DQ37 I/O 3 I/O 4 DQ38 I/O 6 DQ39 I/O 7 DQ40 DQ41 I/O 0 I/O 1 DQ42 I/O 2 I/O 3 I/O 4 S0# WE# D5 I/O 5 DQMB5 DQMB1 DQM S0# DQM WE# DQ8 DQ9 I/O 0 I/O 1 DQ10 I/O 2 DQ11 DQ12 DQ13 I/O 3 I/O 4 I/O 5 DQ43 DQ44 DQ45 DQ14 I/O 6 DQ46 I/O 6 DQ15 I/O 7 DQ47 I/O 7 DQ48 DQ49 I/O 0 I/O 1 DQ50 I/O 2 I/O 3 I/O 4 D1 S0# WE# D6 I/O 5 DQMB6 DQM S0# WE# S0# DQM CB0 CB1 I/O 0 I/O 1 CB2 I/O 2 CB3 CB4 CB5 I/O 3 I/O 4 I/O 5 DQ51 DQ52 DQ53 CB6 I/O 6 DQ54 I/O 6 CB7 I/O 7 DQ55 I/O 7 DQ56 DQ57 I/O 0 I/O 1 DQ58 I/O 2 I/O 3 I/O 4 D2 WE# D7 I/O 5 DQMB7 DQMB2 DQM S0# WE# DQM DQ16 DQ17 I/O 0 I/O 1 DQ18 DQ19 DQ20 DQ21 I/O 3 I/O 4 I/O 5 DQ59 DQ60 DQ61 DQ22 I/O 6 DQ62 I/O 6 DQ23 I/O 7 DQ63 I/O 7 DQ24 DQ25 I/O 0 I/O 1 DQ26 I/O 2 DQ27 DQ28 DQ29 I/O 3 I/O 4 DQ30 I/O 6 DQ31 I/O 7 I/O 2 D3 S0# WE# D8 I/O 5 DQMB3 DQM S0# WE# NOTE: DQ wiring may differ than described in this drawing, however DQ/DQMB/CKE/S relationships must be maintianed as shown. D4 I/O 5 *CLOCK WIRING RAS# CAS# CKEO BA0-BA1 A0-A11 CLOCK INPUT *CLK0 *CLK1 RAS#: SDRAM DO-D8 CAS#: SDRAM DO-D8 CKE: SDRAM DO-D8 BA0-BA1:SDRAM D0-8 A0-A11: SDRAM D0-D8 SDRAMS 4 0R 5 SDRAMS 4 0R 5 SDRAMS SERIAL PD SCL June 2004 Rev 2 VCC D0-D8 VSS D0-D8 SDA A0 2 A1 A2 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com W3DG7216V-D1 -JD1 White Electronic Designs PRELIMINARY ABSOLUTE MAXIMUM RATINGS Parameter Symbol Value Units Voltage on any pin relative to VSS VIN, VOUT -1.0 ~ 4.6 V Voltage on VCC supply relative to VSS VCC, VCCQ -1.0 ~ 4.6 V TSTG -55 ~ +150 °C Storage Temperature Power Dissipation PD 9 W Short Circuit Current IOS 50 mA Note: Permanent device damage may occur if “ABSOLUTE MAXIMUM RATINGS” are exceeded. Functional operation should be restricted to recommended operating condition. Exposure to higher than recommended voltage for extended periods of time could affect device reliability. RECOMMENDED DC OPERATING CONDITIONS Voltage Referenced to: VSS = 0V, 0°C ≤ TA ≤ +70°C Parameter Symbol Min Typ Max Unit Note Supply Voltage VCC 3.0 3.3 3.6 V Input High Voltage VIH 2.0 3.0 VCCQ +0.3 V 1 Input Low Voltage VIL -0.3 — 0.8 V 2 Output High Voltage VOH 2.4 — — V IOH = -2mA Output Low Voltage VOL — — 0.4 V IOL= -2mA Input Leakage Current ILI -10 — 10 µA 3 Note: 1. VIH (max)= 5.6V AC. The overshoot voltage duration is ≤ 3ns. 2. VIL (min)= -2.0V AC. The undershoot voltage duration is ≤ 3ns. 3. Any input 0V ≤ VIN ≤ VCCQ Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs. CAPACITANCE TA = 25°C, f = 1MHz, VCC = 3.3V, VREF = 1.4V ± 200mV Parameter Symbol Max Unit Input Capacitance (A0-A11) CIN1 40 pF Input Capacitance (RAS#,CAS#,WE#) CIN2 40 pF Input Capacitance (CKE0) CIN3 40 pF Input Capacitance (CLK0) CIN4 20 pF Input Capacitance (CS0#) CIN5 40 pF Input Capacitance (DQM0-DQM7) CIN6 7 pF Input Capacitance (BA0-BA1) CIN7 40 pF Data Input/Output Capacitance (DQ0-DQ63) COUT 10 pF Data Input/Output Capacitance (CB0-7) COUT1 10 pF June 2004 Rev 2 3 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com W3DG7216V-D1 -JD1 White Electronic Designs PRELIMINARY OPERATING CURRENT CHARACTERISTICS VCC = 3.3V, 0°C ≤ TA ≤ +70°C Version Parameter Symbol Conditions 133/100 Units Note 1440 mA 1 Operating Current (One bank active) ICC1 Burst Length = 1 tRC ≤ tRC(min) IOL = 0mA Precharge Standby Current in Power Down Mode ICC2 CKE ≤ VIL(max), tCC = 10ns Active Standby Current in Non-Power Down Mode ICC3 CKE ≥ VIH(min), CS ≥ VIH(min), tcc = 10ns Input signals are changed one time during 20ns 450 ICC4 Io = mA Page burst 4 Banks activated tCCD = 2CK 1485 mA 1 2970 mA 2 27 mA Operating Current (Burst mode) Refresh Current ICC5 tRC ≥ tRC(min) Self Refresh Current ICC6 CKE ≤ 0.2V 18 mA mA Notes: 1. Measured with outputs open. 2. Refresh period is 64ms. June 2004 Rev 2 4 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com W3DG7216V-D1 -JD1 White Electronic Designs PRELIMINARY PACKAGE DIMENSIONS FOR JD1 Ordering Information Speed CAS Latency Height* W3DG7216V10JD1 100MHz CL=2 31.75 (1.25”) W3DG7216V7JD1 133MHz CL=2 31.75 (1.25”) W3DG7216V75JD1 133MHz CL=3 31.75 (1.25”) Note: For industrial temperature range product, add an "I" to the end of the part number. PACKAGE DIMENSIONS FOR JD1 67.72 (2.661 Max) 3.81 (0.150) MAX. 2.01 (0.079 Min) WEDC 301 31.75 (1.25) Max 3.99 (0.157) 19.99 (0.787) 23.14 (0.913) 0.99 (0.039) (± 0.004) 32.79 (1.291) 4.60 (0.181) 28.2 (1.112) 1.50 (0.059) * ALL DIMENSIONS ARE IN MILLIMETERS AND (INCHES). June 2004 Rev 2 5 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com W3DG7216V-D1 -JD1 White Electronic Designs PRELIMINARY PACKAGE DIMENSIONS FOR D1 Ordering Information Speed CAS Latency Height* W3DG7216V10D1 100MHz CL=2 31.75 (1.25”) W3DG7216V7D1 133MHz CL=2 31.75 (1.25”) W3DG7216V75D1 133MHz CL=3 31.75 (1.25”) Note: For industrial temperature range product, add an "I" to the end of the part number. PACKAGE DIMENSIONS FOR D1 67.72 (2.661 Max) 3.81 (0.150) MAX. 2.01 (0.079 Min) 31.75 (1.25) Max 3.99 (0.157) 19.99 (0.787) 23.14 (0.913) 0.99 (0.039) (± 0.004) 32.79 (1.291) 4.60 (0.181) 28.2 (1.112) 1.50 (0.059) * ALL DIMENSIONS ARE IN MILLIMETERS AND (INCHES). June 2004 Rev 2 6 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com W3DG7216V-D1 -JD1 White Electronic Designs PRELIMINARY Document Title 128MB - 16Mx72 SDRAM, UNBUFFERED Revision History Rev # History Release Date Status Rev 0 History Paget 10-25-01 Advanced 1.1 Corrected mechanical drawing 7-9-02 Advanced 6-04 Preliminary Rev 1 1.2 Changed logo Rev 2 2.1 Updated Datasheet (CAP and IDD spec) 2.2 Moved from Advanced to Preliminary 2.3 Added JD1 package option 2.4 “D1” package option “Not Recommended for New Designs” June 2004 Rev 2 7 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com