FAIRCHILD FSBS15CH60F

SPM
FSBS15CH60F
TM
Smart Power Module
Features
General Description
• UL Certified No.E209204(SPM27-BA package)
It is an advanced smart power module (SPMTM) that Fairchild
has newly developed and designed to provide very compact
and high performance ac motor drives mainly targeting lowpower inverter-driven application like air conditioner and washing machine. It combines optimized circuit protection and drive
matched to low-loss IGBTs. System reliability is further
enhanced by the integrated under-voltage lock-out and shortcircuit protection. The high speed built-in HVIC provides optocoupler-less single-supply IGBT gate driving capability that further reduce the overall size of the inverter system design. Each
phase current of inverter can be monitored separately due to
the divided negative dc terminals.
• 600V-15A 3-phase IGBT inverter bridge including control ICs
for gate driving and protection
• Divided negative dc-link terminals for inverter current sensing
applications
• Single-grounded power supply due to built-in HVIC
• Isolation rating of 2500Vrms/min.
• Very low leakage current due to using ceramic substrate
Applications
• AC 100V ~ 253V three-phase inverter drive for small power
ac motor drives
• Home appliances applications like air conditioner and washing machine.
Top View
Bottom View
44mm
26.8mm
Figure 1.
©2006 Fairchild Semiconductor Corporation
FSBS15CH60F Rev. D
1
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FSBS15CH60F Smart Power Module
April 28, 2006
FSBS15CH60F Smart Power Module
Integrated Power Functions
• 600V-15A IGBT inverter for three-phase DC/AC power conversion (Please refer to Figure 3)
Integrated Drive, Protection and System Control Functions
• For inverter high-side IGBTs: Gate drive circuit, High voltage isolated high-speed level shifting
Control circuit under-voltage (UV) protection
Note) Available bootstrap circuit example is given in Figures 10 and 11.
• For inverter low-side IGBTs: Gate drive circuit, Short circuit protection (SC)
Control supply circuit under-voltage (UV) protection
• Fault signaling: Corresponding to a UV fault (Low-side supply)
• Input interface: 3.3/5V CMOS/LSTTL compatible, Schmitt trigger input
Pin Configuration
Top View
13.3
(1) VCC(L)
(2) COM
(3) IN(UL)
(4) IN(VL)
(5) IN(WL)
(6) VFO
(7) CFOD
(8) CSC
(21) NU
(22) NV
19.1
(23) NW
(9) IN(UH)
(10) VCC(UH)
(11) VB(U)
(12) VS(U)
(13) IN(VH)
(14) VCC(VH)
(15) VB(V)
(16) VS(V)
(17) IN(WH)
(18) VCC(WH)
(19) VB(W)
(24) U
Case Temperature (TC)
Detecting Point
(25) V
(26) W
Ceramic Substrate
(27) P
(20) VS(W)
Figure 2.
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FSBS15CH60F Smart Power Module
Pin Descriptions
Pin Number
Pin Name
1
VCC(L)
Pin Description
Low-side Common Bias Voltage for IC and IGBTs Driving
2
COM
Common Supply Ground
3
IN(UL)
Signal Input for Low-side U Phase
4
IN(VL)
Signal Input for Low-side V Phase
5
IN(WL)
Signal Input for Low-side W Phase
Fault Output
6
VFO
7
CFOD
Capacitor for Fault Output Duration Time Selection
8
CSC
Capacitor (Low-pass Filter) for Short-Current Detection Input
9
IN(UH)
10
VCC(UH)
11
VB(U)
High-side Bias Voltage for U Phase IGBT Driving
Signal Input for High-side U Phase
High-side Bias Voltage for U Phase IC
12
VS(U)
High-side Bias Voltage Ground for U Phase IGBT Driving
13
IN(VH)
Signal Input for High-side V Phase
14
VCC(VH)
15
VB(V)
High-side Bias Voltage for V Phase IGBT Driving
High-side Bias Voltage for V Phase IC
16
VS(V)
High-side Bias Voltage Ground for V Phase IGBT Driving
17
IN(WH)
Signal Input for High-side W Phase
18
VCC(WH)
19
VB(W)
High-side Bias Voltage for W Phase IGBT Driving
20
VS(W)
High-side Bias Voltage Ground for W Phase IGBT Driving
21
NU
Negative DC–Link Input for U Phase
22
NV
Negative DC–Link Input for V Phase
23
NW
Negative DC–Link Input for W Phase
24
U
Output for U Phase
25
V
Output for V Phase
26
W
Output for W Phase
27
P
Positive DC–Link Input
High-side Bias Voltage for W Phase IC
3
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FSBS15CH60F Smart Power Module
Internal Equivalent Circuit and Input/Output Pins
P (27)
(19) V B(W )
(18) V CC(W H)
(17) IN (W H)
VB
VCC
IN
(20) V S(W )
(15) V B(V)
(14) V CC(VH)
(13) IN (VH)
(10) V CC(UH)
(9) IN (UH)
(12) V S(U)
(8) C SC
(7) C FO D
(6) V FO
(5) IN (W L)
(4) IN (VL)
(3) IN (UL)
VS
W (26)
VB
VCC
OUT
COM
IN
(16) V S(V)
(11) V B(U)
OUT
COM
VS
V (25)
VB
VCC
OUT
COM
IN
C(SC)
VS
U (24)
OUT(W L)
C(FOD)
N W (23)
VFO
IN(W L) OUT(VL)
IN(VL)
N V (22)
IN(UL)
(2) CO M
COM
(1) V CC(L)
VCC
OUT(UL)
V SL
N U (21)
Note:
1. Inverter low-side is composed of three IGBTs, freewheeling diodes for each IGBT and one control IC. It has gate drive and protection functions.
2. Inverter power side is composed of four inverter dc-link input terminals and three inverter output terminals.
3. Inverter high-side is composed of three IGBTs, freewheeling diodes and three drive ICs for each IGBT.
Figure 3.
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Unless Otherwise Specified)
Inverter Part
Symbol
VPN
VPN(Surge)
VCES
Parameter
Conditions
Rating
Units
Supply Voltage
Applied between P- NU, NV, NW
450
V
Supply Voltage (Surge)
Applied between P- NU, NV, NW
500
V
600
V
Collector-emitter Voltage
± IC
Each IGBT Collector Current
TC = 25°C
15
A
± ICP
Each IGBT Collector Current (Peak)
TC = 25°C, Under 1ms Pulse Width
30
A
PC
Collector Dissipation
TC = 25°C per One Chip
TJ
Operating Junction Temperature
(Note 1)
32
W
-20 ~ 125
°C
Note:
1. The maximum junction temperature rating of the power chips integrated within the SPM is 150 °C(@TC ≤ 100°C). However, to insure safe operation of the SPM, the average
junction temperature should be limited to TJ(ave) ≤ 125°C (@TC ≤ 100°C)
Control Part
Symbol
Parameter
Conditions
Rating
Units
VCC
Control Supply Voltage
Applied between VCC(UH), VCC(VH), VCC(WH), VCC(L) COM
20
V
VBS
High-side Control Bias
Voltage
Applied between VB(U) - VS(U), VB(V) - VS(V), VB(W) VS(W)
20
V
VIN
Input Signal Voltage
Applied between IN(UH), IN(VH), IN(WH), IN(UL), IN(VL),
IN(WL) - COM
-0.3~17
V
VFO
Fault Output Supply Voltage
Applied between VFO - COM
IFO
Fault Output Current
Sink Current at VFO Pin
VSC
Current Sensing Input Voltage Applied between CSC - COM
-0.3~VCC+0.3
V
5
mA
-0.3~VCC+0.3
V
Total System
Symbol
VPN(PROT)
TC
Parameter
Conditions
Self Protection Supply Voltage Limit
(Short Circuit Protection Capability)
VCC = VBS = 13.5 ~ 16.5V
TJ = 125°C, Non-repetitive, less than 2µs
Module Case Operation Temperature
-20°C≤ TJ ≤ 125°C, See Figure 2
TSTG
Storage Temperature
VISO
Isolation Voltage
60Hz, Sinusoidal, AC 1 minute, Connection
Pins to ceramic substrate
Rating
Units
400
V
-20 ~ 100
°C
-40 ~ 125
°C
2500
Vrms
Thermal Resistance
Symbol
Rth(j-c)Q
Rth(j-c)F
Parameter
Junction to Case Thermal
Resistance
Min.
Typ.
Inverter IGBT part (per 1/6 module)
Conditios
-
-
Max. Units
3.1
°C/W
Inverter FWD part (per 1/6 module)
-
-
3.6
°C/W
Note:
2. For the measurement point of case temperature(TC), please refer to Figure 2.
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
Tape Width
Quantity
FSBS15CH60F
FSBS15CH60F
SPM27BA
-
-
10
5
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FSBS15CH60F Smart Power Module
Absolute Maximum Ratings (TJ = 25°C,
Inverter Part
Symbol
VCE(SAT)
VF
HS
tON
Item
Condition
Typ.
Max.
Units
Collector-Emitter
Saturation Voltage
VCC = VBS = 15V
VIN = 5V
IC = 15A, TJ = 25°C
-
-
2.3
V
FWD Forward Voltage
VIN = 0V
IC =15A, TJ = 25°C
-
-
2.1
V
Switching Times
VPN = 300V, VCC = VBS = 15V
IC = 15A
VIN = 0V ↔ 5V, Inductive Load
(Note 3)
tC(ON)
tOFF
tC(OFF)
-
0.4
-
µs
-
0.28
-
µs
-
0.67
-
µs
-
0.35
-
µs
-
0.10
-
µs
-
0.55
-
µs
-
0.24
-
µs
-
0.73
-
µs
tC(OFF)
-
0.34
-
µs
trr
-
0.10
-
µs
-
-
250
µA
trr
LS
Min.
VPN = 300V, VCC = VBS = 15V
IC = 15A
VIN = 0V ↔ 5V, Inductive Load
(Note 3)
tON
tC(ON)
tOFF
ICES
Collector-Emitter
Leakage Current
VCE = VCES
Note:
3. tON and tOFF include the propagation delay time of the internal drive IC. tC(ON) and tC(OFF) are the switching time of IGBT itself under the given gate driving condition internally.
For the detailed information, please see Figure 4.
100% I C 100% I C
trr
V CE
IC
IC
V CE
V IN
V IN
0
tON
tOFF
tC(ON)
V IN(ON)
tC(OFF)
V IN(OFF)
10% I C 90% I C 10% V CE
10% V CE
10% I C
(b) turn-off
(a) turn-on
Figure 4. Switching Time Definition
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FSBS15CH60F Smart Power Module
Electrical Characteristics (TJ = 25°C, Unless Otherwise Specified)
Control Part
Symbol
IQCCL
Parameter
Quiescent VCC Supply
Current
IQCCH
Conditions
Max.
Units
VCC(L) - COM
-
-
23
mA
VCC = 15V
IN(UH, VH, WH) = 0V
VCC(UH), VCC(VH),
VCC(WH) - COM
-
-
100
µA
VB(U) - VS(U), VB(V) -VS(V),
VB(W) - VS(W)
-
-
500
µA
4.5
-
-
V
Quiescent VBS Supply
Current
VBS = 15V
IN(UH, VH, WH) = 0V
VFOH
Fault Output Voltage
VSC = 0V, VFO Circuit: 4.7kΩ to 5V Pull-up
Short Circuit Trip Level
VCC = 15V (Note 4)
VSC = 1V, VFO Circuit: 4.7kΩ to 5V Pull-up
VFOL
Typ.
VCC = 15V
IN(UL, VL, WL) = 0V
IQBS
VSC(ref)
Min.
-
-
0.8
V
0.45
0.5
0.55
V
TSD
Over-temperature protec- Temperature at LVIC
tion
125
145
175
°C
∆TSD
Over-temperature protec- Temperature at LVIC
tion hysterisis
-
18
-
°C
UVCCD
Supply Circuit UnderVoltage Protection
UVCCR
Detection Level
10.7
11.9
13.0
V
Reset Level
11.2
12.4
13.2
V
UVBSD
Detection Level
10.1
11.3
12.5
V
UVBSR
Reset Level
10.5
11.7
12.9
V
tFOD
Fault-out Pulse Width
CFOD = 33nF (Note 5)
1.0
1.8
-
ms
VIN(ON)
ON Threshold Voltage
3.0
-
-
V
VIN(OFF)
OFF Threshold Voltage
Applied between IN(UH), IN(VH), IN(WH), IN(UL),
IN(VL), IN(WL) - COM
-
-
0.8
V
Note:
4. Short-circuit current protection is functioning only at the low-sides.
5. The fault-out pulse width tFOD depends on the capacitance value of CFOD according to the following approximate equation : CFOD = 18.3 x 10-6 x tFOD[F]
Recommended Operating Conditions
Symbol
Parameter
Conditions
Value
Min.
Typ.
Max.
Units
VPN
Supply Voltage
Applied between P - NU, NV, NW
-
300
400
V
VCC
Control Supply Voltage
Applied between VCC(UH), VCC(VH), VCC(WH),
VCC(L) - COM
13.5
15
16.5
V
VBS
High-side Bias Voltage
Applied between VB(U) - VS(U), VB(V) - VS(V),
VB(W) - VS(W)
13.0
15
18.5
V
-1
-
1
V/µs
2.0
-
-
µs
-
20
kHz
4
V
DVCC/Dt, Control supply variation
DVBS/Dt
tdead
Blanking Time for Preventing For Each Input Signal
Arm-short
fPWM
PWM Input Signal
-20°C ≤ TC ≤ 100°C, -20°C ≤ TJ ≤ 125°C
-
VSEN
Voltage for Current Sensing
Applied between NU, NV, NW - COM
(Including surge voltage)
-4
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FSBS15CH60F Smart Power Module
Electrical Characteristics (TJ = 25°C, Unless Otherwise Specified)
Parameter
Mounting Torque
Device Flatness
Limits
Conditions
Mounting Screw: - M3
Recommended 0.62N•m
Note Figure 5
Units
Min.
Typ.
Max.
0.51
0.62
0.72
N•m
0
-
+120
µm
-
15.4
-
g
Weight
(+)
(+)
Figure 5. Flatness Measurement Position
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FSBS15CH60F Smart Power Module
Mechanical Characteristics and Ratings
FSBS15CH60F Smart Power Module
Time Charts of SPMs Protective Function
Input Signal
Protection
Circuit State
RESET
SET
RESET
UVCCR
a1
Control
Supply Voltage
a6
UVCCD
a3
a2
a7
a4
Output Current
a5
Fault Output Signal
a1 : Control supply voltage rises: After the voltage rises UVCCR, the circuits start to operate when next input is applied.
a2 : Normal operation: IGBT ON and carrying current.
a3 : Under voltage detection (UVCCD).
a4 : IGBT OFF in spite of control input condition.
a5 : Fault output operation starts.
a6 : Under voltage reset (UVCCR).
a7 : Normal operation: IGBT ON and carrying current.
Figure 6. Under-Voltage Protection (Low-side)
Input Signal
Protection
Circuit State
RESET
SET
RESET
UVBSR
Control
Supply Voltage
b5
b1
UVBSD
b3
b6
b2
b4
Output Current
High-level (no fault output)
Fault Output Signal
b1 : Control supply voltage rises: After the voltage reaches UVBSR, the circuits start to operate when next input is applied.
b2 : Normal operation: IGBT ON and carrying current.
b3 : Under voltage detection (UVBSD).
b4 : IGBT OFF in spite of control input condition, but there is no fault output signal.
b5 : Under voltage reset (UVBSR)
b6 : Normal operation: IGBT ON and carrying current
Figure 7. Under-Voltage Protection (High-side)
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FSBS15CH60F Rev. D
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c6
Protection
circuit state
SET
Internal IGBT
Gate-Emitter Voltage
FSBS15CH60F Smart Power Module
Lower arms
control input
c7
RESET
c4
c3
c2
SC
c1
c8
Output Current
SC Reference Voltage
Sensing Voltage
of the shunt
resistance
Fault Output Signal
c5
CR circuit time
constant delay
(with the external shunt resistance and CR connection)
c1 : Normal operation: IGBT ON and carrying current.
c2 : Short circuit current detection (SC trigger).
c3 : Hard IGBT gate interrupt.
c4 : IGBT turns OFF.
c5 : Fault output timer operation starts: The pulse width of the fault output signal is set by the external capacitor CFO.
c6 : Input “L” : IGBT OFF state.
c7 : Input “H”: IGBT ON state, but during the active period of fault output the IGBT doesn’t turn ON.
c8 : IGBT OFF state
Figure 8. Short-Circuit Current Protection (Low-side Operation only)
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FSBS15CH60F Smart Power Module
5V-Line
R PF =
SPM
4.7k Ω
IN (UH) , IN (VH) , IN(W H)
IN (UL) , IN (VL) , IN (W L)
CPU
100 Ω
1nF
VFO
C PF =
1nF
CO M
Note:
1. RC coupling at each input (parts shown dotted) might change depending on the PWM control scheme used in the application and the wiring impedance of the application’s
printed circuit board. The SPM input signal section integrates 3.3kΩ (typ.) pull-down resistor. Therefore, when using an external filtering resistor, please pay attention to the signal voltage drop at input terminal.
2. The logic input is compatible with standard CMOS or LSTTL outputs.
Figure 9. Recommended CPU I/O Interface Circuit
These Values depend on PWM Control Algorithm
15V-Line
RE(H)
RBS
DBS
One-Leg Diagram of SPM
P
22uF
0.1uF
Vcc
VB
IN
HO
COM VS
Inverter
Output
Vcc
1000uF
1uF
IN
OUT
COM VSL
N
Note:
1. It would be recommended that the bootstrap diode, DBS, has soft and fast recovery characteristics.
2. The bootstrap resistor (RBS) should be 3 times greater than RE(H). The recommended value of RE(H) is 5.6Ω, but it can be increased up to 20Ω (maximum) for a slower dv/dt of
high-side.
3. The ceramic capacitor placed between VCC-COM should be over 1uF and mounted as close to the pins of the SPM as possible.
Figure 10. Recommended Bootstrap Operation Circuit and Parameters
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RE(VH)
15V line
RE(UH)
RBS
DBS
(19) VB(W)
(18) VCC(WH)
CBS
Gating WH
CBSC
(17) IN(WH)
(20) VS(W)
RBS
DBS
(15) VB(V)
(14) VCC(VH)
CBS
Gating VH
CBSC
(13) IN(VH)
(16) VS(V)
C
P
U
RBS
DBS
(11) VB(U)
(10) VCC(UH)
CBS
Gating UH
CBSC
(9) IN(UH)
(12) VS(U)
P (27)
VB
VCC
OUT
COM
IN
W (26)
VS
VB
VCC
OUT
COM
IN
VS
V (25)
M
VB
VCC
CDCS
OUT
COM
IN
Vdc
U (24)
VS
RF
5V line
(8) CSC
CSC
RS
RPF
(7) CFOD
CFOD
Fault
(6) VFO
(5) IN(WL)
Gating WL
(4) IN(VL)
Gating VL
(3) IN(UL)
Gating UL
C(SC) OUT(WL)
C(FOD)
NW (23)
RSW
VFO
IN(WL) OUT(VL)
IN(VL)
NV (22)
RSV
IN(UL)
(2) COM
CBPF
COM
CPF
(1) VCC(L)
CSP15
OUT(UL)
VCC
VSL
NU (21)
RSU
CSPC15
Input Signal for ShortCircuit Protection
RFW
W-Phase Current
V-Phase Current
U-Phase Current
RFV
RFU
CFW
CFV
CFU
Note:
1. To avoid malfunction, the wiring of each input should be as short as possible. (less than 2-3cm)
2. By virtue of integrating an application specific type HVIC inside the SPM, direct coupling to CPU terminals without any opto-coupler or transformer isolation is possible.
3. VFO output is open collector type. This signal line should be pulled up to the positive side of the 5V power supply with approximately 4.7kΩ resistance. Please refer to Figure. 9.
4. CSP15 of around 7 times larger than bootstrap capacitor CBS is recommended.
5. VFO output pulse width should be determined by connecting an external capacitor(CFOD) between CFOD(pin7) and COM(pin2). (Example : if CFOD = 33 nF, then tFO = 1.8ms
(typ.)) Please refer to the note 5 for calculation method.
6. Input signal is High-Active type. There is a 3.3kΩ resistor inside the IC to pull down each input signal line to GND. When employing RC coupling circuits, set up such RC couple
that input signal agree with turn-off/turn-on threshold voltage.
7. To prevent errors of the protection function, the wiring around RF and CSC should be as short as possible.
8. In the short-circuit protection circuit, please select the RFCSC time constant in the range 1.5~2 µs.
9. Each capacitor should be mounted as close to the pins of the SPM as possible.
10. To prevent surge destruction, the wiring between the smoothing capacitor and the P&GND pins should be as short as possible. The use of a high frequency non-inductive
capacitor of around 0.1~0.22 uF between the P&GND pins is recommended.
11. Relays are used at almost every systems of electrical equipments of home appliances. In these cases, there should be sufficient distance between the CPU and the relays.
12. CSPC15 should be over 1uF and mounted as close to the pins of the SPM as possible.
Figure 11. Typical Application Circuit
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FSBS15CH60F Smart Power Module
RE(WH)
FSBS15CH60F Smart Power Module
Detailed Package Outline Drawings
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FSBS15CH60F Smart Power Module
Detailed Package Outline Drawings (Continued)
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FSBS15CH60F Rev. D
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FSBS15CH60F Smart Power Module
Detailed Package Outline Drawings (Continued)
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LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body or
(b) support or sustain life, and (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in a significant injury of the user.
2. A critical component in any component of a life support,
device, or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Advance Information
Formative or In Design
This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
Definition
Preliminary
First Production
This datasheet contains preliminary data; supplementary data will be
published at a later date. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice to improve
design.
Obsolete
Not In Production
This datasheet contains specifications on a product that has been
discontinued by Fairchild Semiconductor. The datasheet is printed for
reference information only.
Rev. I29
© 2007 Fairchild Semiconductor Corporation
www.fairchildsemi.com