CENTRAL CTLSMS05-M622

Central
CTLSMS05-M622
CTLSMS12-M622
CTLSMS15-M622
CTLSMS24-M622
TM
Semiconductor Corp.
TM
SURFACE MOUNT TLM
SILICON QUAD TVS / ZENER ARRAY
5.0 THRU 24 VOLTS
Top View
DESCRIPTION:
The CENTRAL SEMICONDUCTOR CTLSMS05 Series
is a 4 line TVS/Zener Array packaged in a space saving
TM
TM
TLM (Tiny Leadless Module ) TLM622 case. These
devices are designed to protect sensitive equipment
against ESD and to prevent latch-up events in CMOS
circuitry operating at 5V, 12V, 15V and 24V.
MARKING CODES:
CTLSMS05-M622: CBC
CTLSMS12-M622: CBD
CTLSMS15-M622: CBF
CTLSMS24-M622: CBH
Bottom View
TLM622 CASE
FEATURES:
• Very low clamping voltage
• Low leakage current
• 350W power dissipation
• IEC61000-4-2 ESD 20kV air, 15kV contact compliance
• New Tiny Leadless Module (TLM) package with a
footprint compatible with the SOT-363 footprint.
MAXIMUM RATINGS: (TA=25°C)
SYMBOL
Ppp
Peak Pulse Power (8x20µsec waveform)
ESD Voltage (HBM)
350
UNITS
W
VESD
>25
kV
TJ
-50 to +125
°C
Tstg
-50 to +150
°C
Operating Temperature Range
Storage Temperature Range
ELECTRICAL CHARACTERISTICS PER DIODE:
Type No.
Reverse
Reverse
Stand-Off Breakdown
Voltage
Voltage
VWRM
MAX
(V)
APPLICATIONS:
• PDA’s
• Memory Card Ports
• Mobile Phones
• Instrumentation
(TA=25°C unless otherwise noted)
Reverse
Leakage
Current
VBR IBR
IR
MIN
MAX
(V) (mA) (µA)
VR
Clamping
Voltage
8x20µsec
Ipp
(V)
Vcl
MAX
(V)
Clamping
Voltage
8x20µsec
Off State
Marking
Junction
Code
Capacitance
VR=0V
f=1.0MHz
Ipp
(A)
Vcl
MAX
(V)
(A)
Cj
MAX
(pF)
CTLSMS05-M622
5
6
1.0
5.0
5.0
9.5
5.0
13
24
200
CBC
CTLSMS12-M622
12
13.3
1.0
5.0
12
17
5.0
21
15
90
CBD
CTLSMS15-M622
15
16.7
1.0
5.0
15
22
5.0
27
12
70
CBF
CTLSMS24-M622
24
26.7
1.0
5.0
24
35
5.0
40
8
50
CBH
R1 (10-April 2006)
Central
CTLSMS05-M622
CTLSMS12-M622
CTLSMS15-M622
CTLSMS24-M622
TM
Semiconductor Corp.
TM
SURFACE MOUNT TLM
SILICON QUAD TVS / ZENER ARRAY
5.0 THRU 24 VOLTS
TLM622 CASE - MECHANICAL OUTLINE
Pinout
Marking Codes:
CTLSMS05-M622:
CTLSMS12-M622:
CTLSMS15-M622:
CTLSMS24-M622:
CBC
CBD
CBF
CBH
Lead Code:
1) Cathode D1
2) No Connection
3) Cathode D2
4) Cathode D3
5) No Connection
6) Cathode D4
P) Anode D1, D2, D3, D4
Suggested mounting pad layout
for maximum power dissipation
(Dimensions in mm)
Schematic
For standard mounting refer to TLM622 Package Details
R1 (10-April 2006)