MAXIM MAX14673

EVALUATION KIT AVAILABLE
MAX14670–MAX14673
Bidirectional Current-Blocking, High-Input
Overvoltage Protector
with Adjustable OVLO
General Description
The MAX14670–MAX14673 provide protection to valuable consumer circuits against positive voltage faults up
to +28VDC. An internal clamp also protects the devices
from surges up to +80V. The device is able to disconnect
the system from its output terminal when wrong input
conditions are detected.
The MAX14670–MAX14673 overvoltage protection devices feature low 65mΩ (typ), WLP package on-resistance
(RON) internal FETs, effectively minimizing the voltage
drop across the device. When the input voltage exceeds
the overvoltage threshold, the internal FET is turned off to
prevent damage to the protected components.
The overvoltage protection threshold can be adjusted
with optional external resistors to any voltage between
5V and 22V. The devices automatically choose the accurate internal trip thresholds when the overvoltage lockout
input (OVLO) is set lower than the external OVLO select
voltage. The internal OVLO are preset to typical 6.8V
(MAX14670), 15.5V (MAX14671), 5.825V (MAX14672),
or 22V (MAX14673).
The MAX14670–MAX14673 feature reverse bias blocking
capability. Unlike other overvoltage protectors, when the
MAX14670–MAX14673 are disabled, the voltage applied
to OUT does not feed back into IN. These devices also
feature an OTG enable pin that allows OUT voltage to
supply IN. The MAX14670–MAX14673 also have thermal
shutdown protection against over load conditions.
The MAX14670–MAX14673 are specified over the extended -40°C to +85°C temperature range. The MAX14670/
MAX14671 are available in a 15-bump WLP package and
the MAX14672/MAX14673 are available in a 10-pin TDFN
package.
Ordering Information/Selector Guide and Typical Operating
Circuit appear at end of data sheet.
For related parts and recommended products to use with this part, refer
to www.maximintegrated.com/MAX14670.related.
19-6727; Rev 0; 6/13
Benefits and Features
● Protect High-Power Portable Devices
• Wide Operating Input Voltage Protection from
+3V to +28V
• +80V Surge Capability
• 4.5A Continuous Current Capability (WLP Package)
• Integrated 65mΩ (typ) n-Channel MOSFET Switch
(WLP Package)
● Flexible Overvoltage Protection Design
• Wide +5V to +22VAdjustable OVLO Threshold Range
• ACOK and ACOK Indicate Input is in Range
• OTG Enable Allows OUT to Supply IN
• Preset Accurate Internal OVLO Thresholds:
6.8V ±3% (MAX14670)
15.5V ±3% (MAX14671)
5.825V ±3% (MAX14672)
22V ±3% (MAX14673)
● Additional Protection Features Increase System
Reliability
• OUT-IN Reverse Bias Blocking Capability
• Soft-Start to Minimize Inrush Current
• Internal 15ms Startup Debounce
• Thermal Shutdown Protection
● Space Saving
• 15-Bump, 1.6mm x 2.1mm, WLP Package
• 10-Pin, 3mm x 3mm, TDFN Package
Applications
●
●
●
●
●
Tablets
Smart Phones
E-Readers
PC Notebooks
Charging USB Hosts
MAX14670–MAX14673
Bidirectional Current-Blocking, High-Input
Overvoltage Protector
with Adjustable OVLO
Absolute Maximum Ratings
(All voltages referenced to GND.)
IN (Note 1)..............................................................-0.3V to +29V
OUT........................................................................-0.3V to +26V
IN - OUT..................................................................-26V to +29V
OTG_EN, ACOK, ACOK..........................................-0.3V to +6V
OVLO.....................................................................-0.3V to +26V
Continuous Current into IN, OUT
WLP (Note 2)...................................................................±4.5A
TDFN...............................................................................±3.2A
Continuous Power Dissipation (TA = +70°C)
WLP (derate 16.4mW/°C above +70°C).....................1312mW
TDFN (derate 24.4mW/°C above +70°C)...................1951mW
Operating Temperature Range............................ -40°C to +85°C
Storage Temperature Range............................. -65°C to +150°C
Soldering Temperature (reflow)........................................+260°C
Note 1: Survives burst pulses up to 80V with 2Ω series resistance and hot plug events. Above the input clamp voltage, the IN must
be a surge in nature with a limited energy.
Note 2: Limited by the PCB thermal design.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Thermal Characteristics (Note 3)
WLP
Junction-to-Ambient Thermal Resistance (θJA)...........52°C/W
TDFN
Junction-to-Ambient Thermal Resistance (θJA)...........41°C/W
Junction-to-Case Thermal Resistance (θJC)..................9°C/W
Note 3: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(VIN = +3V to +28V, VOUT = +3V to +24V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VIN = +5V, TA = +25°C.)
(Note 4)
PARAMETER
Input Startup Voltage
Input Sustaining Voltage
Input Clamp Voltage
Input Supply Current
SYMBOL
CONDITIONS
TYP
MAX
UNITS
2.17
3
V
IOUT = 0A
1.5
2.3
V
VIN_CLAMP IIN = 10mA, TA = +25°C
33.7
VINBT
VINBU
IIN
VOVLO = 0V, VIN = 5V, ACOK is
unconnected, IOUT = 0mA
MIN
V
100
190
µA
2.15
3
V
IIN = 0A
1.5
2.3
V
VOVLO = 0V, VOUT = 5V, IIN = 0mA,
VOTG_EN = 1.8V
83
170
µA
Output Shutdown Current
VOVLO = 3V, VOUT = 5V, VIN = 0V,
VOTG_EN = 0V
6
12
µA
IN Leakage Voltage
VOUT = 21V, IN unconnected,
VOTG_EN = 0V
0.001
0.1
V
IN Discharge Current
VIN = VOUT = 5V, IN discharge current after
an OTG_EN transition from high to low
100
150
mA
Output Startup Voltage
VOUTBT
Output Sustaining Voltage
VOUTBU
Output Supply Current
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IOUT
Maxim Integrated │ 2
MAX14670–MAX14673
Bidirectional Current-Blocking, High-Input
Overvoltage Protector
with Adjustable OVLO
Electrical Characteristics (continued)
(VIN = +3V to +28V, VOUT = +3V to +24V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VIN = +5V, TA = +25°C.)
(Note 4)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
WLP, TA = +25°C
65
87
TDFN, TA = +25°C
85
110
6.8
7.0
15.5
16.0
5.825
6.0
1.221
1.26
V
22
V
OVP (IN TO OUT)
On-Resistance (IN to OUT)
RON
VIN = 5V,
IOUT = 100mA
MAX14670
Internal Overvoltage Trip Level
VIN_OVLO
MAX14671
MAX14672
VIN rising
6.6
VIN falling
6.5
VIN rising
15.0
VIN falling
14.5
VIN rising
5.65
VIN falling
5.55
mΩ
V
OVLO Set Threshold
VOVLO_TH
1.18
Adjustable OVLO Threshold
Range
VOVLO_EXT
5
External OVLO Select Threshold
VOVLO_SEL
0.2
0.25
0.3
V
1.6
1.8
2.0
V
1
µA
0.4
V
1
µA
DIGITAL SIGNALS (ACOK, ACOK, OTG_EN)
ACOK Output High Voltage
VACOK
Pull down to ground, VOUT = 5V,
OTG_EN = high, ACOK deasserted
ACOK Leakage Current
ACOK Output Low Voltage
ISOURCE ≤ 100µA, VIN > 3V
VOL
ACOK Leakage Current
VIO = 3.3V, ISINK = 1mA
VIO = 3.3V, ACOK deasserted
OTG_EN Input Logic High
VIH
OTG_EN Input Logic Low
VIL
OTG_EN Input Leakage Current
IIN
1.6
0V ≤ VIN ≤ VIL and VIH ≤ VIN ≤ VCC,
VCC = 5.5V
V
-1
0.4
V
+1
µA
TIMING CHARACTERISTICS (Figure 1)
IN Debounce Time
tDEB
VIN = 5V to charge pump on (VOUT = 10%
of VIN), RLOAD = 100Ω, CLOAD = 10µF
20
ms
IN/OUT Soft-Start Time
tSS
VIN = 5V to VOUT = 90% of VIN,
RLOAD = 100Ω, CLOAD = 10µF
25
ms
IN OVP Turn-On Time During
Soft-Start
tON
VIN = 5V, RLOAD = 100Ω, CLOAD = 10µF,
VOUT = 20% of VIN to 80% of VIN
1.5
ms
IN OVP Turn-Off Response Time
tOFF
From VIN > VOVLO to VOUT = 80% of VIN,
RLOAD = 100Ω
1
µs
tOTG_ON
Time from OTG_EN high to VIN = 80% of
VOUT, VOUT = 5V, CIN = 10µF
1.4
ms
VIN = VOUT = 5V, current pulse duration
after an OTG_EN transition from high to low
1.1
ms
OTG Turn-On Time
In-Discharge Pulse Duration
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Maxim Integrated │ 3
MAX14670–MAX14673
Bidirectional Current-Blocking, High-Input
Overvoltage Protector
with Adjustable OVLO
Electrical Characteristics (continued)
(VIN = +3V to +28V, VOUT = +3V to +24V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VIN = +5V, TA = +25°C.)
(Note 4)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
THERMAL PROTECTION
Thermal Shutdown
TSHDN
150
°C
Thermal Hysteresis
THYST
20
°C
ESD PROTECTION
Human Body Model
IN pin
±15
kV
IEC 61000-4-2 Contact
Discharge
IN pin
±8
kV
IEC 61000-4-2 Air-Gap Discharge
IN pin
±8
kV
Note 4: All devices are 100% production tested at TA = +25°C. Limits over the operating temperature range are guaranteed by
design and not production tested.
tOFF
tDEB
OVLO
IN
2.2V
tDEB
OUT
tDEB
tOTG_ON
tON
tON
tSS
THERMAL
SHUTDOWN
tOFF
VOVLO_TH
OVLO
ACOK
VACOK
ACOK
tDEB
DEASSERT
ACOK, ACOK
GOOD SIGNAL
OTG_EN
Figure 1. Timing Diagram
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Maxim Integrated │ 4
MAX14670–MAX14673
Bidirectional Current-Blocking, High-Input
Overvoltage Protector
with Adjustable OVLO
Typical Operating Characteristics
(VIN = +5V, OVLO = GND, CIN = 0.1µF, COUT = 1µF, TA = +25°C, unless otherwise noted.)
200
TA = +25ºC
100
TA = -40ºC
50
0
0.2
0
-0.2
-0.4
20
-1.0
30
0
MAX14670 toc04
1.4
1.2
1.0
0.8
0.6
NORMALIZED TO 0.1A
LOAD CURRENT
0
OUT-IN LEAKAGE CURRENT (µA)
10
1
2
3
4
4
0.6
8
6
-40
-15
10
35
300
250
TA = +85ºC
200
150
TA = +25ºC
100
TA = -40ºC
50
0
5
7
6
5
4
3
2
1
0
2
4
OUT VOLTAGE (V)
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6
85
OUTPUT SUPPLY CURRENT
vs. OUTPUT VOLTAGE
OTG_EN = HIGH
0
5
10
15
20
NORMALIZED INTERNAL OVLO
THRESHOLD vs. TEMPERATURE
8
60
TEMPERATURE (ºC)
OUT-IN LEAKAGE CURRENT
vs. OUT VOLTAGE
VIN = 0V
MAX14670 toc03
IOUT = 1A
NORMALIZED TO +25ºC
OUTPUT VOLTAGE (V)
9
0
VIN = +5V
0.9
OUTPUT CURRENT (A)
MAX14670 toc06
NORMALIZED RON
1.6
0.2
1.0
VOVLO (V)
1.8
0
2
NORMALIZED ON-RESISTANCE
vs. OUTPUT CURRENT
0.4
1.1
0.7
VIN = 0V
IN VOLTAGE (V)
2.0
1.2
0.8
-0.6
-0.8
10
0
0.4
VIN = +3.6V
1.3
1.05
25
MAX14670 toc07
150
0.6
MAX14670 toc05
250
1.4
NORMALIZED RON
TA = +85ºC
NORMALIZED ON-RESISTANCE
vs. TEMPERATURE
0.8
OUTPUT SUPPLY CURRENT (µA)
300
1.0
NORMALIZED INTERNAL OVLO THRESHOLD
IN SUPPLY CURRENT (µA)
350
OVLO LEAKAGE CURRENT
vs. OVLO VOLTAGE
MAX14670 toc02
MAX14670
OVLO LEAKAGE CURRENT (nA)
400
MAX14670 toc01
IN SUPPLY CURRENT
vs. IN VOLTAGE
1.04
1.03
1.02
1.01
1.00
0.99
0.98
0.97
0.96
0.95
NORMALIZED TO +25ºC
-40
-15
10
35
60
85
TEMPERATURE (ºC)
Maxim Integrated │ 5
MAX14670–MAX14673
Bidirectional Current-Blocking, High-Input
Overvoltage Protector
with Adjustable OVLO
Typical Operating Characteristicsc (continued)
1.02
1.01
1.00
0.99
0.98
0.97
VIN = +6V
NORMALIZED TO +25ºC
0.96
0.95
-40
-15
10
35
60
85
1.04
1.03
1.02
1.01
1.00
0.99
0.98
0.97
0.96
0.95
TEMPERATURE (ºC)
35
60
1.05
1.00
0.95
0.90
RL = 100Ω, CL = 10µF
NORMALIZED TO +25ºC
85
0.80
-40
-15
IOUT = 500mA
COUT = 100µF
10
35
60
85
TEMPERATURE (ºC)
POWER-UP RESPONSE,
COUT = 1000µF
MAX14670 toc11
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10
1.10
TEMPERATURE (ºC)
POWER-UP RESPONSE,
COUT = 100µF
10ms/div
-15
1.15
0.85
NORMALIZED TO +25ºC
-40
1.20
MAX14670 toc10
1.05
NORMALIZED DEBOUNCE TIME
1.03
NORMALIZED DEBOUNCE TIME
vs. TEMPERATURE
NORMALIZED EXTERNAL OVLO SELECT
THRESHOLD vs. TEMPERATURE
MAX14670 toc09
1.04
NORMALIZED EXTERNAL OVLO SELECT THRESHOLD
1.05
NORMALIZED EXTERNAL OVLO SET
THRESHOLD vs. TEMPERATURE
MAX14670 toc08
NORMALIZED EXTERNAL OVLO SET THRESHOLD
(VIN = +5V, OVLO = GND, CIN = 0.1µF, COUT = 1µF, TA = +25°C, unless otherwise noted.)
MAX14670 toc12
VIN
5V/div
VIN
5V/div
VOUT
5V/div
VOUT
5V/div
VACOK
2V/div
IOUT = 500mA
COUT = 1000µF
VACOK
2V/div
10ms/div
Maxim Integrated │ 6
MAX14670–MAX14673
Bidirectional Current-Blocking, High-Input
Overvoltage Protector
with Adjustable OVLO
Typical Operating Characteristicsc (continued)
(VIN = +5V, OVLO = GND, CIN = 0.1µF, COUT = 1µF, TA = +25°C, unless otherwise noted.)
OTG_EN ENABLE
VOUT = 5V VOVLO = 0V
CIN = 10µF IIN = 250mA
0V
OTG_EN DISABLE
MAX14670 toc13
VOTG_EN
5V/div
VOTG_EN
5V/div
VIN
5V/div
VIN
5V/div
VOUT
5V/div
VOUT = 5V VOVLO = 0V
CIN = 10µF IIN = 250mA
0V
2ms/div
VOUT
5V/div
2ms/div
OVERVOLTAGE FAULT RESPONSE
80V SURGE TEST WAVEFORM
80V SURGE TEST WAVEFORM
MAX14670 toc15
MAX14670 toc17
MAX14670 toc16
VIN
5V/div
0V
MAX14670 toc14
WITH MAX14670
WITHOUT MAX14670
VOUT
5V/div
VIN
20V/div
VIN
20V/div
VOUT
20V/div
VACOK
2V/div
IOUT = 500mA
10ms/div
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10µs/div
10µs/div
Maxim Integrated │ 7
MAX14670–MAX14673
Bidirectional Current-Blocking, High-Input
Overvoltage Protector
with Adjustable OVLO
Pin Configurations
TOP VIEW
(BUMPS ON BOTTOM)
+
MAX14670
MAX14671
1
2
3
4
5
OUT
OUT
OUT
OUT
OTG_EN
OUT
IN
ACOK
OVLO
ACOK
IN
IN
IN
IN
GND
IN
IN
IN
10
9
8
GND ACOK
7
6
A
MAX14672
MAX14673
B
EP
+
C
1
2
3
4
5
OUT OUT OVLO OTG_ ACOK
EN
WLP
TDFN-EP
*CONNECT EP TO GND
Pin Descriptions
BUMP
PIN
MAX14670/
MAX14671
MAX14672/
MAX14673
NAME
A1­–B1
1, 2
OUT
A5
4
OTG_EN
B2, C1­–C4
8-10
IN
B3
6
ACOK
1.8V Logic Output. ACOK is driven high after input voltage is stable between
minimum VIN and VOVLO when OTG_EN = 0. Connect a pulldown resistor from
ACOK to ground.
B4
3
OVLO
Overvoltage Lockout Input. Connect OVLO to GND to use internal OVLO threshold.
Connect OVLO to a resistor-divider for a different voltage threshold.
B5
5
ACOK
Open-Drain Flag Output. ACOK is driven low after input voltage is stable between
minimum VIN and VOVLO when OTG_EN = 0. Connect a pullup resistor from
ACOK to the logic I/O voltage of the host system.
C5
7
GND
—
—
EP
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FUNCTION
Overvoltage Protection Output. Bypass OUT with a 1µF ceramic capacitor.
Externally connect all OUT together.
Enable Input for OTG Supply Operation
Overvoltage Protection Input. If desired, bypass IN with a 0.1µF ceramic capacitor
as close to the device as possible. Externally connect all IN together.
Ground
Exposed Pad (TDFN only) Connect EP to ground.
Maxim Integrated │ 8
MAX14670–MAX14673
Bidirectional Current-Blocking, High-Input
Overvoltage Protector
with Adjustable OVLO
Functional Diagram
Q1
Q2
IN
OUT
TVS
CLAMP
ANALOG/DIGITAL CONTROL
IN CHARGE PUMP
AND GATE DRIVER
OUT CHARGE PUMP
AND GATE DRIVER
VCC1_INT
1.8V LDO
BG OK
TIMING
AND
CONTROL
LOGIC
CURRENT
SHOT
ACOK
VCC1_INT
SEL
ACOK
COMP
VBG
OVLO
CLAMP
IN OTG
LOGIC
LEVEL
SHIFTER
ENB
MAX14670
MAX14673
OTG_EN
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Maxim Integrated │ 9
MAX14670–MAX14673
Bidirectional Current-Blocking, High-Input
Overvoltage Protector
with Adjustable OVLO
Detailed Description
OTG Enable
The MAX14670–MAX14673 overvoltage protection
(OVP) devices feature low on-resistance (RON) internal
FETs (Q1+Q2) and protect low-voltage systems against
voltage faults up to +28VDC. An internal clamp also
protects the devices from surges up to +80V. If the input
voltage exceeds the overvoltage threshold, the output
is disconnected from the input to prevent damage to
the protected components. The 15ms debounce time
prevents false turn-on of the internal FETs during startup.
The devices feature reverse turn-on capability. OTG_EN
can be used to turn on the switch for OUT to feed back
to IN when the voltage applied at OUT is above the minimum startup voltage. When OTG_EN is high, ACOK and
ACOK are deasserted. During the OTG operation, if IN
goes above OVLO, the OVP switch turns off. It is recommended that the power is supplied to OUT prior to OTG
operation and also the power is removed from OUT prior
to disable OTG operation.
Soft-Start
Thermal Shutdown Protection
To minimize inrush current, the devices feature a soft-start
capability to slowly turn on Q1 and Q2. Soft-start begins
when ACOK/ACOK is asserted and ends after 15ms (typ).
Overvoltage Lockout (OVLO)
Connect OVLO to ground to use the internal OVLO
comparator with the internally set OVLO value. When
IN goes above the overvoltage lockout threshold
(VIN_OVLO), OUT is disconnected from IN and ACOK/
ACOK is deasserted. When IN drops below VIN_OVLO,
the debounce time starts counting. After the debounce
time, OUT follows IN again and ACOK/ACOK is asserted.
External OVLO Adjustment Functionality
When an external resistor-divider is connected to
OVLO and VOVLO exceeds the OVLO select voltage
(VOVLO_SEL), the internal OVLO comparator reads IN by
the external resistor-divider.
R1 = 1MΩ is a good starting value for minimum current
consumption. Since VIN_OVLO, VOVLO_TH, and R1 are
known, R2 can be calculated from the following formula:
This external resistor-divider is completely independent
from the internal resistor-divider.
Reverse Bias Blocking
The ICs feature reverse bias blocking. When IN voltage
is below input startup voltage and OTG_EN is low, the
switch between IN and OUT is open and the two backto-back diodes of the two series switches block reverse
bias. Therefore, when the voltage is applied at the output,
current does not travel back to the input. When OVLO is
high, the parts block against reverse bias as well.
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The devices feature thermal shutdown protection to protect the devices from overheating. The internal FETs turn
off when the junction temperature exceeds +150°C (typ),
and the device returns to normal operation after the temperature drops by approximately 20°C (typ).
Applications Information
IN Bypass Capacitor
If desired, bypass IN to GND with a 0.1µF ceramic capacitor as close to the device as possible. If the power source
has significant inductance due to long lead length, the
device prevents overshoots due to the LC tank circuit and
provides protection by clamping the overshooting.
Output Capacitor
The slow turn-on time provides a soft-start function that
allows the devices to charge an output capacitor up to
1000µF without turning off due to an overcurrent condition. Bypass OUT to GND with a minimum of 1µF ceramic
capacitor.
Extended ESD Protection
ESD protection structures are incorporated on all pins
to protect against electrostatic discharges up to ±2kV
(Human Body Model) encountered during handling and
assembly. IN is further protected against ESD up to ±15kV
(HBM), ±15kV (Air-Gap Discharge method described in
IEC 61000-4-2) and ±8kV (Contact Discharge Method
described in IEC 61000-4-2) without damage.
The ESD structures withstand high ESD both in normal
operation and when the device is powered down. After an
ESD event, the MAX14670–MAX14673 continue to function without latchup.
Maxim Integrated │ 10
MAX14670–MAX14673
Bidirectional Current-Blocking, High-Input
Overvoltage Protector
with Adjustable OVLO
ESD Test Conditions
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents test
setup, test methodology, and test results.
Human Body Model ESD Protection
Figure 2 shows the HBM and Figure 3 shows the current waveform it generates when discharged into a lowimpedance state. This model consists of a 100pF capacitor charged to the ESD voltage of interest, which is then
discharged into the device through a 1.5kΩ resistor.
RC
1MΩ
RC
50MΩ TO 100MΩ
DISCHARGE
RESISTANCE
CS
100pF
STORAGE
CAPACITOR
CHARGE-CURRENTLIMIT RESISTOR
DEVICE
UNDER
TEST
Figure 2. Human Body ESD Test Model
HIGHVOLTAGE
DC
SOURCE
CS
150pF
RD
330Ω
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
DEVICE
UNDER
TEST
Figure 4. IEC 61000-4-2 ESD Test Model
IPEAK (AMPS)
IPEAK (AMPS)
Ir
100%
90%
The IEC 61000-4-2 standard covers ESD testing and
performance of finished equipment. However, it does not
specifically refer to integrated circuits. The major difference between tests done using the Human Body Model
and IEC 61000-4-2 is higher peak current in IEC 610004-2 because series resistance is lower in the IEC 610004-2 model. Hence, the ESD withstand voltage measured
to IEC 61000-4-2 is generally lower than that measured
using the Human Body Model. Figure 4 shows the IEC
61000-4-2 model, and Figure 5 shows the current waveform for the IEC 61000-4-2 ESD Contact Discharge test.
RD
1.5kΩ
CHARGE-CURRENTLIMIT RESISTOR
HIGHVOLTAGE
DC
SOURCE
IEC 61000-4-2
100%
90%
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
36.8%
10%
0
0
TIME
tRL
tDL
Figure 3. Human Body Current Waveform
www.maximintegrated.com
10%
tR = 0.7ns TO 1ns
t
30ns
60ns
Figure 5. IEC 61000-4-2 ESD Generator Current Waveform
Maxim Integrated │ 11
MAX14670–MAX14673
Bidirectional Current-Blocking, High-Input
Overvoltage Protector
with Adjustable OVLO
Typical Operating Circuit
PMIC/CHARGER
DOCKING
STATION/TA
5V/12V
CHARGER
INPUT
0.1µF
IN
OUT
OVLO
REVERSE BOOST
CHARGER
ACOK
OTG_EN
VBUS
IN
ACOK
OUT
MAX14670
MAX14673
0.1µF
SYSTEM
BATTERY
OTG_EN
R2
USB MICRO-AB
5V/12V/20V
1µF
MAX14670
MAX14673
R1
CHARGER
INPUT
OTG
1µF
VIO
OVLO
ACOK
OTG_EN
ACOK
APPS PROCESSOR
10kΩ
USB IN
10kΩ
Ordering Information/Selector Guide
OVLO
(V)
TOP MARK
PINPACKAGE
MAX14670EWL+T
6.8
+14670EWL
15 WLP
MAX14671EWL+T**
15.5
+14671EWL
15 WLP
MAX14672ETB+T**
5.825
AZF
10 TDFN-EP*
MAX14673ETB+T**
22
AZG
10 TDFN-EP*
PART
Note: All devices are specified over -40°C to +85°C operating
temperature range.
+Denotes a lead(Pb)-free package/RoHS-compliant package.
T = Tape and reel.
*EP = Exposed pad.
**Future product—contact factory for availability.
www.maximintegrated.com
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
10 TDFN
T1033+1
21-0137
90-0003
15 WLP
W151C2+1
21-0686
Refer to
Application
Note 1891
Maxim Integrated │ 12
MAX14670–MAX14673
Bidirectional Current-Blocking, High-Input
Overvoltage Protector
with Adjustable OVLO
Revision History
REVISION
NUMBER
REVISION
DATE
0
6/13
DESCRIPTION
Initial release
PAGES
CHANGED
—
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
© 2013 Maxim Integrated Products, Inc. │ 13