Design Idea DI-31 ™ DPA-Switch 5 V, 70 W DC-DC ® Converter with Synchronous Rectification Application Device Power Output Input Voltage Output Voltage Topology DC-DC Converter DPA426R 70 W 36-75 VDC 5V Forward Design Highlights applied to MOSFETs Q1 to Q6, eliminating the need for gate voltage clamp circuitry. The self-driven synchronous rectification configuration is therefore very simple, with R4 to R6 filtering voltage spikes at the gates of Q1, Q2 and Q3 and D4 preventing the body diodes of Q4, Q5 and Q6 from conducting. • • • • • • Extremely low component count High efficiency, 90% using synchronous rectification No current sense resistor or current transformer required Output overload, open loop and thermal protection Accurate input under/overvoltage meets ETSI standards 300 kHz switching frequency – optimizes efficiency using Capacitor C9, diodes D1-D2, and inductor L2 form a resonant simple self-driven synchronous rectification snubber that recycles leakage and magnetizing energy stored in T1, and also helps to reset T1. Zener diode VR1 provides a hard voltage limit and only conducts during output transient Operation and overload conditions. Capacitor C12 and Resistor R7 The 70 W converter shown in Figure 1 benefits from many of damp secondary switching spikes and help to reset T1. the DPA-Switch integrated features. In particular, no external current sense components are required. In a discrete implementation, an expensive current transformer and a number Key Design Points of additional components would increase the cost of this • For nominal undervoltage set point V : UV converter significantly. R1 = (VUV - 2.35 V)/50 µA. VOV = (R1 x 135 µA) + 2.5 V. • Locate C10, C11, and R3 close to the U1 CONTROL pin, R1 programs the input UV/OV thresholds. The tight tolerance with ground connections returned to SOURCE pin. of the UV/OV thresholds limits the range of gate drive voltages C7 1 nF 1.5 kV + VIN 36-75 VDC L1 1 µH 2.5 A T1 1 D1 ESD1 L2 220 µH S -VIN VR1 SMBJ 150 D2 ESD1 X C L5 D3 2.2 mH BAV19WS 40 mA D5 BAV19WS U2 R7 1Ω R3 1.0 Ω C10 220 nF D6 BAV19WS R11 150 Ω U2 PC357N1T F R13 10 kΩ C8 1 µF 25 V U1 DPA426R R2 6.8 kΩ 1% RTN C12 2.2 nF, 50 V DPA-Switch CONTROL CONTROL 5 V, 14 A C20 1 µF 10 V D4 Q1-Q3 42CTQ30S SI4842DY 4 L C18, C19 100 µF 10 V L4 100 nH 20 A 2 5 D C13, C14, C15, C16, C17 100 µF 10 V (x5) 6,7 R1 619 kΩ C9 150 pF 200 V C3, C4, C5, C6 1 µF 100 V (x4) L3 3.8 µH 20 A 9,10 3 C1, C2 1 µF 100 V Q4-Q6 SI4842DY R4-R6 10 Ω C11 68 µF 10 V R15 10.0 kΩ 1% C22 100 nF R10 5.1 Ω R14 220 Ω C23 10 µF 10 V C21 1 µF U3 LM431AIM3 R16 10.0 kΩ 1% PI-3375-121602 Figure 1. DPA426 70 W, 5 V, 14 A DC-DC Converter. DI-31 www.powerint.com December 2002 DI-31 • Minimize primary and secondary high current loop areas to reduce parasitic inductance. • Optocoupler U2 should have a controlled CTR range of 100 to 200% for optimum loop stability. • Size transformer reset components to ensure transformer reset at minimum operating voltage without exceeding 170 V drain voltage at high line. It may be necessary to gap T1 to offset effect of Q4-Q6 gate capacitance. • Set Zener VR1 clamp voltage to 150 V to both safely limit the DRAIN below BVDSS and guarantee transformer reset. • Select number of bias turns to provide 12 V to 14 V at minimum input voltage and full load. • Main primary power return should be connected to the DPA-Switch tab, not to the SOURCE pin. • Scale time constant of C9 and L2 to allow C9 to reset completely during minimum on-time conditions. • Consult AN-31 for additional design tips and information. TRANSFORMER PARAMETERS Core Material EFD25, 3F3 Gap for ALG = 1100 nH/T2 Bobbin EFD25 10 pin (B&B B-025 or equivalent) Winding Details Bias: 5T, 30 AWG Primary: 6T+ 5T, 4 x 26 AWG Secondary: 3T, 0.005" Cu foil Winding Order (Pin Numbers) Primary (3-2), tape, Bias (4-5), tape, Secondary (6,7-9,10), tape, Primary (2-1), tape Inductance Primary: 130 µH ±10%, Leakge: 10 µH (max) Primary Resonant Frequency 3 MHz (minimum) Table 1. Transformer Design Parameters. PI-3376-091502 92 Efficiency (%) 90 OUTPUT INDUCTOR PARAMETERS 88 Core EE22, TDK PC40 Material Gap for ALG of 250 nH/T2 86 Bobbin TDK BE-22-5116 Winding Details 4T, 0.016" Cu foil Inductance 4 µH ± 10% 84 VIN = 36 VDC VIN = 48 VDC VIN = 60 VDC VIN = 72 VDC 82 Table 2. Output Inductor Construction Information. 80 0 20 40 60 80 Output Power (W) Figure 2. Efficiency vs. Output Power. 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