19-4778; Rev 1; 1/02 IT K ATION EVALU E L B AVAILA 1.8V to 28V Input, PWM Step-Up Controllers in µMAX The MAX668/MAX669 constant-frequency, pulse-width modulating (PWM), current-mode DC-DC controllers are designed for a wide range of DC-DC conversion applications including step-up, SEPIC, flyback, and isolatedoutput configurations. Power levels of 20W or more can be controlled with conversion efficiencies of over 90%. The 1.8V to 28V input voltage range supports a wide range of battery and AC-powered inputs. An advanced BiCMOS design features low operating current (220µA), adjustable operating frequency (100kHz to 500kHz), soft-start, and a SYNC input allowing the MAX668/ MAX669 oscillator to be locked to an external clock. DC-DC conversion efficiency is optimized with a low 100mV current-sense voltage as well as with Maxim’s proprietary Idle Mode™ control scheme. The controller operates in PWM mode at medium and heavy loads for lowest noise and optimum efficiency, then pulses only as needed (with reduced inductor current) to reduce operating current and maximize efficiency under light loads. A logic-level shutdown input is also included, reducing supply current to 3.5µA. The MAX669, optimized for low input voltages with a guaranteed start-up voltage of 1.8V, requires bootstrapped operation (IC powered from boosted output). It supports output voltages up to 28V. The MAX668 operates with inputs as low as 3V and can be connected in either a bootstrapped or non-bootstrapped (IC powered from input supply or other source) configuration. When not bootstrapped, it has no restriction on output voltage. Both ICs are available in an extremely compact 10-pin µMAX package. Features ♦ 1.8V Minimum Start-Up Voltage (MAX669) ♦ Wide Input Voltage Range (1.8V to 28V) ♦ Tiny 10-Pin µMAX Package ♦ Current-Mode PWM and Idle Mode™ Operation ♦ Efficiency Over 90% ♦ Adjustable 100kHz to 500kHz Oscillator or SYNC Input ♦ 220µA Quiescent Current ♦ Logic-Level Shutdown ♦ Soft-Start Applications Cellular Telephones Telecom Hardware LANs and Network Systems POS Systems Ordering Information PART TEMP RANGE PIN-PACKAGE MAX668EUB -40°C to +85°C 10 µMAX MAX669EUB -40°C to +85°C 10 µMAX Idle Mode is a trademark of Maxim Integrated Products. Pin Configuration Typical Operating Circuit VIN = 1.8V to 28V TOP VIEW VOUT = 28V SYNC/ SHDN VCC FREQ EXT CS+ MAX669 PGND LDO FB REF LDO 1 FREQ 10 SYNC/SHDN 2 MAX668 MAX669 9 VCC GND 3 8 EXT REF 4 7 PGND FB 5 6 CS+ µMAX GND ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX668/MAX669 General Description MAX668/MAX669 1.8V to 28V Input, PWM Step-Up Controllers in µMAX ABSOLUTE MAXIMUM RATINGS VCC to GND ..........................................................-0.3V to +30V PGND to GND....................................................................±0.3V SYNC/SHDN to GND .............................................-0.3V to +30V EXT, REF to GND.....................................-0.3V to (VLDO + 0.3V) LDO, FREQ, FB, CS+ to GND ................................ -0.3V to +6V LDO Output Current...........................................-1mA to +20mA REF Output Current..............................................-1mA to +1mA LDO Short Circuit to GND .........................................Momentary REF Short Circuit to GND ..........................................Continuous Continuous Power Dissipation (TA = +70°C) 10-Pin µMAX (derate 5.6mW/°C above +70°C) ..........444mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering,10sec) ..............................+300°C ELECTRICAL CHARACTERISTICS (VCC = LDO = 5V, ROSC = 200kΩ, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER CONDITIONS MIN TYP MAX UNITS PWM PWM Controller CONTROLLER Input Voltage Range, VCC MAX668 3 28 MAX669 1.8 28.0 2.7 5.5 V 1.275 V Input Voltage Range with VCC Tied to LDO FB Threshold 1.225 1.250 V FB Threshold Load Regulation Typically 0.013% per mV on CS+; VCS+ range is 0 to 100mV for 0 to full load current. 0.013 %/mV FB Threshold Line Regulation Typically 0.012% per % duty factor on EXT; EXT duty factor for a step-up is: 100% (1 – VIN/VOUT) 0.012 %/% FB Input Current VFB = 1.30V 1 20 nA Current-Limit Threshold 85 100 115 mV Idle Mode Current-Sense Threshold 5 15 25 mV CS+ Input Current CS+ forced to GND 0.2 1 µA VCC Supply Current (Note 1) VFB = 1.30V, VCC = 3V to 28V 220 350 µA Shutdown Supply Current (VCC) SYNC/SHDN = GND, VCC = 28V 3.5 6 µA 5.00 5.50 REFERENCE Reference and AND LDOLDO Regulators REGULATORS LDO Output Voltage LDO load = ∞ to 400Ω 5V ≤ VCC ≤ 28V (includes LDO dropout) 4.50 3V ≤ VCC ≤ 28V (includes LDO dropout) 2.65 V 5.50 Undervoltage Lockout Threshold Sensed at LDO, falling edge, hysteresis = 1%, MAX668 only 2.40 2.50 2.60 REF Output Voltage No load, CREF = 0.22µF 1.225 1.250 1.275 V REF Load Regulation REF load = 0 to 50µA -2 -10 mV REF Undervoltage Lockout Threshold Rising edge, 1% hysteresis 1.0 1.1 1.2 V ROSC = 200kΩ ±1% 225 250 275 ROSC = 100kΩ ±1% 425 500 575 ROSC = 500kΩ ±1% 85 100 115 V OSCILLATOR Oscillator Oscillator Frequency 2 _______________________________________________________________________________________ kHz 1.8V to 28V Input, PWM Step-Up Controllers in µMAX MAX668/MAX669 ELECTRICAL CHARACTERISTICS (continued) (VCC = LDO = 5V, ROSC = 200kΩ, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER Maximum Duty Cycle CONDITIONS MIN TYP MAX ROSC = 200kΩ ±1% 87 90 93 ROSC = 100kΩ ±1% 86 90 94 ROSC = 500kΩ ±1% 86 90 94 UNITS % Minimum EXT Pulse Width 290 Minimum SYNC Input-Pulse Duty Cycle 20 45 % Minimum SYNC Input Low Pulse Width 50 200 ns SYNC Input Rise/Fall Time Not tested SYNC Input Frequency Range 100 SYNC/SHDN Input Low Voltage SYNC/SHDN Input Current 200 ns 500 kHz 70 SYNC/SHDN Falling Edge to Shutdown Delay SYNC/SHDN Input High Voltage ns 3V < VCC < 28V 2.0 1.8V < VCC < 3V (MAX669) 1.5 µs V 3V < VCC < 28V 0.45 1.8V < VCC < 3V (MAX669) 0.30 SYNC/SHDN = 5V 0.5 3.0 SYNC/SHDN = 28V 1.5 6.5 EXT Sink/Source Current EXT forced to 2V 1 EXT On-Resistance EXT high or low 2 V µA A 5 Ω ELECTRICAL CHARACTERISTICS (VCC = LDO = 5V, ROSC = 200kΩ, TA = -40°C to +85°C, unless otherwise noted.) (Note 2) PARAMETER CONDITIONS MIN MAX MAX668 3 28 MAX669 1.8 28 UNITS PWM PWM Controller CONTROLLER Input Voltage Range, VCC V Input Voltage Range with VCC Tied to LDO 2.7 5.5 FB Threshold 1.22 1.28 V 20 nA FB Input Current VFB = 1.30V V Current-Limit Threshold 85 115 mV Idle Mode Current-Sense Threshold 3 27 mV CS+ Input Current CS+ forced to GND VCC Supply Current (Note 1) VFB = 1.30V, VCC = 3V to 28V Shutdown Supply Current (VCC) SYNC/SHDN = GND, VCC = 28V 1 µA 350 µA 6 µA Reference REFERENCE andAND LDOLDO Regulators REGULATORS LDO Output Voltage LDO Undervoltage Lockout Threshold LDO load = ∞ to 400Ω 5V ≤ VCC ≤ 28V (includes LDO dropout) 4.50 5.50 3V ≤ VCC ≤ 28V (includes LDO dropout) 2.65 5.50 V 2.40 2.60 V Sensed at LDO, falling edge, hysteresis = 1%, MAX669 only V _______________________________________________________________________________________ 3 MAX668/MAX669 1.8V to 28V Input, PWM Step-Up Controllers in µMAX ELECTRICAL CHARACTERISTICS (continued) (VCC = LDO = 5V, ROSC = 200kΩ, TA = -40°C to +85°C, unless otherwise noted.) PARAMETER CONDITIONS MIN MAX 1.22 1.28 V -10 mV 1.0 1.2 V ROSC = 200kΩ ±1% 222 278 ROSC =100kΩ ±1% 425 575 ROSC = 500kΩ ±1% 85 115 ROSC = 200kΩ ±1% 87 93 ROSC = 100kΩ ±1% 86 94 ROSC = 500kΩ ±1% 86 94 REF Output Voltage No load, CREF = 0.22µF REF Load Regulation REF load = 0 to 50µA REF Undervoltage Lockout Threshold Rising edge, 1% hysteresis UNITS OSCILLATOR Oscillator Frequency Maximum Duty Cycle kHz % Minimum SYNC Input-Pulse Duty Cycle 45 % Minimum SYNC Input Low Pulse Width 200 ns 200 ns 500 kHz SYNC Input Rise/Fall Time Not tested SYNC Input Frequency Range SYNC/SHDN Input High Voltage SYNC/SHDN Input Low Voltage SYNC/SHDN Input Current EXT On-Resistance 100 3V < VCC < 28V 2.0 1.8V < VCC < 3V (MAX669) 1.5 3V < VCC < 28V 0.45 1.8V < VCC < 3V (MAX669) 0.30 SYNC/SHDN = 5V 3.0 SYNC/SHDN = 28V 6.5 EXT high or low Note 1: This is the VCC current consumed when active but not switching. Does not include gate-drive current. Note 2: Limits at TA = -40°C are guaranteed by design. 4 V _______________________________________________________________________________________ 5 V µA Ω 1.8V to 28V Input, PWM Step-Up Controllers in µMAX MAX668 EFFICIENCY vs. LOAD CURRENT (VOUT = 12V) 90 VIN = 2.7V 75 VIN = 2V 70 VIN = 5V NON-BOOTSTRAPPED FIGURE 4 R4 = 200kΩ 75 BOOTSTRAPPED FIGURE 3 R4 = 200kΩ 100 1000 10 100 1000 LOAD CURRENT (mA) LOAD CURRENT (mA) MAX669 MINIMUM START-UP VOLTAGE vs. LOAD CURRENT SUPPLY CURRENT vs. SUPPLY VOLTAGE 2.0 VOUT = 12V 1.5 1.0 0.5 800 MAX669 600 400 200 BOOTSTRAPPED FIGURE 2 1 3000 2500 2000 1500 1000 500 5 10 15 20 25 30 0 2 4 6 8 10 LOAD CURRENT (mA) SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) SHUTDOWN CURRENT vs. SUPPLY VOLTAGE SUPPLY CURRENT vs. TEMPERATURE LDO DROPOUT VOLTAGE vs. LDO CURRENT 2.0 1.5 1.0 ROSC = 100kΩ 250 230 ROSC = 200kΩ 210 ROSC = 500kΩ 190 12 250 VIN = 3V 200 150 VIN = 4.5V 100 50 170 0.5 300 LDO DROPOUT VOLTAGE (mV) MAX668 MAX668 toc08 270 SUPPLY CURRENT (µA) MAX669 2.5 290 MAX668 toc07 3.5 3.0 0 0 100 200 300 400 500 600 700 800 900 1000 10,000 VOUT = 12V BOOTSTRAPPED FIGURE 2 R4 = 200kΩ 3500 0 0 100 1000 LOAD CURRENT (mA) 4000 MAX668 0 10 NO-LOAD SUPPLY CURRENT vs. SUPPLY VOLTAGE CURRENT INTO VCC PIN ROSC = 500kΩ 1000 SUPPLY CURRENT (µA) VOUT = 5V 2.5 NON-BOOTSTRAPPED FIGURE 4 R4 = 200kΩ 10,000 1200 MAX668 toc04 3.0 80 70 1 10,000 NO-LOAD SUPPLY CURRENT (µA) 10 MAX668 toc05 1 VIN = 5V 75 70 50 85 MAX668 toc09 55 MINIMUM START-UP VOLTAGE (V) 80 65 60 SHUTDOWN CURRENT (µA) 85 VIN = 8V MAX668 toc06 EFFICIENCY (%) EFFICIENCY (%) 80 VIN = 12V 90 EFFICIENCY (%) VIN = 3.3V 85 95 MAX668 toc02 VIN = 3.6V 90 95 MAX668 toc01 95 MAX668 EFFICIENCY vs. LOAD CURRENT (VOUT = 24V) MAX668 toc03 EFFICIENCY vs. LOAD CURRENT (VOUT = 5V) CURRENT INTO VCC PIN 150 0 0 5 10 15 20 SUPPLY VOLTAGE (V) 25 30 0 -40 -20 0 20 40 60 TEMPERATURE (°C) 80 100 0.1 1 10 20 LDO CURRENT (mA) _______________________________________________________________________________________ 5 MAX668/MAX669 Typical Operating Characteristics (Circuits of Figures 2, 3, 4, and 5; TA = +25°C; unless otherwise noted.) Typical Operating Characteristics (continued) (Circuits of Figures 2, 3, 4, and 5; TA = +25°C; unless otherwise noted.) REFERENCE VOLTAGE vs. TEMPERATURE SWITCHING FREQUENCY vs. ROSC 1.247 1.246 1.245 1.244 1.243 1.242 1.241 MAX668 toc11 1.248 450 400 350 300 250 200 150 100 50 VCC = 5V 1.240 VCC = 5V 0 -40 -20 0 20 40 60 80 100 0 100 200 300 ROSC (kΩ) SWITCHING FREQUENCY vs. TEMPERATURE EXT RISE/FALL TIME vs. CAPACITANCE 100kΩ 50 EXT RISE/FALL TIME (ns) 500 400 165kΩ 300 200 tR, VCC = 3.3V 40 tF, VCC = 3.3V 30 20 499kΩ tR, VCC = 5V 10 100 500 60 MAX668 toc12 600 VIN = 5V tF, VCC = 5V 0 0 -40 -20 0 20 40 60 TEMPERATURE (°C) 6 400 TEMPERATURE (°C) MAX668 toc13 REFERENCE VOLTAGE (V) 1.249 500 SWITCHING FREQUENCY (kHz) MAX668 toc10 1.250 SWITCHING FREQUENCY (kHz) MAX668/MAX669 1.8V to 28V Input, PWM Step-Up Controllers in µMAX 80 100 100 1000 CAPACITANCE (pF) _______________________________________________________________________________________ 10,000 1.8V to 28V Input, PWM Step-Up Controllers in µMAX ENTERING SHUTDOWN MAX668 toc14 MAX668 toc15 EXITING SHUTDOWN 0V SHUTDOWN VOLTAGE 5V/div OUTPUT VOLTAGE 5V/div INDUCTOR CURRENT 2A/div 0V 0A 0V OUTPUT VOLTAGE 5V/div 200µs/div 500µs/div MAX668, VIN = 5V, VOUT = 12V, LOAD = 1.0A, LOW VOLTAGE, NON-BOOTSTRAPPED MAX668, VIN = 5V, VOUT = 12V, LOAD = 1.0A, ROSC = 100kΩ, LOW VOLTAGE, NON-BOOTSTRAPPED LIGHT-LOAD SWITCHING WAVEFORM MAX668 toc16 HEAVY-LOAD SWITCHING WAVEFORM VOUT 200mV/div AC-COUPLED 0V MAX668 toc17 SHUTDOWN VOLTAGE 5V/div VOUT 100mV/div AC-COUPLED Q1, DRAIN 5V/div Q1, DRAIN 5V/div 0V 0V IL 1A/div 0A IL 1A/div 0A 1µs/div 1µs/div MAX668, VIN = 5V, VOUT = 12V, ILOAD = 1.0A, LOW VOLTAGE, NON-BOOTSTRAPPED MAX668, VIN = 5V, VOUT = 12V, ILOAD = 0.1A, LOW VOLTAGE, NON-BOOTSTRAPPED LOAD-TRANSIENT RESPONSE OUTPUT VOLTAGE AC-COUPLED 100mV/div LOAD CURRENT 1A/div MAX668 toc19 MAX668 toc18 LINE-TRANSIENT RESPONSE OUTPUT VOLTAGE 100mV/div AC-COUPLED INPUT VOLTAGE 5V/div 1ms/div MAX668, VIN = 5V, VOUT = 12V, ILOAD = 0.1A TO 1.0A, LOW VOLTAGE, NON-BOOTSTRAPPED 0V 20ms/div MAX668, VIN = 5V TO 8V, VOUT = 12V, LOAD = 1.0A, HIGH VOLTAGE, NON-BOOTSTRAPPED _______________________________________________________________________________________ 7 MAX668/MAX669 Typical Operating Characteristics (continued) (Circuits of Figures 2, 3, 4, and 5; TA = +25°C; unless otherwise noted.) 1.8V to 28V Input, PWM Step-Up Controllers in µMAX MAX668/MAX669 Pin Description PIN NAME FUNCTION 1 LDO 5V On-Chip Regulator Output. This regulator powers all internal circuitry including the EXT gate driver. Bypass LDO to GND with a 1µF or greater ceramic capacitor. 2 FREQ Oscillator Frequency Set Input. A resistor from FREQ to GND sets the oscillator from 100kHz (ROSC = 500kΩ) to 500kHz (ROSC = 100kΩ). fOSC = 5 x 1010 / ROSC. ROSC is still required if an external clock is used at SYNC/SHDN (see the SYNC/SHDN and FREQ Inputs section). 3 GND Analog Ground 4 REF 1.25V Reference Output. REF can source 50µA. Bypass to GND with a 0.22µF ceramic capacitor. 5 FB 6 CS+ 7 PGND Power Ground for EXT Gate Driver and Negative Current-Sense Input 8 EXT External MOSFET Gate-Driver Output. EXT swings from LDO to PGND. 9 VCC Input Supply to On-Chip LDO Regulator. VCC accepts inputs up to 28V. Bypass to GND with a 0.1µF ceramic capacitor. 10 SYNC/ SHDN Feedback Input. The FB threshold is 1.25V. Positive Current-Sense Input. Connect a current-sense resistor, RCS, between CS+ and PGND. Shutdown control and Synchronization Input. There are three operating modes: • SYNC/SHDN low: DC-DC off. • SYNC/SHDN high: DC-DC on with oscillator frequency set at FREQ by ROSC. • SYNC/SHDN clocked: DC-DC on with operating frequency set by SYNC clock input. DC-DC conversion cycles initiate on rising edge of input clock. Detailed Description The MAX668/MAX669 current-mode PWM controllers operate in a wide range of DC-DC conversion applications, including boost, SEPIC, flyback, and isolated output configurations. Optimum conversion efficiency is maintained over a wide range of loads by employing both PWM operation and Maxim’s proprietary Idle Mode control to minimize operating current at light loads. Other features include shutdown, adjustable internal operating frequency or synchronization to an external clock, soft start, adjustable current limit, and a wide (1.8V to 28V) input range. MAX668 vs. MAX669 Differences Differences between the MAX668 and MAX669 relate to their use in bootstrapped or non-bootstrapped circuits (Table 1). The MAX668 operates with inputs as low as 3V and can be connected in either a bootstrapped or non-bootstrapped (IC powered from input supply or other source) configuration. When not bootstrapped, the MAX668 has no restriction on output voltage. When bootstrapped, the output cannot exceed 28V. The MAX669 is optimized for low input voltages (down to 1.8V) and requires bootstrapped operation (IC powered from VOUT) with output voltages no greater than 8 28V. Bootstrapping is required because the MAX669 does not have undervoltage lockout, but instead drives EXT with an open-loop, 50% duty-cycle start-up oscillator when LDO is below 2.5V. It switches to closed-loop operation only when LDO exceeds 2.5V. If a non-bootstrapped connection is used with the MAX669 and if VCC (the input voltage) remains below 2.7V, the output voltage will soar above the regulation point. Table 2 recommends the appropriate device for each biasing option. Table 1. MAX668/MAX669 Comparison FEATURE MAX668 MAX669 VCC Input Range 3V to 28V 1.8V to 28V Operation Bootstrapped or nonbootstrapped. VCC can be connected to input, output, or other voltage source such as a logic supply. Must be bootstrapped (VCC must be connected to boosted output voltage, VOUT). UVLO IC stops switching for LDO below 2.5V. No Soft-Start Yes When LDO is above 2.5V _______________________________________________________________________________________ 1.8V to 28V Input, PWM Step-Up Controllers in µMAX Bootstrapped/Non-Bootstrapped Operation Low-Dropout Regulator (LDO) Several IC biasing options, including bootstrapped and non-bootstrapped operation, are made possible by an on-chip, low-dropout 5V regulator. The regulator input is at VCC, while its output is at LDO. All MAX668/MAX669 functions, including EXT, are internally powered from LDO. The V CC -to-LDO dropout voltage is typically 200mV (300mV max at 12mA), so that when VCC is less than 5.2V, LDO is typically VCC - 200mV. When LDO is in dropout, the MAX668/MAX669 still operate with VCC as low as 3V (as long as LDO exceeds 2.7V), but with reduced amplitude FET drive at EXT. The maximum VCC input voltage is 28V. LDO can supply up to 12mA to power the IC, supply gate charge through EXT to the external FET, and supply small external loads. When driving particularly large FETs at high switching rates, little or no LDO current may be available for external loads. For example, when switched at 500kHz, a large FET with 20nC gate charge requires 20nC x 500kHz, or 10mA. VCC and LDO allow a variety of biasing connections to optimize efficiency, circuit quiescent current, and fullload start-up behavior for different input and output voltage ranges. Connections are shown in Figures 2, 3, 4, and 5. The characteristics of each are outlined in Table 1. In PWM mode, the controller uses fixed-frequency, current-mode operation where the duty ratio is set by the input/output voltage ratio (duty ratio = (VOUT - VIN) / VIN in the boost configuration). The current-mode feedback loop regulates peak inductor current as a function of the output error signal. At light loads the controller enters Idle Mode. During Idle Mode, switching pulses are provided only as needed to service the load, and operating current is minimized to provide best light-load efficiency. The minimum-current comparator threshold is 15mV, or 15% of the full-load value (IMAX) of 100mV. When the controller is synchronized to an external clock, Idle Mode occurs only at very light loads. VCC LDO MAX669 ONLY 1.25V ANTISAT EXT LDO R1 552k PGND (MAX669 ONLY) UVLO MAX668 MAX669 R2 276k R3 276k FB CURRENT SENSE CS+ SLOPE COMPENSATION 100mV IMAX 15mV IMIN LOW-VOLTAGE START-UP OSCILLATOR MUX 0 1 REF 1.25V MAIN PWM COMPARATOR +A X6 -A +C -C X1 +S X1 -S SYNC/SHDN FREQ BIAS OSC OSC S Q R Figure 1. MAX668/MAX669 Functional Diagram _______________________________________________________________________________________ 9 MAX668/MAX669 PWM Controller The heart of the MAX668/MAX669 current-mode PWM controller is a BiCMOS multi-input comparator that simultaneously processes the output-error signal, the current-sense signal, and a slope-compensation ramp (Figure 1). The main PWM comparator is direct summing, lacking a traditional error amplifier and its associated phase shift. The direct summing configuration approaches ideal cycle-by-cycle control over the output voltage since there is no conventional error amp in the feedback path. MAX668/MAX669 1.8V to 28V Input, PWM Step-Up Controllers in µMAX VIN = 1.8V to 12V 1 C1 68µF 20V LDO C4 1µF EXT MAX669 9 C2 0.1µF 2 VOUT = 12V @ 0.5A 8 N1 D1 MBRS340T3 IRF7401 6 PGND FB GND FREQ C5 68µF 20V C6 68µF 20V R1 0.02Ω VCC 10 SYNC/ SHDN 4 REF C3 0.22µF CS+ L1 4.7µH 7 C8 0.1µF R2 218k 1% 5 R3 24.9k 1% C7 220pF 3 R4 100k 1% Figure 2. MAX669 High-Voltage Bootstrapped Configuration VIN = 1.8V to 5V 1 LDO C2 1µF EXT MAX669 9 2 CS+ L1 4.7µH FREQ VOUT = 5V @ 1A 8 N1 6 R1 0.02Ω VCC 10 SYNC/ SHDN 4 REF C3 0.22µF C1 68µF 10V PGND FB GND D1 MBRS340T3 FDS6680 IRF7401 C4 68µF 10V 7 C5 68µF 10V C6 0.1µF R2 75k 1% 5 3 C7 220pF R3 24.9k 1% R4 100k 1% Figure 3. MAX669 Low-Voltage Bootstrapped Configuration Bootstrapped Operation With bootstrapped operation, the IC is powered from the circuit output (V OUT ). This improves efficiency when the input voltage is low, since EXT drives the FET with a higher gate voltage than would be available from the low-voltage input. Higher gate voltage reduces the FET on-resistance, increasing efficiency. Other (undesirable) characteristics of bootstrapped operation are increased IC operating power (since it has a higher operating voltage) and reduced ability to start up with high load current at low input voltages. If the input volt10 age range extends below 2.7V, then bootstrapped operation with the MAX669 is the only option. With VCC connected to VOUT, as in Figure 2, EXT voltage swing is 5V when VCC is 5.2V or more, and VCC 0.2V when VCC is less than 5.2V. If the output voltage does not exceed 5.5V, the on-chip regulator can be disabled by connecting VCC to LDO (Figure 3). This eliminates the LDO forward drop and supplies maximum gate drive to the external FET. ______________________________________________________________________________________ 1.8V to 28V Input, PWM Step-Up Controllers in µMAX MAX668/MAX669 VIN = 3V to 12V C1 68µF 20V 1 LDO C4 1µF EXT MAX668 9 C2 0.1µF 2 VOUT = 12V @ 1A 8 N1 D1 MBRS340T3 FDS6680 6 R1 0.02Ω VCC PGND 10 SYNC/ SHDN 4 REF C3 0.22µF CS+ L1 4.7µH FB GND FREQ C5 68µF 20V C6 68µF 20V 7 C8 0.1µF R2 218k 1% 5 R3 24.9k 1% C7 220pF 3 R4 100k 1% Figure 4. MAX668 High-Voltage Non-Bootstrapped Configuration VIN = 2.7V to 5.5V C1 68µF 10V 1 LDO C2 1µF MAX668 9 2 CS+ FREQ VOUT = 12V @ 1A 8 N1 D1 MBRS340T3 FDS6680 6 C4 68µF 20V R1 0.02Ω VCC 10 SYNC/ SHDN 4 REF C3 0.22µF EXT L1 4.7µH PGND FB GND 7 C5 68µF 20V C6 0.1µF R2 218k 1% 5 3 C7 220pF R3 24.9k 1% R4 100k 1% Figure 5. MAX668 Low-Voltage Non-Bootstrapped Configuration Non-Bootstrapped Operation With non-bootstrapped operation, the IC is powered from the input voltage (VIN) or another source, such as a logic supply. Non-bootstrapped operation (Figure 4) is recommended (but not required) for input voltages above 5V, since the EXT amplitude (limited to 5V by LDO) at this voltage range is no higher than it would be with bootstrapped operation. Note that non-bootstrapped operation is required if the output voltage exceeds 28V, since this level is too high to safely con- nect to VCC. Also note that only the MAX668 can be used with non-bootstrapped operation. If the input voltage does not exceed 5.5V, the on-chip regulator can be disabled by connecting VCC to LDO (Figure 5). This eliminates the regulator forward drop and supplies the maximum gate drive to the external FET for lowest on-resistance. Disabling the regulator also reduces the non-bootstrapped minimum input voltage from 3V to 2.7V. ______________________________________________________________________________________ 11 MAX668/MAX669 1.8V to 28V Input, PWM Step-Up Controllers in µMAX Table 2. Bootstrapped and Non-Bootstrapped Configurations CONFIGURATION FIGURE USE WITH: INPUT VOLTAGE RANGE* (V) OUTPUT VOLTAGE RANGE (V) COMMENTS High-Voltage, Bootstrapped Figure 2 MAX669 1.8 to 28 3V to 28 Connect VCC to VOUT. Provides maximum external FET gate drive for low-voltage (Input <3V) to highvoltage (output >5.5V) boost circuits. VOUT cannot exceed 28V. Low-Voltage, Bootstrapped Figure 3 MAX669 1.8 to 5.5 2.7 to 5.5 Connect VOUT to VCC and LDO. Provides maximum possible external FET gate drive for low-voltage designs, but limits VOUT to 5.5V or less. High-Voltage, Non-Bootstrapped Figure 4 MAX668 3 to 28 VIN to ∞ Connect VIN to VCC. Provides widest input and output range, but external FET gate drive is reduced for VIN below 5V. VIN to ∞ Connect VIN to VCC and LDO. FET gate-drive amplitude = VIN for logic-supply (input 3V to 5.5V) to high-voltage (output >5.5V) boost circuits. IC operating power is less than in Figure 4, since IC current does not pass through the LDO regulator. VIN to ∞ Connect VCC and LDO to a separate supply (VBIAS) that powers only the IC. FET gate-drive amplitude = VBIAS. Input power source (VIN) and output voltage range (VOUT) are not restricted, except that VOUT must exceed VIN. Low-Voltage, Non-Bootstrapped Extra IC supply, Non-Bootstrapped Figure 5 None MAX668 MAX668 2.7 to 5.5 Not Restricted * For standard step-up DC-DC circuits (as in Figures 2, 3, 4, and 5), regulation cannot be maintained if VIN exceeds VOUT. SEPIC and transformer-based circuits do not have this limitation. In addition to the configurations shown in Table 2, the following guidelines may help when selecting a configuration: 1) If V IN is ever below 2.7V, V CC must be bootstrapped to VOUT and the MAX669 must be used. If VOUT never exceeds 5.5V, LDO may be shorted to VCC and VOUT to eliminate the dropout voltage of the LDO regulator. 2) If VIN is greater than 3V, VCC can be powered from VIN, rather than from VOUT (non-bootstrapped). This can save quiescent power consumption, especially when V OUT is large. If V IN never exceeds 5.5V, LDO may be shorted to VCC and VIN to eliminate the dropout voltage of the LDO regulator. 12 3) If VIN is in the 3V to 4.5V range (i.e., 1-cell Li+ or 3-cell NiMH battery range), bootstrapping VCC from VOUT, although not required, may increase overall efficiency by increasing gate drive (and reducing FET resistance) at the expense of quiescent power consumption. 4) If VIN always exceeds 4.5V, VCC should be tied to V IN , since bootstrapping from V OUT does not increase gate drive from EXT but does increase quiescent power dissipation. ______________________________________________________________________________________ 1.8V to 28V Input, PWM Step-Up Controllers in µMAX So a 500kHz operating frequency, for example, is set with ROSC = 100kΩ. Rising clock edges on SYNC/SHDN are interpreted as synchronization inputs. If the sync signal is lost while SYNC/SHDN is high, the internal oscillator takes over at the end of the last cycle and the frequency is returned to the rate set by ROSC. If sync is lost with SYNC/SHDN low, the IC waits for 70µs before shutting down. This maintains output regulation even with intermittent sync signals. When an external sync signal is used, Idle Mode switchover at the 15mV current-sense threshold is disabled so that Idle Mode only occurs at very light loads. Also, ROSC should be set for a frequency 15% below the SYNC clock rate: ROSC(SYNC) = 5 x 1010 / (0.85 x fSYNC) Soft-Start The MAX668/MAX669 feature a “digital” soft start which is preset and requires no external capacitor. Upon start-up, the peak inductor increments from 1/5 of the value set by RCS, to the full current-limit value, in five steps over 1024 cycles of fOSC or fSYNC. For example, with an f OSC of 200kHz, the complete soft-start sequence takes 5ms. See the Typical Operating Characteristics for a photo of soft-start operation. Softstart is implemented: 1) when power is first applied to the IC, 2) when exiting shutdown with power already applied, and 3) when exiting undervoltage lockout. The MAX669’s soft-start sequence does not start until LDO reaches 2.5V. Design Procedure The MAX668/MAX669 can operate in a number of DCDC converter configurations including step-up, SEPIC (single-ended primary inductance converter), and flyback. The following design discussions are limited to step-up, although SEPIC and flyback examples are shown in the Application Circuits section. Setting the Operating Frequency The MAX668/MAX669 can be set to operate from 100kHz to 500kHz. Choice of operating frequency will depend on number of factors: 1) Noise considerations may dictate setting (or synchronizing) fOSC above or below a certain frequency or band of frequencies, particularly in RF applications. 2) Higher frequencies allow the use of smaller value (hence smaller size) inductors and capacitors. 3) Higher frequencies consume more operating power both to operate the IC and to charge and discharge the gate of the external FET. This tends to reduce efficiency at light loads; however, the MAX668/ MAX669’s Idle Mode feature substantially increases light-load efficiency. 4) Higher frequencies may exhibit poorer overall efficiency due to more transition losses in the FET; however, this shortcoming can often be nullified by trading some of the inductor and capacitor size benefits for lower-resistance components. The oscillator frequency is set by a resistor, ROSC, connected from FREQ to GND. ROSC must be connected whether or not the part is externally synchronized ROSC is in each case: ROSC = 5 x 1010 / fOSC when not using an external clock. ROSC(SYNC) = 5 x 1010 / (0.85 x fSYNC) when using an external clock, fSYNC. Setting the Output Voltage The output voltage is set by two external resistors (R2 and R3, Figures 2, 3, 4, and 5). First select a value for R3 in the 10kΩ to 1MΩ range. R2 is then given by: R2 = R3 [(VOUT / VREF) – 1] where VREF is 1.25V. Determining Inductance Value For most MAX668/MAX669 boost designs, the inductor value (LIDEAL) can be derived from the following equation, which picks the optimum value for stability based on the MAX668/MAX669’s internally set slope compensation: LIDEAL = VOUT / (4 x IOUT x fOSC) The MAX668/MAX669 allow significant latitude in inductor selection if LIDEAL is not a convenient value. This may happen if LIDEAL is a not a standard inductance (such as 10µH, 22µH, etc.), or if LIDEAL is too large to be obtained with suitable resistance and saturation-current rating in the desired size. Inductance values smaller than LIDEAL may be used with no adverse stability effects; however, the peak-to-peak inductor current (ILPP) will rise as L is reduced. This has the effect of raising the required ILPK for a given output power and also requiring larger output capacitance to maintain a ______________________________________________________________________________________ 13 MAX668/MAX669 SYNC/SHDN and FREQ Inputs The SYNC/SHDN pin provides both external-clock synchronization (if desired) and shutdown control. When SYNC/SHDN is low, all IC functions are shut down. A logic high at SYNC/SHDN selects operation at a frequency set by ROSC, connected from FREQ to GND. The relationship between fOSC and ROSC is: ROSC = 5 x 1010 / fOSC MAX668/MAX669 1.8V to 28V Input, PWM Step-Up Controllers in µMAX given output ripple. An inductance value larger than LIDEAL may also be used, but output-filter capacitance must be increased by the same proportion that L has to LIDEAL. See the Capacitor Selection section for more information on determining output filter values. Due the MAX668/MAX669’s high switching frequencies, inductors with a ferrite core or equivalent are recommended. Powdered iron cores are not recommended due to their high losses at frequencies over 50kHz. old NFETs that specify on-resistance with a gatesource voltage (VGS) of 2.7V or less. When selecting an NFET, key parameters can include: 1) Total gate charge (Qg) Determining Peak Inductor Current At high switching rates, dynamic characteristics (parameters 1 and 2 above) that predict switching losses may have more impact on efficiency than RDS(ON), which predicts DC losses. Qg includes all capacitances associated with charging the gate. In addition, this parameter helps predict the current needed to drive the gate at the selected operating frequency. The continuous LDO current for the FET gate is: IGATE = Qg x fOSC For example, the MMFT3055L has a typical Qg of 7nC (at VGS = 5V); therefore, the IGATE current at 500kHz is 3.5mA. Use the FET manufacturer’s typical value for Qg in the above equation, since a maximum value (if supplied) is usually too conservative to be of use in estimating IGATE. The peak inductor current required for a particular output is: ILPEAK = ILDC + (ILPP / 2) where ILDC is the average DC input current and ILPP is the inductor peak-to-peak ripple current. The ILDC and ILPP terms are determined as follows: I (V + VD ) ILDC = OUT OUT (VIN – VSW ) where V D is the forward voltage drop across the Schottky rectifier diode (D1), and V SW is the drop across the external FET, when on. (VIN – VSW ) (VOUT + VD – VIN ) L x fOSC (VOUT + VD ) where L is the inductor value. The saturation rating of the selected inductor should meet or exceed the calculated value for ILPEAK, although most coil types can be operated up to 20% over their saturation rating without difficulty. In addition to the saturation criteria, the inductor should have as low a series resistance as possible. For continuous inductor current, the power loss in the inductor resistance, PLR, is approximated by: PLR ≅ (IOUT x VOUT / VIN)2 x RL where RL is the inductor series resistance. Once the peak inductor current is selected, the currentsense resistor (RCS) is determined by: ILPP = RCS = 85mV / ILPEAK For high peak inductor currents (>1A), Kelvin sensing connections should be used to connect CS+ and PGND to RCS. PGND and GND should be tied together at the ground side of RCS. Power MOSFET Selection The MAX668/MAX669 drive a wide variety of N-channel power MOSFETs (NFETs). Since LDO limits the EXT output gate drive to no more than 5V, a logic-level NFET is required. Best performance, especially at low input voltages (below 5V), is achieved with low-thresh14 2) Reverse transfer capacitance or charge (CRSS) 3) On-resistance (RDS(ON)) 4) Maximum drain-to-source voltage (VDS(MAX)) 5) Minimum threshold voltage (VTH(MIN)) Diode Selection The MAX668/MAX669’s high switching frequency demands a high-speed rectifier. Schottky diodes are recommended for most applications because of their fast recovery time and low forward voltage. Ensure that the diode’s average current rating is adequate using the diode manufacturer’s data, or approximate it with the following formula: I - I IDIODE = IOUT + LPEAK OUT 3 Also, the diode reverse breakdown voltage must exceed VOUT. For high output voltages (50V or above), Schottky diodes may not be practical because of this voltage requirement. In these cases, use a high-speed silicon rectifier with adequate reverse voltage. Capacitor Selection Output Filter Capacitor The minimum output filter capacitance that ensures stability is: (7.5V x L / L IDEAL ) COUT(MIN) = (2πRCS x VIN(MIN) x fOSC ) where VIN(MIN) is the minimum expected input voltage. Typically COUT(MIN), though sufficient for stability, will ______________________________________________________________________________________ 1.8V to 28V Input, PWM Step-Up Controllers in µMAX Input Capacitor The input capacitor (CIN) in boost designs reduces the current peaks drawn from the input supply and reduces noise injection. The value of CIN is largely determined by the source impedance of the input supply. High source impedance requires high input capacitance, particularly as the input voltage falls. Since step-up DCDC converters act as “constant-power” loads to their input supply, input current rises as input voltage falls. Consequently, in low-input-voltage designs, increasing CIN and/or lowering its ESR can add as many as five percentage points to conversion efficiency. A good starting point is to use the same capacitance value for CIN as for COUT. Bypass Capacitors In addition to CIN and COUT, three ceramic bypass capacitors are also required with the MAX668/MAX669. Bypass REF to GND with 0.22µF or more. Bypass LDO to GND with 1µF or more. And bypass VCC to GND with 0.1µF or more. All bypass capacitors should be located as close to their respective pins as possible. Compensation Capacitor Output ripple voltage due to COUT ESR affects loop stability by introducing a left half-plane zero. A small capacitor connected from FB to GND forms a pole with the feedback resistance that cancels the ESR zero. The optimum compensation value is: ESRCOUT CFB = COUT x (R2 x R3) / (R2 + R3) where R2 and R3 are the feedback resistors (Figures 2, 3, 4, and 5). If the calculated value for CFB results in a non-standard capacitance value, values from 0.5CFB to 1.5CFB will also provide sufficient compensation. Applications Information Starting Under Load In non-bootstrapped configurations (Figures 4 and 5), the MAX668 can start up with any combination of output load and input voltage at which it can operate when already started. In other words, there are no special limitations to start-up in non-bootstrapped circuits. In bootstrapped configurations with the MAX668 or MAX669, there may be circumstances where full load current can only be applied after the circuit has started and the output is near its set value. As the input voltage drops, this limitation becomes more severe. This characteristic of all bootstrapped designs occurs when the MOSFET gate is not fully driven until the output voltage rises. This is problematic because a heavily loaded output cannot rise until the MOSFET has low on-resistance. In such situations, low-threshold FETs (VTH < VIN(MIN)) are the most effective solution. The Typical Operating Characteristics section shows plots of startup voltage versus load current for a typical bootstrapped design. Layout Considerations Due to high current levels and fast switching waveforms that radiate noise, proper PC board layout is essential. Protect sensitive analog grounds by using a star ground configuration. Minimize ground noise by connecting GND, PGND, the input bypass-capacitor ground lead, and the output-filter ground lead to a single point (star ground configuration). Also, minimize trace lengths to reduce stray capacitance, trace resistance, and radiated noise. The trace between the external gain-setting resistors and the FB pin must be extremely short, as must the trace between GND and PGND. Application Circuits Low-Voltage Boost Circuit Figure 3 shows the MAX669 operating in a low-voltage boost application. The MAX669 is configured in the bootstrapped mode to improve low input voltage performance. The IRF7401 N-channel MOSFET was selected for Q1 in this application because of its very low 0.7V gate threshold voltage (VGS). This circuit provides a 5V output at greater than 2A of output current and operates with input voltages as low as 1.8V. Efficiency is typically in the 85% to 90% range. 12V Boost Application Figure 5 shows the MAX668 operating in a 5V to 12V boost application. This circuit provides output currents of greater than 1A at a typical efficiency of 92%. The MAX668 is operated in non-bootstrapped mode to minimize the input supply current. This achieves maximum light-load efficiency. If input voltages below 5V are used, the IC should be operated in bootstrapped mode to achieve best low-voltage performance. 4-Cell to 5V SEPIC Power Supply Figure 6 shows the MAX668 in a SEPIC (single-ended primary inductance converter) configuration. This configuration is useful when the input voltage can be either ______________________________________________________________________________________ 15 MAX668/MAX669 not be adequate for low output voltage ripple. Since output ripple in boost DC-DC designs is dominated by capacitor equivalent series resistance (ESR), a capacitance value 2 or 3 times larger than COUT(MIN) is typically needed. Low-ESR types must be used. Output ripple due to ESR is: VRIPPLE(ESR) = ILPEAK x ESRCOUT MAX668/MAX669 1.8V to 28V Input, PWM Step-Up Controllers in µMAX larger or smaller than the output voltage, such as when converting four NiMH, NiCd, or Alkaline cells to a 5V output. The SEPIC configuration is often a good choice for combined step-up/step-down applications. The N-channel MOSFET (Q1) must be selected to withstand a drain-to-source voltage (VDS) greater than the sum of the input and output voltages. The coupling capacitor (C2) must be a low-ESR type to achieve maximum efficiency. C2 must also be able to handle high ripple currents; ordinary tantalum capacitors should not be used for high-current designs. The circuit in Figure 6 provides greater than 1A output current at 5V when operating with an input voltage from 3V to 25V. Efficiency will typically be between 70% and 85%, depending upon the input voltage and output current. Isolated 5V to 5V Power Supply The circuit of Figure 7 provides a 5V isolated output at 400mA from a 5V input power supply. Transformer T1 provides electrical isolation for the forward path of the converter, while the TLV431 shunt regulator and MOC211 opto-isolator provide an isolated feedback error voltage for the converter. The output voltage is set by resistors R2 and R3 such that the mid-point of the divider is 1.24V (threshold of TLV431). Output voltage can be adjusted from 1.24V to 6V by selecting the proper ratio for R2 and R3. For output voltages greater than 6V, substitute the TL431 for the TLV431, and use 2.5V as the voltage at the midpoint of the voltagedivider. Chip Information TRANSISTOR COUNT: 1861 VIN 3V to 25V 22µF x 3 @ 35V 9 D1 40V 10 VCC 1 LDO 2 VOUT 5V @ 1A SHDN C2 10µF @ 35V MAX668 FREQ EXT 1µF 4 R3 100k 0.22µF 8 C3 68µF x 3 Q1 30V FDS6680 REF CS+ 5 4.9µH L1 CTX5-4 FB GND 3 D1: MBR5340T3, 3A, 40V SCHOTTKY DIODE R4: WSL-2512-R020F, 0.02Ω C3: AVX TPSZ686M020R0150, 68µF, 150mΩ ESR PGND 6 R4 0.02Ω R1 75k 7 C4 520pF R2 25k Figure 6. MAX668 in SEPIC Configuration 16 ______________________________________________________________________________________ 1.8V to 28V Input, PWM Step-Up Controllers in µMAX MAX668/MAX669 MBR0540L 47µH VIN = +5V 5V @ 400mA 220µF 10V T1 1:2 1µF MBR0540L 220µF 10V 5V RETURN VCC LDO IRF7603 EXT SHDN CS+ MAX668 FB 0.1Ω PGND REF FREQ GND 0.22µF 100k R2 301kΩ 1% 510Ω MOC211 10k 0.1µF 0.068µF T1: COILTRONICS CTX03-14232 610Ω TLV431 R3 100kΩ 1% Figure 7. Isolated 5V to 5V at 400mA Power Supply ______________________________________________________________________________________ 17 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) 10LUMAXB.EPS MAX668/MAX669 1.8V to 28V Input, PWM Step-Up Controllers in µMAX Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.