19-1487; Rev 1; 10/01 MAX3880 Evaluation Kit The MAX3880 evaluation kit (EV kit) simplifies evaluation of the MAX3880 2.488Gbps, SDH/SONET 1:16 deserializer with clock recovery. The EV kit requires only a single +3.3V supply and includes all the external components necessary to interface with 3.3V CML inputs and LVDS output logic. The board can be connected to the output of a limiting amplifier circuit (such as the MAX3866) and to the input of an LVDS device (such as an overhead termination circuit). A signal generator or stimulus system can be used with an oscilloscope to evaluate the MAX3880’s basic functionality. Features ♦ Single +3.3V Supply ♦ Test Point for Monitoring Loss-of-Lock (LOL) ♦ Fully Assembled and Tested Surface-Mount Board Ordering Information PART MAX3880EVKIT TEMP. RANGE IC PACKAGE -40°C to +85°C 64 TQFP-EP Component List DESIGNATION QTY C1, C2, C3, C6, C8, C15, C16, C17 DESCRIPTION 8 0.1µF, 25V min, 10% ceramic capacitors (0603) C4, C5, C7, C12, C13, C14, C19, C20, C21 9 100pF, 25V min, 10% ceramic capacitors (0603) C9 1 33µF ±10%, 10V min tantalum caps Sprague 293D336X0010C2 C10 1 2.2µF ±10%, 10V min tantalum caps Sprague 293D225X0010A2 DESIGNATION QTY DESCRIPTION R7, R12, R15, R18, R21, R24, R27, R30, R33, R36, R39, R42, R45, R48, R53, R56, R59 17 100Ω, 1% resistors U1 1 MAX3880ECB (64-pin TQFP-EP) GND, +3.3V 2 Test points JH1, JH2 2 Not installed JU1–JU5 5 Not installed JU6, JU7 2 Shunts JU6 1 3-pin header (0.1" centers) JU7 1 2-pin headers (0.1" centers) C11 1 Not installed C22 1 1µF, 25V min, 10% ceramic capacitor (0805) D1 1 PC mount LED J1–J4 4 SMA connectors (PC mount) J5–J40 36 SMB connectors (PC mount) None 1 MAX3880 evaluation kit circuit board (Rev. B) L1, L2, L3 3 56nH inductors Coilcraft 0805CS-560XKBC None 1 MAX3880 data sheet R1 1 2kΩ variable resistor R2, R3 2 1kΩ, 1% resistors (0603) R4 1 392Ω, 1% resistor (0603) R5, R6, R11, R13, R14, R16, R17, R19, R20, R22, R23, R25, R26, R28, R29, R31, R32, R34, R35, R37, R38, R40, R41, R43, R44, R46, R47, R49, R50, R51, R52, R54, R55, R57, R58 35 Not installed Component Suppliers PHONE FAX Coilcraft SUPPLIER 847-639-6400 847-639-1469 Sprague 603-224-1961 603-224-1430 Note: Please indicate that you are using the MAX3880 when contacting these component suppliers. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 Evaluates: MAX3880 General Description Evaluates: MAX3880 MAX3880 Evaluation Kit Detailed Description The MAX3880 EV kit simplifies evaluation of the MAX3880 1:16 deserializer with clock recovery. The EV kit operates from a single +3.3V supply and includes all the external components necessary to interface with 3.3V CML inputs and LVDS outputs. Connections Input terminals for the differential 2.488Gbps serialdata input (SDI+, SDI-, SLBI+, SLBI-) are AC-coupled to on-board SMA connectors. Limiting amplifiers with differential output swings between 50mVp-p and 800mVp-p can be connected directly to the SMA connectors. All LVDS outputs (PCLK+, PCLK-, PD_+, PD_-) are differentially terminated with 100Ω resistors between complementary outputs. Each output can directly drive a high-impedance input oscilloscope (see Connecting to 50Ω Oscilloscope Inputs in the Applications Information section). When driving an LVDS input that already includes 100Ω differential termination, remove the termination resistor corresponding to the appropriate LVDS output. The synchronization input (SYNC+, SYNC-) is an LVDS input internally terminated with 100Ω differential input resistance. Ensure that LVDS devices driving this input are not redundantly terminated. All signal inputs and outputs use coupled 50Ω transmission lines. All output signal lines are of equal length to minimize propagation-delay skew. Setup 1) Select either the serial-data inputs, pins 2 and 3 of JU6 (SDI EN), or the system loopback inputs, pins 1 and 2 of JU6 (SLBI EN) with a 2-pin jumper. 2) Verify that the shunt across jumper JU7 is in place. 3) Connect the +3.3V power supply to the appropriate terminals marked on the EV kit and apply power. 4) Connect a 2.5Gbps NRZ data signal (<800mVp-p differential) to the selected inputs with 50Ω cables. 5) Connect the LVDS outputs to a high-impedance oscilloscope or refer to the Applications Information section. Phase Adjustment Internal phase adjustment is available on the MAX3880 EV kit. Phase adjust (PHADJ) R1, although not required, can be used to shift the sampling edge of the recovered clock relative to the center of the data eye. Ensure JU7 is removed when adjusting PHADJ. 2 Loss-of-Lock Monitor Phase-locked loop (PLL) frequency lock conditions can be monitored at the high-impedance loss-of-lock (LOL) test point. A TTL high (LED off) indicates PLL frequency lock, while a TTL low (LED on) indicates a loss-of-lock condition. Note that the LOL circuitry will not detect a loss-of-power condition (refer to the MAX3880 data sheet). Layout Considerations The MAX3880’s performance can be greatly affected by circuit-board layout and design. Use good high-frequency design techniques, including minimizing ground inductances and using fixed-impedance transmission lines on the data and clock signals. Table 1. Jumpers and Test Points NAME TYPE DESCRIPTION NORMAL POSITION JU6 3-pin Selects between the serial-data input and the system loopback function of the MAX3880. Shorted between 2, 3 JU7 2-pin Disables PHADJ (R1) Shorted (disabled) LOL Test Point Monitors LOL voltage level – Applications Information Connecting LVDS Outputs to 50Ω Oscilloscope Inputs To monitor an LVDS signal on a 50Ω input oscilloscope, remove the differential load resistor between the complementary outputs and AC couple each output to an oscilloscope input. For example, to observe the PD0 signal on a 50Ω input instrument, remove resistor R15 from the EV board and place a capacitor or DC block in series with each output (PD0+ or PD0-) and the instrument input. Do not connect MAX3880 outputs directly to 50Ω inputs or terminations to ground. Choose a coupling capacitor large enough in value to prevent pattern-dependent distortion of the output signal. Exposed Pad (EP) Package The exposed pad 64-pin TQFP incorporates features that provide a very low thermal resistance path for heat removal from the integrated circuit—either to a printed circuit board or to an external heatsink. The MAX3880’s exposed pad must be soldered directly to a ground plane with good thermal conductance. _______________________________________________________________________________________ MAX3880 Evaluation Kit Evaluates: MAX3880 JH1 PD15PD14PD13PD12PD11PD10PD9PD8- 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 PD15+ PD14+ PD13+ PD12+ PD11+ PD10+ PD9+ PD8+ JH2 PCLKPD7PD6PD5PD4PD3PD2PD1PD0- 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 PCLK+ PD7+ PD6+ PD5+ PD4+ PD3+ PD2+ PD1+ PD0+ VCC_VCO L3 56nH C15 0.1µF C7 100pF L1 56nH C16 0.1µF C12 100pF C13 100pF L2 56nH C17 0.1pF C19 100pF C20 100pF IN1 +3.3V C9 33µF 10V C10 2.2µF 10V C14 100pF C21 100pF VCC_PLL C4 100pF C5 100pF VCC GND Figure 1. MAX3880 EV Kit Schematic _______________________________________________________________________________________ 3 Evaluates: MAX3880 MAX3880 Evaluation Kit PD15- PD14- PD15+ PD13- PD14+ R5 OPEN J39 PD12- PD13+ R57 OPEN J37 R6 OPEN J40 R7 100Ω 1% PD12+ R54 OPEN J35 R58 OPEN J38 R51 OPEN J33 R55 OPEN J36 R59 100Ω 1% R52 OPEN J34 R56 100Ω 1% R53 100Ω 1% VCC_PLL D1 JU2 VCC C11 R4 0.1µF 390 TP1 3 JU3 1 10 VCC_PLL 11 12 VCC_PLL +3.3V 14 1 C6 0.1µF JU6 SLB+ 3 J5 15 2 16 GND PD11- PD12- PD11+ PD13- PD12+ PD13+ VCC GND PD14- PD15- PD14+ MAX3880 SDI- VCC PD7+ SLBI+ PD7- SLBI- PD6+ VCC PD6- SIS PD5+ SYNC- PD5- SYNC+ GND 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 J6 C8 0.1µF GND VCC SYNC- J4 SLB- PD8- SDI+ GND J3 13 VCC VCC 9 SD- PD8+ U1 PD4+ 8 PHADJ- PD4- VCC_PLL C3 0.1µF PD9- PD3+ J2 7 PD9+ PHADJ+ PD3- 6 VCC PD2+ SD+ PD10- PD2- 5 FIL- GND VCC_VCO PD10+ VCC 4 VCC FIL+ PD1+ J1 C2 0.1µF 3 GND PD1- C22 0.1µF JU5 C1 0.1µF 2 PD15+ 1 PD0+ JU4 PD0- JU7 GND R2 1k 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 R11 OPEN LOL 2 VCC JU1 GND R3 1k PHASE ADJUST R1 PCLK+ +3.3V PCLK- +3.3V VCC SYNC+ VCC J7 R12 100Ω 1% J9 J8 PD0+ J13 R22 OPEN R20 OPEN PD1- R23 OPEN PD2- PD1+ Figure 1. MAX3880 EV Kit Schematic (continued) 4 R21 100Ω 1% J14 R19 OPEN R17 OPEN PD0- R18 100Ω 1% J12 R16 OPEN R14 OPEN PCLK+ J11 J10 R13 OPEN PCLK- R15 100Ω 1% _______________________________________________________________________________________ PD2+ 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 MAX3880 Evaluation Kit Evaluates: MAX3880 PD11- PD10- PD11+ PD10+ R46 OPEN J29 R47 OPEN J30 R49 OPEN J31 R50 OPEN J32 R48 100Ω 1% R45 100Ω 1% R39 100Ω 1% J25 VCC PD10+ J27 J26 R42 100Ω 1% J28 PD10PD9+ R40 OPEN PD9- R43 OPEN R41 OPEN PD8- PD8+ PD8- R44 OPEN PD9- PD8+ PD9+ GND VCC R33 100Ω 1% PD7+ PD7- J21 J23 R36 100Ω 1% PD6+ J22 PD6PD5+ J24 R34 OPEN PD5GND R37 OPEN R35 OPEN PD6PD6+ J19 R38 OPEN PD7PD7+ R30 100Ω 1% J20 J15 R24 100Ω 1% J17 R27 100Ω 1% R31 OPEN R32 OPEN PD5J16 J18 PD5+ R25 OPEN R28 OPEN R26 OPEN PD3PD3+ R29 OPEN PD4PD4+ Figure 1. MAX3880 EV Kit Schematic (continued) _______________________________________________________________________________________ 5 Evaluates: MAX3880 MAX3880 Evaluation Kit Figure 2. MAX3880 EV Kit Component Placement Guide—Component Side 6 _______________________________________________________________________________________ MAX3880 Evaluation Kit Evaluates: MAX3880 Figure 3. MAX3880 EV Kit Component Placement Guide—Solder Side _______________________________________________________________________________________ 7 Evaluates: MAX3880 MAX3880 Evaluation Kit 1.0" Figure 4. MAX3880 EV Kit PC Board Layout—Component Side 8 _______________________________________________________________________________________ MAX3880 Evaluation Kit Evaluates: MAX3880 1.0" Figure 5. MAX3880 EV Kit PC Board Layout—Solder Side _______________________________________________________________________________________ 9 Evaluates: MAX3880 MAX3880 Evaluation Kit Figure 6. MAX3880 EV Kit PC Board Layout—Power Plane 10 ______________________________________________________________________________________ MAX3880 Evaluation Kit Evaluates: MAX3880 Figure 7. MAX3880 EV Kit PC Board Layout—Ground Plane Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 11 © 2001 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.