RF5198 RF51983 V 1950 MHz WCDMA Linear Power Amplifier Module 3V 1950MHZ W-CDMA LINEAR POWER AMPLIFIER MODULE Input/Output Internally Matched@50Ω IM NC 16 15 14 13 RF IN 1 27.5dBm Linear Output Power 42% Peak Linear Efficiency -41dBc ACLR @ ±5MHz Integrated Power Detector HSDPA Capable Q1 IMN GND 2 11 VCC2 Q2 Bias VMODE 3 10 VCC2 OMN Integrated Power Detector VREG 4 6 7 NC Multi-Mode W-CDMA 3G Handsets 5 NC 3V W-CDMA Band 1 Handsets 9 RF OUT VDET Applications 12 VCC2 Interstage MN 8 NC VCC1/IM Features VCCBIAS RoHS Compliant & Pb-Free Product Package Style: QFN, 16-Pin, 3 x 3 Functional Block Diagram 3V TD-SCDMA Handsets Product Description Spread-Spectrum Systems The RF5198 is a high-power, high-efficiency linear amplifier module specifically designed for 3V handheld systems. The device is manufactured on an advanced third generation GaAs HBT process, and was designed for use as the final RF amplifier in 3V W-CDMA handheld digital cellular equipment, spread-spectrum systems, and other applications in the 1920MHz to 1980MHz band (Band 1). The RF5198 has a digital control pin for low power applications to lower quiescent current. This PA also includes a power detector circuit. The RF5198 is assembled in at 16-pin, 3mmx3mm, QFN package. Ordering Information RF5198 RF5198PCBA-41X 9GaAs HBT GaAs MESFET InGaP HBT 3V 1950MHz W-CDMA Linear Power Amplifier Module Fully Assembled Evaluation Board Optimum Technology Matching® Applied SiGe BiCMOS Si BiCMOS SiGe HBT GaAs pHEMT Si CMOS Si BJT GaN HEMT RF MICRO DEVICES®, RFMD®, Optimum Technology Matching®, Enabling Wireless Connectivity™, PowerStar®, POLARIS™ TOTAL RADIO™ and UltimateBlue™ are trademarks of RFMD, LLC. BLUETOOTH is a trademark owned by Bluetooth SIG, Inc., U.S.A. and licensed for use by RFMD. All other trade names, trademarks and registered trademarks are the property of their respective owners. ©2006, RF Micro Devices, Inc. Rev A5 DS060310 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. 1 of 8 RF5198 Absolute Maximum Ratings Parameter Rating Unit Supply Voltage (RF off) +8.0 V Supply Voltage (POUT ≤31dBm) +5.2 V Control Voltage (VREG) +3.9 V Input RF Power +10 dBm Mode Voltage (VMODE) +3.9 V Operating Temperature -30 to +110 °C Storage Temperature -40 to +150 °C Moisture Sensitivity Level (IPC/JEDEC J-STD-20) MSL2@260 °C Parameter Min. Specification Typ. Max. Caution! ESD sensitive device. Exceeding any one or a combination of the Absolute Maximum Rating conditions may cause permanent damage to the device. Extended application of Absolute Maximum Rating conditions to the device may reduce device reliability. Specified typical performance or functional operation of the device under Absolute Maximum Rating conditions is not implied. RoHS status based on EUDirective2002/95/EC (at time of this document revision). The information in this publication is believed to be accurate and reliable. However, no responsibility is assumed by RF Micro Devices, Inc. ("RFMD") for its use, nor for any infringement of patents, or other rights of third parties, resulting from its use. No license is granted by implication or otherwise under any patent or patent rights of RFMD. RFMD reserves the right to change component circuitry, recommended application circuitry and specifications at any time without prior notice. Unit Condition T=25°C Ambient, VCC =3.4V, VCCBIAS =3.4V, VREG =2.8V, VMODE =0V, and POUT =27.5dBm for all parameters (unless otherwise specified). Modulation is 3GPP 3.2 03-00 DPCCH+1DPDCH. High Power Mode (VMODE Low) Operating Frequency Range 1920 Linear Gain 26.0 1980 28.5 Harmonics Maximum Linear Output MHz 32.0 dB -10 dBm 27.5 dBm Linear Efficiency 38 42 47 % Maximum ICC 352 394 435 mA ACLR1 @ ±5MHz -41 -37 dBc ACLR2 @ ±10MHz -52 -48 dBc Input VSWR 2:1 Output VSWR Stability Ruggedness Noise Power f=2fo, 3fo 6:1 No oscillation>-70dBc 10:1 No damage -154 dBm/Hz -50<POUT <+27.5dBm, RX=925MHz to 960MHz (EGSM) -133 dBm/Hz -50<POUT <+27.5dBm, RX=1805MHz to 1880MHz (DCS) -140 dBm/Hz -50<POUT <+27.5dBm, RX=2110MHz to 2170MHz (W-CDMA), TX/RX Offset=130MHz -143 dBm/Hz -50<POUT <+27.5dBm, RX=2110MHz to 2170MHz (W-CDMA), TX/RX Offset=190MHz -148 dBm/Hz -50<POUT <+27.5dBm, RX=2400MHz to 2480MHz (Bluetooth) -107 dBm/Hz -50<POUT <+27.5dBm, TX=1932.3MHz to 1980MHz, RX=1893.5MHz to 1919.6MHz (PHS) Reverse IM Products 2 of 8 IM 5MHz -31 dBc IF offset fO +5MHz with CW signal=-40dBc IM 10MHz -41 dBc IF offset fO +10MHz with CW signal=-40dBc 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. Rev A5 DS060310 RF5198 Parameter Min. Specification Typ. Max. Unit Condition T=25oC Ambient, VCC =1.5V, VCCBIAS =3.4V, VREG =2.8V, VMODE =2.8V, and POUT =16dBm for all parameters (unless otherwise specified). Modulation is 3GPP 3.2 03-00 DPCCH+1DPDCH. Low Power Mode (VMODE High) Operating Frequency Range 1920 Linear Gain 23 Maximum Linear Output 1980 MHz 26 31 dB 21.0 25.3 % -41 -37 dBc -54 -48 dBc 125 145 mA 16 Linear Efficiency 18.3 ACLR @ ±5MHz ACLR @ ±10MHz Maximum ICC 105 Input VSWR POUT =+16dBm dBm POUT =+16dBm POUT =+16dBm 2:1 Output VSWR Stability Ruggedness 6:1 No oscillation>-65dBc 10:1 No damage Reverse IM Products IM 5MHz -31 dBc IF offset fO +5MHz with CW signal=-40dBc IM 10MHz -41 dBc IF offset fO +10MHz with CW signal=-40dBc 4.3 V 4.3 V Power Supply Supply Voltage (VCC1 and VCC2) 3.2 3.4 0.6 V Low power with DC to DC Converter VCC Bias 1.5 High Power Idle Current (ICC1 /ICC2 /ICCBIAS) 50 70 105 mA VMODE =low and VREG =2.8V Low Power Idle Current (ICC1 /ICC2 /ICCBIAS) 45 60 95 mA VMODE =high and VREG =2.8V VREG Current 2.4 5.0 mA VMODE Current 150 300 RF Turn On/Off Time 1.2 DC Turn On/Off Time 2 Total Current (Power Down) VREG Low Voltage (Power Down) 2.75 VREG High Voltage (Operational) uS 0.2 0.5 0.5 V 2.8 2.95 V 0 VREG High Voltage (Recommended) uA uS uA 2.7 3.0 V VMODE Voltage 0 0.5 V VMODE Voltage 2.0 3.0 V Peak Envelope Power Detector Operating Frequency Low Power Mode VCCBIAS =3.4V, VREG =2.8V, T=+25°C, RDET =5.1kΩ, ZLOAD =50Ω 1920 DC Output Voltage Rev A5 DS060310 High Power Mode 1980 MHz 0.3 V POUT =0W 0.65 0.70 0.78 V POUT =+16dBm, VCC1,2 =1.5V, VMODE =2.5V 2.2 2.5 2.8 V POUT =+27.5dBm, VCC1,2 =3.4V, VMODE =0.2V 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. 3 of 8 RF5198 Pin 1 2 3 Function RF IN GND VMODE 4 VREG 5 VDET 6 7 8 9 10 NC NC NC RF OUT VCC2 11 12 13 14 15 16 Pkg Base VCC2 VCC2 NC IM VCC1/IM VCCBIAS GND Description Interface Schematic RF input internally matched to 50Ω. This input is internally AC-coupled. Ground connection. For nominal operation (High Power mode), VMODE is set LOW. When set HIGH, devices are biased lower to improve efficiency at lower output levels. Regulated voltage supply for amplifier bias circuit. In power down mode, both VREG and VMODE need to be LOW (<0.5V). An external load resistor (RDET) is required on this pin. A lowpass filter or averaging functionality is also required to reduce voltage ripple (due to modulation) to an acceptable amount. An isolator is required on the PA RF output for proper operation of PDET when the PA operates into a non-50Ω load impedance. No connection. Do not connect this pin to any external circuit. No connection. Do not connect this pin to any external circuit. No connection. Do not connect this pin to any external circuit. RF output. Internally AC-coupled. Output stage collector supply. Please see the schematic for required external components. Same as pin 10. Same as pin 10. No connection. Do not connect this pin to any external circuit. Interstage matching. Connect to pin 15. First stage collector supply and interstage matching. Power supply input for the DC bias circuitry. Ground connection. The backside of the package should be soldered to a top side ground pad which is connected to the ground plane with multiple vias. The pad should have a short thermal path to the ground plane. Package Drawing 3.00 1.45 A Pin 1 ID 3.00 Pin 1 ID 0.28 TYP 0.18 1.45 0.05 0.15 C B 2 PLCS 0.15 C 0.40 TYP 0.20 0.10 M C A B 2 PLCS 0.50 TYP 0.203 REF 0.08 C 0.08 C 0.925 0.775 Shaded areas represent pin 1. 4 of 8 0.102 REF C Dimensions in mm. 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. Rev A5 DS060310 RF5198 Application Schematic The 8.2nH inductor may be required for isolation of VCC1 and VCC2 depending on layout. VCC BIAS may be connected to VCC; however, VCC must be maintained above 1.5 V. VCC 10 μF 8.2 nH VCC BIAS 1 nF 16 RF IN 15 1 14 12 Interstage MN 1 nF Q1 IMN 2 11 Q2 VMODE Bias 3 1 nF 13 10 Integrated Power Detector 4 VREG 5 1 nF 6 7 Place the 1 nF capacitor next to RF5198 with minimal trace length to the PA. OMN RF OUT/ ZLOAD 9 8 Matching Component (See Table Below) RDET 5.1 kΩ VDET NOTE: Additional averaging or lowpass filtering is required on this pin to reduce the voltage ripple due to the W-CDMA modulation. A lowpass cutoff frequency is selected through trade-off between acceptable amplitude ripple and rise/fall time. The 5.1 kΩ resistor to ground provides a DC return for the detector temperature compensation circuitry. Circuit Optimization for Various Output Power Requirements Output Power (dBm) Matching Component Sample Part Number Typical Efficiency (%) 28 12nH LQG15HN12NJ02D (Murata) 41 27.5 N/A 26.5 0.5pF GRM1555C1HR50BZ01E (Murata) 42 26 1.0pF GRM1555C1H1R0BZ01E (Murata) 42 25 1.5pF GRM1555C1H1R5BZ01E (Murata) 41 Rev A5 DS060310 42 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. 5 of 8 RF5198 Evaluation Board Schematic VCC1 C30 4.7 μF R11 0Ω C6 DNI C3 1 nF P2-4 P2-3 4 3 16 50 Ω μstrip J1 RF IN 15 P2-1 P1-5 P1-2 P1-1 6 of 8 VDET 4 GND 3 GND 2 VREG C1 1 nF 11 Q2 C20 4.7 μF Bias 3 Integrated Power Detector VREG C40 4.7 μF 10 OMN 5 C2 1 nF R35 5.1 kΩ P1 5 12 Q1 IMN VCC1 VCC2 1 CON5 13 VMODE VCC BIAS GND 14 Interstage MN 4 2 C5 DNI 1 2 GND C10 22 μF L21 8.2 nH R28 0Ω VCC BIAS P2 5 VCC2 6 R5 0Ω SUT = Select Under Test R46 SUT Ω C47 4.7 nF 7 50 Ω μstrip 9 J2 RF OUT 8 NOTES 1. L2 is removed when VCC1 is not connected to VCC2, and R1 is placed. 5. R3 = 5.1 kΩ typ. This load resistor determines the detector sensitivity. An internal 15 pF capacitor is in parallel with this load resistor. 6. R4 is optional and may be used in conjunction with R5 to scale V_DET (max) if desired. 7. C4 is used in conjunction with R3 and R5 to set the rise and fall time of the detected output voltage, and trade-off acceptable voltage ripple versus rise/fall time. 8. R2 is removed when VCC BIAS is not connected to VCC1,2. VDET VMODE 1 CON5 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. Rev A5 DS060310 RF5198 PCB Design Requirements PCB Surface Finish The PCB surface finish used for RFMD's qualification process is electroless nickel, immersion gold. Typical thickness is 3μinch to 8μinch gold over 180μinch nickel. PCB Land Pattern Recommendation PCB land patterns are based on IPC-SM-782 standards when possible. The pad pattern shown has been developed and tested for optimized assembly at RFMD; however, it may require some modifications to address company specific assembly processes. The PCB land pattern has been developed to accommodate lead and package tolerances. PCB Metal Land Pattern A = 0.64 x 0.28 (mm) Typ. B = 0.28 x 0.64 (mm) Typ. C = 0.78 x 0.64 (mm) D = 0.64 x 1.28 (mm) E = 1.50 (mm) Sq. Dimensions in mm. 1.50 Typ. 0.75 Typ. Pin 16 B Pin 1 0.50 Typ. C A A 0.55 Typ. D E A 0.55 Typ. B A A B B B 0.75 Typ. 1.00 Typ. B Pin 8 0.75 Typ. Figure 1. PCB Metal Land Pattern (Top View) Rev A5 DS060310 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. 7 of 8 RF5198 PCB Solder Mask Pattern Liquid Photo-Imageable (LPI) solder mask is recommended. The solder mask footprint will match what is shown for the PCB metal land pattern with a 2mil to 3mil expansion to accommodate solder mask registration clearance around all pads. The center-grounding pad shall also have a solder mask clearance. Expansion of the pads to create solder mask clearance can be provided in the master data or requested from the PCB fabrication supplier. A = 0.74 x 0.38 (mm) Typ. B = 0.38 x 0.74 (mm) Typ. C = 1.60 (mm) Sq. Dimensions in mm. 0.50 Typ. 1.50 Typ. Pin 16 Pin 1 0.50 Typ. 0.55 Typ. B B B B A A A A A A A A C Pin 12 0.75 Typ. 1.50 Typ. B B B B 0.55 Typ. Pin 8 0.75 Typ. Figure 2. PCB Solder Mask Pattern (Top View) Thermal Pad and Via Design The PCB land pattern has been designed with a thermal pad that matches the die paddle size on the bottom of the device. Thermal vias are required in the PCB layout to effectively conduct heat away from the package. The via pattern has been designed to address thermal, power dissipation and electrical requirements of the device as well as accommodating routing strategies. The via pattern used for the RFMD qualification is based on thru-hole vias with 0.203mm to 0.330mm finished hole size on a 0.5mm to 1.2mm grid pattern with 0.025mm plating on via walls. If micro vias are used in a design, it is suggested that the quantity of vias be increased by a 4:1 ratio to achieve similar results. 8 of 8 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or [email protected]. Rev A5 DS060310