QT60040 LQ 4-KEY CHARGE-TRANSFER IC Creates 4 ‘touch buttons’ through any dielectric Only 1 inexpensive capacitor required Simple 4x1 matrix key geometry 100% drift compensation for lifetime reliability '2' key rollover: senses any 2 keys at same time Back-lit keys possible with ITO electrodes Simple direct 'per key' active-high drive outputs Auto recalibration after 10 or 60 seconds of touch 2.5 - 5.5V single power supply operation CMOS design - very low power consumption 14-pin SOIC package E604 Evaluation reference design board available VDD 1 14 GND X1 2 13 X2 OPT1 3 12 X3 OPT2 4 11 X4 Q1 5 10 Y Q2 6 9 CS Q3 7 8 Q4 APPLICATIONS Security keypanels Industrial keyboards Appliance controls Vandal-proof keypads ATM machines Touch-screens Automotive controls PC / peripheral controls The QT60040 digital charge-transfer (“QT”) QMatrix™ IC is designed to detect touch on up to 4 keys in a scanned 4x1 matrix. It will project the keys through almost any dielectric, like glass, plastic, stone, ceramic, and even most kinds of wood, up to thicknesses of 6mm. The touch areas are defined as simple 2-part interdigitated electrodes of conductive material, like copper, Indium-Tin-Oxide (ITO), or screened silver or carbon deposited on the rear of a control panel. Alternatively the keys can be implemented on a stick-on flex circuit that can be adhered to the rear of most panels. The IC is designed specifically for domestic appliances, computer and peripheral control buttons, ATM machines, security panels, portable instruments, machine tools, or similar products that are subject to environmental challenges or physical attack. It permits the construction of 100% sealed, watertight keypanels that are immune to environmental factors such as humidity and condensation, temperature, dirt accumulation, or the physical deterioration of the panel surface from abrasion, chemicals, or abuse. The QT60040 contains Quantum-pioneered self-calibration, drift compensation, and digital filtering algorithms that make its sensing function extremely robust and survivable. The device can easily control keys over graphical LCD panels or LEDs when used with clear, conductive ITO electrodes. It does not require 'chip on glass' or other exotic fabrication techniques, thus allowing the OEM to source the keymatrix from multiple vendors. External circuitry consists only of a single, inexpensive capacitor. The sensitivity of the keys can be set by simply changing the value of this capacitor. The device has 4 outputs which indicate detection on the keys; up to 2 keys can be sensed at any one time. The QT60040 features automatic recalibration timeouts which will cause the device to recalibrate keys on an individual basis when they are 'stuck on' for intervals of either 10s or 60s, depending on a jumper option. QT60040 technology makes use of an important new variant of charge-transfer sensing, transverse charge-transfer, in an XY format that minimizes the number of required scan lines and external components. Unlike older technologies it does not require one IC per key, and is cost competitive even with some rubber membrane technologies. A distinct advantage is an accelerated time to market due to the fact that custom molded membranes are not required; the entire system can be designed using common PCB materials. The E604 board available from Quantum is a reference design that permits full evaluation of the QT60040 AVAILABLE OPTIONS TA SOIC 00C to +700C -400C to +850C QT60040-IS lQ DIP QT60040-D Copyright © 2000 Quantum Research Group Ltd QT60040 / R1.04 / 0303 ©Quantum Research Group Ltd. 1 - OVERVIEW 1.2 CIRCUIT MODEL The QT60040 is a CMOS charge-transfer (QT) sensor designed specifically for matrix touch controls; it includes all signal processing functions necessary to provide stable sensing under a wide variety of changing conditions. Only one low cost external capacitor is required for operation. An electrical circuit model is shown in Figure 1-4. The coupling capacitance across the X and Y electrodes and from each to a finger is represented by Cx1, Cx2a, and Cx2b. The sampling capacitor Cs is used to accumulate charge during the course of a burst. An important parasitic capacitance from the Y line to ground, Cx3, is also shown. The QT60040 uses burst-mode charge transfer methods pioneered and patented by Quantum. This revolutionary new technology allows the construction of entirely new forms of QT switch timing action is shown in Figure 1-5. Figure 1-1 Field flow between X and Y elements overlying panel X element Y element Initially, switch S3 is closed to reset Cs then re-opened. After S3 is opened, S1 is closed to charge the capacitances associated with the Y-line, including all Y-to-X capacitances. After S1 is closed, one of the four X lines is raised high, so that there is then a zero differential potential from the selected X line to the Y line. Then, S1 is opened and S2 is closed, causing charge to flow from the Cx capacitances into Cs; Cs charges up slightly with the polarity shown. Then the selected X line is driven low, causing a step-function decrease in charge on Cs whose magnitude is proportionate to the amount of coupling from X to Y. The final charge accumulated on Cs per QT cycle is thus a direct function of Cx3 minus the small amount of charge subtracted via the Cx1 / Cx2a / Cx2b / Cfinger network. Since the charge from the Cx2a / Cx2b network is highly dependent on Cfinger, which effectively forms a capacitive divider, the total charge absorbed by Cs is dependent on touch: a touch nets more charge transferred into Cs per QT cycle because less charge is transferred out of Cs per QT cycle. cmos driver keypanels which can include back-illumination, arbitrary shapes of keys, 'morphed' keys wrapped onto complex surfaces, and keys having unique textures and feel, all at very low cost. The acquisition process is controlled by a state machine which continues the acquisition cycle as a burst, which finally terminates when the voltage across Cs reaches the predefined level Vref. This burst takes hundreds or even thousands of cycles The QT60040 uses a 4x1 matrix, having 4 'X' drive lines and 1 'Y' receive line. This configuration reduces interconnect requirements and also lowers the external component count to one charge sampling capacitor which is sequentially shared by the four keys. Figure 1-2 Field Flows When Touched The QT60040 has four simple active-high CMOS outputs that go high when the corresponding key is touched. Up to 2 keys can be touched at the same time; three or more keys touched will limit to the first two touch outputs. An option pin allows this to be restricted to only one key if desired. The device operates on a 2.5 to 5.5 regulated power supply which can be from a common 78L05-type IC regulator or a simple 2-stage zener regulator supply. ove rly in g p an e l 1.1 FIELD FLOWS Figure 1-1 shows how charge is transferred across an electrode set to permeate the overlying panel material; this charge flow exhibits a rapid dQ/dt during the edge transitions of the X drive pulse. The charge emitted by the X electrode is partly received onto the Y electrode which is then captured by the Cs capacitor and processed. The QT60040 matrix uses 4 'X' edge-driven rows and 1 'Y' sense column to detect 4 keys. The X drive occurs as a burst of pulses on each key. The charge flows set into motion by the X drive signals are partially absorbed by the touch of a human finger (Figure 1-2) resulting in a decrease in coupling from X to Y; coupled charge increases in the presence of a conductive film like water (Figure 1-3) which acts to bridge the two elements. Increasing signals due to water films are quite easy to discern and are not detected by the QT60040. lQ -2- X element Y elem ent cm os driver Figure 1-3 Fields With a Conductive Film Water film QT60040 / R1.04 / 0303 ©Quantum Research Group Ltd. Figure 1-4 QT60040 Circuit Model Figure 1-6 Conversion to Single Electrodes QT60040 CFINGER CX2A X1 CX2B - X3 Xn CX1 DRIVE CX3 X4 S3 RESET Vref S1 C CHARGE CS capacitances, possibly by using intentional mutual capacitive coupling of tracks on a PCB; traces from the intersections of these capacitors are led to solid touch pads which are implemented as metallizations on the rear of a control panel. Touching the front of the panel has the same absorptive effect on signal strength as an interdigitated electrode set. STATE MACHINE DONE START RESULT POST PROCESSOR OUT C X2B Y S2 TRANSFER 1 OF 4 The values of Cx2a and Cx2b should be consistent among all keys to preserve signal balance, which is required for proper operation. The surface area and geometry of this type of electrode should be adjusted to suit the desired activation area. OPTIONS Typical values of Cx2a and Cx2b range from 5pF to 10pF. The traces leading from the junctions of these capacitors to the solid touch pads should not see a load of more than 10pF, thus the traces to these pads should be thin and short and not accompanied by a ground plane or other traces. Figure 1-5 Circuit Switch Timings X D R IV E X n CH ARG E S 1 1.4 INTERDIGITATED ELECTRODES Key electrodes can be made using interdigitated sets of fingers, serpentines, spirals or similar patterns (Figure 1-7). One element of each key must be connected to an X line, with the other connected to the common Y line. The pattern surface area should be similar from key to key to preserve relative key sensitivities. TR ANS FER S 2 RE S E T S 3 V R EF ∆ VCS C F IN G E R X2 CS + C X2A C y cle 1 Cy cle 'm ' to complete; the burst length depends on the value of Cs, the Cx capacitances, and Cfinger. Increasing Cs increases the burst length, increasing Cx3 decreases burst length, and increasing Cx1 and Cx2 increase burst length. Increasing Cfinger decreases the burst length. The value of the burst length is thus a variable that is dependent on these capacitances; the burst length is used to create an internal reference signal level during a calibration cycle, and to determine the presence of touch by virtue of a change in the burst length relative to the reference level. Because the Cs capacitor is shared among all four channels it is important that the four interdigitated key designs be reasonably well matched. It is also important to keep Cx1 and Cx3 to a minimum while maximizing the values of Cx2a and Cx2b through good key design methods. These requirements also dictate that the IC be placed close to the keys to achieve good sensitivity levels; long Y traces also increase the risk of susceptibility to interference, as well as low gain. To reduce Cx3, the Y line should not be run close to other unrelated traces or over or near ground planes. It is important to prevent substantial capacitive coupling from a ‘bare’ Y line to a finger. A transient increase in Cx3 will cause a sudden disturbance common to all keys that can create unintentional detections. The connecting Y trace running between the keys should be as thin as possible, on a side of the flex circuit or pcb away from the user panel, and where possible run closely in parallel with a segment of a nearby X trace so as to suppress this effect. The problem of a bare Y line can be demonstrated by touching the Cs capacitor (which is connected to Y), which will cause one or two random keys to activate with each touch. In cases where it is not possible to have both the X and Y traces on the same plane, the X traces should be run on the ‘finger’ side of the board. In all cases where the X and Y lines run on opposite planes, the substrate (a flex circuit, or a pcb) should be as thin as Figure 1-7 Sample Electrode Geometries 1.3 SINGLE ELECTRODE OPERATION An alternative mode of operation is shown in Figure 1-6. Capacitances Cx2a and Cx2b are implemented as discrete lQ -3- PARALLEL LINES SERPENTINE SPIRAL QT60040 / R1.04 / 0303 ©Quantum Research Group Ltd. possible to promote equal field coupling through the overlying panel material and to increase sensitivity. detection by a jumper option (Table 2-1); this option applies to all keys. Suggested design rules for interdigitated keys are shown in Figure 1-8. Max On-duration has no interaction among keys; a timeout on one key will have no effect on another key. 1.5 SIGNAL PROCESSING 1.5.5 DETECTION INTEGRATOR The QT60040 calibrates and processes all signals using a number of algorithms pioneered by Quantum. These algorithms are specifically designed to survive most environmental conditions. To suppress false detections caused by spurious events like electrical noise, the QT60040 incorporates a detection integration counter that increments with each detection sample until a limit is reached, at which point a detection is confirmed. If no detection is sensed on any of the samples prior to the final count, the counter is reset immediately to zero, forcing the process to restart. The required count is 3 samples per key. 1.5.1 SELF-CALIBRATION The QT60040 is fully self-calibrating. On powerup it scans the matrix and sets appropriate calibration points for each. No special operator or factory calibration or circuit tweak is required to bring keys into operation. The self calibration procedure typically requires 1 second to complete. 1.5.2 DRIFT COMPENSATION ALGORITHM Signal drift can occur because of changes in Cx and Cs over time. It is crucial that drift be compensated for, otherwise false detections, non-detections, and sensitivity shifts will follow. Drift compensation (Figure 1-9) is performed by making the reference level track the raw signal at a slow rate, but only while there is no detection in effect. The rate of adjustment is performed slowly, otherwise legitimate detections might be ignored. The QT60040 drift compensates using a slew-rate limited change to the reference level; the threshold and hysteresis values are slaved to this reference. Figure 1-8 Key Design Rules X1 0.75mm gaps 18x18mm key size The QT60040's drift compensation is 'asymmetric': the drift-compensation occurs in one direction faster than it does in the other. Specifically, it compensates faster for decreasing loads. Increasing loads (more contact with an object, which results in a decreasing signal) should be compensated for slowly, so that sensitivity to an approaching finger is not affected. Removal of an object is compensated for at a faster rate to allow the sensor to recover quickly to prepare for the next valid touch. 0.5mm lines X shield tails X2 1.5.3 THRESHOLD AND HYSTERESIS CALCULATIONS The threshold value is established as an offset to the reference level. As Cx and Cs drift over time, the reference drift compensates with the changes and the threshold level is automatically recomputed in real time so that it is never in error. Since key touches result in negative signal swings, the threshold is set below the signal reference level. The QT60040 employs a hysteresis of 25% of the delta between the reference and threshold levels. The signal must rise by 25% of the distance from threshold to reference before the detection event drops out and the key registers as untouched. Common Y Line 1.5.4 MAX ON-DURATION If a foreign object contacts a key the signal may change enough to create a detection lasting for the duration of the contact. To overcome this, the part includes individual key timers which monitor detection duration. If a detection on a key exceeds the timer limit setting, the sensor will perform a full recalibration. This is known as the Max On-Duration feature. After the Max On-Duration interval has expired and the recalibration has taken place, the key will once again function normally even if still in contact with the foreign object, to the best of its ability. The Max On-Duration can be set to either 10 or 60 seconds of continuous Figure 1-9 Drift Compensation Reference Hysteresis Threshold Signal Output lQ -4- QT60040 / R1.04 / 0303 ©Quantum Research Group Ltd. case the keys will continue to be functional after the time-out, to increased amounts of finger touch. Figure 2-1 Basic Circuit Diagram +5 4 6 7 8 Opt1 X1 Opt2 X2 Q1 Q2 X3 X4 Q3 Y Q4 Cs 2 M1 13 M2 12 M3 11 M4 KEYS 3 5 ACTIVE-HIGH OUTPUTS The IC uses the power supply rail as an internal reference voltage. If the power supply is shared with another electronic system, care should be taken to assure that the supply is free of digital spikes, sags, and surges which can adversely affect the circuit. The QT60040 will track slow changes in Vcc, but it can be adversely affected by rapid voltage steps and impulse noise on the supply rail. 1 Vdd QT60040 OPTIONS 2.3 POWER SUPPLY The power supply can range from +2.5 to +5.5 volts, and should be regulated via a standard regulator such as a 78L05 type. In cases where low cost is an objective, it is possible to use double-zener regulation. For proper operation a 100nF (0.1uF) ceramic bypass capacitor should be used between Vdd and Vss; the bypass cap should be placed very close to the device’s power pins. 10 9 Cs Vss 14 2.4 OUTPUTS The device has four active-high outputs, one per sensing channel, which indicate touch. These outputs should be used for logic-level switching only and should not drive loads of more than 1mA. High loads can cause shifts in device Vdd and Vss rails which can lead to spurious operation. 2 - CIRCUIT SPECIFICS The basic QT60040 circuit is shown in Figure 2-1. 2.5 ESD PROTECTION 2.1 CS CAPACITOR The QT60040 requires only a single external sampling capacitor (Cs) to operate. This capacitor should have good stability characteristics. It is possible but not optimal to use an X7R type capacitor, but for best stability a plastic type such as polyester or PPS film should be used. Increasing values will result in increased sensitivity, but too much sensitivity can also result in spurious operation. The optimal value of Cs will depend on the type of panel material, its thickness, and key geometry; experimentation is required to determine the proper value. Typical suitable values of Cs range from 22nF to 220nF; 47nF is a good value to start from in most cases. 2.2 OPTION PINS There are two option pins whose function is shown in Table 2-1. OPT1 is used to set the rollover option. If this pin is connected to ground, the IC will only sense one key at a time. If OPT1 is left open or connected to Vdd, the IC can sense any two keys simultaneously and will suppress additional keys. OPT2 is used to set the calibration time-out function. If OPT2 is connected to ground, keys will time out and recalibrate after 10 seconds of continuous detection on a key. If OPT2 is left open or connected to Vdd, keys will recalibrate after 60 seconds. In either OPT1 OPT2 In general the QT60040 will be protected from direct static discharge by the overlying panel. However, even with a panel, transients can still flow into the electrode via induction, or in extreme cases, via dielectric breakdown. Porous or thin materials may allow a spark to tunnel right through the panel material. Testing is required to reveal any problems. The QT60040 does have diode protection on its terminals which can absorb and protect the device from most induced discharges, up to 20mA; the usefulness of the internal clamping will depend on the dielectric properties, panel thickness, rise time of the ESD transients, and their duration. The device pins can be further protected by inserting series resistance into the X and Y lines. The resistances chosen should not be so high as to interfere with the QT process. Every board layout is different and thus it is difficult to specify a suitable value, however, typical values will range from 1K ohms to 47K ohms. In serious cases additional low-capacitance high-conductance clamp diodes (e.g. BAV99) may be added to shunt ESD aside from the X and Y pins to the power and ground rails. The QT60040's 'X' drive lines are always being driven at low impedance; they are never 3-state unless the circuit is just powering up or is powered down. This is a considerable advantage in dealing with ESD. The 4 output pins may also be vulnerable and should be resistor and/or diode protected if they are in danger of being subject to ESD. Table 2-1 Option Pin Functions Pin 3 Vdd 2 keys can be sensed Vss 1 key only can be sensed Pin 4 Vdd 60 seconds to recalibration Vss 10 seconds to recalibration lQ -5- QT60040 / R1.04 / 0303 ©Quantum Research Group Ltd. Figure 3-1 E604 PCB Schematic VCC CONN2 J1 2 1 1 2 CONN2 J2 U1 Rollover 1 J1 3 1 V C C OPT1 J3:1 Recal Timeout 2 J2 4 X1 OPT2 X2 Q1 X3 Q2 X4 M1 2 XYX 13 XYX 12 XYX 11 XYX M2 J3:2 Q1 3 5 4 6 5 7 M3 J3:3 Q2 M4 J3:4 Q3 Q3 Y 10 J3:5 6 Q4 8 J3:6 Q4 CS V+ 7 Vunreg G N D 47nF QT60040 1 4 VB C1 9 J3:7 8 Gnd Q4 Q3 Q2 Q1 2N4401 2N4401 2N4401 2N4401 J3:8 ON D5 2 A 3 1N4001 U2 LM78L05ACZA K C VI 1 1 1 G VO B C2 4.7uF/16V ALU 1K RS1:1 5 1K RS1:2 4 1K RS1:3 3 1K RS1:4 2 9V BT1 D1 D2 D3 D4 1 VCC E C3 S1 22uF/6.3V ALU V+ VB 1 Figure 3-2 E604 PCB Layers J2 POWER +9 Q4 Q3 Q2 Q1 J2 J1 c 2000 QRG Ltd. + + D5 J1 U2 C3 U1 - C2 GND Q3 M4 D2 D3 C1 Q4 Q2 M3 M2 D1 RS1 D4 RESEARCH GROUP LTD BT1 S1 OFF ON Q1 M1 E604 4-KEY MATRIX BOARD 1 WWW.QPROX.COM [email protected] INTERFACE J3 9V BATTERY 8 Silk Layer Top Layer Bottom Layer lQ -6- QT60040 / R1.04 / 0303 ©Quantum Research Group Ltd. 4.1 ABSOLUTE MAXIMUM SPECIFICATIONS Operating temp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . as designated by suffix Storage temp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55OC to +125OC VDD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to +7.0V Max continuous pin current, any control or drive pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20mA Short circuit duration to ground, any pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . infinite Short circuit duration to VDD, any pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . infinite Voltage forced onto any pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.6V to (Vdd + 0.6) Volts 4.2 RECOMMENDED OPERATING CONDITIONS VDD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +2.5 to 5.25V Supply ripple+noise. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mV p-p max Cs value. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22nF to 220nF Output load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1mA 4.3 DC SPECIFICATIONS Vdd = 5.0V, Cs = 47nF, TA = recommended range, unless otherwise noted Parameter Description IDD5 Supply current IDD3 Supply current VDD-VSS Supply voltage range VIL Low input logic level VHL High input logic level VOL Low output voltage VOH High output voltage Min Typ Max Units 0.65 1.5 mA @ 5V 0.4 0.6 mA @ 3V 5.5 V 0.8 V 2.5 2.2 Notes V 0.6 V 4mA sink V 1mA source Vdd-0.7 IIL Input leakage current ±1 µA AR Acquisition resolution 12 bits 4.4 AC SPECIFICATIONS Vdd = 5.0V, Cs = 47nF, TA = recommended range, unless otherwise noted. Test circuit of Figure 3-1. Parameter Description Min Typ Max Units Tr Response time 85 ms S Sensitivity 1 pF kHz Fqt Sample frequency 106 Tbs Burst spacing 5.3 Td Power-up delay to operate 0.5 lQ Notes Cs and pad geometry dependent ms 1 -7- secs QT60040 / R1.04 / 0303 ©Quantum Research Group Ltd. 4.5 SIGNAL PROCESSING Parameter Description DI Detection integrator counts Mo Max On-Duration Min Typ Max 4 Units Notes counts 10 60 s ±20%, option selectable T Threshold, D from reference 4 counts counts of signal H Hysteresis 25 % % of threshold Drift rate, negative 1 counts / s DRp DRn Rd Drift rate, positive Recalibration duration 1 10 counts / s 0.25 0.5 secs 5.1 - ORDERING INFORMATION PART TEMP RANGE PACKAGE MARKING QT60040-D QT60040-IS 0 - 70C -40 - 85C PDIP-14 SOIC-14 QT60040 QT60040 - I lQ -8- QT60040 / R1.04 / 0303 ©Quantum Research Group Ltd. 5.2 DUAL IN-LINE PACKAGE a a A Y Aa x Pin 1 indicator M Q R Base level Seating level S L SYMBOL a A M m Q P L1 F R r S S1 Aa x Y S1 r Min L1 F P m Package Type: Dual-in-Line Millimeters Max Notes Min 7.112 7.874 15.24 18.8 1.78 0.36 1.14 2.54 2.92 0.38 3.18 3.56 7.874 8.128 0.20 7.493 8.382 15.24 19.3 2.03 0.56 1.78 2.54 3.68 3.43 4.32 7.874 9.906 0.38 Inches Max 0.295 0.33 0.6 0.76 0.08 0.022 0.070 0.100 0.145 0.135 0.17 0.31 0.39 0.015 0.28 0.31 0.6 0.74 0.07 0.014 0.045 0.100 0.115 0.015 0.125 0.14 0.31 0.32 0.008 BSC Typical BSC Typical Notes BSC Typical BSC Typical 5.3 SMALL OUTLINE PACKAGE D L ß×45º e 2a W ø E M Base level Seating level h H SYMBOL M W 2a H h D L E e B o lQ Min 8.56 5.79 3.81 1.35 0.10 1.27 0.36 0.41 0.20 0.25 0 Package Type: 14 Pin SOIC Millimeters Max Notes Min 8.81 6.20 3.99 1.75 0.25 1.27 0.51 1.27 0.25 0.51 8 BSC -9- 0.337 0.228 0.150 0.31 0.004 0.050 0.014 0.016 0.008 0.014 0 Inches Max 0.347 0.244 0.157 0.33 0.010 0.050 0.020 0.050 0.010 0.020 8 Notes BSC QT60040 / R1.04 / 0303 ©Quantum Research Group Ltd. lQ QT60040 Copyright © 2002 QRG Ltd. All rights reserved. Patented and patents pending Corporate Headquarters 1 Mitchell Point Ensign Way, Hamble SO31 4RF Great Britain Tel: +44 (0)23 8056 5600 Fax: +44 (0)23 8045 3939 [email protected] www.qprox.com North America 651 Holiday Drive Bldg. 5 / 300 Pittsburgh, PA 15220 USA Tel: 412-391-7367 Fax: 412-291-1015 The specifications set out in this document are subject to change without notice. All products sold and services supplied by QRG are subject to our Terms and Conditions of sale and supply of services which are available online at www.qprox.com and are supplied with every order acknowledgement. QProx, QTouch, QMatrix, QLevel, and QSlide are trademarks of QRG. QRG products are not suitable for medical (including life-saving equipment), safety or mission critical applications or other similar purposes. Except as expressly set out in QRG's Terms and Conditions, no licenses to patents or other intellectual property of QRG (express or implied) are granted by QRG in connection with the sale of QRG products or provision of QRG services. QRG will not be liable for customer product design and customers are entirely responsible for their products and applications which incorporate QRG's products.