19-3139; Rev 0; 2/04 Nanopower µP Supervisory Circuits with Optional Manual Reset, Watchdog Timer The MAX6854–MAX6869 ultra-low-current (170nA, typ) microprocessor (µP) supervisory circuits combine voltage monitoring, watchdog timer, and manual reset input functions in a 5-pin SOT23 package. These devices assert a reset signal whenever the monitored voltage drops below the factory-trimmed reset threshold voltage, manual reset is asserted, or the watchdog timer expires. The reset output remains asserted for a minimum timeout period after VCC rises above the reset threshold and manual reset is deasserted. Factory-trimmed reset threshold voltages are offered from +1.575V to +4.625V in approximately 100mV increments (see Threshold Suffix Guide). Each device is offered with six minimum reset timeout options, ranging from 10ms to 1200ms. The MAX6854–MAX6869 are offered in a variety of configurations (see Selector Guide). The MAX6854– MAX6856 and MAX6861–MAX6869 provide a manual reset input, MR. The MAX6864–MAX6869 offer a watchdog timer that monitors activity at the WDI input for code execution errors. The MAX6864–MAX6869 offer watchdog timeout options of 3.3s or 209s (typ). The MAX6861–MAX6863 feature a pin-selectable reset delay period of 10ms or 150ms (min). Push-pull active-low, push-pull active-high, and open-drain active-low reset outputs are available. Features ♦ Ultra-Low 170nA (typ) Supply Current ♦ Reset Thresholds from +1.575V to +4.625V in Approximately 100mV Increments ♦ 6 Minimum Reset Timeout Period Options from 10ms to 1200ms ♦ Manual Reset Option ♦ Watchdog Timer Option ♦ Pin-Selectable 10ms/150ms (min) Reset Timeout Period (MAX6861/MAX6862/MAX6863) ♦ Immune to Short VCC Transients ♦ Guaranteed Reset Valid to VCC = +1.1V ♦ Three Reset Output Options: Push-Pull RESET Push-Pull RESET Open-Drain RESET ♦ No External Components ♦ Small 5-Pin SOT23 Package ♦ Pin Compatible to the TPS3836–TPS3838 (MAX6861/MAX6862/MAX6863) Ordering Information Applications Portable/Battery-Powered Equipment PART† PDAs/Cell Phones MAX6854UK_ _D_-T* MP3 Players/Pagers TEMP RANGE PIN-PACKAGE -40°C to +85°C 5 SOT23-5 MAX6855UK_ _D_-T* -40°C to +85°C 5 SOT23-5 †Insert reset threshold suffix (see Table 2, Threshold Suffix Guide) after UK. Insert the number corresponding to the desired reset timeout period (see Table 4, Reset Timeout Period) after “D.” Glucose Monitors/Patient Monitors Typical Operating Circuit VCC 0.1µF Note: Sample stock is generally held on standard versions only (see Table 5, Standard Versions Table). Standard versions have an order increment of 2500 pieces. Nonstandard versions have an order increment of 10,000 pieces. Contact factory for availability of nonstandard versions. *Future product—Contact factory for availability. VCC VCC Pin Configurations appear at the end of data sheet. RESET RESET µP MAX6864 MAX6867 MANUAL RESET MR WDI GND Selector Guide appears at the end of data sheet. Ordering Information continued on last page. I/O GND ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX6854–MAX6869 General Description MAX6854–MAX6869 Nanopower µP Supervisory Circuits with Optional Manual Reset, Watchdog Timer ABSOLUTE MAXIMUM RATINGS VCC, Open-Drain RESET to GND ..........................-0.3V to +6.0V MR, Push-Pull RESET, RESET, WDI, CT, I.C............................................-0.3V to (VCC + 0.3V) Input Current, Output Current (all pins)............................±20mA Continuous Power Dissipation (TA = +70°C) 5-Pin SOT23 (derate 7.1mW/°C above +70°C)............571mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature .....................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = 1.2V to 5.5V, TA = -40°C to +85°C, unless otherwise specified. Typical values are at VCC = 2.5V, TA = +25°C.) (Note 1) PARAMETER Supply Voltage Supply Current SYMBOL VCC ICC CONDITIONS MIN Reset Threshold Hysteresis Reset Timeout Period VCC to Reset Delay VTH VHYST tRP tRD VOL RESET Output Voltage VOH Open-Drain RESET Leakage Current 2 ILKG MAX 1.1 5.5 TA = -40°C to +85°C 1.2 5.5 VCC > VTH, no load, reset output deasserted (Note 2) V 210 400 nA VCC = 3.3V 190 380 nA VCC = 1.8V 170 370 nA 7 15 µA VTH VTH + 2.5% V VCC falling (see Table 2) VTH 2.5% Reset asserted to reset deasserted VCC = VTH + 150mV (Figures 2 and 3) UNITS VCC = 5.0V VCC < VTH, no load, reset output asserted VCC Reset Threshold TYP TA ≥ 0°C 0.5 %VTH D1 10 15 25 D2 40 60 80 D3 150 225 300 D4 1200 1800 2400 D5 300 450 600 D6 600 900 1200 VCC falling from (VTH + 100mV) to (VTH - 100mV) at 10mV/µs 40 ms µs VCC ≥ 1.1V, ISINK = 50µA, RESET asserted, TA ≥ 0°C 0.3 VCC ≥ 1.2V, ISINK = 100µA, RESET asserted 0.3 VCC ≥ 2.12V, ISINK = 1.2mA, RESET asserted 0.3 V 25 nA VCC ≥ 1.71V, ISOURCE = 200µA, RESET deasserted, push-pull RESET only 0.8 x VCC VCC ≥ 2.38V, ISOURCE = 500µA, RESET deasserted, push-pull RESET only 0.8 x VCC RESET deasserted _______________________________________________________________________________________ Nanopower µP Supervisory Circuits with Optional Manual Reset, Watchdog Timer (VCC = 1.2V to 5.5V, TA = -40°C to +85°C, unless otherwise specified. Typical values are at VCC = 2.5V, TA = +25°C.) (Note 1) PARAMETER SYMBOL VOH RESET Output Voltage CONDITIONS VCC ≥ 1.1V, ISOURCE = 10µA, RESET asserted, TA ≥ 0°C 0.8 x VCC VCC ≥ 1.2V, ISOURCE = 10µA, RESET asserted 0.8 x VCC VCC ≥ 1.53V, ISOURCE = 200µA, RESET asserted 0.8 x VCC VCC ≥ 2.12V, ISOURCE = 500µA, RESET asserted VOL CT Input Current MIN TYP UNITS V 0.8 x VCC VCC ≥ 1.71V, ISINK = 500µA, RESET deasserted 0.3 VCC ≥ 2.38V, ISINK = 1.2mA, RESET deasserted 0.3 CT = GND or VCC VIH CT Input Voltage MAX 20 0.8 x VCC 0.2 x VCC VIL nA V MANUAL RESET INPUT VIH MR Input Voltage 0.7 x VCC VIL MR Minimum Pulse Width 0.3 x VCC tMPW 1 MR Glitch Rejection µs 200 MR to Reset Delay tMRD ns 250 MR Pullup Resistance 5 V 10 ns 20 kΩ WATCHDOG TIMER (MAX6864–MAX6869) VIH WDI Input Voltage 0.7 x VCC 0.3 x VCC VIL WDI Input Current WDI = GND or VCC WDI Pulse Width tWDI Watchdog Timeout Period tWD 20 (Note 3) 150 S 1.5 3.3 7.75 L 95 209 487 V nA ns s Note 1: Devices are tested at TA = +25°C. Specifications for TA = -40°C to +85°C are guaranteed by design. Note 2: For the MAX6864–MAX6869, the watchdog period is 1s with tRISE and tFALL < 50ns. Note 3: Guaranteed by design. _______________________________________________________________________________________ 3 MAX6854–MAX6869 ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (VCC = +2.5V, TA = +25°C, unless otherwise noted.) SUPPLY CURRENT vs. TEMPERATURE RESET IS NOT ASSERTED VTH = 1.575V 0.20 VCC = 3.3V TA = +25°C TA = -40°C NORMALIZED tRP ICC (µA) TA = +85°C 1.01 VCC = 5.5V 0.18 1.02 MAX6854 toc02 VTH = 2.23V 1.0 0.22 MAX6854 toc01 10.0 NORMALIZED RESET TIMEOUT PERIOD vs. TEMPERATURE MAX6854 toc03 SUPPLY CURRENT vs. SUPPLY VOLTAGE ICC (µA) VCC = 2.5V 0.16 0.14 1.00 0.99 VCC = 1.8V 0.12 0.10 0.98 -40 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VCC (V) -15 10 35 85 60 -15 1.4 1.2 1.0 0.8 60 1000 RESET OCCURS ABOVE THIS LINE TRANSIENT DURATION (µs) 1.6 35 MAXIMUM VCC TRANSIENT DURATION vs. RESET THRESHOLD OVERDRIVE MAX6854 toc04 1.8 10 TEMPERATURE (°C) NORMALIZED WATCHDOG TIMEOUT PERIOD vs. TEMPERATURE NORMALIZED tWD -40 TEMPERATURE (°C) MAX684 toc05 0.1 100 10 1 0.6 VCC FALLING FROM VTH +100mV 0.4 0.1 -15 10 35 60 85 10 TEMPERATURE (°C) 100 1000 RESET THRESHOLD OVERDRIVE (mV) NORMALIZED RESET THRESHOLD VOLTAGE vs. TEMPERATURE 70 MAX6854 toc06 1.010 VCC TO RESET DELAY vs. TEMPERATURE VCC = VTH + 100mV TO VTH - 100mV 60 tRD (µs) 1.005 1.000 MAX6854 toc07 -40 NORMALIZED VTH MAX6854–MAX6869 Nanopower µP Supervisory Circuits with Optional Manual Reset, Watchdog Timer 50 40 0.995 30 0.990 20 -40 -15 10 35 TEMPERATURE (°C) 4 60 85 -40 -15 10 35 60 TEMPERATURE (°C) _______________________________________________________________________________________ 85 85 Nanopower µP Supervisory Circuits with Optional Manual Reset, Watchdog Timer VCC = 1.8V 0.15 0.10 VCC = 3.3V 0.05 0 VCC = 2.5V 0.40 0.35 0.30 VCC = 1.8V 0.25 0.20 VCC = 3.3V 0.15 1000 2000 3000 4000 5000 VCC = 2.5V 10 1 0.10 0.05 0 0 100 SUPPLY CURRENT (µA) VOL (V) 0.20 0.45 MAX6854 toc09 VCC = 2.5V 0.50 OUTPUT HIGH VOLTAGE (VCC - VOH) (V) MAX6854 toc08 0.30 0.25 SUPPLY CURRENT vs. WATCHDOG SWITCHING FREQUENCY OUTPUT HIGH VOLTAGE vs. SOURCE CURRENT MAX6854 toc10 OUTPUT LOW VOLTAGE vs. SINK CURRENT 0.1 0 ISINK (µA) 200 400 600 ISOURCE (µA) 800 1000 10 100 1k 10k 100k 1M 10M WATCHDOG SWITCHING FREQUENCY (Hz) MANUAL RESET DELAY VCC TO RESET DELAY MAX6854 toc12 MAX6854 toc11 1.7V VTH = 1.575V VCC 200mV/div tMRD MR 1V/div 1.5V tRD RESET 1V/div RESET 1V/div 0 10µs/div 200ns/div _______________________________________________________________________________________ 5 MAX6854–MAX6869 Typical Operating Characteristics (continued) (VCC = +2.5V, TA = +25°C, unless otherwise noted.) Nanopower µP Supervisory Circuits with Optional Manual Reset, Watchdog Timer MAX6854–MAX6869 MAX6854/MAX6855/MAX6856 Pin Description PIN MAX6854/ MAX6856 MAX6855 NAME FUNCTION Active-Low Open-Drain or Push-Pull Reset Output. RESET transitions from high to low when VCC drops below the selected reset threshold or MR is pulled low. RESET remains low for the reset timeout period after VCC exceeds the device reset threshold and MR deasserts. Push-pull RESET outputs are referenced to VCC. Open-drain RESET outputs require an external pullup resistor. 1 — RESET 2, 4 2, 4 GND Ground. Connect all GND inputs to the same potential. 3 3 MR Active-Low Manual Reset Input. Drive MR low to initiate a reset. The reset output remains asserted while MR is held low and for the reset timeout period after MR transitions high. Leave MR unconnected or connect to VCC if unused. MR is internally pulled up to VCC through 10kΩ. 5 5 VCC Supply Voltage. Input for VCC reset monitor. For noisy systems, bypass VCC with a 0.1µF capacitor to GND. — 1 RESET Active-High Push-Pull Reset Output. RESET transitions from low to high when VCC drops below the selected reset threshold or MR is pulled low. RESET remains high for the reset timeout period after VCC exceeds the device reset threshold and MR deasserts. RESET is referenced to VCC. MAX6857–MAX6860 Pin Description PIN MAX6857/ MAX6859 6 MAX6858/ MAX6860 NAME FUNCTION 1 4 RESET Active-Low Open-Drain or Push-Pull Reset Output. RESET transitions from high to low when VCC drops below the selected reset threshold. RESET remains low for the reset timeout period after VCC exceeds the device reset threshold. Push-pull RESET outputs are referenced to VCC. Open-drain RESET outputs require an external pullup resistor. 2 5 VCC Supply Voltage. Input for VCC reset monitor. For noisy systems, bypass VCC with a 0.1µF capacitor to GND. 3 3 GND 4, 5 1, 2 I.C. Ground Internally Connected. For increased noise immunity, connect I.C. to GND. _______________________________________________________________________________________ Nanopower µP Supervisory Circuits with Optional Manual Reset, Watchdog Timer PIN NAME FUNCTION 1 CT Reset Timeout Select Input. Connect CT low to select the D1 reset timeout output period (see Tables 1 and 4). Connect CT high (normally VCC) to select the D3 reset timeout period. 2 GND MAX6861/ MAX6863 MAX6862 1 2 3 3 Ground MR Active-Low Manual Reset Input. Drive MR low to initiate a reset. The reset output remains asserted while MR is held low and for the reset timeout period after MR transitions high. Leave MR unconnected or connect to VCC if unused. MR is internally pulled up to VCC through 10kΩ. 4 — RESET Active-Low Open-Drain or Push-Pull Reset Output. RESET transitions from high to low when VCC drops below the selected reset threshold or MR is pulled low. RESET remains low for the reset timeout period after VCC exceeds the device reset threshold and MR deasserts. Push-pull RESET outputs are referenced to VCC. Open-drain RESET outputs require an external pullup resistor. 5 5 VCC Supply Voltage. Input for VCC reset monitor. For noisy systems, bypass VCC with a 0.1µF capacitor to GND. — 4 RESET Active-High Push-Pull Reset Output. RESET transitions from low to high when VCC drops below the selected reset threshold or MR is pulled low. RESET remains high for the reset timeout period after VCC exceeds the device reset threshold and MR deasserts. RESET is referenced to VCC. _______________________________________________________________________________________ 7 MAX6854–MAX6869 MAX6861/MAX6862/MAX6863 Pin Description Nanopower µP Supervisory Circuits with Optional Manual Reset, Watchdog Timer MAX6854–MAX6869 MAX6864/MAX6865/MAX6866 Pin Description PIN MAX6864/ MAX6866 NAME FUNCTION Active-Low Open-Drain or Push-Pull Reset Output. RESET transitions from high to low when VCC drops below the selected reset threshold, MR is pulled low, or the watchdog timer expires. RESET remains low for the reset timeout period after VCC exceeds the device reset threshold, MR deasserts, or after the watchog timer expires. Push-pull RESET outputs are referenced to VCC. Open-drain RESET outputs require an external pullup resistor. 1 — RESET 2 2 GND 3 3 Ground MR Active-Low Manual Reset Input. Drive MR low to initiate a reset. The reset output remains asserted while MR is held low and for the reset timeout period after MR transitions high. Leave MR unconnected or connect to VCC if unused. MR is internally pulled up to VCC through 10kΩ. 4 4 WDI Watchdog Input. If WDI remains high or low for longer than the watchdog timeout period, the internal watchdog timer expires, and a reset is triggered for the reset timeout period. The internal watchdog timer clears whenever reset is asserted, the manual reset is asserted, or WDI sees a rising or falling edge. 5 5 VCC Supply Voltage. Input for VCC reset monitor. For noisy systems, bypass VCC with a 0.1µF capacitor to GND. RESET Active-High Push-Pull Reset Output. RESET transitions from low to high when VCC drops below the selected reset threshold, MR is pulled low, or the watchdog timer expires. RESET remains high for the reset timeout period after VCC exceeds the device reset threshold, MR deasserts, or after the watchdog timer expires. RESET is referenced to VCC. — 8 MAX6865 1 _______________________________________________________________________________________ Nanopower µP Supervisory Circuits with Optional Manual Reset, Watchdog Timer PIN MAX6867/ MAX6869 NAME FUNCTION MAX6868 1 1 WDI Watchdog Input. If WDI remains high or low for longer than the watchdog timeout period, the internal watchdog timer expires, and a reset is triggered for the reset timeout period. The internal watchdog timer clears whenever reset is asserted, the manual reset is asserted, or WDI sees a rising or falling edge. 2 2 GND Ground 3 3 MR Active-Low Manual Reset Input. Drive MR low to initiate a reset. The reset output remains asserted while MR is held low and for the reset timeout period after MR transitions high. Leave MR unconnected or connect to VCC if unused. MR is internally pulled up to VCC through 10kΩ. 4 — RESET Active-Low Open-Drain or Push-Pull Reset Output. RESET transitions from high to low when VCC drops below the selected reset threshold, MR is pulled low, or the watchdog timer expires. RESET remains low for the reset timeout period after VCC exceeds the device reset threshold, MR deasserts, or after the watchdog timer expires. Push-pull RESET outputs are referenced to VCC. Open-drain RESET outputs require an external pullup resistor. 5 5 VCC Supply Voltage. Input for VCC reset monitor. For noisy systems, bypass VCC with a 0.1µF capacitor to GND. RESET Active-High Push-Pull Reset Output. RESET transitions from low to high when VCC drops below the selected reset threshold, MR is pulled low, or the watchdog timer expires. RESET remains high for the reset timeout period after VCC exceeds the device reset threshold, MR deasserts, or after the watchdog timer expires. RESET is referenced to VCC. — 4 _______________________________________________________________________________________ 9 MAX6854–MAX6869 MAX6867/MAX6868/MAX6869 Pin Description MAX6854–MAX6869 Nanopower µP Supervisory Circuits with Optional Manual Reset, Watchdog Timer MAX6854– MAX6869 VCC RESET (MAX6854/MAX6856–MAX6861/ MAX6863/MAX6864/MAX6866/ MAX6867/MAX6869) RESET TIMEOUT GENERATOR RESET (MAX6855/MAX6862/MAX6865/ MAX6868) 1.25V VCC 10kΩ CT (MAX6861/MAX6862/MAX6863) MR (MAX6854/MAX6855/MAX6856, MAX6861–MAX6869) WATCHDOG TRANSITION DETECTOR WDI (MAX6864–MAX6869) WATCHDOG TIMER GND Figure 1. Functional Diagram VTH VCC tRP tRP tMRD RESET* tMPW MR *RESET IS THE INVERSE OF RESET. Figure 2. RESET Timing Relationship 10 ______________________________________________________________________________________ tRD Nanopower µP Supervisory Circuits with Optional Manual Reset, Watchdog Timer tWD tWDI WDI tRP OV VCC RESET* OV *RESET IS THE INVERSE OF RESET. Figure 3. Detailed Watchdog Input Timing Relationship Detailed Description RESET/RESET Output A µP’s reset input starts the µP in a known state. The MAX6854–MAX6869 µP supervisory circuits assert a reset to prevent code-execution errors during powerup, power-down, and brownout conditions. The MAX6854–MAX6869 reset output is guaranteed to be valid for VCC down to 1.1V. Whenever VCC falls below the reset threshold, the reset output asserts low for RESET and high for RESET. Once V CC exceeds the reset threshold, an internal timer keeps the reset output asserted for the specified reset timeout period, then after this interval the reset output deasserts (see Figure 2). Manual Reset Input Many µP-based products require manual reset capability, allowing the operator, a test technician, or external logic circuitry to initiate a reset. The MAX6854/ MAX6855/MAX6856/MAX6861–MAX6869 feature an MR input. A logic low on MR asserts a reset. Reset remains asserted while MR is low and for the timeout period, tRP, after MR returns high. The devices provide an internal 10kΩ pullup from MR to VCC. Leave MR unconnected or connect to VCC if unused. MR can be driven with CMOS logic levels or with open-drain/collector outputs. Connect a normally open momentary switch from MR to GND to implement a manual reset function; external debounce circuitry is not required. If MR is driven by long cables or the device is used in a noisy environment, connect a 0.1µF capacitor from MR to GND to provide additional noise immunity. Watchdog Input The MAX6864–MAX6869’s watchdog timer circuitry monitors the µP’s activity. If the µP does not toggle (low-to-high or high-to-low) the watchdog input (WDI) within the watchdog timeout period (tWDI), reset asserts for the reset timeout period (tRP). The internal timer is cleared when reset asserts, when manual reset is asserted, or by a rising or falling edge on WDI. The watchdog input detects pulses as short as 150ns. While reset is asserted the watchdog timer does not count. As soon as reset deasserts, the watchdog timer resumes counting (Figure 3). Applications Information Selecting the Reset Timeout Period The reset timeout period for the MAX6854– MAX6860/MAX6864–MAX6869 is fixed (see Table 4). The MAX6861/MAX6862/MAX6863 feature a reset timeout select input, CT. Connect CT according to Table 1 to select between the available 10ms and 150ms (min) reset timeout periods. The timeout period can be changed while a reset timeout period is in progress, but will not update until the reset timeout period has expired. Table 1. MAX6861/MAX6862/MAX6863 Reset Timeout Period Selection CT CONNECTION MIN TYP MAX LOW 10 15 25 HIGH 150 225 300 UNITS ms ______________________________________________________________________________________ 11 MAX6854–MAX6869 VCC MAX6854–MAX6869 Nanopower µP Supervisory Circuits with Optional Manual Reset, Watchdog Timer Transient Immunity In addition to issuing a reset to the µP during power-up, power-down, and brownout conditions, the MAX6854– MAX6869 are relatively immune to short-duration supply transients, or glitches. The Maximum Transient Duration vs. Reset Threshold Overdrive graph in the Typical Operating Characteristics shows this relationship. The area below the curve of the graph is the region in which these devices typically do not generate a reset pulse. This graph was generated using a falling pulse applied to VCC, starting 100mV above the actual reset threshold, VTH, and ending below this threshold (resetthreshold overdrive). As the magnitude of the transient increases, the maximum allowable pulse width decreases. Typically, a 100mV VCC transient duration of 40µs or less does not cause a reset. Interfacing to Other Voltages for Logic Compatibility The open-drain RESET output can be used to interface to a µP with other logic levels. As shown in Figure 4, the open-drain output can be connected to voltages from 0 to 5.5V. Generally, the pullup resistor connected to RESET connects to the supply voltage that is being monitored at the IC’s VCC input. However, some systems use the open-drain output to level-shift from the monitored sup- 1.8V ply to reset circuitry powered by another supply voltage. Keep in mind that as the supervisor’s VCC decreases, so does the IC’s ability to sink current at RESET. Ensuring a Valid RESET Down to VCC = 0V (Push-Pull RESET) When VCC falls below 1.1V, RESET’s current-sinking capability declines drastically. The high-impedance CMOS logic inputs connected to RESET can drift to undetermined voltages. This presents no problems in most applications, since most µPs and other circuitry do not operate with VCC below 1.1V. In those applications where RESET must be valid down to 0, add a pulldown resistor between RESET and GND for the MAX6854/MAX6857/MAX6858/MAX6861/ MAX6864/MAX6867 push-pull outputs. The resistor sinks any stray leakage currents, holding RESET low (Figure 5). Choose a pulldown resistor that accommodates leakages, such that RESET is not significantly loaded and is capable of pulling to GND. The external pulldown cannot be used with the open-drain reset outputs. Watchdog Software Considerations One way to help the watchdog timer monitor software execution more closely is to set and reset the watchdog VCC 3.3V VCC VCC MAX6856 MAX6859 MAX6860 MAX6863 MAX6866 MAX6869 100kΩ VCC RESET RESET µP MAX6854 MAX6857 MAX6858 MAX6861 MAX6864 MAX6867 N RESET 2MΩ GND Figure 4. Interfacing with Other Voltage Levels 12 GND GND Figure 5. Ensuring RESET Valid to VCC = Ground ______________________________________________________________________________________ Nanopower µP Supervisory Circuits with Optional Manual Reset, Watchdog Timer START SET WDI HIGH PROGRAM CODE SUBROUTINE OR PROGRAM LOOP SET WDI LOW RETURN Figure 6. Watchdog Flow Diagram Table 2. Threshold Suffix Guide SUFFIX VCC THRESHOLD FALLING MIN TYP MAX 46 4.509 4.625 4.741 45 4.388 4.500 4.613 44 4.266 4.375 4.484 43 4.193 4.300 4.408 42 4.095 4.200 4.305 41 3.998 4.100 4.203 40 3.900 4.000 4.100 39 3.802 3.900 3.998 38 3.705 3.800 3.895 37 3.608 3.700 3.793 36 3.510 3.600 3.690 35 3.413 3.500 3.588 34 3.315 3.400 3.485 33 3.218 3.300 3.383 32 3.120 3.200 3.280 31 2.998 3.075 3.152 30 2.925 3.000 3.075 29 2.852 2.925 2.998 28 2.730 2.800 2.870 27 2.633 2.700 2.768 26 2.559 2.625 2.691 25 2.438 2.500 2.563 24 2.340 2.400 2.460 2.371 23 2.255 2.313 225 2.180 2.235 2.290 22 2.133 2.188 2.243 21 2.048 2.100 2.153 20 1.950 2.000 2.050 19 1.853 1.900 1.948 18 1.755 1.800 1.845 17 1.623 1.665 1.707 16 1.536 1.575 1.614 UNITS V Table 3. Watchdog Timeout SUFFIX WATCHDOG TIMEOUT PERIOD MIN TYP MAX S 1.5 3.3 7.75 L 95 209 487 UNITS s ______________________________________________________________________________________ 13 MAX6854–MAX6869 input at different points in the program, rather than pulsing the watchdog input high-low-high or low-highlow. This technique avoids a stuck loop, in which the watchdog timer would continue to be reset inside the loop, keeping the watchdog from timing out. Figure 6 shows an example of a flow diagram where the I/O driving the watchdog input is set high at the beginning of the program, set low at the beginning of every subroutine or loop, then set high again when the program returns to the beginning. If the program should hang in any subroutine, the problem would quickly be corrected, since the I/O is continually set low and the watchdog timer is allowed to time out, causing a reset or interrupt to be issued. MAX6854–MAX6869 Nanopower µP Supervisory Circuits with Optional Manual Reset, Watchdog Timer Ordering Information (continued) Table 4. Reset Timeout Periods RESET TIMEOUT PERIODS TIMEOUT OPTION MIN TYP MAX D1 10 15 25 D2 40 60 80 D3 150 225 300 D4 1200 1800 2400 D5 300 450 600 D6 600 900 1200 PART† TEMP RANGE PIN-PACKAGE MAX6856UK_ _D_-T* -40°C to +85°C 5 SOT23-5 MAX6857UK_ _D_-T* -40°C to +85°C 5 SOT23-5 MAX6858UK_ _D_-T* -40°C to +85°C 5 SOT23-5 MAX6859UK_ _D_-T* -40°C to +85°C 5 SOT23-5 MAX6860UK_ _D_-T* -40°C to +85°C 5 SOT23-5 MAX6861UK_ _-T -40°C to +85°C 5 SOT23-5 MAX6862UK_ _-T* -40°C to +85°C 5 SOT23-5 MAX6863UK_ _-T* -40°C to +85°C 5 SOT23-5 MAX6864UK_ _D_ _-T* -40°C to +85°C 5 SOT23-5 TOP MARK MAX6865UK_ _D_ _-T* -40°C to +85°C 5 SOT23-5 MAX6854UK16D3 AEFS MAX6866UK_ _D_ _-T -40°C to +85°C 5 SOT23-5 MAX6854UK23D3 AEFY MAX6867UK_ _D_ _-T* -40°C to +85°C 5 SOT23-5 MAX6854UK26D3 AEFZ MAX6868UK_ _D_ _-T* -40°C to +85°C 5 SOT23-5 MAX6854UK29D3 AEGA MAX6869UK_ _D_ _-T* -40°C to +85°C 5 SOT23-5 MAX6854UK31D3 AEGB MAX6856UK16D3 AEGR MAX6856UK23D3 MAX6856UK26D3 AEGS AEGT MAX6856UK29D3 AEGU MAX6856UK31D3 AEGV MAX6861UK17 MAX6861UK225 AEKO AEKS Table 5. Standard Versions PART MAX6861UK26 AEKP MAX6861UK29 AEKQ MAX6862UK17 MAX6862UK225 AEOS AEOT MAX6862UK26 AEOU MAX6862UK29 AEOV MAX6863UK17 MAX6863UK225 AEOW AEOX MAX6863UK26 AEOY MAX6863UK29 AEOZ MAX6864UK16D3S MAX6864UK23D3S AEGC AEGD MAX6864UK26D3S AEGE MAX6864UK29D3S AEGF MAX6864UK31D3S MAX6866UK16D3S AEGG AEGW MAX6866UK23D3S AEGX MAX6866UK26D3S AEGY MAX6866UK29D3S MAX6866UK31D3S AEFT AEGZ 14 UNITS ms †Insert reset threshold suffix (see Table 2, Threshold Suffix Guide) after UK. Insert the number corresponding to the desired reset timeout period (see Table 4, Reset Timeout Period) after “D.” Insert the letter corresponding to the desired watchdog timeout period (S or L, see Table 3) into the blank following the reset timeout period suffix for the MAX6864–MAX6869. Note: Sample stock is generally held on standard versions only (see Table 5, Standard Versions Table). Standard versions have an order increment of 2500 pieces. Nonstandard versions have an order increment of 10,000 pieces. Contact factory for availability of nonstandard versions. *Future product—Contact factory for availability. ______________________________________________________________________________________ Nanopower µP Supervisory Circuits with Optional Manual Reset, Watchdog Timer TOP VIEW RESET 1 (RESET) GND 2 5 VCC MAX6854 MAX6855 MAX6856 MR 3 RESET 1 VCC 2 4 GND 5 I.C. MAX6857 MAX6859 GND 3 I.C. 1 I.C. 2 4 I.C. VCC 4 RESET 5 VCC 4 RESET (RESET) MAX6858 MAX6860 GND 3 SOT23-5 SOT23-5 5 SOT23-5 ( ) MAX6855 ONLY CT 1 GND 2 5 VCC MAX6861 MAX6862 MAX6863 MR 3 GND 2 4 SOT23-5 ( ) MAX6862 ONLY RESET 1 (RESET) RESET (RESET) 5 VCC MAX6864 MAX6865 MAX6866 MR 3 WDI 1 GND 2 4 WDI MAX6867 MAX6868 MAX6869 MR 3 SOT23-5 SOT23-5 ( ) MAX6865 ONLY ( ) MAX6868 ONLY ______________________________________________________________________________________ 15 MAX6854–MAX6869 Pin Configurations MAX6854–MAX6869 Nanopower µP Supervisory Circuits with Optional Manual Reset, Watchdog Timer Selector Guide RESET OUTPUT MR WDI CT — √ — — — √ — — — √ √ — — √ — — — — — MAX6858 √ — — — — — MAX6859 — — √ — — — MAX6860 — — √ — — — MAX6861 √ — — √ — √ MAX6862 — √ — √ — √ MAX6863 — — √ √ — √ MAX6864 √ — — √ √ — MAX6865 — √ — √ √ — MAX6866 — — √ √ √ — MAX6867 √ — — √ √ — MAX6868 — √ — √ √ — MAX6869 — — √ √ √ — PART PUSH-PULL ACTIVE LOW PUSH-PULL ACTIVE HIGH OPEN-DRAIN ACTIVE LOW MAX6854 √ — MAX6855 — √ MAX6856 — MAX6857 Chip Information TRANSISTOR COUNT: 2848 PROCESS: BiCMOS 16 ______________________________________________________________________________________ Nanopower µP Supervisory Circuits with Optional Manual Reset, Watchdog Timer SOT-23 5L .EPS PACKAGE OUTLINE, SOT-23, 5L 21-0057 E 1 1 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 17 © 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. MAX6854–MAX6869 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)