PD - 95053A IRFP3710PbF l l l l l l Advanced Process Technology Dynamic dv/dt Rating 175°C Operating Temperature Fast Switching Fully Avalanche Rated Lead-Free HEXFET® Power MOSFET D VDSS = 100V RDS(on) = 0.025Ω G Description ID = 57A S Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The TO-247AC package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 watts. The low thermal resistance and low package cost of the TO247AC contribute to its wide acceptance throughout the industry. TO-247AC Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 srew Max. Units 57 40 180 200 1.3 ± 20 530 28 20 5.0 -55 to + 175 A W W/°C V mJ A mJ V/ns 300 (1.6mm from case ) 10 lbfin (1.1Nm) °C Thermal Resistance Parameter RθJC RθCS RθJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient Typ. Max. Units 0.50 0.75 62 °C/W 5/26/05 IRFP3710PbF Electrical Characteristics @ TJ = 25°C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage ∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage gfs Forward Transconductance Qg Qgs Qgd td(on) tr td(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Min. 100 2.0 20 Typ. 0.12 14 59 58 48 LD Internal Drain Inductance 4.5 LS Internal Source Inductance 7.5 Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance 3000 640 330 V(BR)DSS IDSS IGSS Drain-to-Source Leakage Current Max. Units Conditions V V GS = 0V, ID = 250µA V/°C Reference to 25°C, ID = 1mA 0.025 Ω V GS = 10V, ID = 28A 4.0 V V DS = V GS, ID = 250µA S V DS = 25V, ID = 28A 25 V DS = 100V, VGS = 0V µA 250 V DS = 80V, VGS = 0V, TJ = 150°C 100 V GS = 20V nA -100 V GS = -20V 190 ID = 28A 26 nC V DS = 80V 82 V GS = 10V, See Fig. 6 and 13 V DD = 50V ID = 28A ns RG = 2.5Ω RD = 1.7Ω, See Fig. 10 Between lead, 6mm (0.25in.) nH G from package and center of die contact V GS = 0V pF V DS = 25V = 1.0MHz, See Fig. 5 D S Source-Drain Ratings and Characteristics IS I SM VSD t rr Q rr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol 57 showing the A G integral reverse 180 S p-n junction diode. 1.3 V TJ = 25°C, IS = 28A, VGS = 0V 210 320 ns TJ = 25°C, IF = 28A 1.7 2.6 µC di/dt = 100A/µs Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes: Repetitive rating; pulse width limited by ISD ≤ 28A, di/dt ≤ 460A/µs, VDD ≤ V(BR)DSS, Starting TJ = 25°C, L = 1.4mH Pulse width ≤ 300µs; duty cycle ≤ 2%. max. junction temperature. ( See fig. 11 ) RG = 25Ω, IAS = 28A. (See Figure 12) T J ≤ 175°C IRFP3710PbF 1000 1000 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V I , Drain-to-Source Current (A) D I , Drain-to-Source Current (A) D 100 100 4.5V 10 20µs PULSE WIDTH TC = 25°C 1 0.1 1 10 A 4.5V 10 100 R DS(on) , Drain-to-Source On Resistance (Normalized) 3.0 TJ = 25°C 100 TJ = 175°C 10 V DS = 50V 20µs PULSE WIDTH 5 6 7 8 9 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics 10 A 100 Fig 2. Typical Output Characteristics 1000 4 1 VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 1 20µs PULSE WIDTH TC = 175°C 1 0.1 VDS , Drain-to-Source Voltage (V) I D , Drain-to-Source Current (A) VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP TOP 10 A I D = 46A 2.5 2.0 1.5 1.0 0.5 VGS = 10V 0.0 -60 -40 -20 0 20 40 60 A 80 100 120 140 160 180 TJ , Junction Temperature (°C) Fig 4. Normalized On-Resistance Vs. Temperature IRFP3710PbF 6000 V GS , Gate-to-Source Voltage (V) 5000 C, Capacitance (pF) 20 V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd C oss = C ds + C gd V DS = 80V V DS = 50V V DS = 20V 16 Ciss 4000 I D = 28A 12 3000 Coss 2000 Crss 1000 0 1 10 100 8 4 FOR TEST CIRCUIT SEE FIGURE 13 0 A 0 VDS , Drain-to-Source Voltage (V) 80 120 160 200 A Q G , Total Gate Charge (nC) Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 1000 1000 OPERATION IN THIS AREA LIMITED BY R DS(on) I D , Drain Current (A) ISD , Reverse Drain Current (A) 40 100 TJ = 175°C TJ = 25°C 10 10µs 100 100µs 1ms 10 10ms VGS = 0V 1 0.4 0.8 1.2 1.6 VSD , Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage A 2.0 TC = 25°C TJ = 175°C Single Pulse 1 1 10 100 A 1000 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area IRFP3710PbF 60 VGS 50 ID , Drain Current (A) RD V DS D.U.T. RG + -VDD 40 10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 30 Fig 10a. Switching Time Test Circuit 20 VDS 10 0 90% 25 50 75 100 125 150 175 TC , Case Temperature ( °C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 1 D = 0.50 0.20 0.1 0.10 PDM 0.05 t1 0.02 0.01 0.01 0.00001 t2 SINGLE PULSE (THERMAL RESPONSE) 0.0001 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 1 15V L VDS D.U.T RG IAS 20V DRIVER + V - DD 0.01Ω tp Fig 12a. Unclamped Inductive Test Circuit A EAS , Single Pulse Avalanche Energy (mJ) IRFP3710PbF 1200 TOP 1000 BOTTOM 800 600 400 200 0 VDD = 25V 25 V(BR)DSS ID 11A 20A 28A 50 75 100 125 150 Starting TJ , Junction Temperature (°C) tp Fig 12c. Maximum Avalanche Energy Vs. Drain Current I AS Current Regulator Same Type as D.U.T. Fig 12b. Unclamped Inductive Waveforms 50KΩ QG 10 V QGS 12V .2µF .3µF D.U.T. QGD + V - DS VGS VG 3mA Charge Fig 13a. Basic Gate Charge Waveform IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit A 175 IRFP3710PbF Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + - - + RG • • • • Driver Gate Drive P.W. + dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Period D= - VDD P.W. Period VGS=10V D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS * IRFP3710PbF TO-247AC Package Outline Dimensions are shown in millimeters (inches) -D- 3.65 (.143) 3.55 (.140) 15.90 (.626) 15.30 (.602) -B- -A- 0.25 (.010) M D B M 2.50 (.089) 1.50 (.059) 4 5.50 (.217) 20.30 (.800) 19.70 (.775) 2X 1 2 5.30 (.209) 4.70 (.185) NOTES: 5.50 (.217) 4.50 (.177) 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH. 3 CONFORMS TO JEDEC OUTLINE TO-247-AC. 3 -C- 14.80 (.583) 14.20 (.559) 2.40 (.094) 2.00 (.079) 2X 5.45 (.215) 2X 4.30 (.170) 3.70 (.145) 0.80 (.031) 3X 0.40 (.016) 1.40 (.056) 3X 1.00 (.039) 0.25 (.010) M 2.60 (.102) 2.20 (.087) C A S 3.40 (.133) 3.00 (.118) LEAD ASSIGNMENTS Hexfet IGBT 1 -LEAD GateASSIGNMENTS 1 - Gate 1 GATE 2 - Drain 2 - Collector 2 - DRAIN 3 - Source 3 - Emitter 3 - SOURCE 4 - Drain 4 - DRAIN4 - Collector TO-247AC Part Marking Information EXAMPLE: T HIS IS AN IRFPE30 WIT H ASSEMBLY LOT CODE 5657 ASSEMBLED ON WW 35, 2000 IN THE AS SEMBLY LINE "H" Note: "P" in assembly line position indicates "Lead-Free" INT ERNATIONAL RECT IFIER LOGO ASSEMBLY LOT CODE PART NUMBER IRFPE30 56 035H 57 DAT E CODE YEAR 0 = 2000 WEEK 35 LINE H Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.05/05 Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/