PD - 94963 IRF3415PbF l l l l l l Advanced Process Technology Dynamic dv/dt Rating 175°C Operating Temperature Fast Switching Fully Avalanche Rated Lead-Free HEXFET® Power MOSFET D VDSS = 150V RDS(on) = 0.042Ω G Description ID = 43A S Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The TO-220 package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 watts. The low thermal resistance and low package cost of the TO-220 contribute to its wide acceptance throughout the industry. TO-220AB Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 srew Max. Units 43 30 150 200 1.3 ± 20 590 22 20 5.0 -55 to + 175 A W W/°C V mJ A mJ V/ns 300 (1.6mm from case ) 10 lbfin (1.1Nm) °C Thermal Resistance Parameter RθJC RθCS RθJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient Typ. Max. Units 0.50 0.75 62 °C/W 1/30/04 IRF3415PbF Electrical Characteristics @ TJ = 25°C (unless otherwise specified) RDS(on) VGS(th) g fs Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Qg Qgs Qgd td(on) tr td(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Min. 150 2.0 19 Typ. 0.17 12 55 71 69 IDSS Drain-to-Source Leakage Current LD Internal Drain Inductance 4.5 LS Internal Source Inductance 7.5 Ciss Coss C rss Input Capacitance Output Capacitance Reverse Transfer Capacitance 2400 640 340 V(BR)DSS ∆V(BR)DSS/∆TJ I GSS Max. Units Conditions V VGS = 0V, ID = 250µA V/°C Reference to 25°C, ID = 1mA 0.042 Ω VGS = 10V, ID = 22A 4.0 V VDS = VGS, I D = 250µA S VDS = 50V, ID = 22A 25 VDS = 150V, VGS = 0V µA 250 VDS = 120V, VGS = 0V, TJ = 150°C 100 VGS = 20V nA -100 VGS = -20V 200 ID = 22A 17 nC VDS = 120V 98 VGS = 10V, See Fig. 6 and 13 VDD = 75V ID = 22A ns RG = 2.5Ω RD = 3.3Ω, See Fig. 10 D Between lead, 6mm (0.25in.) nH G from package and center of die contact S VGS = 0V pF VDS = 25V = 1.0MHz, See Fig. 5 Source-Drain Ratings and Characteristics IS I SM VSD t rr Qrr Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Min. Typ. Max. Units 43 150 260 2.2 1.3 390 3.3 A V ns µC Conditions MOSFET symbol showing the G integral reverse p-n junction diode. TJ = 25°C, IS = 22A, VGS = 0V TJ = 25°C, IF = 22A di/dt = 100A/µs Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) VDD = 25V, starting TJ = 25°C, L = 2.4mH RG = 25Ω, IAS = 22A. (See Figure 12) ISD ≤ 22A, di/dt ≤ 820A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C Pulse width ≤ 300µs; duty cycle ≤ 2%. D S IRF3415PbF 1000 1000 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.5V 5.0V BOTTOM 4.5V VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.5V 5.0V BOTTOM 4.5V TOP I D , Drain-to-Source Current (A) I D , Drain-to-Source Current (A) TOP 100 100 4.5V 10 4.5V 20us PULSE WIDTH TJ = 25 oC 1 10 10 100 20us PULSE WIDTH TJ = 175 oC 1 Fig 1. Typical Output Characteristics RDS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) 3.0 TJ = 25 ° C 10 TJ = 175 ° C V DS = 50V 20µs PULSE WIDTH 4 5 6 7 8 9 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics 100 Fig 2. Typical Output Characteristics 1000 100 10 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) 10 ID = 37A 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 0 VGS = 10V 20 40 60 80 100 120 140 160 180 TJ , Junction Temperature ( oC) Fig 4. Normalized On-Resistance Vs. Temperature IRF3415PbF 6000 VGS , Gate-to-Source Voltage (V) 5000 C, Capacitance (pF) 20 VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd 4000 Ciss 3000 Coss 2000 Crss 1000 0 1 10 16 8 4 FOR TEST CIRCUIT SEE FIGURE 13 0 VDS , Drain-to-Source Voltage (V) 40 80 120 160 200 QG , Total Gate Charge (nC) Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 1000 1000 ISD , Reverse Drain Current (A) VDS = 120V VDS = 75V VDS = 30V 12 0 100 ID = 22A OPERATION IN THIS AREA LIMITED BY RDS(on) I D , Drain Current (A) 100 100 TJ = 175 o C 10 TJ = 25 o C 1 0.1 0.2 V GS = 0 V 0.6 1.0 1.4 VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 1.8 10us 100us 10 1 1ms 10ms TC = 25 o C TJ = 175 o C Single Pulse 1 10 100 1000 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area IRF3415PbF 50 RD V DS VGS ID , Drain Current (A) 40 D.U.T. RG 30 + -VDD 10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 20 Fig 10a. Switching Time Test Circuit 10 VDS 90% 0 25 50 75 100 125 150 175 TC , Case Temperature ( °C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 1 D = 0.50 0.20 0.1 0.10 PDM 0.05 t1 0.02 0.01 0.01 0.00001 t2 SINGLE PULSE (THERMAL RESPONSE) 0.0001 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 1 IRF3415PbF EAS , Single Pulse Avalanche Energy (mJ) 1400 TOP 1200 15V BOTTOM ID 9.0A 16A 22A 1000 L VDS D.U.T RG IAS 20V DRIVER + V - DD 0.01Ω tp Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS A 800 600 400 200 0 25 50 75 100 125 150 175 Starting TJ , Junction Temperature (oC) tp Fig 12c. Maximum Avalanche Energy Vs. Drain Current I AS Current Regulator Same Type as D.U.T. Fig 12b. Unclamped Inductive Waveforms 50KΩ QG 10 V QGS 12V .2µF .3µF D.U.T. QGD + V - DS VGS VG 3mA Charge Fig 13a. Basic Gate Charge Waveform IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit IRF3415PbF Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + - - + RG • • • • Driver Gate Drive P.W. + dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Period D= - VDD P.W. Period VGS=10V D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS * IRF3415PbF TO-220AB Package Outline Dimensions are shown in millimeters (inches) 10.54 (.415) 10.29 (.405) 2.87 (.113) 2.62 (.103) -B- 3.78 (.149) 3.54 (.139) 4.69 (.185) 4.20 (.165) -A- 1.32 (.052) 1.22 (.048) 6.47 (.255) 6.10 (.240) 4 15.24 (.600) 14.84 (.584) LEAD ASSIGNMENTS 1.15 (.045) MIN 1 2 3 4- DRAIN 14.09 (.555) 13.47 (.530) 4- COLLECTOR 4.06 (.160) 3.55 (.140) 3X 3X LEAD ASSIGNMENTS IGBTs, CoPACK 1 - GATE 2 - DRAIN 1- GATE 1- GATE 3 - SOURCE 2- COLLECTOR 2- DRAIN 3- SOURCE 3- EMITTER 4 - DRAIN HEXFET 1.40 (.055) 1.15 (.045) 0.93 (.037) 0.69 (.027) 0.36 (.014) 3X M B A M 0.55 (.022) 0.46 (.018) 2.92 (.115) 2.64 (.104) 2.54 (.100) 2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS. TO-220AB Part Marking Information E XAMPL E : T HIS IS AN IR F 1010 LOT CODE 1789 AS S E MB L E D ON WW 19, 1997 IN T H E AS S E MB LY L INE "C" Note: "P" in assembly line position indicates "Lead-Free" INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y LOT CODE PAR T NU MB E R DAT E CODE YE AR 7 = 1997 WE E K 19 L INE C Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.01/04